drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c

   1 /*
   2  * Copyright © 2007 David Airlie
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *     David Airlie
  25  */
  26 #include <linux/module.h>
  27 #include <linux/slab.h>
  28 #include <linux/pm_runtime.h>
  29
  30 #include <drm/drmP.h>
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/amdgpu_drm.h>
  34 #include "amdgpu.h"
  35 #include "cikd.h"
  36
  37 #include <drm/drm_fb_helper.h>
  38
  39 #include <linux/vga_switcheroo.h>
  40
  41 #include "amdgpu_display.h"
  42
  43 /* object hierarchy -
  44    this contains a helper + a amdgpu fb
  45    the helper contains a pointer to amdgpu framebuffer baseclass.
  46 */
  47
  48 static int
  49 amdgpufb_open(struct fb_info *info, int user)
  50 {
  51         struct amdgpu_fbdev *rfbdev = info->par;
  52         struct amdgpu_device *adev = rfbdev->adev;
  53         int ret = pm_runtime_get_sync(adev->ddev->dev);
  54         if (ret < 0 && ret != -EACCES) {
  55                 pm_runtime_mark_last_busy(adev->ddev->dev);
  56                 pm_runtime_put_autosuspend(adev->ddev->dev);
  57                 return ret;
  58         }
  59         return 0;
  60 }
  61
  62 static int
  63 amdgpufb_release(struct fb_info *info, int user)
  64 {
  65         struct amdgpu_fbdev *rfbdev = info->par;
  66         struct amdgpu_device *adev = rfbdev->adev;
  67
  68         pm_runtime_mark_last_busy(adev->ddev->dev);
  69         pm_runtime_put_autosuspend(adev->ddev->dev);
  70         return 0;
  71 }
  72
  73 static struct fb_ops amdgpufb_ops = {
  74         .owner = THIS_MODULE,
  75         DRM_FB_HELPER_DEFAULT_OPS,
  76         .fb_open = amdgpufb_open,
  77         .fb_release = amdgpufb_release,
  78         .fb_fillrect = drm_fb_helper_cfb_fillrect,
  79         .fb_copyarea = drm_fb_helper_cfb_copyarea,
  80         .fb_imageblit = drm_fb_helper_cfb_imageblit,
  81 };
  82
  83
  84 int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int cpp, bool tiled)
  85 {
  86         int aligned = width;
  87         int pitch_mask = 0;
  88
  89         switch (cpp) {
  90         case 1:
  91                 pitch_mask = 255;
  92                 break;
  93         case 2:
  94                 pitch_mask = 127;
  95                 break;
  96         case 3:
  97         case 4:
  98                 pitch_mask = 63;
  99                 break;
 100         }
 101
 102         aligned += pitch_mask;
 103         aligned &= ~pitch_mask;
 104         return aligned * cpp;
 105 }
 106
 107 static void amdgpufb_destroy_pinned_object(struct drm_gem_object *gobj)
 108 {
 109         struct amdgpu_bo *abo = gem_to_amdgpu_bo(gobj);
 110         int ret;
 111
 112         ret = amdgpu_bo_reserve(abo, true);
 113         if (likely(ret == 0)) {
 114                 amdgpu_bo_kunmap(abo);
 115                 amdgpu_bo_unpin(abo);
 116                 amdgpu_bo_unreserve(abo);
 117         }
 118         drm_gem_object_put_unlocked(gobj);
 119 }
 120
 121 static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
 122                                          struct drm_mode_fb_cmd2 *mode_cmd,
 123                                          struct drm_gem_object **gobj_p)
 124 {
 125         struct amdgpu_device *adev = rfbdev->adev;
 126         struct drm_gem_object *gobj = NULL;
 127         struct amdgpu_bo *abo = NULL;
 128         bool fb_tiled = false; /* useful for testing */
 129         u32 tiling_flags = 0, domain;
 130         int ret;
 131         int aligned_size, size;
 132         int height = mode_cmd->height;
 133         u32 cpp;
 134
 135         cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0);
 136
 137         /* need to align pitch with crtc limits */
 138         mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
 139                                                   fb_tiled);
 140         domain = amdgpu_display_supported_domains(adev);
 141
 142         height = ALIGN(mode_cmd->height, 8);
 143         size = mode_cmd->pitches[0] * height;
 144         aligned_size = ALIGN(size, PAGE_SIZE);
 145         ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,
 146                                        AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
 147                                        AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
 148                                        AMDGPU_GEM_CREATE_VRAM_CLEARED,
 149                                        ttm_bo_type_kernel, NULL, &gobj);
 150         if (ret) {
 151                 pr_err("failed to allocate framebuffer (%d)\n", aligned_size);
 152                 return -ENOMEM;
 153         }
 154         abo = gem_to_amdgpu_bo(gobj);
 155
 156         if (fb_tiled)
 157                 tiling_flags = AMDGPU_TILING_SET(ARRAY_MODE, GRPH_ARRAY_2D_TILED_THIN1);
 158
 159         ret = amdgpu_bo_reserve(abo, false);
 160         if (unlikely(ret != 0))
 161                 goto out_unref;
 162
 163         if (tiling_flags) {
 164                 ret = amdgpu_bo_set_tiling_flags(abo,
 165                                                  tiling_flags);
 166                 if (ret)
 167                         dev_err(adev->dev, "FB failed to set tiling flags\n");
 168         }
 169
 170
 171         ret = amdgpu_bo_pin(abo, domain);
 172         if (ret) {
 173                 amdgpu_bo_unreserve(abo);
 174                 goto out_unref;
 175         }
 176
 177         ret = amdgpu_ttm_alloc_gart(&abo->tbo);
 178         if (ret) {
 179                 amdgpu_bo_unreserve(abo);
 180                 dev_err(adev->dev, "%p bind failed\n", abo);
 181                 goto out_unref;
 182         }
 183
 184         ret = amdgpu_bo_kmap(abo, NULL);
 185         amdgpu_bo_unreserve(abo);
 186         if (ret) {
 187                 goto out_unref;
 188         }
 189
 190         *gobj_p = gobj;
 191         return 0;
 192 out_unref:
 193         amdgpufb_destroy_pinned_object(gobj);
 194         *gobj_p = NULL;
 195         return ret;
 196 }
 197
 198 static int amdgpufb_create(struct drm_fb_helper *helper,
 199                            struct drm_fb_helper_surface_size *sizes)
 200 {
 201         struct amdgpu_fbdev *rfbdev = (struct amdgpu_fbdev *)helper;
 202         struct amdgpu_device *adev = rfbdev->adev;
 203         struct fb_info *info;
 204         struct drm_framebuffer *fb = NULL;
 205         struct drm_mode_fb_cmd2 mode_cmd;
 206         struct drm_gem_object *gobj = NULL;
 207         struct amdgpu_bo *abo = NULL;
 208         int ret;
 209         unsigned long tmp;
 210
 211         mode_cmd.width = sizes->surface_width;
 212         mode_cmd.height = sizes->surface_height;
 213
 214         if (sizes->surface_bpp == 24)
 215                 sizes->surface_bpp = 32;
 216
 217         mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
 218                                                           sizes->surface_depth);
 219
 220         ret = amdgpufb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
 221         if (ret) {
 222                 DRM_ERROR("failed to create fbcon object %d\n", ret);
 223                 return ret;
 224         }
 225
 226         abo = gem_to_amdgpu_bo(gobj);
 227
 228         /* okay we have an object now allocate the framebuffer */
 229         info = drm_fb_helper_alloc_fbi(helper);
 230         if (IS_ERR(info)) {
 231                 ret = PTR_ERR(info);
 232                 goto out;
 233         }
 234
 235         info->par = rfbdev;
 236         info->skip_vt_switch = true;
 237
 238         ret = amdgpu_display_framebuffer_init(adev->ddev, &rfbdev->rfb,
 239                                               &mode_cmd, gobj);
 240         if (ret) {
 241                 DRM_ERROR("failed to initialize framebuffer %d\n", ret);
 242                 goto out;
 243         }
 244
 245         fb = &rfbdev->rfb.base;
 246
 247         /* setup helper */
 248         rfbdev->helper.fb = fb;
 249
 250         strcpy(info->fix.id, "amdgpudrmfb");
 251
 252         drm_fb_helper_fill_fix(info, fb->pitches[0], fb->format->depth);
 253
 254         info->fbops = &amdgpufb_ops;
 255
 256         tmp = amdgpu_bo_gpu_offset(abo) - adev->gmc.vram_start;
 257         info->fix.smem_start = adev->gmc.aper_base + tmp;
 258         info->fix.smem_len = amdgpu_bo_size(abo);
 259         info->screen_base = amdgpu_bo_kptr(abo);
 260         info->screen_size = amdgpu_bo_size(abo);
 261
 262         drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
 263
 264         /* setup aperture base/size for vesafb takeover */
 265         info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base;
 266         info->apertures->ranges[0].size = adev->gmc.aper_size;
 267
 268         /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
 269
 270         if (info->screen_base == NULL) {
 271                 ret = -ENOSPC;
 272                 goto out;
 273         }
 274
 275         DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);
 276         DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)adev->gmc.aper_base);
 277         DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(abo));
 278         DRM_INFO("fb depth is %d\n", fb->format->depth);
 279         DRM_INFO("   pitch is %d\n", fb->pitches[0]);
 280
 281         vga_switcheroo_client_fb_set(adev->ddev->pdev, info);
 282         return 0;
 283
 284 out:
 285         if (abo) {
 286
 287         }
 288         if (fb && ret) {
 289                 drm_gem_object_put_unlocked(gobj);
 290                 drm_framebuffer_unregister_private(fb);
 291                 drm_framebuffer_cleanup(fb);
 292                 kfree(fb);
 293         }
 294         return ret;
 295 }
 296
 297 static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev *rfbdev)
 298 {
 299         struct amdgpu_framebuffer *rfb = &rfbdev->rfb;
 300         int i;
 301
 302         drm_fb_helper_unregister_fbi(&rfbdev->helper);
 303
 304         if (rfb->base.obj[0]) {
 305                 for (i = 0; i < rfb->base.format->num_planes; i++)
 306                         drm_gem_object_put(rfb->base.obj[0]);
 307                 amdgpufb_destroy_pinned_object(rfb->base.obj[0]);
 308                 rfb->base.obj[0] = NULL;
 309                 drm_framebuffer_unregister_private(&rfb->base);
 310                 drm_framebuffer_cleanup(&rfb->base);
 311         }
 312         drm_fb_helper_fini(&rfbdev->helper);
 313
 314         return 0;
 315 }
 316
 317 static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = {
 318         .fb_probe = amdgpufb_create,
 319 };
 320
 321 int amdgpu_fbdev_init(struct amdgpu_device *adev)
 322 {
 323         struct amdgpu_fbdev *rfbdev;
 324         int bpp_sel = 32;
 325         int ret;
 326
 327         /* don't init fbdev on hw without DCE */
 328         if (!adev->mode_info.mode_config_initialized)
 329                 return 0;
 330
 331         /* don't init fbdev if there are no connectors */
 332         if (list_empty(&adev->ddev->mode_config.connector_list))
 333                 return 0;
 334
 335         /* select 8 bpp console on low vram cards */
 336         if (adev->gmc.real_vram_size <= (32*1024*1024))
 337                 bpp_sel = 8;
 338
 339         rfbdev = kzalloc(sizeof(struct amdgpu_fbdev), GFP_KERNEL);
 340         if (!rfbdev)
 341                 return -ENOMEM;
 342
 343         rfbdev->adev = adev;
 344         adev->mode_info.rfbdev = rfbdev;
 345
 346         drm_fb_helper_prepare(adev->ddev, &rfbdev->helper,
 347                         &amdgpu_fb_helper_funcs);
 348
 349         ret = drm_fb_helper_init(adev->ddev, &rfbdev->helper,
 350                                  AMDGPUFB_CONN_LIMIT);
 351         if (ret) {
 352                 kfree(rfbdev);
 353                 return ret;
 354         }
 355
 356         drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
 357
 358         /* disable all the possible outputs/crtcs before entering KMS mode */
 359         if (!amdgpu_device_has_dc_support(adev))
 360                 drm_helper_disable_unused_functions(adev->ddev);
 361
 362         drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
 363         return 0;
 364 }
 365
 366 void amdgpu_fbdev_fini(struct amdgpu_device *adev)
 367 {
 368         if (!adev->mode_info.rfbdev)
 369                 return;
 370
 371         amdgpu_fbdev_destroy(adev->ddev, adev->mode_info.rfbdev);
 372         kfree(adev->mode_info.rfbdev);
 373         adev->mode_info.rfbdev = NULL;
 374 }
 375
 376 void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state)
 377 {
 378         if (adev->mode_info.rfbdev)
 379                 drm_fb_helper_set_suspend_unlocked(&adev->mode_info.rfbdev->helper,
 380                                                    state);
 381 }
 382
 383 int amdgpu_fbdev_total_size(struct amdgpu_device *adev)
 384 {
 385         struct amdgpu_bo *robj;
 386         int size = 0;
 387
 388         if (!adev->mode_info.rfbdev)
 389                 return 0;
 390
 391         robj = gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0]);
 392         size += amdgpu_bo_size(robj);
 393         return size;
 394 }
 395
 396 bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj)
 397 {
 398         if (!adev->mode_info.rfbdev)
 399                 return false;
 400         if (robj == gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0]))
 401                 return true;
 402         return false;
 403 }