drivers/gpu/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include "dm_services.h"
  27
  28 /*
  29  * Pre-requisites: headers required by header of this unit
  30  */
  31 #include "include/i2caux_interface.h"
  32 #include "../engine.h"
  33 #include "../i2c_engine.h"
  34 #include "../i2c_sw_engine.h"
  35
  36 /*
  37  * Header of this unit
  38  */
  39
  40 #include "i2c_sw_engine_dce80.h"
  41
  42 /*
  43  * Post-requisites: headers required by this unit
  44  */
  45
  46 #include "dce/dce_8_0_d.h"
  47 #include "dce/dce_8_0_sh_mask.h"
  48
  49 /*
  50  * This unit
  51  */
  52
  53 static const uint32_t ddc_hw_status_addr[] = {
  54         mmDC_I2C_DDC1_HW_STATUS,
  55         mmDC_I2C_DDC2_HW_STATUS,
  56         mmDC_I2C_DDC3_HW_STATUS,
  57         mmDC_I2C_DDC4_HW_STATUS,
  58         mmDC_I2C_DDC5_HW_STATUS,
  59         mmDC_I2C_DDC6_HW_STATUS,
  60         mmDC_I2C_DDCVGA_HW_STATUS
  61 };
  62
  63 /*
  64  * @brief
  65  * Cast 'struct i2c_sw_engine *'
  66  * to 'struct i2c_sw_engine_dce80 *'
  67  */
  68 #define FROM_I2C_SW_ENGINE(ptr) \
  69         container_of((ptr), struct i2c_sw_engine_dce80, base)
  70
  71 /*
  72  * @brief
  73  * Cast 'struct i2c_engine *'
  74  * to 'struct i2c_sw_engine_dce80 *'
  75  */
  76 #define FROM_I2C_ENGINE(ptr) \
  77         FROM_I2C_SW_ENGINE(container_of((ptr), struct i2c_sw_engine, base))
  78
  79 /*
  80  * @brief
  81  * Cast 'struct engine *'
  82  * to 'struct i2c_sw_engine_dce80 *'
  83  */
  84 #define FROM_ENGINE(ptr) \
  85         FROM_I2C_ENGINE(container_of((ptr), struct i2c_engine, base))
  86
  87 static void release_engine(
  88         struct engine *engine)
  89 {
  90
  91 }
  92
  93 static void destruct(
  94         struct i2c_sw_engine_dce80 *engine)
  95 {
  96         dal_i2c_sw_engine_destruct(&engine->base);
  97 }
  98
  99 static void destroy(
 100         struct i2c_engine **engine)
 101 {
 102         struct i2c_sw_engine_dce80 *sw_engine = FROM_I2C_ENGINE(*engine);
 103
 104         destruct(sw_engine);
 105
 106         kfree(sw_engine);
 107
 108         *engine = NULL;
 109 }
 110
 111 static bool acquire_engine(
 112         struct i2c_engine *engine,
 113         struct ddc *ddc_handle)
 114 {
 115         return dal_i2caux_i2c_sw_engine_acquire_engine(engine, ddc_handle);
 116 }
 117
 118 static const struct i2c_engine_funcs i2c_engine_funcs = {
 119         .acquire_engine = acquire_engine,
 120         .destroy = destroy,
 121         .get_speed = dal_i2c_sw_engine_get_speed,
 122         .set_speed = dal_i2c_sw_engine_set_speed,
 123         .setup_engine = dal_i2c_engine_setup_i2c_engine,
 124         .submit_channel_request = dal_i2c_sw_engine_submit_channel_request,
 125         .process_channel_reply = dal_i2c_engine_process_channel_reply,
 126         .get_channel_status = dal_i2c_sw_engine_get_channel_status,
 127 };
 128
 129 static const struct engine_funcs engine_funcs = {
 130         .release_engine = release_engine,
 131         .get_engine_type = dal_i2c_sw_engine_get_engine_type,
 132         .acquire = dal_i2c_engine_acquire,
 133         .submit_request = dal_i2c_sw_engine_submit_request,
 134 };
 135
 136 static void construct(
 137         struct i2c_sw_engine_dce80 *engine,
 138         const struct i2c_sw_engine_dce80_create_arg *arg)
 139 {
 140         struct i2c_sw_engine_create_arg arg_base;
 141
 142         arg_base.ctx = arg->ctx;
 143         arg_base.default_speed = arg->default_speed;
 144
 145         dal_i2c_sw_engine_construct(&engine->base, &arg_base);
 146
 147         engine->base.base.base.funcs = &engine_funcs;
 148         engine->base.base.funcs = &i2c_engine_funcs;
 149         engine->base.default_speed = arg->default_speed;
 150         engine->engine_id = arg->engine_id;
 151 }
 152
 153 struct i2c_engine *dal_i2c_sw_engine_dce80_create(
 154         const struct i2c_sw_engine_dce80_create_arg *arg)
 155 {
 156         struct i2c_sw_engine_dce80 *engine;
 157
 158         if (!arg) {
 159                 BREAK_TO_DEBUGGER();
 160                 return NULL;
 161         }
 162
 163         engine = kzalloc(sizeof(struct i2c_sw_engine_dce80), GFP_KERNEL);
 164
 165         if (!engine) {
 166                 BREAK_TO_DEBUGGER();
 167                 return NULL;
 168         }
 169
 170         construct(engine, arg);
 171         return &engine->base.base;
 172 }
 173