drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

   1 /*
   2  * Copyright (C) 2014 Traphandler
   3  * Copyright (C) 2014 Free Electrons
   4  *
   5  * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
   6  * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License version 2 as published by
  10  * the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <linux/clk.h>
  22 #include <linux/pm.h>
  23 #include <linux/pm_runtime.h>
  24 #include <linux/pinctrl/consumer.h>
  25
  26 #include <drm/drm_crtc.h>
  27 #include <drm/drm_crtc_helper.h>
  28 #include <drm/drmP.h>
  29
  30 #include <video/videomode.h>
  31
  32 #include "atmel_hlcdc_dc.h"
  33
  34 /**
  35  * Atmel HLCDC CRTC state structure
  36  *
  37  * @base: base CRTC state
  38  * @output_mode: RGBXXX output mode
  39  */
  40 struct atmel_hlcdc_crtc_state {
  41         struct drm_crtc_state base;
  42         unsigned int output_mode;
  43 };
  44
  45 static inline struct atmel_hlcdc_crtc_state *
  46 drm_crtc_state_to_atmel_hlcdc_crtc_state(struct drm_crtc_state *state)
  47 {
  48         return container_of(state, struct atmel_hlcdc_crtc_state, base);
  49 }
  50
  51 /**
  52  * Atmel HLCDC CRTC structure
  53  *
  54  * @base: base DRM CRTC structure
  55  * @hlcdc: pointer to the atmel_hlcdc structure provided by the MFD device
  56  * @event: pointer to the current page flip event
  57  * @id: CRTC id (returned by drm_crtc_index)
  58  * @enabled: CRTC state
  59  */
  60 struct atmel_hlcdc_crtc {
  61         struct drm_crtc base;
  62         struct atmel_hlcdc_dc *dc;
  63         struct drm_pending_vblank_event *event;
  64         int id;
  65         bool enabled;
  66 };
  67
  68 static inline struct atmel_hlcdc_crtc *
  69 drm_crtc_to_atmel_hlcdc_crtc(struct drm_crtc *crtc)
  70 {
  71         return container_of(crtc, struct atmel_hlcdc_crtc, base);
  72 }
  73
  74 static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
  75 {
  76         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
  77         struct regmap *regmap = crtc->dc->hlcdc->regmap;
  78         struct drm_display_mode *adj = &c->state->adjusted_mode;
  79         struct atmel_hlcdc_crtc_state *state;
  80         unsigned long mode_rate;
  81         struct videomode vm;
  82         unsigned long prate;
  83         unsigned int cfg;
  84         int div, ret;
  85
  86         ret = clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
  87         if (ret)
  88                 return;
  89
  90         vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
  91         vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end;
  92         vm.vsync_len = adj->crtc_vsync_end - adj->crtc_vsync_start;
  93         vm.hfront_porch = adj->crtc_hsync_start - adj->crtc_hdisplay;
  94         vm.hback_porch = adj->crtc_htotal - adj->crtc_hsync_end;
  95         vm.hsync_len = adj->crtc_hsync_end - adj->crtc_hsync_start;
  96
  97         regmap_write(regmap, ATMEL_HLCDC_CFG(1),
  98                      (vm.hsync_len - 1) | ((vm.vsync_len - 1) << 16));
  99
 100         regmap_write(regmap, ATMEL_HLCDC_CFG(2),
 101                      (vm.vfront_porch - 1) | (vm.vback_porch << 16));
 102
 103         regmap_write(regmap, ATMEL_HLCDC_CFG(3),
 104                      (vm.hfront_porch - 1) | ((vm.hback_porch - 1) << 16));
 105
 106         regmap_write(regmap, ATMEL_HLCDC_CFG(4),
 107                      (adj->crtc_hdisplay - 1) |
 108                      ((adj->crtc_vdisplay - 1) << 16));
 109
 110         cfg = 0;
 111
 112         prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);
 113         mode_rate = adj->crtc_clock * 1000;
 114         if ((prate / 2) < mode_rate) {
 115                 prate *= 2;
 116                 cfg |= ATMEL_HLCDC_CLKSEL;
 117         }
 118
 119         div = DIV_ROUND_UP(prate, mode_rate);
 120         if (div < 2)
 121                 div = 2;
 122
 123         cfg |= ATMEL_HLCDC_CLKDIV(div);
 124
 125         regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0),
 126                            ATMEL_HLCDC_CLKSEL | ATMEL_HLCDC_CLKDIV_MASK |
 127                            ATMEL_HLCDC_CLKPOL, cfg);
 128
 129         cfg = 0;
 130
 131         if (adj->flags & DRM_MODE_FLAG_NVSYNC)
 132                 cfg |= ATMEL_HLCDC_VSPOL;
 133
 134         if (adj->flags & DRM_MODE_FLAG_NHSYNC)
 135                 cfg |= ATMEL_HLCDC_HSPOL;
 136
 137         state = drm_crtc_state_to_atmel_hlcdc_crtc_state(c->state);
 138         cfg |= state->output_mode << 8;
 139
 140         regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
 141                            ATMEL_HLCDC_HSPOL | ATMEL_HLCDC_VSPOL |
 142                            ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |
 143                            ATMEL_HLCDC_DISPPOL | ATMEL_HLCDC_DISPDLY |
 144                            ATMEL_HLCDC_VSPSU | ATMEL_HLCDC_VSPHO |
 145                            ATMEL_HLCDC_GUARDTIME_MASK | ATMEL_HLCDC_MODE_MASK,
 146                            cfg);
 147
 148         clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
 149 }
 150
 151 static bool atmel_hlcdc_crtc_mode_fixup(struct drm_crtc *c,
 152                                         const struct drm_display_mode *mode,
 153                                         struct drm_display_mode *adjusted_mode)
 154 {
 155         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 156
 157         return atmel_hlcdc_dc_mode_valid(crtc->dc, adjusted_mode) == MODE_OK;
 158 }
 159
 160 static void atmel_hlcdc_crtc_disable(struct drm_crtc *c)
 161 {
 162         struct drm_device *dev = c->dev;
 163         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 164         struct regmap *regmap = crtc->dc->hlcdc->regmap;
 165         unsigned int status;
 166
 167         if (!crtc->enabled)
 168                 return;
 169
 170         drm_crtc_vblank_off(c);
 171
 172         pm_runtime_get_sync(dev->dev);
 173
 174         regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_DISP);
 175         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 176                (status & ATMEL_HLCDC_DISP))
 177                 cpu_relax();
 178
 179         regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_SYNC);
 180         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 181                (status & ATMEL_HLCDC_SYNC))
 182                 cpu_relax();
 183
 184         regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_PIXEL_CLK);
 185         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 186                (status & ATMEL_HLCDC_PIXEL_CLK))
 187                 cpu_relax();
 188
 189         clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
 190         pinctrl_pm_select_sleep_state(dev->dev);
 191
 192         pm_runtime_allow(dev->dev);
 193
 194         pm_runtime_put_sync(dev->dev);
 195
 196         crtc->enabled = false;
 197 }
 198
 199 static void atmel_hlcdc_crtc_enable(struct drm_crtc *c)
 200 {
 201         struct drm_device *dev = c->dev;
 202         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 203         struct regmap *regmap = crtc->dc->hlcdc->regmap;
 204         unsigned int status;
 205
 206         if (crtc->enabled)
 207                 return;
 208
 209         pm_runtime_get_sync(dev->dev);
 210
 211         pm_runtime_forbid(dev->dev);
 212
 213         pinctrl_pm_select_default_state(dev->dev);
 214         clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
 215
 216         regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_PIXEL_CLK);
 217         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 218                !(status & ATMEL_HLCDC_PIXEL_CLK))
 219                 cpu_relax();
 220
 221
 222         regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_SYNC);
 223         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 224                !(status & ATMEL_HLCDC_SYNC))
 225                 cpu_relax();
 226
 227         regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_DISP);
 228         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 229                !(status & ATMEL_HLCDC_DISP))
 230                 cpu_relax();
 231
 232         pm_runtime_put_sync(dev->dev);
 233
 234         drm_crtc_vblank_on(c);
 235
 236         crtc->enabled = true;
 237 }
 238
 239 void atmel_hlcdc_crtc_suspend(struct drm_crtc *c)
 240 {
 241         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 242
 243         if (crtc->enabled) {
 244                 atmel_hlcdc_crtc_disable(c);
 245                 /* save enable state for resume */
 246                 crtc->enabled = true;
 247         }
 248 }
 249
 250 void atmel_hlcdc_crtc_resume(struct drm_crtc *c)
 251 {
 252         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 253
 254         if (crtc->enabled) {
 255                 crtc->enabled = false;
 256                 atmel_hlcdc_crtc_enable(c);
 257         }
 258 }
 259
 260 #define ATMEL_HLCDC_RGB444_OUTPUT       BIT(0)
 261 #define ATMEL_HLCDC_RGB565_OUTPUT       BIT(1)
 262 #define ATMEL_HLCDC_RGB666_OUTPUT       BIT(2)
 263 #define ATMEL_HLCDC_RGB888_OUTPUT       BIT(3)
 264 #define ATMEL_HLCDC_OUTPUT_MODE_MASK    GENMASK(3, 0)
 265
 266 static int atmel_hlcdc_crtc_select_output_mode(struct drm_crtc_state *state)
 267 {
 268         unsigned int output_fmts = ATMEL_HLCDC_OUTPUT_MODE_MASK;
 269         struct atmel_hlcdc_crtc_state *hstate;
 270         struct drm_connector_state *cstate;
 271         struct drm_connector *connector;
 272         struct atmel_hlcdc_crtc *crtc;
 273         int i;
 274
 275         crtc = drm_crtc_to_atmel_hlcdc_crtc(state->crtc);
 276
 277         for_each_connector_in_state(state->state, connector, cstate, i) {
 278                 struct drm_display_info *info = &connector->display_info;
 279                 unsigned int supported_fmts = 0;
 280                 int j;
 281
 282                 if (!cstate->crtc)
 283                         continue;
 284
 285                 for (j = 0; j < info->num_bus_formats; j++) {
 286                         switch (info->bus_formats[j]) {
 287                         case MEDIA_BUS_FMT_RGB444_1X12:
 288                                 supported_fmts |= ATMEL_HLCDC_RGB444_OUTPUT;
 289                                 break;
 290                         case MEDIA_BUS_FMT_RGB565_1X16:
 291                                 supported_fmts |= ATMEL_HLCDC_RGB565_OUTPUT;
 292                                 break;
 293                         case MEDIA_BUS_FMT_RGB666_1X18:
 294                                 supported_fmts |= ATMEL_HLCDC_RGB666_OUTPUT;
 295                                 break;
 296                         case MEDIA_BUS_FMT_RGB888_1X24:
 297                                 supported_fmts |= ATMEL_HLCDC_RGB888_OUTPUT;
 298                                 break;
 299                         default:
 300                                 break;
 301                         }
 302                 }
 303
 304                 if (crtc->dc->desc->conflicting_output_formats)
 305                         output_fmts &= supported_fmts;
 306                 else
 307                         output_fmts |= supported_fmts;
 308         }
 309
 310         if (!output_fmts)
 311                 return -EINVAL;
 312
 313         hstate = drm_crtc_state_to_atmel_hlcdc_crtc_state(state);
 314         hstate->output_mode = fls(output_fmts) - 1;
 315
 316         return 0;
 317 }
 318
 319 static int atmel_hlcdc_crtc_atomic_check(struct drm_crtc *c,
 320                                          struct drm_crtc_state *s)
 321 {
 322         int ret;
 323
 324         ret = atmel_hlcdc_crtc_select_output_mode(s);
 325         if (ret)
 326                 return ret;
 327
 328         ret = atmel_hlcdc_plane_prepare_disc_area(s);
 329         if (ret)
 330                 return ret;
 331
 332         return atmel_hlcdc_plane_prepare_ahb_routing(s);
 333 }
 334
 335 static void atmel_hlcdc_crtc_atomic_begin(struct drm_crtc *c,
 336                                           struct drm_crtc_state *old_s)
 337 {
 338         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 339
 340         if (c->state->event) {
 341                 c->state->event->pipe = drm_crtc_index(c);
 342
 343                 WARN_ON(drm_crtc_vblank_get(c) != 0);
 344
 345                 crtc->event = c->state->event;
 346                 c->state->event = NULL;
 347         }
 348 }
 349
 350 static void atmel_hlcdc_crtc_atomic_flush(struct drm_crtc *crtc,
 351                                           struct drm_crtc_state *old_s)
 352 {
 353         /* TODO: write common plane control register if available */
 354 }
 355
 356 static const struct drm_crtc_helper_funcs lcdc_crtc_helper_funcs = {
 357         .mode_fixup = atmel_hlcdc_crtc_mode_fixup,
 358         .mode_set = drm_helper_crtc_mode_set,
 359         .mode_set_nofb = atmel_hlcdc_crtc_mode_set_nofb,
 360         .mode_set_base = drm_helper_crtc_mode_set_base,
 361         .disable = atmel_hlcdc_crtc_disable,
 362         .enable = atmel_hlcdc_crtc_enable,
 363         .atomic_check = atmel_hlcdc_crtc_atomic_check,
 364         .atomic_begin = atmel_hlcdc_crtc_atomic_begin,
 365         .atomic_flush = atmel_hlcdc_crtc_atomic_flush,
 366 };
 367
 368 static void atmel_hlcdc_crtc_destroy(struct drm_crtc *c)
 369 {
 370         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 371
 372         drm_crtc_cleanup(c);
 373         kfree(crtc);
 374 }
 375
 376 static void atmel_hlcdc_crtc_finish_page_flip(struct atmel_hlcdc_crtc *crtc)
 377 {
 378         struct drm_device *dev = crtc->base.dev;
 379         unsigned long flags;
 380
 381         spin_lock_irqsave(&dev->event_lock, flags);
 382         if (crtc->event) {
 383                 drm_crtc_send_vblank_event(&crtc->base, crtc->event);
 384                 drm_crtc_vblank_put(&crtc->base);
 385                 crtc->event = NULL;
 386         }
 387         spin_unlock_irqrestore(&dev->event_lock, flags);
 388 }
 389
 390 void atmel_hlcdc_crtc_irq(struct drm_crtc *c)
 391 {
 392         drm_crtc_handle_vblank(c);
 393         atmel_hlcdc_crtc_finish_page_flip(drm_crtc_to_atmel_hlcdc_crtc(c));
 394 }
 395
 396 static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
 397 {
 398         struct atmel_hlcdc_crtc_state *state;
 399
 400         if (crtc->state) {
 401                 __drm_atomic_helper_crtc_destroy_state(crtc->state);
 402                 state = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
 403                 kfree(state);
 404                 crtc->state = NULL;
 405         }
 406
 407         state = kzalloc(sizeof(*state), GFP_KERNEL);
 408         if (state) {
 409                 crtc->state = &state->base;
 410                 crtc->state->crtc = crtc;
 411         }
 412 }
 413
 414 static struct drm_crtc_state *
 415 atmel_hlcdc_crtc_duplicate_state(struct drm_crtc *crtc)
 416 {
 417         struct atmel_hlcdc_crtc_state *state, *cur;
 418
 419         if (WARN_ON(!crtc->state))
 420                 return NULL;
 421
 422         state = kmalloc(sizeof(*state), GFP_KERNEL);
 423         if (!state)
 424                 return NULL;
 425         __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
 426
 427         cur = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
 428         state->output_mode = cur->output_mode;
 429
 430         return &state->base;
 431 }
 432
 433 static void atmel_hlcdc_crtc_destroy_state(struct drm_crtc *crtc,
 434                                            struct drm_crtc_state *s)
 435 {
 436         struct atmel_hlcdc_crtc_state *state;
 437
 438         state = drm_crtc_state_to_atmel_hlcdc_crtc_state(s);
 439         __drm_atomic_helper_crtc_destroy_state(s);
 440         kfree(state);
 441 }
 442
 443 static const struct drm_crtc_funcs atmel_hlcdc_crtc_funcs = {
 444         .page_flip = drm_atomic_helper_page_flip,
 445         .set_config = drm_atomic_helper_set_config,
 446         .destroy = atmel_hlcdc_crtc_destroy,
 447         .reset = atmel_hlcdc_crtc_reset,
 448         .atomic_duplicate_state =  atmel_hlcdc_crtc_duplicate_state,
 449         .atomic_destroy_state = atmel_hlcdc_crtc_destroy_state,
 450 };
 451
 452 int atmel_hlcdc_crtc_create(struct drm_device *dev)
 453 {
 454         struct atmel_hlcdc_dc *dc = dev->dev_private;
 455         struct atmel_hlcdc_planes *planes = dc->planes;
 456         struct atmel_hlcdc_crtc *crtc;
 457         int ret;
 458         int i;
 459
 460         crtc = kzalloc(sizeof(*crtc), GFP_KERNEL);
 461         if (!crtc)
 462                 return -ENOMEM;
 463
 464         crtc->dc = dc;
 465
 466         ret = drm_crtc_init_with_planes(dev, &crtc->base,
 467                                 &planes->primary->base,
 468                                 planes->cursor ? &planes->cursor->base : NULL,
 469                                 &atmel_hlcdc_crtc_funcs, NULL);
 470         if (ret < 0)
 471                 goto fail;
 472
 473         crtc->id = drm_crtc_index(&crtc->base);
 474
 475         if (planes->cursor)
 476                 planes->cursor->base.possible_crtcs = 1 << crtc->id;
 477
 478         for (i = 0; i < planes->noverlays; i++)
 479                 planes->overlays[i]->base.possible_crtcs = 1 << crtc->id;
 480
 481         drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs);
 482         drm_crtc_vblank_reset(&crtc->base);
 483
 484         dc->crtc = &crtc->base;
 485
 486         return 0;
 487
 488 fail:
 489         atmel_hlcdc_crtc_destroy(&crtc->base);
 490         return ret;
 491 }