drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_atomic_helper.h>
  34 #include <drm/drm_crtc.h>
  35 #include <drm/drm_edid.h>
  36 #include "intel_drv.h"
  37 #include <drm/i915_drm.h>
  38 #include "i915_drv.h"
  39 #include "intel_sdvo_regs.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char * const tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         struct i2c_adapter *i2c;
  72         u8 slave_addr;
  73
  74         struct i2c_adapter ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         i915_reg_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * intel_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint16_t hotplug_active;
 101
 102         /**
 103          * This is set if we're going to treat the device as TV-out.
 104          *
 105          * While we have these nice friendly flags for output types that ought
 106          * to decide this for us, the S-Video output on our HDMI+S-Video card
 107          * shows up as RGB1 (VGA).
 108          */
 109         bool is_tv;
 110
 111         enum port port;
 112
 113         /**
 114          * This is set if we treat the device as HDMI, instead of DVI.
 115          */
 116         bool is_hdmi;
 117         bool has_hdmi_monitor;
 118         bool has_hdmi_audio;
 119         bool rgb_quant_range_selectable;
 120
 121         /**
 122          * This is set if we detect output of sdvo device as LVDS and
 123          * have a valid fixed mode to use with the panel.
 124          */
 125         bool is_lvds;
 126
 127         /**
 128          * This is sdvo fixed pannel mode pointer
 129          */
 130         struct drm_display_mode *sdvo_lvds_fixed_mode;
 131
 132         /* DDC bus used by this SDVO encoder */
 133         uint8_t ddc_bus;
 134
 135         /*
 136          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 137          */
 138         uint8_t dtd_sdvo_flags;
 139 };
 140
 141 struct intel_sdvo_connector {
 142         struct intel_connector base;
 143
 144         /* Mark the type of connector */
 145         uint16_t output_flag;
 146
 147         /* This contains all current supported TV format */
 148         u8 tv_format_supported[TV_FORMAT_NUM];
 149         int   format_supported_num;
 150         struct drm_property *tv_format;
 151
 152         /* add the property for the SDVO-TV */
 153         struct drm_property *left;
 154         struct drm_property *right;
 155         struct drm_property *top;
 156         struct drm_property *bottom;
 157         struct drm_property *hpos;
 158         struct drm_property *vpos;
 159         struct drm_property *contrast;
 160         struct drm_property *saturation;
 161         struct drm_property *hue;
 162         struct drm_property *sharpness;
 163         struct drm_property *flicker_filter;
 164         struct drm_property *flicker_filter_adaptive;
 165         struct drm_property *flicker_filter_2d;
 166         struct drm_property *tv_chroma_filter;
 167         struct drm_property *tv_luma_filter;
 168         struct drm_property *dot_crawl;
 169
 170         /* add the property for the SDVO-TV/LVDS */
 171         struct drm_property *brightness;
 172
 173         /* this is to get the range of margin.*/
 174         u32 max_hscan, max_vscan;
 175 };
 176
 177 struct intel_sdvo_connector_state {
 178         /* base.base: tv.saturation/contrast/hue/brightness */
 179         struct intel_digital_connector_state base;
 180
 181         struct {
 182                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 183                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 184                 unsigned chroma_filter, luma_filter, dot_crawl;
 185         } tv;
 186 };
 187
 188 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 189 {
 190         return container_of(encoder, struct intel_sdvo, base);
 191 }
 192
 193 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 194 {
 195         return to_sdvo(intel_attached_encoder(connector));
 196 }
 197
 198 static struct intel_sdvo_connector *
 199 to_intel_sdvo_connector(struct drm_connector *connector)
 200 {
 201         return container_of(connector, struct intel_sdvo_connector, base.base);
 202 }
 203
 204 static struct intel_sdvo_connector_state *
 205 to_intel_sdvo_connector_state(struct drm_connector_state *conn_state)
 206 {
 207         return container_of(conn_state, struct intel_sdvo_connector_state, base.base);
 208 }
 209
 210 static bool
 211 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 212 static bool
 213 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 214                               struct intel_sdvo_connector *intel_sdvo_connector,
 215                               int type);
 216 static bool
 217 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 218                                    struct intel_sdvo_connector *intel_sdvo_connector);
 219
 220 /**
 221  * Writes the SDVOB or SDVOC with the given value, but always writes both
 222  * SDVOB and SDVOC to work around apparent hardware issues (according to
 223  * comments in the BIOS).
 224  */
 225 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 226 {
 227         struct drm_device *dev = intel_sdvo->base.base.dev;
 228         struct drm_i915_private *dev_priv = to_i915(dev);
 229         u32 bval = val, cval = val;
 230         int i;
 231
 232         if (HAS_PCH_SPLIT(dev_priv)) {
 233                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 234                 POSTING_READ(intel_sdvo->sdvo_reg);
 235                 /*
 236                  * HW workaround, need to write this twice for issue
 237                  * that may result in first write getting masked.
 238                  */
 239                 if (HAS_PCH_IBX(dev_priv)) {
 240                         I915_WRITE(intel_sdvo->sdvo_reg, val);
 241                         POSTING_READ(intel_sdvo->sdvo_reg);
 242                 }
 243                 return;
 244         }
 245
 246         if (intel_sdvo->port == PORT_B)
 247                 cval = I915_READ(GEN3_SDVOC);
 248         else
 249                 bval = I915_READ(GEN3_SDVOB);
 250
 251         /*
 252          * Write the registers twice for luck. Sometimes,
 253          * writing them only once doesn't appear to 'stick'.
 254          * The BIOS does this too. Yay, magic
 255          */
 256         for (i = 0; i < 2; i++)
 257         {
 258                 I915_WRITE(GEN3_SDVOB, bval);
 259                 POSTING_READ(GEN3_SDVOB);
 260                 I915_WRITE(GEN3_SDVOC, cval);
 261                 POSTING_READ(GEN3_SDVOC);
 262         }
 263 }
 264
 265 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 266 {
 267         struct i2c_msg msgs[] = {
 268                 {
 269                         .addr = intel_sdvo->slave_addr,
 270                         .flags = 0,
 271                         .len = 1,
 272                         .buf = &addr,
 273                 },
 274                 {
 275                         .addr = intel_sdvo->slave_addr,
 276                         .flags = I2C_M_RD,
 277                         .len = 1,
 278                         .buf = ch,
 279                 }
 280         };
 281         int ret;
 282
 283         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 284                 return true;
 285
 286         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 287         return false;
 288 }
 289
 290 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 291 /** Mapping of command numbers to names, for debug output */
 292 static const struct _sdvo_cmd_name {
 293         u8 cmd;
 294         const char *name;
 295 } __attribute__ ((packed)) sdvo_cmd_names[] = {
 296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 339
 340         /* Add the op code for SDVO enhancements */
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 385
 386         /* HDMI op code */
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 407 };
 408
 409 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 410
 411 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 412                                    const void *args, int args_len)
 413 {
 414         int i, pos = 0;
 415 #define BUF_LEN 256
 416         char buffer[BUF_LEN];
 417
 418 #define BUF_PRINT(args...) \
 419         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 420
 421
 422         for (i = 0; i < args_len; i++) {
 423                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 424         }
 425         for (; i < 8; i++) {
 426                 BUF_PRINT("   ");
 427         }
 428         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 429                 if (cmd == sdvo_cmd_names[i].cmd) {
 430                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 431                         break;
 432                 }
 433         }
 434         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 435                 BUF_PRINT("(%02X)", cmd);
 436         }
 437         BUG_ON(pos >= BUF_LEN - 1);
 438 #undef BUF_PRINT
 439 #undef BUF_LEN
 440
 441         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 442 }
 443
 444 static const char * const cmd_status_names[] = {
 445         "Power on",
 446         "Success",
 447         "Not supported",
 448         "Invalid arg",
 449         "Pending",
 450         "Target not specified",
 451         "Scaling not supported"
 452 };
 453
 454 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 455                                    const void *args, int args_len,
 456                                    bool unlocked)
 457 {
 458         u8 *buf, status;
 459         struct i2c_msg *msgs;
 460         int i, ret = true;
 461
 462         /* Would be simpler to allocate both in one go ? */
 463         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 464         if (!buf)
 465                 return false;
 466
 467         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 468         if (!msgs) {
 469                 kfree(buf);
 470                 return false;
 471         }
 472
 473         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 474
 475         for (i = 0; i < args_len; i++) {
 476                 msgs[i].addr = intel_sdvo->slave_addr;
 477                 msgs[i].flags = 0;
 478                 msgs[i].len = 2;
 479                 msgs[i].buf = buf + 2 *i;
 480                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 481                 buf[2*i + 1] = ((u8*)args)[i];
 482         }
 483         msgs[i].addr = intel_sdvo->slave_addr;
 484         msgs[i].flags = 0;
 485         msgs[i].len = 2;
 486         msgs[i].buf = buf + 2*i;
 487         buf[2*i + 0] = SDVO_I2C_OPCODE;
 488         buf[2*i + 1] = cmd;
 489
 490         /* the following two are to read the response */
 491         status = SDVO_I2C_CMD_STATUS;
 492         msgs[i+1].addr = intel_sdvo->slave_addr;
 493         msgs[i+1].flags = 0;
 494         msgs[i+1].len = 1;
 495         msgs[i+1].buf = &status;
 496
 497         msgs[i+2].addr = intel_sdvo->slave_addr;
 498         msgs[i+2].flags = I2C_M_RD;
 499         msgs[i+2].len = 1;
 500         msgs[i+2].buf = &status;
 501
 502         if (unlocked)
 503                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 504         else
 505                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 506         if (ret < 0) {
 507                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 508                 ret = false;
 509                 goto out;
 510         }
 511         if (ret != i+3) {
 512                 /* failure in I2C transfer */
 513                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 514                 ret = false;
 515         }
 516
 517 out:
 518         kfree(msgs);
 519         kfree(buf);
 520         return ret;
 521 }
 522
 523 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 524                                  const void *args, int args_len)
 525 {
 526         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 527 }
 528
 529 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 530                                      void *response, int response_len)
 531 {
 532         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 533         u8 status;
 534         int i, pos = 0;
 535 #define BUF_LEN 256
 536         char buffer[BUF_LEN];
 537
 538
 539         /*
 540          * The documentation states that all commands will be
 541          * processed within 15µs, and that we need only poll
 542          * the status byte a maximum of 3 times in order for the
 543          * command to be complete.
 544          *
 545          * Check 5 times in case the hardware failed to read the docs.
 546          *
 547          * Also beware that the first response by many devices is to
 548          * reply PENDING and stall for time. TVs are notorious for
 549          * requiring longer than specified to complete their replies.
 550          * Originally (in the DDX long ago), the delay was only ever 15ms
 551          * with an additional delay of 30ms applied for TVs added later after
 552          * many experiments. To accommodate both sets of delays, we do a
 553          * sequence of slow checks if the device is falling behind and fails
 554          * to reply within 5*15µs.
 555          */
 556         if (!intel_sdvo_read_byte(intel_sdvo,
 557                                   SDVO_I2C_CMD_STATUS,
 558                                   &status))
 559                 goto log_fail;
 560
 561         while ((status == SDVO_CMD_STATUS_PENDING ||
 562                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 563                 if (retry < 10)
 564                         msleep(15);
 565                 else
 566                         udelay(15);
 567
 568                 if (!intel_sdvo_read_byte(intel_sdvo,
 569                                           SDVO_I2C_CMD_STATUS,
 570                                           &status))
 571                         goto log_fail;
 572         }
 573
 574 #define BUF_PRINT(args...) \
 575         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 576
 577         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 578                 BUF_PRINT("(%s)", cmd_status_names[status]);
 579         else
 580                 BUF_PRINT("(??? %d)", status);
 581
 582         if (status != SDVO_CMD_STATUS_SUCCESS)
 583                 goto log_fail;
 584
 585         /* Read the command response */
 586         for (i = 0; i < response_len; i++) {
 587                 if (!intel_sdvo_read_byte(intel_sdvo,
 588                                           SDVO_I2C_RETURN_0 + i,
 589                                           &((u8 *)response)[i]))
 590                         goto log_fail;
 591                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 592         }
 593         BUG_ON(pos >= BUF_LEN - 1);
 594 #undef BUF_PRINT
 595 #undef BUF_LEN
 596
 597         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 598         return true;
 599
 600 log_fail:
 601         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 602         return false;
 603 }
 604
 605 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 606 {
 607         if (adjusted_mode->crtc_clock >= 100000)
 608                 return 1;
 609         else if (adjusted_mode->crtc_clock >= 50000)
 610                 return 2;
 611         else
 612                 return 4;
 613 }
 614
 615 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 616                                                 u8 ddc_bus)
 617 {
 618         /* This must be the immediately preceding write before the i2c xfer */
 619         return __intel_sdvo_write_cmd(intel_sdvo,
 620                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 621                                       &ddc_bus, 1, false);
 622 }
 623
 624 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 625 {
 626         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 627                 return false;
 628
 629         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 630 }
 631
 632 static bool
 633 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 634 {
 635         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 636                 return false;
 637
 638         return intel_sdvo_read_response(intel_sdvo, value, len);
 639 }
 640
 641 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 642 {
 643         struct intel_sdvo_set_target_input_args targets = {0};
 644         return intel_sdvo_set_value(intel_sdvo,
 645                                     SDVO_CMD_SET_TARGET_INPUT,
 646                                     &targets, sizeof(targets));
 647 }
 648
 649 /**
 650  * Return whether each input is trained.
 651  *
 652  * This function is making an assumption about the layout of the response,
 653  * which should be checked against the docs.
 654  */
 655 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 656 {
 657         struct intel_sdvo_get_trained_inputs_response response;
 658
 659         BUILD_BUG_ON(sizeof(response) != 1);
 660         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 661                                   &response, sizeof(response)))
 662                 return false;
 663
 664         *input_1 = response.input0_trained;
 665         *input_2 = response.input1_trained;
 666         return true;
 667 }
 668
 669 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 670                                           u16 outputs)
 671 {
 672         return intel_sdvo_set_value(intel_sdvo,
 673                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 674                                     &outputs, sizeof(outputs));
 675 }
 676
 677 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 678                                           u16 *outputs)
 679 {
 680         return intel_sdvo_get_value(intel_sdvo,
 681                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 682                                     outputs, sizeof(*outputs));
 683 }
 684
 685 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 686                                                int mode)
 687 {
 688         u8 state = SDVO_ENCODER_STATE_ON;
 689
 690         switch (mode) {
 691         case DRM_MODE_DPMS_ON:
 692                 state = SDVO_ENCODER_STATE_ON;
 693                 break;
 694         case DRM_MODE_DPMS_STANDBY:
 695                 state = SDVO_ENCODER_STATE_STANDBY;
 696                 break;
 697         case DRM_MODE_DPMS_SUSPEND:
 698                 state = SDVO_ENCODER_STATE_SUSPEND;
 699                 break;
 700         case DRM_MODE_DPMS_OFF:
 701                 state = SDVO_ENCODER_STATE_OFF;
 702                 break;
 703         }
 704
 705         return intel_sdvo_set_value(intel_sdvo,
 706                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 707 }
 708
 709 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 710                                                    int *clock_min,
 711                                                    int *clock_max)
 712 {
 713         struct intel_sdvo_pixel_clock_range clocks;
 714
 715         BUILD_BUG_ON(sizeof(clocks) != 4);
 716         if (!intel_sdvo_get_value(intel_sdvo,
 717                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 718                                   &clocks, sizeof(clocks)))
 719                 return false;
 720
 721         /* Convert the values from units of 10 kHz to kHz. */
 722         *clock_min = clocks.min * 10;
 723         *clock_max = clocks.max * 10;
 724         return true;
 725 }
 726
 727 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 728                                          u16 outputs)
 729 {
 730         return intel_sdvo_set_value(intel_sdvo,
 731                                     SDVO_CMD_SET_TARGET_OUTPUT,
 732                                     &outputs, sizeof(outputs));
 733 }
 734
 735 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 736                                   struct intel_sdvo_dtd *dtd)
 737 {
 738         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 739                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 740 }
 741
 742 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 743                                   struct intel_sdvo_dtd *dtd)
 744 {
 745         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 746                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 747 }
 748
 749 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 750                                          struct intel_sdvo_dtd *dtd)
 751 {
 752         return intel_sdvo_set_timing(intel_sdvo,
 753                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 754 }
 755
 756 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 757                                          struct intel_sdvo_dtd *dtd)
 758 {
 759         return intel_sdvo_set_timing(intel_sdvo,
 760                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 761 }
 762
 763 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 764                                         struct intel_sdvo_dtd *dtd)
 765 {
 766         return intel_sdvo_get_timing(intel_sdvo,
 767                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 768 }
 769
 770 static bool
 771 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 772                                          uint16_t clock,
 773                                          uint16_t width,
 774                                          uint16_t height)
 775 {
 776         struct intel_sdvo_preferred_input_timing_args args;
 777
 778         memset(&args, 0, sizeof(args));
 779         args.clock = clock;
 780         args.width = width;
 781         args.height = height;
 782         args.interlace = 0;
 783
 784         if (intel_sdvo->is_lvds &&
 785            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 786             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 787                 args.scaled = 1;
 788
 789         return intel_sdvo_set_value(intel_sdvo,
 790                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 791                                     &args, sizeof(args));
 792 }
 793
 794 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 795                                                   struct intel_sdvo_dtd *dtd)
 796 {
 797         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 798         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 799         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 800                                     &dtd->part1, sizeof(dtd->part1)) &&
 801                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 802                                      &dtd->part2, sizeof(dtd->part2));
 803 }
 804
 805 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 806 {
 807         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 808 }
 809
 810 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 811                                          const struct drm_display_mode *mode)
 812 {
 813         uint16_t width, height;
 814         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 815         uint16_t h_sync_offset, v_sync_offset;
 816         int mode_clock;
 817
 818         memset(dtd, 0, sizeof(*dtd));
 819
 820         width = mode->hdisplay;
 821         height = mode->vdisplay;
 822
 823         /* do some mode translations */
 824         h_blank_len = mode->htotal - mode->hdisplay;
 825         h_sync_len = mode->hsync_end - mode->hsync_start;
 826
 827         v_blank_len = mode->vtotal - mode->vdisplay;
 828         v_sync_len = mode->vsync_end - mode->vsync_start;
 829
 830         h_sync_offset = mode->hsync_start - mode->hdisplay;
 831         v_sync_offset = mode->vsync_start - mode->vdisplay;
 832
 833         mode_clock = mode->clock;
 834         mode_clock /= 10;
 835         dtd->part1.clock = mode_clock;
 836
 837         dtd->part1.h_active = width & 0xff;
 838         dtd->part1.h_blank = h_blank_len & 0xff;
 839         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 840                 ((h_blank_len >> 8) & 0xf);
 841         dtd->part1.v_active = height & 0xff;
 842         dtd->part1.v_blank = v_blank_len & 0xff;
 843         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 844                 ((v_blank_len >> 8) & 0xf);
 845
 846         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 847         dtd->part2.h_sync_width = h_sync_len & 0xff;
 848         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 849                 (v_sync_len & 0xf);
 850         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 851                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 852                 ((v_sync_len & 0x30) >> 4);
 853
 854         dtd->part2.dtd_flags = 0x18;
 855         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 856                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 857         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 858                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 859         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 860                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 861
 862         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 863 }
 864
 865 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 866                                          const struct intel_sdvo_dtd *dtd)
 867 {
 868         struct drm_display_mode mode = {};
 869
 870         mode.hdisplay = dtd->part1.h_active;
 871         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 872         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 873         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 874         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 875         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 876         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 877         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 878
 879         mode.vdisplay = dtd->part1.v_active;
 880         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 881         mode.vsync_start = mode.vdisplay;
 882         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 883         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 884         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 885         mode.vsync_end = mode.vsync_start +
 886                 (dtd->part2.v_sync_off_width & 0xf);
 887         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 888         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 889         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 890
 891         mode.clock = dtd->part1.clock * 10;
 892
 893         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 894                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 895         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 896                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 897         else
 898                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 899         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 900                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 901         else
 902                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 903
 904         drm_mode_set_crtcinfo(&mode, 0);
 905
 906         drm_mode_copy(pmode, &mode);
 907 }
 908
 909 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 910 {
 911         struct intel_sdvo_encode encode;
 912
 913         BUILD_BUG_ON(sizeof(encode) != 2);
 914         return intel_sdvo_get_value(intel_sdvo,
 915                                   SDVO_CMD_GET_SUPP_ENCODE,
 916                                   &encode, sizeof(encode));
 917 }
 918
 919 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 920                                   uint8_t mode)
 921 {
 922         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 923 }
 924
 925 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 926                                        uint8_t mode)
 927 {
 928         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 929 }
 930
 931 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
 932                                        u8 audio_state)
 933 {
 934         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT,
 935                                     &audio_state, 1);
 936 }
 937
 938 #if 0
 939 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 940 {
 941         int i, j;
 942         uint8_t set_buf_index[2];
 943         uint8_t av_split;
 944         uint8_t buf_size;
 945         uint8_t buf[48];
 946         uint8_t *pos;
 947
 948         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 949
 950         for (i = 0; i <= av_split; i++) {
 951                 set_buf_index[0] = i; set_buf_index[1] = 0;
 952                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 953                                      set_buf_index, 2);
 954                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 955                 intel_sdvo_read_response(encoder, &buf_size, 1);
 956
 957                 pos = buf;
 958                 for (j = 0; j <= buf_size; j += 8) {
 959                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 960                                              NULL, 0);
 961                         intel_sdvo_read_response(encoder, pos, 8);
 962                         pos += 8;
 963                 }
 964         }
 965 }
 966 #endif
 967
 968 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 969                                        unsigned if_index, uint8_t tx_rate,
 970                                        const uint8_t *data, unsigned length)
 971 {
 972         uint8_t set_buf_index[2] = { if_index, 0 };
 973         uint8_t hbuf_size, tmp[8];
 974         int i;
 975
 976         if (!intel_sdvo_set_value(intel_sdvo,
 977                                   SDVO_CMD_SET_HBUF_INDEX,
 978                                   set_buf_index, 2))
 979                 return false;
 980
 981         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 982                                   &hbuf_size, 1))
 983                 return false;
 984
 985         /* Buffer size is 0 based, hooray! */
 986         hbuf_size++;
 987
 988         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 989                       if_index, length, hbuf_size);
 990
 991         for (i = 0; i < hbuf_size; i += 8) {
 992                 memset(tmp, 0, 8);
 993                 if (i < length)
 994                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 995
 996                 if (!intel_sdvo_set_value(intel_sdvo,
 997                                           SDVO_CMD_SET_HBUF_DATA,
 998                                           tmp, 8))
 999                         return false;
1000         }
1001
1002         return intel_sdvo_set_value(intel_sdvo,
1003                                     SDVO_CMD_SET_HBUF_TXRATE,
1004                                     &tx_rate, 1);
1005 }
1006
1007 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1008                                          struct intel_crtc_state *pipe_config)
1009 {
1010         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1011         union hdmi_infoframe frame;
1012         int ret;
1013         ssize_t len;
1014
1015         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1016                                                        &pipe_config->base.adjusted_mode,
1017                                                        false);
1018         if (ret < 0) {
1019                 DRM_ERROR("couldn't fill AVI infoframe\n");
1020                 return false;
1021         }
1022
1023         if (intel_sdvo->rgb_quant_range_selectable) {
1024                 if (pipe_config->limited_color_range)
1025                         frame.avi.quantization_range =
1026                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1027                 else
1028                         frame.avi.quantization_range =
1029                                 HDMI_QUANTIZATION_RANGE_FULL;
1030         }
1031
1032         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1033         if (len < 0)
1034                 return false;
1035
1036         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1037                                           SDVO_HBUF_TX_VSYNC,
1038                                           sdvo_data, sizeof(sdvo_data));
1039 }
1040
1041 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1042                                      struct drm_connector_state *conn_state)
1043 {
1044         struct intel_sdvo_tv_format format;
1045         uint32_t format_map;
1046
1047         format_map = 1 << conn_state->tv.mode;
1048         memset(&format, 0, sizeof(format));
1049         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1050
1051         BUILD_BUG_ON(sizeof(format) != 6);
1052         return intel_sdvo_set_value(intel_sdvo,
1053                                     SDVO_CMD_SET_TV_FORMAT,
1054                                     &format, sizeof(format));
1055 }
1056
1057 static bool
1058 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1059                                         const struct drm_display_mode *mode)
1060 {
1061         struct intel_sdvo_dtd output_dtd;
1062
1063         if (!intel_sdvo_set_target_output(intel_sdvo,
1064                                           intel_sdvo->attached_output))
1065                 return false;
1066
1067         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1068         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1069                 return false;
1070
1071         return true;
1072 }
1073
1074 /* Asks the sdvo controller for the preferred input mode given the output mode.
1075  * Unfortunately we have to set up the full output mode to do that. */
1076 static bool
1077 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1078                                     const struct drm_display_mode *mode,
1079                                     struct drm_display_mode *adjusted_mode)
1080 {
1081         struct intel_sdvo_dtd input_dtd;
1082
1083         /* Reset the input timing to the screen. Assume always input 0. */
1084         if (!intel_sdvo_set_target_input(intel_sdvo))
1085                 return false;
1086
1087         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1088                                                       mode->clock / 10,
1089                                                       mode->hdisplay,
1090                                                       mode->vdisplay))
1091                 return false;
1092
1093         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1094                                                    &input_dtd))
1095                 return false;
1096
1097         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1098         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1099
1100         return true;
1101 }
1102
1103 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1104 {
1105         unsigned dotclock = pipe_config->port_clock;
1106         struct dpll *clock = &pipe_config->dpll;
1107
1108         /* SDVO TV has fixed PLL values depend on its clock range,
1109            this mirrors vbios setting. */
1110         if (dotclock >= 100000 && dotclock < 140500) {
1111                 clock->p1 = 2;
1112                 clock->p2 = 10;
1113                 clock->n = 3;
1114                 clock->m1 = 16;
1115                 clock->m2 = 8;
1116         } else if (dotclock >= 140500 && dotclock <= 200000) {
1117                 clock->p1 = 1;
1118                 clock->p2 = 10;
1119                 clock->n = 6;
1120                 clock->m1 = 12;
1121                 clock->m2 = 8;
1122         } else {
1123                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1124         }
1125
1126         pipe_config->clock_set = true;
1127 }
1128
1129 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1130                                       struct intel_crtc_state *pipe_config,
1131                                       struct drm_connector_state *conn_state)
1132 {
1133         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1134         struct intel_sdvo_connector_state *intel_sdvo_state =
1135                 to_intel_sdvo_connector_state(conn_state);
1136         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1137         struct drm_display_mode *mode = &pipe_config->base.mode;
1138
1139         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1140         pipe_config->pipe_bpp = 8*3;
1141
1142         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1143                 pipe_config->has_pch_encoder = true;
1144
1145         /* We need to construct preferred input timings based on our
1146          * output timings.  To do that, we have to set the output
1147          * timings, even though this isn't really the right place in
1148          * the sequence to do it. Oh well.
1149          */
1150         if (intel_sdvo->is_tv) {
1151                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1152                         return false;
1153
1154                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1155                                                            mode,
1156                                                            adjusted_mode);
1157                 pipe_config->sdvo_tv_clock = true;
1158         } else if (intel_sdvo->is_lvds) {
1159                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1160                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1161                         return false;
1162
1163                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1164                                                            mode,
1165                                                            adjusted_mode);
1166         }
1167
1168         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1169          * SDVO device will factor out the multiplier during mode_set.
1170          */
1171         pipe_config->pixel_multiplier =
1172                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1173
1174         if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1175                 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1176
1177         if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1178             (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1179                 pipe_config->has_audio = true;
1180
1181         if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1182                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1183                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1184                  * bit per color mode. */
1185                 if (pipe_config->has_hdmi_sink &&
1186                     drm_match_cea_mode(adjusted_mode) > 1)
1187                         pipe_config->limited_color_range = true;
1188         } else {
1189                 if (pipe_config->has_hdmi_sink &&
1190                     intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1191                         pipe_config->limited_color_range = true;
1192         }
1193
1194         /* Clock computation needs to happen after pixel multiplier. */
1195         if (intel_sdvo->is_tv)
1196                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1197
1198         /* Set user selected PAR to incoming mode's member */
1199         if (intel_sdvo->is_hdmi)
1200                 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1201
1202         return true;
1203 }
1204
1205 #define UPDATE_PROPERTY(input, NAME) \
1206         do { \
1207                 val = input; \
1208                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1209         } while (0)
1210
1211 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1212                                     struct intel_sdvo_connector_state *sdvo_state)
1213 {
1214         struct drm_connector_state *conn_state = &sdvo_state->base.base;
1215         struct intel_sdvo_connector *intel_sdvo_conn =
1216                 to_intel_sdvo_connector(conn_state->connector);
1217         uint16_t val;
1218
1219         if (intel_sdvo_conn->left)
1220                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1221
1222         if (intel_sdvo_conn->top)
1223                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1224
1225         if (intel_sdvo_conn->hpos)
1226                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1227
1228         if (intel_sdvo_conn->vpos)
1229                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1230
1231         if (intel_sdvo_conn->saturation)
1232                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1233
1234         if (intel_sdvo_conn->contrast)
1235                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1236
1237         if (intel_sdvo_conn->hue)
1238                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1239
1240         if (intel_sdvo_conn->brightness)
1241                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1242
1243         if (intel_sdvo_conn->sharpness)
1244                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1245
1246         if (intel_sdvo_conn->flicker_filter)
1247                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1248
1249         if (intel_sdvo_conn->flicker_filter_2d)
1250                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1251
1252         if (intel_sdvo_conn->flicker_filter_adaptive)
1253                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1254
1255         if (intel_sdvo_conn->tv_chroma_filter)
1256                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1257
1258         if (intel_sdvo_conn->tv_luma_filter)
1259                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1260
1261         if (intel_sdvo_conn->dot_crawl)
1262                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1263
1264 #undef UPDATE_PROPERTY
1265 }
1266
1267 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1268                                   struct intel_crtc_state *crtc_state,
1269                                   struct drm_connector_state *conn_state)
1270 {
1271         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1272         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1273         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1274         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(conn_state);
1275         struct drm_display_mode *mode = &crtc_state->base.mode;
1276         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1277         u32 sdvox;
1278         struct intel_sdvo_in_out_map in_out;
1279         struct intel_sdvo_dtd input_dtd, output_dtd;
1280         int rate;
1281
1282         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1283
1284         /* First, set the input mapping for the first input to our controlled
1285          * output. This is only correct if we're a single-input device, in
1286          * which case the first input is the output from the appropriate SDVO
1287          * channel on the motherboard.  In a two-input device, the first input
1288          * will be SDVOB and the second SDVOC.
1289          */
1290         in_out.in0 = intel_sdvo->attached_output;
1291         in_out.in1 = 0;
1292
1293         intel_sdvo_set_value(intel_sdvo,
1294                              SDVO_CMD_SET_IN_OUT_MAP,
1295                              &in_out, sizeof(in_out));
1296
1297         /* Set the output timings to the screen */
1298         if (!intel_sdvo_set_target_output(intel_sdvo,
1299                                           intel_sdvo->attached_output))
1300                 return;
1301
1302         /* lvds has a special fixed output timing. */
1303         if (intel_sdvo->is_lvds)
1304                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1305                                              intel_sdvo->sdvo_lvds_fixed_mode);
1306         else
1307                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1308         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1309                 DRM_INFO("Setting output timings on %s failed\n",
1310                          SDVO_NAME(intel_sdvo));
1311
1312         /* Set the input timing to the screen. Assume always input 0. */
1313         if (!intel_sdvo_set_target_input(intel_sdvo))
1314                 return;
1315
1316         if (crtc_state->has_hdmi_sink) {
1317                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1318                 intel_sdvo_set_colorimetry(intel_sdvo,
1319                                            SDVO_COLORIMETRY_RGB256);
1320                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1321         } else
1322                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1323
1324         if (intel_sdvo->is_tv &&
1325             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1326                 return;
1327
1328         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1329
1330         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1331                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1332         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1333                 DRM_INFO("Setting input timings on %s failed\n",
1334                          SDVO_NAME(intel_sdvo));
1335
1336         switch (crtc_state->pixel_multiplier) {
1337         default:
1338                 WARN(1, "unknown pixel multiplier specified\n");
1339         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1340         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1341         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1342         }
1343         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1344                 return;
1345
1346         /* Set the SDVO control regs. */
1347         if (INTEL_GEN(dev_priv) >= 4) {
1348                 /* The real mode polarity is set by the SDVO commands, using
1349                  * struct intel_sdvo_dtd. */
1350                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1351                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1352                         sdvox |= HDMI_COLOR_RANGE_16_235;
1353                 if (INTEL_GEN(dev_priv) < 5)
1354                         sdvox |= SDVO_BORDER_ENABLE;
1355         } else {
1356                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1357                 if (intel_sdvo->port == PORT_B)
1358                         sdvox &= SDVOB_PRESERVE_MASK;
1359                 else
1360                         sdvox &= SDVOC_PRESERVE_MASK;
1361                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1362         }
1363
1364         if (HAS_PCH_CPT(dev_priv))
1365                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1366         else
1367                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1368
1369         if (INTEL_GEN(dev_priv) >= 4) {
1370                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1371         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1372                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1373                 /* done in crtc_mode_set as it lives inside the dpll register */
1374         } else {
1375                 sdvox |= (crtc_state->pixel_multiplier - 1)
1376                         << SDVO_PORT_MULTIPLY_SHIFT;
1377         }
1378
1379         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1380             INTEL_GEN(dev_priv) < 5)
1381                 sdvox |= SDVO_STALL_SELECT;
1382         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1383 }
1384
1385 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1386 {
1387         struct intel_sdvo_connector *intel_sdvo_connector =
1388                 to_intel_sdvo_connector(&connector->base);
1389         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1390         u16 active_outputs = 0;
1391
1392         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1393
1394         if (active_outputs & intel_sdvo_connector->output_flag)
1395                 return true;
1396         else
1397                 return false;
1398 }
1399
1400 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1401                                     enum pipe *pipe)
1402 {
1403         struct drm_device *dev = encoder->base.dev;
1404         struct drm_i915_private *dev_priv = to_i915(dev);
1405         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1406         u16 active_outputs = 0;
1407         u32 tmp;
1408
1409         tmp = I915_READ(intel_sdvo->sdvo_reg);
1410         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1411
1412         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1413                 return false;
1414
1415         if (HAS_PCH_CPT(dev_priv))
1416                 *pipe = PORT_TO_PIPE_CPT(tmp);
1417         else
1418                 *pipe = PORT_TO_PIPE(tmp);
1419
1420         return true;
1421 }
1422
1423 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1424                                   struct intel_crtc_state *pipe_config)
1425 {
1426         struct drm_device *dev = encoder->base.dev;
1427         struct drm_i915_private *dev_priv = to_i915(dev);
1428         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1429         struct intel_sdvo_dtd dtd;
1430         int encoder_pixel_multiplier = 0;
1431         int dotclock;
1432         u32 flags = 0, sdvox;
1433         u8 val;
1434         bool ret;
1435
1436         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1437
1438         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1439         if (!ret) {
1440                 /* Some sdvo encoders are not spec compliant and don't
1441                  * implement the mandatory get_timings function. */
1442                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1443                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1444         } else {
1445                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1446                         flags |= DRM_MODE_FLAG_PHSYNC;
1447                 else
1448                         flags |= DRM_MODE_FLAG_NHSYNC;
1449
1450                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1451                         flags |= DRM_MODE_FLAG_PVSYNC;
1452                 else
1453                         flags |= DRM_MODE_FLAG_NVSYNC;
1454         }
1455
1456         pipe_config->base.adjusted_mode.flags |= flags;
1457
1458         /*
1459          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1460          * the sdvo port register, on all other platforms it is part of the dpll
1461          * state. Since the general pipe state readout happens before the
1462          * encoder->get_config we so already have a valid pixel multplier on all
1463          * other platfroms.
1464          */
1465         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1466                 pipe_config->pixel_multiplier =
1467                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1468                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1469         }
1470
1471         dotclock = pipe_config->port_clock;
1472
1473         if (pipe_config->pixel_multiplier)
1474                 dotclock /= pipe_config->pixel_multiplier;
1475
1476         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1477
1478         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1479         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1480                                  &val, 1)) {
1481                 switch (val) {
1482                 case SDVO_CLOCK_RATE_MULT_1X:
1483                         encoder_pixel_multiplier = 1;
1484                         break;
1485                 case SDVO_CLOCK_RATE_MULT_2X:
1486                         encoder_pixel_multiplier = 2;
1487                         break;
1488                 case SDVO_CLOCK_RATE_MULT_4X:
1489                         encoder_pixel_multiplier = 4;
1490                         break;
1491                 }
1492         }
1493
1494         if (sdvox & HDMI_COLOR_RANGE_16_235)
1495                 pipe_config->limited_color_range = true;
1496
1497         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
1498                                  &val, 1)) {
1499                 u8 mask = SDVO_AUDIO_ELD_VALID | SDVO_AUDIO_PRESENCE_DETECT;
1500
1501                 if ((val & mask) == mask)
1502                         pipe_config->has_audio = true;
1503         }
1504
1505         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1506                                  &val, 1)) {
1507                 if (val == SDVO_ENCODE_HDMI)
1508                         pipe_config->has_hdmi_sink = true;
1509         }
1510
1511         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1512              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1513              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1514 }
1515
1516 static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo)
1517 {
1518         intel_sdvo_set_audio_state(intel_sdvo, 0);
1519 }
1520
1521 static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo,
1522                                     const struct intel_crtc_state *crtc_state,
1523                                     const struct drm_connector_state *conn_state)
1524 {
1525         const struct drm_display_mode *adjusted_mode =
1526                 &crtc_state->base.adjusted_mode;
1527         struct drm_connector *connector = conn_state->connector;
1528         u8 *eld = connector->eld;
1529
1530         eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2;
1531
1532         intel_sdvo_set_audio_state(intel_sdvo, 0);
1533
1534         intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1535                                    SDVO_HBUF_TX_DISABLED,
1536                                    eld, drm_eld_size(eld));
1537
1538         intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID |
1539                                    SDVO_AUDIO_PRESENCE_DETECT);
1540 }
1541
1542 static void intel_disable_sdvo(struct intel_encoder *encoder,
1543                                struct intel_crtc_state *old_crtc_state,
1544                                struct drm_connector_state *conn_state)
1545 {
1546         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1547         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1548         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
1549         u32 temp;
1550
1551         if (old_crtc_state->has_audio)
1552                 intel_sdvo_disable_audio(intel_sdvo);
1553
1554         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1555         if (0)
1556                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1557                                                    DRM_MODE_DPMS_OFF);
1558
1559         temp = I915_READ(intel_sdvo->sdvo_reg);
1560
1561         temp &= ~SDVO_ENABLE;
1562         intel_sdvo_write_sdvox(intel_sdvo, temp);
1563
1564         /*
1565          * HW workaround for IBX, we need to move the port
1566          * to transcoder A after disabling it to allow the
1567          * matching DP port to be enabled on transcoder A.
1568          */
1569         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1570                 /*
1571                  * We get CPU/PCH FIFO underruns on the other pipe when
1572                  * doing the workaround. Sweep them under the rug.
1573                  */
1574                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1575                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1576
1577                 temp &= ~SDVO_PIPE_B_SELECT;
1578                 temp |= SDVO_ENABLE;
1579                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1580
1581                 temp &= ~SDVO_ENABLE;
1582                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1583
1584                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1585                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1586                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1587         }
1588 }
1589
1590 static void pch_disable_sdvo(struct intel_encoder *encoder,
1591                              struct intel_crtc_state *old_crtc_state,
1592                              struct drm_connector_state *old_conn_state)
1593 {
1594 }
1595
1596 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1597                                   struct intel_crtc_state *old_crtc_state,
1598                                   struct drm_connector_state *old_conn_state)
1599 {
1600         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1601 }
1602
1603 static void intel_enable_sdvo(struct intel_encoder *encoder,
1604                               struct intel_crtc_state *pipe_config,
1605                               struct drm_connector_state *conn_state)
1606 {
1607         struct drm_device *dev = encoder->base.dev;
1608         struct drm_i915_private *dev_priv = to_i915(dev);
1609         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1610         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1611         u32 temp;
1612         bool input1, input2;
1613         int i;
1614         bool success;
1615
1616         temp = I915_READ(intel_sdvo->sdvo_reg);
1617         temp |= SDVO_ENABLE;
1618         intel_sdvo_write_sdvox(intel_sdvo, temp);
1619
1620         for (i = 0; i < 2; i++)
1621                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1622
1623         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1624         /* Warn if the device reported failure to sync.
1625          * A lot of SDVO devices fail to notify of sync, but it's
1626          * a given it the status is a success, we succeeded.
1627          */
1628         if (success && !input1) {
1629                 DRM_DEBUG_KMS("First %s output reported failure to "
1630                                 "sync\n", SDVO_NAME(intel_sdvo));
1631         }
1632
1633         if (0)
1634                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1635                                                    DRM_MODE_DPMS_ON);
1636         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1637
1638         if (pipe_config->has_audio)
1639                 intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state);
1640 }
1641
1642 static enum drm_mode_status
1643 intel_sdvo_mode_valid(struct drm_connector *connector,
1644                       struct drm_display_mode *mode)
1645 {
1646         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1647         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1648
1649         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1650                 return MODE_NO_DBLESCAN;
1651
1652         if (intel_sdvo->pixel_clock_min > mode->clock)
1653                 return MODE_CLOCK_LOW;
1654
1655         if (intel_sdvo->pixel_clock_max < mode->clock)
1656                 return MODE_CLOCK_HIGH;
1657
1658         if (mode->clock > max_dotclk)
1659                 return MODE_CLOCK_HIGH;
1660
1661         if (intel_sdvo->is_lvds) {
1662                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1663                         return MODE_PANEL;
1664
1665                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1666                         return MODE_PANEL;
1667         }
1668
1669         return MODE_OK;
1670 }
1671
1672 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1673 {
1674         BUILD_BUG_ON(sizeof(*caps) != 8);
1675         if (!intel_sdvo_get_value(intel_sdvo,
1676                                   SDVO_CMD_GET_DEVICE_CAPS,
1677                                   caps, sizeof(*caps)))
1678                 return false;
1679
1680         DRM_DEBUG_KMS("SDVO capabilities:\n"
1681                       "  vendor_id: %d\n"
1682                       "  device_id: %d\n"
1683                       "  device_rev_id: %d\n"
1684                       "  sdvo_version_major: %d\n"
1685                       "  sdvo_version_minor: %d\n"
1686                       "  sdvo_inputs_mask: %d\n"
1687                       "  smooth_scaling: %d\n"
1688                       "  sharp_scaling: %d\n"
1689                       "  up_scaling: %d\n"
1690                       "  down_scaling: %d\n"
1691                       "  stall_support: %d\n"
1692                       "  output_flags: %d\n",
1693                       caps->vendor_id,
1694                       caps->device_id,
1695                       caps->device_rev_id,
1696                       caps->sdvo_version_major,
1697                       caps->sdvo_version_minor,
1698                       caps->sdvo_inputs_mask,
1699                       caps->smooth_scaling,
1700                       caps->sharp_scaling,
1701                       caps->up_scaling,
1702                       caps->down_scaling,
1703                       caps->stall_support,
1704                       caps->output_flags);
1705
1706         return true;
1707 }
1708
1709 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1710 {
1711         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1712         uint16_t hotplug;
1713
1714         if (!I915_HAS_HOTPLUG(dev_priv))
1715                 return 0;
1716
1717         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1718          * on the line. */
1719         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1720                 return 0;
1721
1722         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1723                                         &hotplug, sizeof(hotplug)))
1724                 return 0;
1725
1726         return hotplug;
1727 }
1728
1729 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1730 {
1731         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1732
1733         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1734                         &intel_sdvo->hotplug_active, 2);
1735 }
1736
1737 static bool
1738 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1739 {
1740         /* Is there more than one type of output? */
1741         return hweight16(intel_sdvo->caps.output_flags) > 1;
1742 }
1743
1744 static struct edid *
1745 intel_sdvo_get_edid(struct drm_connector *connector)
1746 {
1747         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1748         return drm_get_edid(connector, &sdvo->ddc);
1749 }
1750
1751 /* Mac mini hack -- use the same DDC as the analog connector */
1752 static struct edid *
1753 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1754 {
1755         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1756
1757         return drm_get_edid(connector,
1758                             intel_gmbus_get_adapter(dev_priv,
1759                                                     dev_priv->vbt.crt_ddc_pin));
1760 }
1761
1762 static enum drm_connector_status
1763 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1764 {
1765         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1766         enum drm_connector_status status;
1767         struct edid *edid;
1768
1769         edid = intel_sdvo_get_edid(connector);
1770
1771         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1772                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1773
1774                 /*
1775                  * Don't use the 1 as the argument of DDC bus switch to get
1776                  * the EDID. It is used for SDVO SPD ROM.
1777                  */
1778                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1779                         intel_sdvo->ddc_bus = ddc;
1780                         edid = intel_sdvo_get_edid(connector);
1781                         if (edid)
1782                                 break;
1783                 }
1784                 /*
1785                  * If we found the EDID on the other bus,
1786                  * assume that is the correct DDC bus.
1787                  */
1788                 if (edid == NULL)
1789                         intel_sdvo->ddc_bus = saved_ddc;
1790         }
1791
1792         /*
1793          * When there is no edid and no monitor is connected with VGA
1794          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1795          */
1796         if (edid == NULL)
1797                 edid = intel_sdvo_get_analog_edid(connector);
1798
1799         status = connector_status_unknown;
1800         if (edid != NULL) {
1801                 /* DDC bus is shared, match EDID to connector type */
1802                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1803                         status = connector_status_connected;
1804                         if (intel_sdvo->is_hdmi) {
1805                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1806                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1807                                 intel_sdvo->rgb_quant_range_selectable =
1808                                         drm_rgb_quant_range_selectable(edid);
1809                         }
1810                 } else
1811                         status = connector_status_disconnected;
1812                 kfree(edid);
1813         }
1814
1815         return status;
1816 }
1817
1818 static bool
1819 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1820                                   struct edid *edid)
1821 {
1822         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1823         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1824
1825         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1826                       connector_is_digital, monitor_is_digital);
1827         return connector_is_digital == monitor_is_digital;
1828 }
1829
1830 static enum drm_connector_status
1831 intel_sdvo_detect(struct drm_connector *connector, bool force)
1832 {
1833         uint16_t response;
1834         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1835         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1836         enum drm_connector_status ret;
1837
1838         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1839                       connector->base.id, connector->name);
1840
1841         if (!intel_sdvo_get_value(intel_sdvo,
1842                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1843                                   &response, 2))
1844                 return connector_status_unknown;
1845
1846         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1847                       response & 0xff, response >> 8,
1848                       intel_sdvo_connector->output_flag);
1849
1850         if (response == 0)
1851                 return connector_status_disconnected;
1852
1853         intel_sdvo->attached_output = response;
1854
1855         intel_sdvo->has_hdmi_monitor = false;
1856         intel_sdvo->has_hdmi_audio = false;
1857         intel_sdvo->rgb_quant_range_selectable = false;
1858
1859         if ((intel_sdvo_connector->output_flag & response) == 0)
1860                 ret = connector_status_disconnected;
1861         else if (IS_TMDS(intel_sdvo_connector))
1862                 ret = intel_sdvo_tmds_sink_detect(connector);
1863         else {
1864                 struct edid *edid;
1865
1866                 /* if we have an edid check it matches the connection */
1867                 edid = intel_sdvo_get_edid(connector);
1868                 if (edid == NULL)
1869                         edid = intel_sdvo_get_analog_edid(connector);
1870                 if (edid != NULL) {
1871                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1872                                                               edid))
1873                                 ret = connector_status_connected;
1874                         else
1875                                 ret = connector_status_disconnected;
1876
1877                         kfree(edid);
1878                 } else
1879                         ret = connector_status_connected;
1880         }
1881
1882         /* May update encoder flag for like clock for SDVO TV, etc.*/
1883         if (ret == connector_status_connected) {
1884                 intel_sdvo->is_tv = false;
1885                 intel_sdvo->is_lvds = false;
1886
1887                 if (response & SDVO_TV_MASK)
1888                         intel_sdvo->is_tv = true;
1889                 if (response & SDVO_LVDS_MASK)
1890                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1891         }
1892
1893         return ret;
1894 }
1895
1896 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1897 {
1898         struct edid *edid;
1899
1900         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1901                       connector->base.id, connector->name);
1902
1903         /* set the bus switch and get the modes */
1904         edid = intel_sdvo_get_edid(connector);
1905
1906         /*
1907          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1908          * link between analog and digital outputs. So, if the regular SDVO
1909          * DDC fails, check to see if the analog output is disconnected, in
1910          * which case we'll look there for the digital DDC data.
1911          */
1912         if (edid == NULL)
1913                 edid = intel_sdvo_get_analog_edid(connector);
1914
1915         if (edid != NULL) {
1916                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1917                                                       edid)) {
1918                         drm_mode_connector_update_edid_property(connector, edid);
1919                         drm_add_edid_modes(connector, edid);
1920                 }
1921
1922                 kfree(edid);
1923         }
1924 }
1925
1926 /*
1927  * Set of SDVO TV modes.
1928  * Note!  This is in reply order (see loop in get_tv_modes).
1929  * XXX: all 60Hz refresh?
1930  */
1931 static const struct drm_display_mode sdvo_tv_modes[] = {
1932         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1933                    416, 0, 200, 201, 232, 233, 0,
1934                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1935         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1936                    416, 0, 240, 241, 272, 273, 0,
1937                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1938         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1939                    496, 0, 300, 301, 332, 333, 0,
1940                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1941         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1942                    736, 0, 350, 351, 382, 383, 0,
1943                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1944         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1945                    736, 0, 400, 401, 432, 433, 0,
1946                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1947         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1948                    736, 0, 480, 481, 512, 513, 0,
1949                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1950         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1951                    800, 0, 480, 481, 512, 513, 0,
1952                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1953         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1954                    800, 0, 576, 577, 608, 609, 0,
1955                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1956         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1957                    816, 0, 350, 351, 382, 383, 0,
1958                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1959         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1960                    816, 0, 400, 401, 432, 433, 0,
1961                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1962         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1963                    816, 0, 480, 481, 512, 513, 0,
1964                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1965         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1966                    816, 0, 540, 541, 572, 573, 0,
1967                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1968         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1969                    816, 0, 576, 577, 608, 609, 0,
1970                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1971         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1972                    864, 0, 576, 577, 608, 609, 0,
1973                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1974         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1975                    896, 0, 600, 601, 632, 633, 0,
1976                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1977         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1978                    928, 0, 624, 625, 656, 657, 0,
1979                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1980         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1981                    1016, 0, 766, 767, 798, 799, 0,
1982                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1983         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1984                    1120, 0, 768, 769, 800, 801, 0,
1985                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1986         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1987                    1376, 0, 1024, 1025, 1056, 1057, 0,
1988                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1989 };
1990
1991 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1992 {
1993         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1994         const struct drm_connector_state *conn_state = connector->state;
1995         struct intel_sdvo_sdtv_resolution_request tv_res;
1996         uint32_t reply = 0, format_map = 0;
1997         int i;
1998
1999         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2000                       connector->base.id, connector->name);
2001
2002         /* Read the list of supported input resolutions for the selected TV
2003          * format.
2004          */
2005         format_map = 1 << conn_state->tv.mode;
2006         memcpy(&tv_res, &format_map,
2007                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2008
2009         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
2010                 return;
2011
2012         BUILD_BUG_ON(sizeof(tv_res) != 3);
2013         if (!intel_sdvo_write_cmd(intel_sdvo,
2014                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2015                                   &tv_res, sizeof(tv_res)))
2016                 return;
2017         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2018                 return;
2019
2020         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
2021                 if (reply & (1 << i)) {
2022                         struct drm_display_mode *nmode;
2023                         nmode = drm_mode_duplicate(connector->dev,
2024                                                    &sdvo_tv_modes[i]);
2025                         if (nmode)
2026                                 drm_mode_probed_add(connector, nmode);
2027                 }
2028 }
2029
2030 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2031 {
2032         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2033         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2034         struct drm_display_mode *newmode;
2035
2036         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2037                       connector->base.id, connector->name);
2038
2039         /*
2040          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2041          * SDVO->LVDS transcoders can't cope with the EDID mode.
2042          */
2043         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2044                 newmode = drm_mode_duplicate(connector->dev,
2045                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
2046                 if (newmode != NULL) {
2047                         /* Guarantee the mode is preferred */
2048                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
2049                                          DRM_MODE_TYPE_DRIVER);
2050                         drm_mode_probed_add(connector, newmode);
2051                 }
2052         }
2053
2054         /*
2055          * Attempt to get the mode list from DDC.
2056          * Assume that the preferred modes are
2057          * arranged in priority order.
2058          */
2059         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2060
2061         list_for_each_entry(newmode, &connector->probed_modes, head) {
2062                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
2063                         intel_sdvo->sdvo_lvds_fixed_mode =
2064                                 drm_mode_duplicate(connector->dev, newmode);
2065
2066                         intel_sdvo->is_lvds = true;
2067                         break;
2068                 }
2069         }
2070 }
2071
2072 static int intel_sdvo_get_modes(struct drm_connector *connector)
2073 {
2074         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2075
2076         if (IS_TV(intel_sdvo_connector))
2077                 intel_sdvo_get_tv_modes(connector);
2078         else if (IS_LVDS(intel_sdvo_connector))
2079                 intel_sdvo_get_lvds_modes(connector);
2080         else
2081                 intel_sdvo_get_ddc_modes(connector);
2082
2083         return !list_empty(&connector->probed_modes);
2084 }
2085
2086 static void intel_sdvo_destroy(struct drm_connector *connector)
2087 {
2088         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2089
2090         drm_connector_cleanup(connector);
2091         kfree(intel_sdvo_connector);
2092 }
2093
2094 static int
2095 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2096                                          const struct drm_connector_state *state,
2097                                          struct drm_property *property,
2098                                          uint64_t *val)
2099 {
2100         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2101         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2102
2103         if (property == intel_sdvo_connector->tv_format) {
2104                 int i;
2105
2106                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2107                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2108                                 *val = i;
2109
2110                                 return 0;
2111                         }
2112
2113                 WARN_ON(1);
2114                 *val = 0;
2115         } else if (property == intel_sdvo_connector->top ||
2116                    property == intel_sdvo_connector->bottom)
2117                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2118         else if (property == intel_sdvo_connector->left ||
2119                  property == intel_sdvo_connector->right)
2120                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2121         else if (property == intel_sdvo_connector->hpos)
2122                 *val = sdvo_state->tv.hpos;
2123         else if (property == intel_sdvo_connector->vpos)
2124                 *val = sdvo_state->tv.vpos;
2125         else if (property == intel_sdvo_connector->saturation)
2126                 *val = state->tv.saturation;
2127         else if (property == intel_sdvo_connector->contrast)
2128                 *val = state->tv.contrast;
2129         else if (property == intel_sdvo_connector->hue)
2130                 *val = state->tv.hue;
2131         else if (property == intel_sdvo_connector->brightness)
2132                 *val = state->tv.brightness;
2133         else if (property == intel_sdvo_connector->sharpness)
2134                 *val = sdvo_state->tv.sharpness;
2135         else if (property == intel_sdvo_connector->flicker_filter)
2136                 *val = sdvo_state->tv.flicker_filter;
2137         else if (property == intel_sdvo_connector->flicker_filter_2d)
2138                 *val = sdvo_state->tv.flicker_filter_2d;
2139         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2140                 *val = sdvo_state->tv.flicker_filter_adaptive;
2141         else if (property == intel_sdvo_connector->tv_chroma_filter)
2142                 *val = sdvo_state->tv.chroma_filter;
2143         else if (property == intel_sdvo_connector->tv_luma_filter)
2144                 *val = sdvo_state->tv.luma_filter;
2145         else if (property == intel_sdvo_connector->dot_crawl)
2146                 *val = sdvo_state->tv.dot_crawl;
2147         else
2148                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2149
2150         return 0;
2151 }
2152
2153 static int
2154 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2155                                          struct drm_connector_state *state,
2156                                          struct drm_property *property,
2157                                          uint64_t val)
2158 {
2159         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2160         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2161
2162         if (property == intel_sdvo_connector->tv_format) {
2163                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2164
2165                 if (state->crtc) {
2166                         struct drm_crtc_state *crtc_state =
2167                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2168
2169                         crtc_state->connectors_changed = true;
2170                 }
2171         } else if (property == intel_sdvo_connector->top ||
2172                    property == intel_sdvo_connector->bottom)
2173                 /* Cannot set these independent from each other */
2174                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2175         else if (property == intel_sdvo_connector->left ||
2176                  property == intel_sdvo_connector->right)
2177                 /* Cannot set these independent from each other */
2178                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2179         else if (property == intel_sdvo_connector->hpos)
2180                 sdvo_state->tv.hpos = val;
2181         else if (property == intel_sdvo_connector->vpos)
2182                 sdvo_state->tv.vpos = val;
2183         else if (property == intel_sdvo_connector->saturation)
2184                 state->tv.saturation = val;
2185         else if (property == intel_sdvo_connector->contrast)
2186                 state->tv.contrast = val;
2187         else if (property == intel_sdvo_connector->hue)
2188                 state->tv.hue = val;
2189         else if (property == intel_sdvo_connector->brightness)
2190                 state->tv.brightness = val;
2191         else if (property == intel_sdvo_connector->sharpness)
2192                 sdvo_state->tv.sharpness = val;
2193         else if (property == intel_sdvo_connector->flicker_filter)
2194                 sdvo_state->tv.flicker_filter = val;
2195         else if (property == intel_sdvo_connector->flicker_filter_2d)
2196                 sdvo_state->tv.flicker_filter_2d = val;
2197         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2198                 sdvo_state->tv.flicker_filter_adaptive = val;
2199         else if (property == intel_sdvo_connector->tv_chroma_filter)
2200                 sdvo_state->tv.chroma_filter = val;
2201         else if (property == intel_sdvo_connector->tv_luma_filter)
2202                 sdvo_state->tv.luma_filter = val;
2203         else if (property == intel_sdvo_connector->dot_crawl)
2204                 sdvo_state->tv.dot_crawl = val;
2205         else
2206                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2207
2208         return 0;
2209 }
2210
2211 static int
2212 intel_sdvo_connector_register(struct drm_connector *connector)
2213 {
2214         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2215         int ret;
2216
2217         ret = intel_connector_register(connector);
2218         if (ret)
2219                 return ret;
2220
2221         return sysfs_create_link(&connector->kdev->kobj,
2222                                  &sdvo->ddc.dev.kobj,
2223                                  sdvo->ddc.dev.kobj.name);
2224 }
2225
2226 static void
2227 intel_sdvo_connector_unregister(struct drm_connector *connector)
2228 {
2229         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2230
2231         sysfs_remove_link(&connector->kdev->kobj,
2232                           sdvo->ddc.dev.kobj.name);
2233         intel_connector_unregister(connector);
2234 }
2235
2236 static struct drm_connector_state *
2237 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2238 {
2239         struct intel_sdvo_connector_state *state;
2240
2241         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2242         if (!state)
2243                 return NULL;
2244
2245         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2246         return &state->base.base;
2247 }
2248
2249 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2250         .detect = intel_sdvo_detect,
2251         .fill_modes = drm_helper_probe_single_connector_modes,
2252         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2253         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2254         .late_register = intel_sdvo_connector_register,
2255         .early_unregister = intel_sdvo_connector_unregister,
2256         .destroy = intel_sdvo_destroy,
2257         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2258         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2259 };
2260
2261 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2262                                    struct drm_connector_state *new_conn_state)
2263 {
2264         struct drm_atomic_state *state = new_conn_state->state;
2265         struct drm_connector_state *old_conn_state =
2266                 drm_atomic_get_old_connector_state(state, conn);
2267         struct intel_sdvo_connector_state *old_state =
2268                 to_intel_sdvo_connector_state(old_conn_state);
2269         struct intel_sdvo_connector_state *new_state =
2270                 to_intel_sdvo_connector_state(new_conn_state);
2271
2272         if (new_conn_state->crtc &&
2273             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2274              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2275                 struct drm_crtc_state *crtc_state =
2276                         drm_atomic_get_new_crtc_state(new_conn_state->state,
2277                                                       new_conn_state->crtc);
2278
2279                 crtc_state->connectors_changed = true;
2280         }
2281
2282         return intel_digital_connector_atomic_check(conn, new_conn_state);
2283 }
2284
2285 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2286         .get_modes = intel_sdvo_get_modes,
2287         .mode_valid = intel_sdvo_mode_valid,
2288         .atomic_check = intel_sdvo_atomic_check,
2289 };
2290
2291 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2292 {
2293         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2294
2295         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2296                 drm_mode_destroy(encoder->dev,
2297                                  intel_sdvo->sdvo_lvds_fixed_mode);
2298
2299         i2c_del_adapter(&intel_sdvo->ddc);
2300         intel_encoder_destroy(encoder);
2301 }
2302
2303 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2304         .destroy = intel_sdvo_enc_destroy,
2305 };
2306
2307 static void
2308 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2309 {
2310         uint16_t mask = 0;
2311         unsigned int num_bits;
2312
2313         /* Make a mask of outputs less than or equal to our own priority in the
2314          * list.
2315          */
2316         switch (sdvo->controlled_output) {
2317         case SDVO_OUTPUT_LVDS1:
2318                 mask |= SDVO_OUTPUT_LVDS1;
2319         case SDVO_OUTPUT_LVDS0:
2320                 mask |= SDVO_OUTPUT_LVDS0;
2321         case SDVO_OUTPUT_TMDS1:
2322                 mask |= SDVO_OUTPUT_TMDS1;
2323         case SDVO_OUTPUT_TMDS0:
2324                 mask |= SDVO_OUTPUT_TMDS0;
2325         case SDVO_OUTPUT_RGB1:
2326                 mask |= SDVO_OUTPUT_RGB1;
2327         case SDVO_OUTPUT_RGB0:
2328                 mask |= SDVO_OUTPUT_RGB0;
2329                 break;
2330         }
2331
2332         /* Count bits to find what number we are in the priority list. */
2333         mask &= sdvo->caps.output_flags;
2334         num_bits = hweight16(mask);
2335         /* If more than 3 outputs, default to DDC bus 3 for now. */
2336         if (num_bits > 3)
2337                 num_bits = 3;
2338
2339         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2340         sdvo->ddc_bus = 1 << num_bits;
2341 }
2342
2343 /**
2344  * Choose the appropriate DDC bus for control bus switch command for this
2345  * SDVO output based on the controlled output.
2346  *
2347  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2348  * outputs, then LVDS outputs.
2349  */
2350 static void
2351 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2352                           struct intel_sdvo *sdvo)
2353 {
2354         struct sdvo_device_mapping *mapping;
2355
2356         if (sdvo->port == PORT_B)
2357                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2358         else
2359                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2360
2361         if (mapping->initialized)
2362                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2363         else
2364                 intel_sdvo_guess_ddc_bus(sdvo);
2365 }
2366
2367 static void
2368 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2369                           struct intel_sdvo *sdvo)
2370 {
2371         struct sdvo_device_mapping *mapping;
2372         u8 pin;
2373
2374         if (sdvo->port == PORT_B)
2375                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2376         else
2377                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2378
2379         if (mapping->initialized &&
2380             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2381                 pin = mapping->i2c_pin;
2382         else
2383                 pin = GMBUS_PIN_DPB;
2384
2385         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2386
2387         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2388          * our code totally fails once we start using gmbus. Hence fall back to
2389          * bit banging for now. */
2390         intel_gmbus_force_bit(sdvo->i2c, true);
2391 }
2392
2393 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2394 static void
2395 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2396 {
2397         intel_gmbus_force_bit(sdvo->i2c, false);
2398 }
2399
2400 static bool
2401 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2402 {
2403         return intel_sdvo_check_supp_encode(intel_sdvo);
2404 }
2405
2406 static u8
2407 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2408                           struct intel_sdvo *sdvo)
2409 {
2410         struct sdvo_device_mapping *my_mapping, *other_mapping;
2411
2412         if (sdvo->port == PORT_B) {
2413                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2414                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2415         } else {
2416                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2417                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2418         }
2419
2420         /* If the BIOS described our SDVO device, take advantage of it. */
2421         if (my_mapping->slave_addr)
2422                 return my_mapping->slave_addr;
2423
2424         /* If the BIOS only described a different SDVO device, use the
2425          * address that it isn't using.
2426          */
2427         if (other_mapping->slave_addr) {
2428                 if (other_mapping->slave_addr == 0x70)
2429                         return 0x72;
2430                 else
2431                         return 0x70;
2432         }
2433
2434         /* No SDVO device info is found for another DVO port,
2435          * so use mapping assumption we had before BIOS parsing.
2436          */
2437         if (sdvo->port == PORT_B)
2438                 return 0x70;
2439         else
2440                 return 0x72;
2441 }
2442
2443 static int
2444 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2445                           struct intel_sdvo *encoder)
2446 {
2447         struct drm_connector *drm_connector;
2448         int ret;
2449
2450         drm_connector = &connector->base.base;
2451         ret = drm_connector_init(encoder->base.base.dev,
2452                            drm_connector,
2453                            &intel_sdvo_connector_funcs,
2454                            connector->base.base.connector_type);
2455         if (ret < 0)
2456                 return ret;
2457
2458         drm_connector_helper_add(drm_connector,
2459                                  &intel_sdvo_connector_helper_funcs);
2460
2461         connector->base.base.interlace_allowed = 1;
2462         connector->base.base.doublescan_allowed = 0;
2463         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2464         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2465
2466         intel_connector_attach_encoder(&connector->base, &encoder->base);
2467
2468         return 0;
2469 }
2470
2471 static void
2472 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2473                                struct intel_sdvo_connector *connector)
2474 {
2475         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2476
2477         intel_attach_force_audio_property(&connector->base.base);
2478         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2479                 intel_attach_broadcast_rgb_property(&connector->base.base);
2480         }
2481         intel_attach_aspect_ratio_property(&connector->base.base);
2482         connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2483 }
2484
2485 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2486 {
2487         struct intel_sdvo_connector *sdvo_connector;
2488         struct intel_sdvo_connector_state *conn_state;
2489
2490         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2491         if (!sdvo_connector)
2492                 return NULL;
2493
2494         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2495         if (!conn_state) {
2496                 kfree(sdvo_connector);
2497                 return NULL;
2498         }
2499
2500         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2501                                             &conn_state->base.base);
2502
2503         return sdvo_connector;
2504 }
2505
2506 static bool
2507 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2508 {
2509         struct drm_encoder *encoder = &intel_sdvo->base.base;
2510         struct drm_connector *connector;
2511         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2512         struct intel_connector *intel_connector;
2513         struct intel_sdvo_connector *intel_sdvo_connector;
2514
2515         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2516
2517         intel_sdvo_connector = intel_sdvo_connector_alloc();
2518         if (!intel_sdvo_connector)
2519                 return false;
2520
2521         if (device == 0) {
2522                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2523                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2524         } else if (device == 1) {
2525                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2526                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2527         }
2528
2529         intel_connector = &intel_sdvo_connector->base;
2530         connector = &intel_connector->base;
2531         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2532                 intel_sdvo_connector->output_flag) {
2533                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2534                 /* Some SDVO devices have one-shot hotplug interrupts.
2535                  * Ensure that they get re-enabled when an interrupt happens.
2536                  */
2537                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2538                 intel_sdvo_enable_hotplug(intel_encoder);
2539         } else {
2540                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2541         }
2542         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2543         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2544
2545         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2546                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2547                 intel_sdvo->is_hdmi = true;
2548         }
2549
2550         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2551                 kfree(intel_sdvo_connector);
2552                 return false;
2553         }
2554
2555         if (intel_sdvo->is_hdmi)
2556                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2557
2558         return true;
2559 }
2560
2561 static bool
2562 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2563 {
2564         struct drm_encoder *encoder = &intel_sdvo->base.base;
2565         struct drm_connector *connector;
2566         struct intel_connector *intel_connector;
2567         struct intel_sdvo_connector *intel_sdvo_connector;
2568
2569         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2570
2571         intel_sdvo_connector = intel_sdvo_connector_alloc();
2572         if (!intel_sdvo_connector)
2573                 return false;
2574
2575         intel_connector = &intel_sdvo_connector->base;
2576         connector = &intel_connector->base;
2577         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2578         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2579
2580         intel_sdvo->controlled_output |= type;
2581         intel_sdvo_connector->output_flag = type;
2582
2583         intel_sdvo->is_tv = true;
2584
2585         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2586                 kfree(intel_sdvo_connector);
2587                 return false;
2588         }
2589
2590         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2591                 goto err;
2592
2593         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2594                 goto err;
2595
2596         return true;
2597
2598 err:
2599         intel_sdvo_destroy(connector);
2600         return false;
2601 }
2602
2603 static bool
2604 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2605 {
2606         struct drm_encoder *encoder = &intel_sdvo->base.base;
2607         struct drm_connector *connector;
2608         struct intel_connector *intel_connector;
2609         struct intel_sdvo_connector *intel_sdvo_connector;
2610
2611         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2612
2613         intel_sdvo_connector = intel_sdvo_connector_alloc();
2614         if (!intel_sdvo_connector)
2615                 return false;
2616
2617         intel_connector = &intel_sdvo_connector->base;
2618         connector = &intel_connector->base;
2619         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2620         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2621         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2622
2623         if (device == 0) {
2624                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2625                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2626         } else if (device == 1) {
2627                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2628                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2629         }
2630
2631         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2632                 kfree(intel_sdvo_connector);
2633                 return false;
2634         }
2635
2636         return true;
2637 }
2638
2639 static bool
2640 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2641 {
2642         struct drm_encoder *encoder = &intel_sdvo->base.base;
2643         struct drm_connector *connector;
2644         struct intel_connector *intel_connector;
2645         struct intel_sdvo_connector *intel_sdvo_connector;
2646
2647         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2648
2649         intel_sdvo_connector = intel_sdvo_connector_alloc();
2650         if (!intel_sdvo_connector)
2651                 return false;
2652
2653         intel_connector = &intel_sdvo_connector->base;
2654         connector = &intel_connector->base;
2655         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2656         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2657
2658         if (device == 0) {
2659                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2660                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2661         } else if (device == 1) {
2662                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2663                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2664         }
2665
2666         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2667                 kfree(intel_sdvo_connector);
2668                 return false;
2669         }
2670
2671         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2672                 goto err;
2673
2674         return true;
2675
2676 err:
2677         intel_sdvo_destroy(connector);
2678         return false;
2679 }
2680
2681 static bool
2682 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2683 {
2684         intel_sdvo->is_tv = false;
2685         intel_sdvo->is_lvds = false;
2686
2687         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2688
2689         if (flags & SDVO_OUTPUT_TMDS0)
2690                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2691                         return false;
2692
2693         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2694                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2695                         return false;
2696
2697         /* TV has no XXX1 function block */
2698         if (flags & SDVO_OUTPUT_SVID0)
2699                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2700                         return false;
2701
2702         if (flags & SDVO_OUTPUT_CVBS0)
2703                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2704                         return false;
2705
2706         if (flags & SDVO_OUTPUT_YPRPB0)
2707                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2708                         return false;
2709
2710         if (flags & SDVO_OUTPUT_RGB0)
2711                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2712                         return false;
2713
2714         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2715                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2716                         return false;
2717
2718         if (flags & SDVO_OUTPUT_LVDS0)
2719                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2720                         return false;
2721
2722         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2723                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2724                         return false;
2725
2726         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2727                 unsigned char bytes[2];
2728
2729                 intel_sdvo->controlled_output = 0;
2730                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2731                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2732                               SDVO_NAME(intel_sdvo),
2733                               bytes[0], bytes[1]);
2734                 return false;
2735         }
2736         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2737
2738         return true;
2739 }
2740
2741 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2742 {
2743         struct drm_device *dev = intel_sdvo->base.base.dev;
2744         struct drm_connector *connector, *tmp;
2745
2746         list_for_each_entry_safe(connector, tmp,
2747                                  &dev->mode_config.connector_list, head) {
2748                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2749                         drm_connector_unregister(connector);
2750                         intel_sdvo_destroy(connector);
2751                 }
2752         }
2753 }
2754
2755 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2756                                           struct intel_sdvo_connector *intel_sdvo_connector,
2757                                           int type)
2758 {
2759         struct drm_device *dev = intel_sdvo->base.base.dev;
2760         struct intel_sdvo_tv_format format;
2761         uint32_t format_map, i;
2762
2763         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2764                 return false;
2765
2766         BUILD_BUG_ON(sizeof(format) != 6);
2767         if (!intel_sdvo_get_value(intel_sdvo,
2768                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2769                                   &format, sizeof(format)))
2770                 return false;
2771
2772         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2773
2774         if (format_map == 0)
2775                 return false;
2776
2777         intel_sdvo_connector->format_supported_num = 0;
2778         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2779                 if (format_map & (1 << i))
2780                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2781
2782
2783         intel_sdvo_connector->tv_format =
2784                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2785                                             "mode", intel_sdvo_connector->format_supported_num);
2786         if (!intel_sdvo_connector->tv_format)
2787                 return false;
2788
2789         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2790                 drm_property_add_enum(
2791                                 intel_sdvo_connector->tv_format, i,
2792                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2793
2794         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2795         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2796                                    intel_sdvo_connector->tv_format, 0);
2797         return true;
2798
2799 }
2800
2801 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2802         if (enhancements.name) { \
2803                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2804                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2805                         return false; \
2806                 intel_sdvo_connector->name = \
2807                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2808                 if (!intel_sdvo_connector->name) return false; \
2809                 state_assignment = response; \
2810                 drm_object_attach_property(&connector->base, \
2811                                            intel_sdvo_connector->name, 0); \
2812                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2813                               data_value[0], data_value[1], response); \
2814         } \
2815 } while (0)
2816
2817 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2818
2819 static bool
2820 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2821                                       struct intel_sdvo_connector *intel_sdvo_connector,
2822                                       struct intel_sdvo_enhancements_reply enhancements)
2823 {
2824         struct drm_device *dev = intel_sdvo->base.base.dev;
2825         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2826         struct drm_connector_state *conn_state = connector->state;
2827         struct intel_sdvo_connector_state *sdvo_state =
2828                 to_intel_sdvo_connector_state(conn_state);
2829         uint16_t response, data_value[2];
2830
2831         /* when horizontal overscan is supported, Add the left/right  property */
2832         if (enhancements.overscan_h) {
2833                 if (!intel_sdvo_get_value(intel_sdvo,
2834                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2835                                           &data_value, 4))
2836                         return false;
2837
2838                 if (!intel_sdvo_get_value(intel_sdvo,
2839                                           SDVO_CMD_GET_OVERSCAN_H,
2840                                           &response, 2))
2841                         return false;
2842
2843                 sdvo_state->tv.overscan_h = response;
2844
2845                 intel_sdvo_connector->max_hscan = data_value[0];
2846                 intel_sdvo_connector->left =
2847                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2848                 if (!intel_sdvo_connector->left)
2849                         return false;
2850
2851                 drm_object_attach_property(&connector->base,
2852                                            intel_sdvo_connector->left, 0);
2853
2854                 intel_sdvo_connector->right =
2855                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2856                 if (!intel_sdvo_connector->right)
2857                         return false;
2858
2859                 drm_object_attach_property(&connector->base,
2860                                               intel_sdvo_connector->right, 0);
2861                 DRM_DEBUG_KMS("h_overscan: max %d, "
2862                               "default %d, current %d\n",
2863                               data_value[0], data_value[1], response);
2864         }
2865
2866         if (enhancements.overscan_v) {
2867                 if (!intel_sdvo_get_value(intel_sdvo,
2868                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2869                                           &data_value, 4))
2870                         return false;
2871
2872                 if (!intel_sdvo_get_value(intel_sdvo,
2873                                           SDVO_CMD_GET_OVERSCAN_V,
2874                                           &response, 2))
2875                         return false;
2876
2877                 sdvo_state->tv.overscan_v = response;
2878
2879                 intel_sdvo_connector->max_vscan = data_value[0];
2880                 intel_sdvo_connector->top =
2881                         drm_property_create_range(dev, 0,
2882                                             "top_margin", 0, data_value[0]);
2883                 if (!intel_sdvo_connector->top)
2884                         return false;
2885
2886                 drm_object_attach_property(&connector->base,
2887                                            intel_sdvo_connector->top, 0);
2888
2889                 intel_sdvo_connector->bottom =
2890                         drm_property_create_range(dev, 0,
2891                                             "bottom_margin", 0, data_value[0]);
2892                 if (!intel_sdvo_connector->bottom)
2893                         return false;
2894
2895                 drm_object_attach_property(&connector->base,
2896                                               intel_sdvo_connector->bottom, 0);
2897                 DRM_DEBUG_KMS("v_overscan: max %d, "
2898                               "default %d, current %d\n",
2899                               data_value[0], data_value[1], response);
2900         }
2901
2902         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
2903         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
2904         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
2905         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
2906         ENHANCEMENT(&conn_state->tv, hue, HUE);
2907         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
2908         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
2909         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
2910         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2911         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
2912         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
2913         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
2914
2915         if (enhancements.dot_crawl) {
2916                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2917                         return false;
2918
2919                 sdvo_state->tv.dot_crawl = response & 0x1;
2920                 intel_sdvo_connector->dot_crawl =
2921                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2922                 if (!intel_sdvo_connector->dot_crawl)
2923                         return false;
2924
2925                 drm_object_attach_property(&connector->base,
2926                                            intel_sdvo_connector->dot_crawl, 0);
2927                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2928         }
2929
2930         return true;
2931 }
2932
2933 static bool
2934 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2935                                         struct intel_sdvo_connector *intel_sdvo_connector,
2936                                         struct intel_sdvo_enhancements_reply enhancements)
2937 {
2938         struct drm_device *dev = intel_sdvo->base.base.dev;
2939         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2940         uint16_t response, data_value[2];
2941
2942         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
2943
2944         return true;
2945 }
2946 #undef ENHANCEMENT
2947 #undef _ENHANCEMENT
2948
2949 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2950                                                struct intel_sdvo_connector *intel_sdvo_connector)
2951 {
2952         union {
2953                 struct intel_sdvo_enhancements_reply reply;
2954                 uint16_t response;
2955         } enhancements;
2956
2957         BUILD_BUG_ON(sizeof(enhancements) != 2);
2958
2959         if (!intel_sdvo_get_value(intel_sdvo,
2960                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2961                                   &enhancements, sizeof(enhancements)) ||
2962             enhancements.response == 0) {
2963                 DRM_DEBUG_KMS("No enhancement is supported\n");
2964                 return true;
2965         }
2966
2967         if (IS_TV(intel_sdvo_connector))
2968                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2969         else if (IS_LVDS(intel_sdvo_connector))
2970                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2971         else
2972                 return true;
2973 }
2974
2975 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2976                                      struct i2c_msg *msgs,
2977                                      int num)
2978 {
2979         struct intel_sdvo *sdvo = adapter->algo_data;
2980
2981         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2982                 return -EIO;
2983
2984         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2985 }
2986
2987 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2988 {
2989         struct intel_sdvo *sdvo = adapter->algo_data;
2990         return sdvo->i2c->algo->functionality(sdvo->i2c);
2991 }
2992
2993 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2994         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2995         .functionality  = intel_sdvo_ddc_proxy_func
2996 };
2997
2998 static void proxy_lock_bus(struct i2c_adapter *adapter,
2999                            unsigned int flags)
3000 {
3001         struct intel_sdvo *sdvo = adapter->algo_data;
3002         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3003 }
3004
3005 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3006                              unsigned int flags)
3007 {
3008         struct intel_sdvo *sdvo = adapter->algo_data;
3009         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3010 }
3011
3012 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3013                              unsigned int flags)
3014 {
3015         struct intel_sdvo *sdvo = adapter->algo_data;
3016         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3017 }
3018
3019 static const struct i2c_lock_operations proxy_lock_ops = {
3020         .lock_bus =    proxy_lock_bus,
3021         .trylock_bus = proxy_trylock_bus,
3022         .unlock_bus =  proxy_unlock_bus,
3023 };
3024
3025 static bool
3026 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3027                           struct drm_i915_private *dev_priv)
3028 {
3029         struct pci_dev *pdev = dev_priv->drm.pdev;
3030
3031         sdvo->ddc.owner = THIS_MODULE;
3032         sdvo->ddc.class = I2C_CLASS_DDC;
3033         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3034         sdvo->ddc.dev.parent = &pdev->dev;
3035         sdvo->ddc.algo_data = sdvo;
3036         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3037         sdvo->ddc.lock_ops = &proxy_lock_ops;
3038
3039         return i2c_add_adapter(&sdvo->ddc) == 0;
3040 }
3041
3042 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3043                                    enum port port)
3044 {
3045         if (HAS_PCH_SPLIT(dev_priv))
3046                 WARN_ON(port != PORT_B);
3047         else
3048                 WARN_ON(port != PORT_B && port != PORT_C);
3049 }
3050
3051 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3052                      i915_reg_t sdvo_reg, enum port port)
3053 {
3054         struct intel_encoder *intel_encoder;
3055         struct intel_sdvo *intel_sdvo;
3056         int i;
3057
3058         assert_sdvo_port_valid(dev_priv, port);
3059
3060         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3061         if (!intel_sdvo)
3062                 return false;
3063
3064         intel_sdvo->sdvo_reg = sdvo_reg;
3065         intel_sdvo->port = port;
3066         intel_sdvo->slave_addr =
3067                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3068         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3069         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3070                 goto err_i2c_bus;
3071
3072         /* encoder type will be decided later */
3073         intel_encoder = &intel_sdvo->base;
3074         intel_encoder->type = INTEL_OUTPUT_SDVO;
3075         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3076         intel_encoder->port = port;
3077         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3078                          &intel_sdvo_enc_funcs, 0,
3079                          "SDVO %c", port_name(port));
3080
3081         /* Read the regs to test if we can talk to the device */
3082         for (i = 0; i < 0x40; i++) {
3083                 u8 byte;
3084
3085                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3086                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
3087                                       SDVO_NAME(intel_sdvo));
3088                         goto err;
3089                 }
3090         }
3091
3092         intel_encoder->compute_config = intel_sdvo_compute_config;
3093         if (HAS_PCH_SPLIT(dev_priv)) {
3094                 intel_encoder->disable = pch_disable_sdvo;
3095                 intel_encoder->post_disable = pch_post_disable_sdvo;
3096         } else {
3097                 intel_encoder->disable = intel_disable_sdvo;
3098         }
3099         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3100         intel_encoder->enable = intel_enable_sdvo;
3101         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3102         intel_encoder->get_config = intel_sdvo_get_config;
3103
3104         /* In default case sdvo lvds is false */
3105         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3106                 goto err;
3107
3108         if (intel_sdvo_output_setup(intel_sdvo,
3109                                     intel_sdvo->caps.output_flags) != true) {
3110                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3111                               SDVO_NAME(intel_sdvo));
3112                 /* Output_setup can leave behind connectors! */
3113                 goto err_output;
3114         }
3115
3116         /* Only enable the hotplug irq if we need it, to work around noisy
3117          * hotplug lines.
3118          */
3119         if (intel_sdvo->hotplug_active) {
3120                 if (intel_sdvo->port == PORT_B)
3121                         intel_encoder->hpd_pin = HPD_SDVO_B;
3122                 else
3123                         intel_encoder->hpd_pin = HPD_SDVO_C;
3124         }
3125
3126         /*
3127          * Cloning SDVO with anything is often impossible, since the SDVO
3128          * encoder can request a special input timing mode. And even if that's
3129          * not the case we have evidence that cloning a plain unscaled mode with
3130          * VGA doesn't really work. Furthermore the cloning flags are way too
3131          * simplistic anyway to express such constraints, so just give up on
3132          * cloning for SDVO encoders.
3133          */
3134         intel_sdvo->base.cloneable = 0;
3135
3136         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3137
3138         /* Set the input timing to the screen. Assume always input 0. */
3139         if (!intel_sdvo_set_target_input(intel_sdvo))
3140                 goto err_output;
3141
3142         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3143                                                     &intel_sdvo->pixel_clock_min,
3144                                                     &intel_sdvo->pixel_clock_max))
3145                 goto err_output;
3146
3147         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3148                         "clock range %dMHz - %dMHz, "
3149                         "input 1: %c, input 2: %c, "
3150                         "output 1: %c, output 2: %c\n",
3151                         SDVO_NAME(intel_sdvo),
3152                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3153                         intel_sdvo->caps.device_rev_id,
3154                         intel_sdvo->pixel_clock_min / 1000,
3155                         intel_sdvo->pixel_clock_max / 1000,
3156                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3157                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3158                         /* check currently supported outputs */
3159                         intel_sdvo->caps.output_flags &
3160                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3161                         intel_sdvo->caps.output_flags &
3162                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3163         return true;
3164
3165 err_output:
3166         intel_sdvo_output_cleanup(intel_sdvo);
3167
3168 err:
3169         drm_encoder_cleanup(&intel_encoder->base);
3170         i2c_del_adapter(&intel_sdvo->ddc);
3171 err_i2c_bus:
3172         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3173         kfree(intel_sdvo);
3174
3175         return false;
3176 }