drivers/gpu/drm/imx/imx-ldb.c

   1 /*
   2  * i.MX drm driver - LVDS display bridge
   3  *
   4  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <linux/module.h>
  17 #include <linux/clk.h>
  18 #include <linux/component.h>
  19 #include <drm/drmP.h>
  20 #include <drm/drm_atomic.h>
  21 #include <drm/drm_atomic_helper.h>
  22 #include <drm/drm_fb_helper.h>
  23 #include <drm/drm_crtc_helper.h>
  24 #include <drm/drm_of.h>
  25 #include <drm/drm_panel.h>
  26 #include <linux/mfd/syscon.h>
  27 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  28 #include <linux/of_device.h>
  29 #include <linux/of_graph.h>
  30 #include <video/of_display_timing.h>
  31 #include <video/of_videomode.h>
  32 #include <linux/regmap.h>
  33 #include <linux/videodev2.h>
  34
  35 #include "imx-drm.h"
  36
  37 #define DRIVER_NAME "imx-ldb"
  38
  39 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  40 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  41 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  42 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  43 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  44 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  45 #define LDB_SPLIT_MODE_EN               (1 << 4)
  46 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  47 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  48 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  49 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  50 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  51 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  52 #define LDB_BGREF_RMODE_INT             (1 << 15)
  53
  54 struct imx_ldb;
  55
  56 struct imx_ldb_channel {
  57         struct imx_ldb *ldb;
  58         struct drm_connector connector;
  59         struct drm_encoder encoder;
  60
  61         /* Defines what is connected to the ldb, only one at a time */
  62         struct drm_panel *panel;
  63         struct drm_bridge *bridge;
  64
  65         struct device_node *child;
  66         struct i2c_adapter *ddc;
  67         int chno;
  68         void *edid;
  69         int edid_len;
  70         struct drm_display_mode mode;
  71         int mode_valid;
  72         u32 bus_format;
  73         u32 bus_flags;
  74 };
  75
  76 static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
  77 {
  78         return container_of(c, struct imx_ldb_channel, connector);
  79 }
  80
  81 static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
  82 {
  83         return container_of(e, struct imx_ldb_channel, encoder);
  84 }
  85
  86 struct bus_mux {
  87         int reg;
  88         int shift;
  89         int mask;
  90 };
  91
  92 struct imx_ldb {
  93         struct regmap *regmap;
  94         struct device *dev;
  95         struct imx_ldb_channel channel[2];
  96         struct clk *clk[2]; /* our own clock */
  97         struct clk *clk_sel[4]; /* parent of display clock */
  98         struct clk *clk_parent[4]; /* original parent of clk_sel */
  99         struct clk *clk_pll[2]; /* upstream clock we can adjust */
 100         u32 ldb_ctrl;
 101         const struct bus_mux *lvds_mux;
 102 };
 103
 104 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
 105                                       u32 bus_format)
 106 {
 107         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 108         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 109
 110         switch (bus_format) {
 111         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 112                 break;
 113         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 114                 if (imx_ldb_ch->chno == 0 || dual)
 115                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 116                 if (imx_ldb_ch->chno == 1 || dual)
 117                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 118                 break;
 119         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 120                 if (imx_ldb_ch->chno == 0 || dual)
 121                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 122                                          LDB_BIT_MAP_CH0_JEIDA;
 123                 if (imx_ldb_ch->chno == 1 || dual)
 124                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 125                                          LDB_BIT_MAP_CH1_JEIDA;
 126                 break;
 127         }
 128 }
 129
 130 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
 131 {
 132         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 133         int num_modes = 0;
 134
 135         if (imx_ldb_ch->panel && imx_ldb_ch->panel->funcs &&
 136             imx_ldb_ch->panel->funcs->get_modes) {
 137                 num_modes = imx_ldb_ch->panel->funcs->get_modes(imx_ldb_ch->panel);
 138                 if (num_modes > 0)
 139                         return num_modes;
 140         }
 141
 142         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 143                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 144
 145         if (imx_ldb_ch->edid) {
 146                 drm_connector_update_edid_property(connector,
 147                                                         imx_ldb_ch->edid);
 148                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 149         }
 150
 151         if (imx_ldb_ch->mode_valid) {
 152                 struct drm_display_mode *mode;
 153
 154                 mode = drm_mode_create(connector->dev);
 155                 if (!mode)
 156                         return -EINVAL;
 157                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 158                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 159                 drm_mode_probed_add(connector, mode);
 160                 num_modes++;
 161         }
 162
 163         return num_modes;
 164 }
 165
 166 static struct drm_encoder *imx_ldb_connector_best_encoder(
 167                 struct drm_connector *connector)
 168 {
 169         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 170
 171         return &imx_ldb_ch->encoder;
 172 }
 173
 174 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 175                 unsigned long serial_clk, unsigned long di_clk)
 176 {
 177         int ret;
 178
 179         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 180                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 181         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 182
 183         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 184                         clk_get_rate(ldb->clk_pll[chno]));
 185
 186         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 187                         clk_get_rate(ldb->clk[chno]),
 188                         (long int)di_clk);
 189         clk_set_rate(ldb->clk[chno], di_clk);
 190
 191         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 192                         clk_get_rate(ldb->clk[chno]));
 193
 194         /* set display clock mux to LDB input clock */
 195         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 196         if (ret)
 197                 dev_err(ldb->dev,
 198                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 199                         chno);
 200 }
 201
 202 static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
 203 {
 204         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 205         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 206         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 207         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 208
 209         if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {
 210                 dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);
 211                 return;
 212         }
 213
 214         drm_panel_prepare(imx_ldb_ch->panel);
 215
 216         if (dual) {
 217                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
 218                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
 219
 220                 clk_prepare_enable(ldb->clk[0]);
 221                 clk_prepare_enable(ldb->clk[1]);
 222         } else {
 223                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
 224         }
 225
 226         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 227                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 228                 if (mux == 0 || ldb->lvds_mux)
 229                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 230                 else if (mux == 1)
 231                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 232         }
 233         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 234                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 235                 if (mux == 1 || ldb->lvds_mux)
 236                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 237                 else if (mux == 0)
 238                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 239         }
 240
 241         if (ldb->lvds_mux) {
 242                 const struct bus_mux *lvds_mux = NULL;
 243
 244                 if (imx_ldb_ch == &ldb->channel[0])
 245                         lvds_mux = &ldb->lvds_mux[0];
 246                 else if (imx_ldb_ch == &ldb->channel[1])
 247                         lvds_mux = &ldb->lvds_mux[1];
 248
 249                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 250                                    mux << lvds_mux->shift);
 251         }
 252
 253         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 254
 255         drm_panel_enable(imx_ldb_ch->panel);
 256 }
 257
 258 static void
 259 imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
 260                                 struct drm_crtc_state *crtc_state,
 261                                 struct drm_connector_state *connector_state)
 262 {
 263         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 264         struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 265         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 266         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 267         unsigned long serial_clk;
 268         unsigned long di_clk = mode->clock * 1000;
 269         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 270         u32 bus_format = imx_ldb_ch->bus_format;
 271
 272         if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {
 273                 dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);
 274                 return;
 275         }
 276
 277         if (mode->clock > 170000) {
 278                 dev_warn(ldb->dev,
 279                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 280         }
 281         if (mode->clock > 85000 && !dual) {
 282                 dev_warn(ldb->dev,
 283                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 284         }
 285
 286         if (dual) {
 287                 serial_clk = 3500UL * mode->clock;
 288                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 289                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 290         } else {
 291                 serial_clk = 7000UL * mode->clock;
 292                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 293                                   di_clk);
 294         }
 295
 296         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 297         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 298                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 299                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 300                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 301                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 302         }
 303         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 304                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 305                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 306                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 307                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 308         }
 309
 310         if (!bus_format) {
 311                 struct drm_connector *connector = connector_state->connector;
 312                 struct drm_display_info *di = &connector->display_info;
 313
 314                 if (di->num_bus_formats)
 315                         bus_format = di->bus_formats[0];
 316         }
 317         imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
 318 }
 319
 320 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 321 {
 322         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 323         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 324         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 325         int mux, ret;
 326
 327         drm_panel_disable(imx_ldb_ch->panel);
 328
 329         if (imx_ldb_ch == &ldb->channel[0] || dual)
 330                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 331         if (imx_ldb_ch == &ldb->channel[1] || dual)
 332                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 333
 334         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 335
 336         if (dual) {
 337                 clk_disable_unprepare(ldb->clk[0]);
 338                 clk_disable_unprepare(ldb->clk[1]);
 339         }
 340
 341         if (ldb->lvds_mux) {
 342                 const struct bus_mux *lvds_mux = NULL;
 343
 344                 if (imx_ldb_ch == &ldb->channel[0])
 345                         lvds_mux = &ldb->lvds_mux[0];
 346                 else if (imx_ldb_ch == &ldb->channel[1])
 347                         lvds_mux = &ldb->lvds_mux[1];
 348
 349                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 350                 mux &= lvds_mux->mask;
 351                 mux >>= lvds_mux->shift;
 352         } else {
 353                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 354         }
 355
 356         /* set display clock mux back to original input clock */
 357         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 358         if (ret)
 359                 dev_err(ldb->dev,
 360                         "unable to set di%d parent clock to original parent\n",
 361                         mux);
 362
 363         drm_panel_unprepare(imx_ldb_ch->panel);
 364 }
 365
 366 static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 367                                         struct drm_crtc_state *crtc_state,
 368                                         struct drm_connector_state *conn_state)
 369 {
 370         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
 371         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 372         struct drm_display_info *di = &conn_state->connector->display_info;
 373         u32 bus_format = imx_ldb_ch->bus_format;
 374
 375         /* Bus format description in DT overrides connector display info. */
 376         if (!bus_format && di->num_bus_formats) {
 377                 bus_format = di->bus_formats[0];
 378                 imx_crtc_state->bus_flags = di->bus_flags;
 379         } else {
 380                 bus_format = imx_ldb_ch->bus_format;
 381                 imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
 382         }
 383         switch (bus_format) {
 384         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 385                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 386                 break;
 387         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 388         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 389                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 390                 break;
 391         default:
 392                 return -EINVAL;
 393         }
 394
 395         imx_crtc_state->di_hsync_pin = 2;
 396         imx_crtc_state->di_vsync_pin = 3;
 397
 398         return 0;
 399 }
 400
 401
 402 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 403         .fill_modes = drm_helper_probe_single_connector_modes,
 404         .destroy = imx_drm_connector_destroy,
 405         .reset = drm_atomic_helper_connector_reset,
 406         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 407         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 408 };
 409
 410 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 411         .get_modes = imx_ldb_connector_get_modes,
 412         .best_encoder = imx_ldb_connector_best_encoder,
 413 };
 414
 415 static const struct drm_encoder_funcs imx_ldb_encoder_funcs = {
 416         .destroy = imx_drm_encoder_destroy,
 417 };
 418
 419 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 420         .atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
 421         .enable = imx_ldb_encoder_enable,
 422         .disable = imx_ldb_encoder_disable,
 423         .atomic_check = imx_ldb_encoder_atomic_check,
 424 };
 425
 426 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 427 {
 428         char clkname[16];
 429
 430         snprintf(clkname, sizeof(clkname), "di%d", chno);
 431         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 432         if (IS_ERR(ldb->clk[chno]))
 433                 return PTR_ERR(ldb->clk[chno]);
 434
 435         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 436         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 437
 438         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 439 }
 440
 441 static int imx_ldb_register(struct drm_device *drm,
 442         struct imx_ldb_channel *imx_ldb_ch)
 443 {
 444         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 445         struct drm_encoder *encoder = &imx_ldb_ch->encoder;
 446         int ret;
 447
 448         ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
 449         if (ret)
 450                 return ret;
 451
 452         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 453         if (ret)
 454                 return ret;
 455
 456         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 457                 ret = imx_ldb_get_clk(ldb, 1);
 458                 if (ret)
 459                         return ret;
 460         }
 461
 462         drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
 463         drm_encoder_init(drm, encoder, &imx_ldb_encoder_funcs,
 464                          DRM_MODE_ENCODER_LVDS, NULL);
 465
 466         if (imx_ldb_ch->bridge) {
 467                 ret = drm_bridge_attach(&imx_ldb_ch->encoder,
 468                                         imx_ldb_ch->bridge, NULL);
 469                 if (ret) {
 470                         DRM_ERROR("Failed to initialize bridge with drm\n");
 471                         return ret;
 472                 }
 473         } else {
 474                 /*
 475                  * We want to add the connector whenever there is no bridge
 476                  * that brings its own, not only when there is a panel. For
 477                  * historical reasons, the ldb driver can also work without
 478                  * a panel.
 479                  */
 480                 drm_connector_helper_add(&imx_ldb_ch->connector,
 481                                 &imx_ldb_connector_helper_funcs);
 482                 drm_connector_init(drm, &imx_ldb_ch->connector,
 483                                 &imx_ldb_connector_funcs,
 484                                 DRM_MODE_CONNECTOR_LVDS);
 485                 drm_connector_attach_encoder(&imx_ldb_ch->connector, encoder);
 486         }
 487
 488         if (imx_ldb_ch->panel) {
 489                 ret = drm_panel_attach(imx_ldb_ch->panel,
 490                                        &imx_ldb_ch->connector);
 491                 if (ret)
 492                         return ret;
 493         }
 494
 495         return 0;
 496 }
 497
 498 enum {
 499         LVDS_BIT_MAP_SPWG,
 500         LVDS_BIT_MAP_JEIDA
 501 };
 502
 503 struct imx_ldb_bit_mapping {
 504         u32 bus_format;
 505         u32 datawidth;
 506         const char * const mapping;
 507 };
 508
 509 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 510         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 511         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 512         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 513 };
 514
 515 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 516 {
 517         const char *bm;
 518         u32 datawidth = 0;
 519         int ret, i;
 520
 521         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 522         if (ret < 0)
 523                 return ret;
 524
 525         of_property_read_u32(np, "fsl,data-width", &datawidth);
 526
 527         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 528                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 529                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 530                         return imx_ldb_bit_mappings[i].bus_format;
 531         }
 532
 533         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 534
 535         return -ENOENT;
 536 }
 537
 538 static struct bus_mux imx6q_lvds_mux[2] = {
 539         {
 540                 .reg = IOMUXC_GPR3,
 541                 .shift = 6,
 542                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 543         }, {
 544                 .reg = IOMUXC_GPR3,
 545                 .shift = 8,
 546                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 547         }
 548 };
 549
 550 /*
 551  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 552  * of_match_device will walk through this list and take the first entry
 553  * matching any of its compatible values. Therefore, the more generic
 554  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 555  */
 556 static const struct of_device_id imx_ldb_dt_ids[] = {
 557         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 558         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 559         { }
 560 };
 561 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 562
 563 static int imx_ldb_panel_ddc(struct device *dev,
 564                 struct imx_ldb_channel *channel, struct device_node *child)
 565 {
 566         struct device_node *ddc_node;
 567         const u8 *edidp;
 568         int ret;
 569
 570         ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 571         if (ddc_node) {
 572                 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 573                 of_node_put(ddc_node);
 574                 if (!channel->ddc) {
 575                         dev_warn(dev, "failed to get ddc i2c adapter\n");
 576                         return -EPROBE_DEFER;
 577                 }
 578         }
 579
 580         if (!channel->ddc) {
 581                 /* if no DDC available, fallback to hardcoded EDID */
 582                 dev_dbg(dev, "no ddc available\n");
 583
 584                 edidp = of_get_property(child, "edid",
 585                                         &channel->edid_len);
 586                 if (edidp) {
 587                         channel->edid = kmemdup(edidp,
 588                                                 channel->edid_len,
 589                                                 GFP_KERNEL);
 590                 } else if (!channel->panel) {
 591                         /* fallback to display-timings node */
 592                         ret = of_get_drm_display_mode(child,
 593                                                       &channel->mode,
 594                                                       &channel->bus_flags,
 595                                                       OF_USE_NATIVE_MODE);
 596                         if (!ret)
 597                                 channel->mode_valid = 1;
 598                 }
 599         }
 600         return 0;
 601 }
 602
 603 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 604 {
 605         struct drm_device *drm = data;
 606         struct device_node *np = dev->of_node;
 607         const struct of_device_id *of_id =
 608                         of_match_device(imx_ldb_dt_ids, dev);
 609         struct device_node *child;
 610         struct imx_ldb *imx_ldb;
 611         int dual;
 612         int ret;
 613         int i;
 614
 615         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 616         if (!imx_ldb)
 617                 return -ENOMEM;
 618
 619         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 620         if (IS_ERR(imx_ldb->regmap)) {
 621                 dev_err(dev, "failed to get parent regmap\n");
 622                 return PTR_ERR(imx_ldb->regmap);
 623         }
 624
 625         /* disable LDB by resetting the control register to POR default */
 626         regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
 627
 628         imx_ldb->dev = dev;
 629
 630         if (of_id)
 631                 imx_ldb->lvds_mux = of_id->data;
 632
 633         dual = of_property_read_bool(np, "fsl,dual-channel");
 634         if (dual)
 635                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 636
 637         /*
 638          * There are three different possible clock mux configurations:
 639          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 640          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 641          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 642          * Map them all to di0_sel...di3_sel.
 643          */
 644         for (i = 0; i < 4; i++) {
 645                 char clkname[16];
 646
 647                 sprintf(clkname, "di%d_sel", i);
 648                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 649                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 650                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 651                         imx_ldb->clk_sel[i] = NULL;
 652                         break;
 653                 }
 654
 655                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 656         }
 657         if (i == 0)
 658                 return ret;
 659
 660         for_each_child_of_node(np, child) {
 661                 struct imx_ldb_channel *channel;
 662                 int bus_format;
 663
 664                 ret = of_property_read_u32(child, "reg", &i);
 665                 if (ret || i < 0 || i > 1) {
 666                         ret = -EINVAL;
 667                         goto free_child;
 668                 }
 669
 670                 if (!of_device_is_available(child))
 671                         continue;
 672
 673                 if (dual && i > 0) {
 674                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 675                         continue;
 676                 }
 677
 678                 channel = &imx_ldb->channel[i];
 679                 channel->ldb = imx_ldb;
 680                 channel->chno = i;
 681
 682                 /*
 683                  * The output port is port@4 with an external 4-port mux or
 684                  * port@2 with the internal 2-port mux.
 685                  */
 686                 ret = drm_of_find_panel_or_bridge(child,
 687                                                   imx_ldb->lvds_mux ? 4 : 2, 0,
 688                                                   &channel->panel, &channel->bridge);
 689                 if (ret && ret != -ENODEV)
 690                         goto free_child;
 691
 692                 /* panel ddc only if there is no bridge */
 693                 if (!channel->bridge) {
 694                         ret = imx_ldb_panel_ddc(dev, channel, child);
 695                         if (ret)
 696                                 goto free_child;
 697                 }
 698
 699                 bus_format = of_get_bus_format(dev, child);
 700                 if (bus_format == -EINVAL) {
 701                         /*
 702                          * If no bus format was specified in the device tree,
 703                          * we can still get it from the connected panel later.
 704                          */
 705                         if (channel->panel && channel->panel->funcs &&
 706                             channel->panel->funcs->get_modes)
 707                                 bus_format = 0;
 708                 }
 709                 if (bus_format < 0) {
 710                         dev_err(dev, "could not determine data mapping: %d\n",
 711                                 bus_format);
 712                         ret = bus_format;
 713                         goto free_child;
 714                 }
 715                 channel->bus_format = bus_format;
 716                 channel->child = child;
 717
 718                 ret = imx_ldb_register(drm, channel);
 719                 if (ret) {
 720                         channel->child = NULL;
 721                         goto free_child;
 722                 }
 723         }
 724
 725         dev_set_drvdata(dev, imx_ldb);
 726
 727         return 0;
 728
 729 free_child:
 730         of_node_put(child);
 731         return ret;
 732 }
 733
 734 static void imx_ldb_unbind(struct device *dev, struct device *master,
 735         void *data)
 736 {
 737         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 738         int i;
 739
 740         for (i = 0; i < 2; i++) {
 741                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 742
 743                 if (channel->panel)
 744                         drm_panel_detach(channel->panel);
 745
 746                 kfree(channel->edid);
 747                 i2c_put_adapter(channel->ddc);
 748         }
 749 }
 750
 751 static const struct component_ops imx_ldb_ops = {
 752         .bind   = imx_ldb_bind,
 753         .unbind = imx_ldb_unbind,
 754 };
 755
 756 static int imx_ldb_probe(struct platform_device *pdev)
 757 {
 758         return component_add(&pdev->dev, &imx_ldb_ops);
 759 }
 760
 761 static int imx_ldb_remove(struct platform_device *pdev)
 762 {
 763         component_del(&pdev->dev, &imx_ldb_ops);
 764         return 0;
 765 }
 766
 767 static struct platform_driver imx_ldb_driver = {
 768         .probe          = imx_ldb_probe,
 769         .remove         = imx_ldb_remove,
 770         .driver         = {
 771                 .of_match_table = imx_ldb_dt_ids,
 772                 .name   = DRIVER_NAME,
 773         },
 774 };
 775
 776 module_platform_driver(imx_ldb_driver);
 777
 778 MODULE_DESCRIPTION("i.MX LVDS driver");
 779 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 780 MODULE_LICENSE("GPL");
 781 MODULE_ALIAS("platform:" DRIVER_NAME);