GNU Linux-libre 4.19.286-gnu1
[releases.git] / drivers / gpu / drm / mediatek / mtk_dpi.c
1 /*
2  * Copyright (c) 2014 MediaTek Inc.
3  * Author: Jie Qiu <jie.qiu@mediatek.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14 #include <drm/drmP.h>
15 #include <drm/drm_crtc.h>
16 #include <drm/drm_crtc_helper.h>
17 #include <linux/kernel.h>
18 #include <linux/component.h>
19 #include <linux/platform_device.h>
20 #include <linux/of.h>
21 #include <linux/of_graph.h>
22 #include <linux/interrupt.h>
23 #include <linux/types.h>
24 #include <linux/clk.h>
25 #include <video/videomode.h>
26
27 #include "mtk_dpi_regs.h"
28 #include "mtk_drm_ddp_comp.h"
29
30 enum mtk_dpi_out_bit_num {
31         MTK_DPI_OUT_BIT_NUM_8BITS,
32         MTK_DPI_OUT_BIT_NUM_10BITS,
33         MTK_DPI_OUT_BIT_NUM_12BITS,
34         MTK_DPI_OUT_BIT_NUM_16BITS
35 };
36
37 enum mtk_dpi_out_yc_map {
38         MTK_DPI_OUT_YC_MAP_RGB,
39         MTK_DPI_OUT_YC_MAP_CYCY,
40         MTK_DPI_OUT_YC_MAP_YCYC,
41         MTK_DPI_OUT_YC_MAP_CY,
42         MTK_DPI_OUT_YC_MAP_YC
43 };
44
45 enum mtk_dpi_out_channel_swap {
46         MTK_DPI_OUT_CHANNEL_SWAP_RGB,
47         MTK_DPI_OUT_CHANNEL_SWAP_GBR,
48         MTK_DPI_OUT_CHANNEL_SWAP_BRG,
49         MTK_DPI_OUT_CHANNEL_SWAP_RBG,
50         MTK_DPI_OUT_CHANNEL_SWAP_GRB,
51         MTK_DPI_OUT_CHANNEL_SWAP_BGR
52 };
53
54 enum mtk_dpi_out_color_format {
55         MTK_DPI_COLOR_FORMAT_RGB
56 };
57
58 struct mtk_dpi {
59         struct mtk_ddp_comp ddp_comp;
60         struct drm_encoder encoder;
61         struct drm_bridge *bridge;
62         void __iomem *regs;
63         struct device *dev;
64         struct clk *engine_clk;
65         struct clk *pixel_clk;
66         struct clk *tvd_clk;
67         int irq;
68         struct drm_display_mode mode;
69         enum mtk_dpi_out_color_format color_format;
70         enum mtk_dpi_out_yc_map yc_map;
71         enum mtk_dpi_out_bit_num bit_num;
72         enum mtk_dpi_out_channel_swap channel_swap;
73         bool power_sta;
74         u8 power_ctl;
75 };
76
77 static inline struct mtk_dpi *mtk_dpi_from_encoder(struct drm_encoder *e)
78 {
79         return container_of(e, struct mtk_dpi, encoder);
80 }
81
82 enum mtk_dpi_polarity {
83         MTK_DPI_POLARITY_RISING,
84         MTK_DPI_POLARITY_FALLING,
85 };
86
87 enum mtk_dpi_power_ctl {
88         DPI_POWER_START = BIT(0),
89         DPI_POWER_ENABLE = BIT(1),
90 };
91
92 struct mtk_dpi_polarities {
93         enum mtk_dpi_polarity de_pol;
94         enum mtk_dpi_polarity ck_pol;
95         enum mtk_dpi_polarity hsync_pol;
96         enum mtk_dpi_polarity vsync_pol;
97 };
98
99 struct mtk_dpi_sync_param {
100         u32 sync_width;
101         u32 front_porch;
102         u32 back_porch;
103         bool shift_half_line;
104 };
105
106 struct mtk_dpi_yc_limit {
107         u16 y_top;
108         u16 y_bottom;
109         u16 c_top;
110         u16 c_bottom;
111 };
112
113 static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
114 {
115         u32 tmp = readl(dpi->regs + offset) & ~mask;
116
117         tmp |= (val & mask);
118         writel(tmp, dpi->regs + offset);
119 }
120
121 static void mtk_dpi_sw_reset(struct mtk_dpi *dpi, bool reset)
122 {
123         mtk_dpi_mask(dpi, DPI_RET, reset ? RST : 0, RST);
124 }
125
126 static void mtk_dpi_enable(struct mtk_dpi *dpi)
127 {
128         mtk_dpi_mask(dpi, DPI_EN, EN, EN);
129 }
130
131 static void mtk_dpi_disable(struct mtk_dpi *dpi)
132 {
133         mtk_dpi_mask(dpi, DPI_EN, 0, EN);
134 }
135
136 static void mtk_dpi_config_hsync(struct mtk_dpi *dpi,
137                                  struct mtk_dpi_sync_param *sync)
138 {
139         mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH,
140                      sync->sync_width << HPW, HPW_MASK);
141         mtk_dpi_mask(dpi, DPI_TGEN_HPORCH,
142                      sync->back_porch << HBP, HBP_MASK);
143         mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,
144                      HFP_MASK);
145 }
146
147 static void mtk_dpi_config_vsync(struct mtk_dpi *dpi,
148                                  struct mtk_dpi_sync_param *sync,
149                                  u32 width_addr, u32 porch_addr)
150 {
151         mtk_dpi_mask(dpi, width_addr,
152                      sync->sync_width << VSYNC_WIDTH_SHIFT,
153                      VSYNC_WIDTH_MASK);
154         mtk_dpi_mask(dpi, width_addr,
155                      sync->shift_half_line << VSYNC_HALF_LINE_SHIFT,
156                      VSYNC_HALF_LINE_MASK);
157         mtk_dpi_mask(dpi, porch_addr,
158                      sync->back_porch << VSYNC_BACK_PORCH_SHIFT,
159                      VSYNC_BACK_PORCH_MASK);
160         mtk_dpi_mask(dpi, porch_addr,
161                      sync->front_porch << VSYNC_FRONT_PORCH_SHIFT,
162                      VSYNC_FRONT_PORCH_MASK);
163 }
164
165 static void mtk_dpi_config_vsync_lodd(struct mtk_dpi *dpi,
166                                       struct mtk_dpi_sync_param *sync)
167 {
168         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH, DPI_TGEN_VPORCH);
169 }
170
171 static void mtk_dpi_config_vsync_leven(struct mtk_dpi *dpi,
172                                        struct mtk_dpi_sync_param *sync)
173 {
174         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_LEVEN,
175                              DPI_TGEN_VPORCH_LEVEN);
176 }
177
178 static void mtk_dpi_config_vsync_rodd(struct mtk_dpi *dpi,
179                                       struct mtk_dpi_sync_param *sync)
180 {
181         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_RODD,
182                              DPI_TGEN_VPORCH_RODD);
183 }
184
185 static void mtk_dpi_config_vsync_reven(struct mtk_dpi *dpi,
186                                        struct mtk_dpi_sync_param *sync)
187 {
188         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_REVEN,
189                              DPI_TGEN_VPORCH_REVEN);
190 }
191
192 static void mtk_dpi_config_pol(struct mtk_dpi *dpi,
193                                struct mtk_dpi_polarities *dpi_pol)
194 {
195         unsigned int pol;
196
197         pol = (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ? 0 : CK_POL) |
198               (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ? 0 : DE_POL) |
199               (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 : HSYNC_POL) |
200               (dpi_pol->vsync_pol == MTK_DPI_POLARITY_RISING ? 0 : VSYNC_POL);
201         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol,
202                      CK_POL | DE_POL | HSYNC_POL | VSYNC_POL);
203 }
204
205 static void mtk_dpi_config_3d(struct mtk_dpi *dpi, bool en_3d)
206 {
207         mtk_dpi_mask(dpi, DPI_CON, en_3d ? TDFP_EN : 0, TDFP_EN);
208 }
209
210 static void mtk_dpi_config_interface(struct mtk_dpi *dpi, bool inter)
211 {
212         mtk_dpi_mask(dpi, DPI_CON, inter ? INTL_EN : 0, INTL_EN);
213 }
214
215 static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height)
216 {
217         mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE, HSIZE_MASK);
218         mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK);
219 }
220
221 static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi,
222                                          struct mtk_dpi_yc_limit *limit)
223 {
224         mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT,
225                      Y_LIMINT_BOT_MASK);
226         mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP,
227                      Y_LIMINT_TOP_MASK);
228         mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_bottom << C_LIMIT_BOT,
229                      C_LIMIT_BOT_MASK);
230         mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_top << C_LIMIT_TOP,
231                      C_LIMIT_TOP_MASK);
232 }
233
234 static void mtk_dpi_config_bit_num(struct mtk_dpi *dpi,
235                                    enum mtk_dpi_out_bit_num num)
236 {
237         u32 val;
238
239         switch (num) {
240         case MTK_DPI_OUT_BIT_NUM_8BITS:
241                 val = OUT_BIT_8;
242                 break;
243         case MTK_DPI_OUT_BIT_NUM_10BITS:
244                 val = OUT_BIT_10;
245                 break;
246         case MTK_DPI_OUT_BIT_NUM_12BITS:
247                 val = OUT_BIT_12;
248                 break;
249         case MTK_DPI_OUT_BIT_NUM_16BITS:
250                 val = OUT_BIT_16;
251                 break;
252         default:
253                 val = OUT_BIT_8;
254                 break;
255         }
256         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << OUT_BIT,
257                      OUT_BIT_MASK);
258 }
259
260 static void mtk_dpi_config_yc_map(struct mtk_dpi *dpi,
261                                   enum mtk_dpi_out_yc_map map)
262 {
263         u32 val;
264
265         switch (map) {
266         case MTK_DPI_OUT_YC_MAP_RGB:
267                 val = YC_MAP_RGB;
268                 break;
269         case MTK_DPI_OUT_YC_MAP_CYCY:
270                 val = YC_MAP_CYCY;
271                 break;
272         case MTK_DPI_OUT_YC_MAP_YCYC:
273                 val = YC_MAP_YCYC;
274                 break;
275         case MTK_DPI_OUT_YC_MAP_CY:
276                 val = YC_MAP_CY;
277                 break;
278         case MTK_DPI_OUT_YC_MAP_YC:
279                 val = YC_MAP_YC;
280                 break;
281         default:
282                 val = YC_MAP_RGB;
283                 break;
284         }
285
286         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << YC_MAP, YC_MAP_MASK);
287 }
288
289 static void mtk_dpi_config_channel_swap(struct mtk_dpi *dpi,
290                                         enum mtk_dpi_out_channel_swap swap)
291 {
292         u32 val;
293
294         switch (swap) {
295         case MTK_DPI_OUT_CHANNEL_SWAP_RGB:
296                 val = SWAP_RGB;
297                 break;
298         case MTK_DPI_OUT_CHANNEL_SWAP_GBR:
299                 val = SWAP_GBR;
300                 break;
301         case MTK_DPI_OUT_CHANNEL_SWAP_BRG:
302                 val = SWAP_BRG;
303                 break;
304         case MTK_DPI_OUT_CHANNEL_SWAP_RBG:
305                 val = SWAP_RBG;
306                 break;
307         case MTK_DPI_OUT_CHANNEL_SWAP_GRB:
308                 val = SWAP_GRB;
309                 break;
310         case MTK_DPI_OUT_CHANNEL_SWAP_BGR:
311                 val = SWAP_BGR;
312                 break;
313         default:
314                 val = SWAP_RGB;
315                 break;
316         }
317
318         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << CH_SWAP, CH_SWAP_MASK);
319 }
320
321 static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool enable)
322 {
323         mtk_dpi_mask(dpi, DPI_CON, enable ? YUV422_EN : 0, YUV422_EN);
324 }
325
326 static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool enable)
327 {
328         mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, CSC_ENABLE);
329 }
330
331 static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable)
332 {
333         mtk_dpi_mask(dpi, DPI_CON, enable ? IN_RB_SWAP : 0, IN_RB_SWAP);
334 }
335
336 static void mtk_dpi_config_2n_h_fre(struct mtk_dpi *dpi)
337 {
338         mtk_dpi_mask(dpi, DPI_H_FRE_CON, H_FRE_2N, H_FRE_2N);
339 }
340
341 static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
342                                         enum mtk_dpi_out_color_format format)
343 {
344         /* only support RGB888 */
345         mtk_dpi_config_yuv422_enable(dpi, false);
346         mtk_dpi_config_csc_enable(dpi, false);
347         mtk_dpi_config_swap_input(dpi, false);
348         mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_RGB);
349 }
350
351 static void mtk_dpi_power_off(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
352 {
353         dpi->power_ctl &= ~pctl;
354
355         if ((dpi->power_ctl & DPI_POWER_START) ||
356             (dpi->power_ctl & DPI_POWER_ENABLE))
357                 return;
358
359         if (!dpi->power_sta)
360                 return;
361
362         mtk_dpi_disable(dpi);
363         clk_disable_unprepare(dpi->pixel_clk);
364         clk_disable_unprepare(dpi->engine_clk);
365         dpi->power_sta = false;
366 }
367
368 static int mtk_dpi_power_on(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
369 {
370         int ret;
371
372         dpi->power_ctl |= pctl;
373
374         if (!(dpi->power_ctl & DPI_POWER_START) &&
375             !(dpi->power_ctl & DPI_POWER_ENABLE))
376                 return 0;
377
378         if (dpi->power_sta)
379                 return 0;
380
381         ret = clk_prepare_enable(dpi->engine_clk);
382         if (ret) {
383                 dev_err(dpi->dev, "Failed to enable engine clock: %d\n", ret);
384                 goto err_eng;
385         }
386
387         ret = clk_prepare_enable(dpi->pixel_clk);
388         if (ret) {
389                 dev_err(dpi->dev, "Failed to enable pixel clock: %d\n", ret);
390                 goto err_pixel;
391         }
392
393         mtk_dpi_enable(dpi);
394         dpi->power_sta = true;
395         return 0;
396
397 err_pixel:
398         clk_disable_unprepare(dpi->engine_clk);
399 err_eng:
400         dpi->power_ctl &= ~pctl;
401         return ret;
402 }
403
404 static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
405                                     struct drm_display_mode *mode)
406 {
407         struct mtk_dpi_yc_limit limit;
408         struct mtk_dpi_polarities dpi_pol;
409         struct mtk_dpi_sync_param hsync;
410         struct mtk_dpi_sync_param vsync_lodd = { 0 };
411         struct mtk_dpi_sync_param vsync_leven = { 0 };
412         struct mtk_dpi_sync_param vsync_rodd = { 0 };
413         struct mtk_dpi_sync_param vsync_reven = { 0 };
414         struct videomode vm = { 0 };
415         unsigned long pll_rate;
416         unsigned int factor;
417
418         /* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */
419
420         if (mode->clock <= 27000)
421                 factor = 3 << 4;
422         else if (mode->clock <= 84000)
423                 factor = 3 << 3;
424         else if (mode->clock <= 167000)
425                 factor = 3 << 2;
426         else
427                 factor = 3 << 1;
428         drm_display_mode_to_videomode(mode, &vm);
429         pll_rate = vm.pixelclock * factor;
430
431         dev_dbg(dpi->dev, "Want PLL %lu Hz, pixel clock %lu Hz\n",
432                 pll_rate, vm.pixelclock);
433
434         clk_set_rate(dpi->tvd_clk, pll_rate);
435         pll_rate = clk_get_rate(dpi->tvd_clk);
436
437         vm.pixelclock = pll_rate / factor;
438         clk_set_rate(dpi->pixel_clk, vm.pixelclock);
439         vm.pixelclock = clk_get_rate(dpi->pixel_clk);
440
441         dev_dbg(dpi->dev, "Got  PLL %lu Hz, pixel clock %lu Hz\n",
442                 pll_rate, vm.pixelclock);
443
444         limit.c_bottom = 0x0010;
445         limit.c_top = 0x0FE0;
446         limit.y_bottom = 0x0010;
447         limit.y_top = 0x0FE0;
448
449         dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING;
450         dpi_pol.de_pol = MTK_DPI_POLARITY_RISING;
451         dpi_pol.hsync_pol = vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ?
452                             MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
453         dpi_pol.vsync_pol = vm.flags & DISPLAY_FLAGS_VSYNC_HIGH ?
454                             MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
455         hsync.sync_width = vm.hsync_len;
456         hsync.back_porch = vm.hback_porch;
457         hsync.front_porch = vm.hfront_porch;
458         hsync.shift_half_line = false;
459         vsync_lodd.sync_width = vm.vsync_len;
460         vsync_lodd.back_porch = vm.vback_porch;
461         vsync_lodd.front_porch = vm.vfront_porch;
462         vsync_lodd.shift_half_line = false;
463
464         if (vm.flags & DISPLAY_FLAGS_INTERLACED &&
465             mode->flags & DRM_MODE_FLAG_3D_MASK) {
466                 vsync_leven = vsync_lodd;
467                 vsync_rodd = vsync_lodd;
468                 vsync_reven = vsync_lodd;
469                 vsync_leven.shift_half_line = true;
470                 vsync_reven.shift_half_line = true;
471         } else if (vm.flags & DISPLAY_FLAGS_INTERLACED &&
472                    !(mode->flags & DRM_MODE_FLAG_3D_MASK)) {
473                 vsync_leven = vsync_lodd;
474                 vsync_leven.shift_half_line = true;
475         } else if (!(vm.flags & DISPLAY_FLAGS_INTERLACED) &&
476                    mode->flags & DRM_MODE_FLAG_3D_MASK) {
477                 vsync_rodd = vsync_lodd;
478         }
479         mtk_dpi_sw_reset(dpi, true);
480         mtk_dpi_config_pol(dpi, &dpi_pol);
481
482         mtk_dpi_config_hsync(dpi, &hsync);
483         mtk_dpi_config_vsync_lodd(dpi, &vsync_lodd);
484         mtk_dpi_config_vsync_rodd(dpi, &vsync_rodd);
485         mtk_dpi_config_vsync_leven(dpi, &vsync_leven);
486         mtk_dpi_config_vsync_reven(dpi, &vsync_reven);
487
488         mtk_dpi_config_3d(dpi, !!(mode->flags & DRM_MODE_FLAG_3D_MASK));
489         mtk_dpi_config_interface(dpi, !!(vm.flags &
490                                          DISPLAY_FLAGS_INTERLACED));
491         if (vm.flags & DISPLAY_FLAGS_INTERLACED)
492                 mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive >> 1);
493         else
494                 mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive);
495
496         mtk_dpi_config_channel_limit(dpi, &limit);
497         mtk_dpi_config_bit_num(dpi, dpi->bit_num);
498         mtk_dpi_config_channel_swap(dpi, dpi->channel_swap);
499         mtk_dpi_config_yc_map(dpi, dpi->yc_map);
500         mtk_dpi_config_color_format(dpi, dpi->color_format);
501         mtk_dpi_config_2n_h_fre(dpi);
502         mtk_dpi_sw_reset(dpi, false);
503
504         return 0;
505 }
506
507 static void mtk_dpi_encoder_destroy(struct drm_encoder *encoder)
508 {
509         drm_encoder_cleanup(encoder);
510 }
511
512 static const struct drm_encoder_funcs mtk_dpi_encoder_funcs = {
513         .destroy = mtk_dpi_encoder_destroy,
514 };
515
516 static bool mtk_dpi_encoder_mode_fixup(struct drm_encoder *encoder,
517                                        const struct drm_display_mode *mode,
518                                        struct drm_display_mode *adjusted_mode)
519 {
520         return true;
521 }
522
523 static void mtk_dpi_encoder_mode_set(struct drm_encoder *encoder,
524                                      struct drm_display_mode *mode,
525                                      struct drm_display_mode *adjusted_mode)
526 {
527         struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
528
529         drm_mode_copy(&dpi->mode, adjusted_mode);
530 }
531
532 static void mtk_dpi_encoder_disable(struct drm_encoder *encoder)
533 {
534         struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
535
536         mtk_dpi_power_off(dpi, DPI_POWER_ENABLE);
537 }
538
539 static void mtk_dpi_encoder_enable(struct drm_encoder *encoder)
540 {
541         struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
542
543         mtk_dpi_power_on(dpi, DPI_POWER_ENABLE);
544         mtk_dpi_set_display_mode(dpi, &dpi->mode);
545 }
546
547 static int mtk_dpi_atomic_check(struct drm_encoder *encoder,
548                                 struct drm_crtc_state *crtc_state,
549                                 struct drm_connector_state *conn_state)
550 {
551         return 0;
552 }
553
554 static const struct drm_encoder_helper_funcs mtk_dpi_encoder_helper_funcs = {
555         .mode_fixup = mtk_dpi_encoder_mode_fixup,
556         .mode_set = mtk_dpi_encoder_mode_set,
557         .disable = mtk_dpi_encoder_disable,
558         .enable = mtk_dpi_encoder_enable,
559         .atomic_check = mtk_dpi_atomic_check,
560 };
561
562 static void mtk_dpi_start(struct mtk_ddp_comp *comp)
563 {
564         struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
565
566         mtk_dpi_power_on(dpi, DPI_POWER_START);
567 }
568
569 static void mtk_dpi_stop(struct mtk_ddp_comp *comp)
570 {
571         struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
572
573         mtk_dpi_power_off(dpi, DPI_POWER_START);
574 }
575
576 static const struct mtk_ddp_comp_funcs mtk_dpi_funcs = {
577         .start = mtk_dpi_start,
578         .stop = mtk_dpi_stop,
579 };
580
581 static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
582 {
583         struct mtk_dpi *dpi = dev_get_drvdata(dev);
584         struct drm_device *drm_dev = data;
585         int ret;
586
587         ret = mtk_ddp_comp_register(drm_dev, &dpi->ddp_comp);
588         if (ret < 0) {
589                 dev_err(dev, "Failed to register component %pOF: %d\n",
590                         dev->of_node, ret);
591                 return ret;
592         }
593
594         ret = drm_encoder_init(drm_dev, &dpi->encoder, &mtk_dpi_encoder_funcs,
595                                DRM_MODE_ENCODER_TMDS, NULL);
596         if (ret) {
597                 dev_err(dev, "Failed to initialize decoder: %d\n", ret);
598                 goto err_unregister;
599         }
600         drm_encoder_helper_add(&dpi->encoder, &mtk_dpi_encoder_helper_funcs);
601
602         /* Currently DPI0 is fixed to be driven by OVL1 */
603         dpi->encoder.possible_crtcs = BIT(1);
604
605         ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL);
606         if (ret) {
607                 dev_err(dev, "Failed to attach bridge: %d\n", ret);
608                 goto err_cleanup;
609         }
610
611         dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
612         dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
613         dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
614         dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
615
616         return 0;
617
618 err_cleanup:
619         drm_encoder_cleanup(&dpi->encoder);
620 err_unregister:
621         mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
622         return ret;
623 }
624
625 static void mtk_dpi_unbind(struct device *dev, struct device *master,
626                            void *data)
627 {
628         struct mtk_dpi *dpi = dev_get_drvdata(dev);
629         struct drm_device *drm_dev = data;
630
631         drm_encoder_cleanup(&dpi->encoder);
632         mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
633 }
634
635 static const struct component_ops mtk_dpi_component_ops = {
636         .bind = mtk_dpi_bind,
637         .unbind = mtk_dpi_unbind,
638 };
639
640 static int mtk_dpi_probe(struct platform_device *pdev)
641 {
642         struct device *dev = &pdev->dev;
643         struct mtk_dpi *dpi;
644         struct resource *mem;
645         struct device_node *bridge_node;
646         int comp_id;
647         int ret;
648
649         dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
650         if (!dpi)
651                 return -ENOMEM;
652
653         dpi->dev = dev;
654
655         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
656         dpi->regs = devm_ioremap_resource(dev, mem);
657         if (IS_ERR(dpi->regs)) {
658                 ret = PTR_ERR(dpi->regs);
659                 dev_err(dev, "Failed to ioremap mem resource: %d\n", ret);
660                 return ret;
661         }
662
663         dpi->engine_clk = devm_clk_get(dev, "engine");
664         if (IS_ERR(dpi->engine_clk)) {
665                 ret = PTR_ERR(dpi->engine_clk);
666                 dev_err(dev, "Failed to get engine clock: %d\n", ret);
667                 return ret;
668         }
669
670         dpi->pixel_clk = devm_clk_get(dev, "pixel");
671         if (IS_ERR(dpi->pixel_clk)) {
672                 ret = PTR_ERR(dpi->pixel_clk);
673                 dev_err(dev, "Failed to get pixel clock: %d\n", ret);
674                 return ret;
675         }
676
677         dpi->tvd_clk = devm_clk_get(dev, "pll");
678         if (IS_ERR(dpi->tvd_clk)) {
679                 ret = PTR_ERR(dpi->tvd_clk);
680                 dev_err(dev, "Failed to get tvdpll clock: %d\n", ret);
681                 return ret;
682         }
683
684         dpi->irq = platform_get_irq(pdev, 0);
685         if (dpi->irq <= 0) {
686                 dev_err(dev, "Failed to get irq: %d\n", dpi->irq);
687                 return -EINVAL;
688         }
689
690         bridge_node = of_graph_get_remote_node(dev->of_node, 0, 0);
691         if (!bridge_node)
692                 return -ENODEV;
693
694         dev_info(dev, "Found bridge node: %pOF\n", bridge_node);
695
696         dpi->bridge = of_drm_find_bridge(bridge_node);
697         of_node_put(bridge_node);
698         if (!dpi->bridge)
699                 return -EPROBE_DEFER;
700
701         comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DPI);
702         if (comp_id < 0) {
703                 dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
704                 return comp_id;
705         }
706
707         ret = mtk_ddp_comp_init(dev, dev->of_node, &dpi->ddp_comp, comp_id,
708                                 &mtk_dpi_funcs);
709         if (ret) {
710                 dev_err(dev, "Failed to initialize component: %d\n", ret);
711                 return ret;
712         }
713
714         platform_set_drvdata(pdev, dpi);
715
716         ret = component_add(dev, &mtk_dpi_component_ops);
717         if (ret) {
718                 dev_err(dev, "Failed to add component: %d\n", ret);
719                 return ret;
720         }
721
722         return 0;
723 }
724
725 static int mtk_dpi_remove(struct platform_device *pdev)
726 {
727         component_del(&pdev->dev, &mtk_dpi_component_ops);
728
729         return 0;
730 }
731
732 static const struct of_device_id mtk_dpi_of_ids[] = {
733         { .compatible = "mediatek,mt8173-dpi", },
734         {}
735 };
736
737 struct platform_driver mtk_dpi_driver = {
738         .probe = mtk_dpi_probe,
739         .remove = mtk_dpi_remove,
740         .driver = {
741                 .name = "mediatek-dpi",
742                 .of_match_table = mtk_dpi_of_ids,
743         },
744 };