drivers/gpu/drm/msm/msm_atomic.c

   1 /*
   2  * Copyright (C) 2014 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include "msm_drv.h"
  19 #include "msm_kms.h"
  20 #include "msm_gem.h"
  21
  22 struct msm_commit {
  23         struct drm_device *dev;
  24         struct drm_atomic_state *state;
  25         uint32_t fence;
  26         struct msm_fence_cb fence_cb;
  27         uint32_t crtc_mask;
  28 };
  29
  30 static void fence_cb(struct msm_fence_cb *cb);
  31
  32 /* block until specified crtcs are no longer pending update, and
  33  * atomically mark them as pending update
  34  */
  35 static int start_atomic(struct msm_drm_private *priv, uint32_t crtc_mask)
  36 {
  37         int ret;
  38
  39         spin_lock(&priv->pending_crtcs_event.lock);
  40         ret = wait_event_interruptible_locked(priv->pending_crtcs_event,
  41                         !(priv->pending_crtcs & crtc_mask));
  42         if (ret == 0) {
  43                 DBG("start: %08x", crtc_mask);
  44                 priv->pending_crtcs |= crtc_mask;
  45         }
  46         spin_unlock(&priv->pending_crtcs_event.lock);
  47
  48         return ret;
  49 }
  50
  51 /* clear specified crtcs (no longer pending update)
  52  */
  53 static void end_atomic(struct msm_drm_private *priv, uint32_t crtc_mask)
  54 {
  55         spin_lock(&priv->pending_crtcs_event.lock);
  56         DBG("end: %08x", crtc_mask);
  57         priv->pending_crtcs &= ~crtc_mask;
  58         wake_up_all_locked(&priv->pending_crtcs_event);
  59         spin_unlock(&priv->pending_crtcs_event.lock);
  60 }
  61
  62 static struct msm_commit *commit_init(struct drm_atomic_state *state)
  63 {
  64         struct msm_commit *c = kzalloc(sizeof(*c), GFP_KERNEL);
  65
  66         if (!c)
  67                 return NULL;
  68
  69         c->dev = state->dev;
  70         c->state = state;
  71
  72         /* TODO we might need a way to indicate to run the cb on a
  73          * different wq so wait_for_vblanks() doesn't block retiring
  74          * bo's..
  75          */
  76         INIT_FENCE_CB(&c->fence_cb, fence_cb);
  77
  78         return c;
  79 }
  80
  81 static void commit_destroy(struct msm_commit *c)
  82 {
  83         end_atomic(c->dev->dev_private, c->crtc_mask);
  84         kfree(c);
  85 }
  86
  87 static void msm_atomic_wait_for_commit_done(struct drm_device *dev,
  88                 struct drm_atomic_state *old_state)
  89 {
  90         struct drm_crtc *crtc;
  91         struct msm_drm_private *priv = old_state->dev->dev_private;
  92         struct msm_kms *kms = priv->kms;
  93         int ncrtcs = old_state->dev->mode_config.num_crtc;
  94         int i;
  95
  96         for (i = 0; i < ncrtcs; i++) {
  97                 crtc = old_state->crtcs[i];
  98
  99                 if (!crtc)
 100                         continue;
 101
 102                 if (!crtc->state->enable)
 103                         continue;
 104
 105                 /* Legacy cursor ioctls are completely unsynced, and userspace
 106                  * relies on that (by doing tons of cursor updates). */
 107                 if (old_state->legacy_cursor_update)
 108                         continue;
 109
 110                 if (drm_crtc_vblank_get(crtc))
 111                         continue;
 112
 113                 kms->funcs->wait_for_crtc_commit_done(kms, crtc);
 114
 115                 drm_crtc_vblank_put(crtc);
 116         }
 117 }
 118
 119 /* The (potentially) asynchronous part of the commit.  At this point
 120  * nothing can fail short of armageddon.
 121  */
 122 static void complete_commit(struct msm_commit *c)
 123 {
 124         struct drm_atomic_state *state = c->state;
 125         struct drm_device *dev = state->dev;
 126         struct msm_drm_private *priv = dev->dev_private;
 127         struct msm_kms *kms = priv->kms;
 128
 129         kms->funcs->prepare_commit(kms, state);
 130
 131         drm_atomic_helper_commit_modeset_disables(dev, state);
 132
 133         drm_atomic_helper_commit_planes(dev, state, false);
 134
 135         drm_atomic_helper_commit_modeset_enables(dev, state);
 136
 137         /* NOTE: _wait_for_vblanks() only waits for vblank on
 138          * enabled CRTCs.  So we end up faulting when disabling
 139          * due to (potentially) unref'ing the outgoing fb's
 140          * before the vblank when the disable has latched.
 141          *
 142          * But if it did wait on disabled (or newly disabled)
 143          * CRTCs, that would be racy (ie. we could have missed
 144          * the irq.  We need some way to poll for pipe shut
 145          * down.  Or just live with occasionally hitting the
 146          * timeout in the CRTC disable path (which really should
 147          * not be critical path)
 148          */
 149
 150         msm_atomic_wait_for_commit_done(dev, state);
 151
 152         drm_atomic_helper_cleanup_planes(dev, state);
 153
 154         kms->funcs->complete_commit(kms, state);
 155
 156         drm_atomic_state_free(state);
 157
 158         commit_destroy(c);
 159 }
 160
 161 static void fence_cb(struct msm_fence_cb *cb)
 162 {
 163         struct msm_commit *c =
 164                         container_of(cb, struct msm_commit, fence_cb);
 165         complete_commit(c);
 166 }
 167
 168 static void add_fb(struct msm_commit *c, struct drm_framebuffer *fb)
 169 {
 170         struct drm_gem_object *obj = msm_framebuffer_bo(fb, 0);
 171         c->fence = max(c->fence, msm_gem_fence(to_msm_bo(obj), MSM_PREP_READ));
 172 }
 173
 174 int msm_atomic_check(struct drm_device *dev,
 175                      struct drm_atomic_state *state)
 176 {
 177         int ret;
 178
 179         /*
 180          * msm ->atomic_check can update ->mode_changed for pixel format
 181          * changes, hence must be run before we check the modeset changes.
 182          */
 183         ret = drm_atomic_helper_check_planes(dev, state);
 184         if (ret)
 185                 return ret;
 186
 187         ret = drm_atomic_helper_check_modeset(dev, state);
 188         if (ret)
 189                 return ret;
 190
 191         return ret;
 192 }
 193
 194 /**
 195  * drm_atomic_helper_commit - commit validated state object
 196  * @dev: DRM device
 197  * @state: the driver state object
 198  * @async: asynchronous commit
 199  *
 200  * This function commits a with drm_atomic_helper_check() pre-validated state
 201  * object. This can still fail when e.g. the framebuffer reservation fails. For
 202  * now this doesn't implement asynchronous commits.
 203  *
 204  * RETURNS
 205  * Zero for success or -errno.
 206  */
 207 int msm_atomic_commit(struct drm_device *dev,
 208                 struct drm_atomic_state *state, bool async)
 209 {
 210         int nplanes = dev->mode_config.num_total_plane;
 211         int ncrtcs = dev->mode_config.num_crtc;
 212         ktime_t timeout;
 213         struct msm_commit *c;
 214         int i, ret;
 215
 216         ret = drm_atomic_helper_prepare_planes(dev, state);
 217         if (ret)
 218                 return ret;
 219
 220         c = commit_init(state);
 221         if (!c) {
 222                 ret = -ENOMEM;
 223                 goto error;
 224         }
 225
 226         /*
 227          * Figure out what crtcs we have:
 228          */
 229         for (i = 0; i < ncrtcs; i++) {
 230                 struct drm_crtc *crtc = state->crtcs[i];
 231                 if (!crtc)
 232                         continue;
 233                 c->crtc_mask |= (1 << drm_crtc_index(crtc));
 234         }
 235
 236         /*
 237          * Figure out what fence to wait for:
 238          */
 239         for (i = 0; i < nplanes; i++) {
 240                 struct drm_plane *plane = state->planes[i];
 241                 struct drm_plane_state *new_state = state->plane_states[i];
 242
 243                 if (!plane)
 244                         continue;
 245
 246                 if ((plane->state->fb != new_state->fb) && new_state->fb)
 247                         add_fb(c, new_state->fb);
 248         }
 249
 250         /*
 251          * Wait for pending updates on any of the same crtc's and then
 252          * mark our set of crtc's as busy:
 253          */
 254         ret = start_atomic(dev->dev_private, c->crtc_mask);
 255         if (ret) {
 256                 kfree(c);
 257                 goto error;
 258         }
 259
 260         /*
 261          * This is the point of no return - everything below never fails except
 262          * when the hw goes bonghits. Which means we can commit the new state on
 263          * the software side now.
 264          */
 265
 266         drm_atomic_helper_swap_state(dev, state);
 267
 268         /*
 269          * Everything below can be run asynchronously without the need to grab
 270          * any modeset locks at all under one conditions: It must be guaranteed
 271          * that the asynchronous work has either been cancelled (if the driver
 272          * supports it, which at least requires that the framebuffers get
 273          * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
 274          * before the new state gets committed on the software side with
 275          * drm_atomic_helper_swap_state().
 276          *
 277          * This scheme allows new atomic state updates to be prepared and
 278          * checked in parallel to the asynchronous completion of the previous
 279          * update. Which is important since compositors need to figure out the
 280          * composition of the next frame right after having submitted the
 281          * current layout.
 282          */
 283
 284         if (async) {
 285                 msm_queue_fence_cb(dev, &c->fence_cb, c->fence);
 286                 return 0;
 287         }
 288
 289         timeout = ktime_add_ms(ktime_get(), 1000);
 290
 291         /* uninterruptible wait */
 292         msm_wait_fence(dev, c->fence, &timeout, false);
 293
 294         complete_commit(c);
 295
 296         return 0;
 297
 298 error:
 299         drm_atomic_helper_cleanup_planes(dev, state);
 300         return ret;
 301 }