drivers/gpu/drm/nouveau/dispnv50/disp.h

   1 #ifndef __NV50_KMS_H__
   2 #define __NV50_KMS_H__
   3 #include <nvif/mem.h>
   4
   5 #include "nouveau_display.h"
   6
   7 struct nv50_disp {
   8         struct nvif_disp *disp;
   9         struct nv50_core *core;
  10
  11 #define NV50_DISP_SYNC(c, o)                                ((c) * 0x040 + (o))
  12 #define NV50_DISP_CORE_NTFY                       NV50_DISP_SYNC(0      , 0x00)
  13 #define NV50_DISP_WNDW_SEM0(c)                    NV50_DISP_SYNC(1 + (c), 0x00)
  14 #define NV50_DISP_WNDW_SEM1(c)                    NV50_DISP_SYNC(1 + (c), 0x10)
  15 #define NV50_DISP_WNDW_NTFY(c)                    NV50_DISP_SYNC(1 + (c), 0x20)
  16 #define NV50_DISP_BASE_SEM0(c)                    NV50_DISP_WNDW_SEM0(0 + (c))
  17 #define NV50_DISP_BASE_SEM1(c)                    NV50_DISP_WNDW_SEM1(0 + (c))
  18 #define NV50_DISP_BASE_NTFY(c)                    NV50_DISP_WNDW_NTFY(0 + (c))
  19 #define NV50_DISP_OVLY_SEM0(c)                    NV50_DISP_WNDW_SEM0(4 + (c))
  20 #define NV50_DISP_OVLY_SEM1(c)                    NV50_DISP_WNDW_SEM1(4 + (c))
  21 #define NV50_DISP_OVLY_NTFY(c)                    NV50_DISP_WNDW_NTFY(4 + (c))
  22         struct nouveau_bo *sync;
  23
  24         struct mutex mutex;
  25 };
  26
  27 static inline struct nv50_disp *
  28 nv50_disp(struct drm_device *dev)
  29 {
  30         return nouveau_display(dev)->priv;
  31 }
  32
  33 struct nv50_disp_interlock {
  34         enum nv50_disp_interlock_type {
  35                 NV50_DISP_INTERLOCK_CORE = 0,
  36                 NV50_DISP_INTERLOCK_CURS,
  37                 NV50_DISP_INTERLOCK_BASE,
  38                 NV50_DISP_INTERLOCK_OVLY,
  39                 NV50_DISP_INTERLOCK_WNDW,
  40                 NV50_DISP_INTERLOCK_WIMM,
  41                 NV50_DISP_INTERLOCK__SIZE
  42         } type;
  43         u32 data;
  44         u32 wimm;
  45 };
  46
  47 void corec37d_ntfy_init(struct nouveau_bo *, u32);
  48
  49 struct nv50_chan {
  50         struct nvif_object user;
  51         struct nvif_device *device;
  52 };
  53
  54 struct nv50_dmac {
  55         struct nv50_chan base;
  56
  57         struct nvif_mem push;
  58         u32 *ptr;
  59
  60         struct nvif_object sync;
  61         struct nvif_object vram;
  62
  63         /* Protects against concurrent pushbuf access to this channel, lock is
  64          * grabbed by evo_wait (if the pushbuf reservation is successful) and
  65          * dropped again by evo_kick. */
  66         struct mutex lock;
  67 };
  68
  69 int nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
  70                      const s32 *oclass, u8 head, void *data, u32 size,
  71                      s64 syncbuf, struct nv50_dmac *dmac);
  72 void nv50_dmac_destroy(struct nv50_dmac *);
  73
  74 u32 *evo_wait(struct nv50_dmac *, int nr);
  75 void evo_kick(u32 *, struct nv50_dmac *);
  76
  77 #define evo_mthd(p, m, s) do {                                          \
  78         const u32 _m = (m), _s = (s);                                   \
  79         if (drm_debug & DRM_UT_KMS)                                     \
  80                 pr_err("%04x %d %s\n", _m, _s, __func__);               \
  81         *((p)++) = ((_s << 18) | _m);                                   \
  82 } while(0)
  83
  84 #define evo_data(p, d) do {                                             \
  85         const u32 _d = (d);                                             \
  86         if (drm_debug & DRM_UT_KMS)                                     \
  87                 pr_err("\t%08x\n", _d);                                 \
  88         *((p)++) = _d;                                                  \
  89 } while(0)
  90 #endif