drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c

   1 /*
   2  * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  20  * DEALINGS IN THE SOFTWARE.
  21  */
  22 #include <core/tegra.h>
  23 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
  24 #include "priv.h"
  25
  26 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
  27 #include <asm/dma-iommu.h>
  28 #endif
  29
  30 static int
  31 nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev)
  32 {
  33         int ret;
  34
  35         ret = regulator_enable(tdev->vdd);
  36         if (ret)
  37                 goto err_power;
  38
  39         ret = clk_prepare_enable(tdev->clk);
  40         if (ret)
  41                 goto err_clk;
  42         ret = clk_prepare_enable(tdev->clk_pwr);
  43         if (ret)
  44                 goto err_clk_pwr;
  45         clk_set_rate(tdev->clk_pwr, 204000000);
  46         udelay(10);
  47
  48         reset_control_assert(tdev->rst);
  49         udelay(10);
  50
  51         ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D);
  52         if (ret)
  53                 goto err_clamp;
  54         udelay(10);
  55
  56         reset_control_deassert(tdev->rst);
  57         udelay(10);
  58
  59         return 0;
  60
  61 err_clamp:
  62         clk_disable_unprepare(tdev->clk_pwr);
  63 err_clk_pwr:
  64         clk_disable_unprepare(tdev->clk);
  65 err_clk:
  66         regulator_disable(tdev->vdd);
  67 err_power:
  68         return ret;
  69 }
  70
  71 static int
  72 nvkm_device_tegra_power_down(struct nvkm_device_tegra *tdev)
  73 {
  74         reset_control_assert(tdev->rst);
  75         udelay(10);
  76
  77         clk_disable_unprepare(tdev->clk_pwr);
  78         clk_disable_unprepare(tdev->clk);
  79         udelay(10);
  80
  81         return regulator_disable(tdev->vdd);
  82 }
  83
  84 static void
  85 nvkm_device_tegra_probe_iommu(struct nvkm_device_tegra *tdev)
  86 {
  87 #if IS_ENABLED(CONFIG_IOMMU_API)
  88         struct device *dev = &tdev->pdev->dev;
  89         unsigned long pgsize_bitmap;
  90         int ret;
  91
  92 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
  93         if (dev->archdata.mapping) {
  94                 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
  95
  96                 arm_iommu_detach_device(dev);
  97                 arm_iommu_release_mapping(mapping);
  98         }
  99 #endif
 100
 101         if (!tdev->func->iommu_bit)
 102                 return;
 103
 104         mutex_init(&tdev->iommu.mutex);
 105
 106         if (iommu_present(&platform_bus_type)) {
 107                 tdev->iommu.domain = iommu_domain_alloc(&platform_bus_type);
 108                 if (IS_ERR(tdev->iommu.domain))
 109                         goto error;
 110
 111                 /*
 112                  * A IOMMU is only usable if it supports page sizes smaller
 113                  * or equal to the system's PAGE_SIZE, with a preference if
 114                  * both are equal.
 115                  */
 116                 pgsize_bitmap = tdev->iommu.domain->ops->pgsize_bitmap;
 117                 if (pgsize_bitmap & PAGE_SIZE) {
 118                         tdev->iommu.pgshift = PAGE_SHIFT;
 119                 } else {
 120                         tdev->iommu.pgshift = fls(pgsize_bitmap & ~PAGE_MASK);
 121                         if (tdev->iommu.pgshift == 0) {
 122                                 dev_warn(dev, "unsupported IOMMU page size\n");
 123                                 goto free_domain;
 124                         }
 125                         tdev->iommu.pgshift -= 1;
 126                 }
 127
 128                 ret = iommu_attach_device(tdev->iommu.domain, dev);
 129                 if (ret)
 130                         goto free_domain;
 131
 132                 ret = nvkm_mm_init(&tdev->iommu.mm, 0,
 133                                    (1ULL << tdev->func->iommu_bit) >>
 134                                    tdev->iommu.pgshift, 1);
 135                 if (ret)
 136                         goto detach_device;
 137         }
 138
 139         return;
 140
 141 detach_device:
 142         iommu_detach_device(tdev->iommu.domain, dev);
 143
 144 free_domain:
 145         iommu_domain_free(tdev->iommu.domain);
 146
 147 error:
 148         tdev->iommu.domain = NULL;
 149         tdev->iommu.pgshift = 0;
 150         dev_err(dev, "cannot initialize IOMMU MM\n");
 151 #endif
 152 }
 153
 154 static void
 155 nvkm_device_tegra_remove_iommu(struct nvkm_device_tegra *tdev)
 156 {
 157 #if IS_ENABLED(CONFIG_IOMMU_API)
 158         if (tdev->iommu.domain) {
 159                 nvkm_mm_fini(&tdev->iommu.mm);
 160                 iommu_detach_device(tdev->iommu.domain, tdev->device.dev);
 161                 iommu_domain_free(tdev->iommu.domain);
 162         }
 163 #endif
 164 }
 165
 166 static struct nvkm_device_tegra *
 167 nvkm_device_tegra(struct nvkm_device *device)
 168 {
 169         return container_of(device, struct nvkm_device_tegra, device);
 170 }
 171
 172 static struct resource *
 173 nvkm_device_tegra_resource(struct nvkm_device *device, unsigned bar)
 174 {
 175         struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
 176         return platform_get_resource(tdev->pdev, IORESOURCE_MEM, bar);
 177 }
 178
 179 static resource_size_t
 180 nvkm_device_tegra_resource_addr(struct nvkm_device *device, unsigned bar)
 181 {
 182         struct resource *res = nvkm_device_tegra_resource(device, bar);
 183         return res ? res->start : 0;
 184 }
 185
 186 static resource_size_t
 187 nvkm_device_tegra_resource_size(struct nvkm_device *device, unsigned bar)
 188 {
 189         struct resource *res = nvkm_device_tegra_resource(device, bar);
 190         return res ? resource_size(res) : 0;
 191 }
 192
 193 static irqreturn_t
 194 nvkm_device_tegra_intr(int irq, void *arg)
 195 {
 196         struct nvkm_device_tegra *tdev = arg;
 197         struct nvkm_mc *mc = tdev->device.mc;
 198         bool handled = false;
 199         if (likely(mc)) {
 200                 nvkm_mc_intr_unarm(mc);
 201                 nvkm_mc_intr(mc, &handled);
 202                 nvkm_mc_intr_rearm(mc);
 203         }
 204         return handled ? IRQ_HANDLED : IRQ_NONE;
 205 }
 206
 207 static void
 208 nvkm_device_tegra_fini(struct nvkm_device *device, bool suspend)
 209 {
 210         struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
 211         if (tdev->irq) {
 212                 free_irq(tdev->irq, tdev);
 213                 tdev->irq = 0;
 214         };
 215 }
 216
 217 static int
 218 nvkm_device_tegra_init(struct nvkm_device *device)
 219 {
 220         struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
 221         int irq, ret;
 222
 223         irq = platform_get_irq_byname(tdev->pdev, "stall");
 224         if (irq < 0)
 225                 return irq;
 226
 227         ret = request_irq(irq, nvkm_device_tegra_intr,
 228                           IRQF_SHARED, "nvkm", tdev);
 229         if (ret)
 230                 return ret;
 231
 232         tdev->irq = irq;
 233         return 0;
 234 }
 235
 236 static void *
 237 nvkm_device_tegra_dtor(struct nvkm_device *device)
 238 {
 239         struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
 240         nvkm_device_tegra_power_down(tdev);
 241         nvkm_device_tegra_remove_iommu(tdev);
 242         return tdev;
 243 }
 244
 245 static const struct nvkm_device_func
 246 nvkm_device_tegra_func = {
 247         .tegra = nvkm_device_tegra,
 248         .dtor = nvkm_device_tegra_dtor,
 249         .init = nvkm_device_tegra_init,
 250         .fini = nvkm_device_tegra_fini,
 251         .resource_addr = nvkm_device_tegra_resource_addr,
 252         .resource_size = nvkm_device_tegra_resource_size,
 253         .cpu_coherent = false,
 254 };
 255
 256 int
 257 nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func,
 258                       struct platform_device *pdev,
 259                       const char *cfg, const char *dbg,
 260                       bool detect, bool mmio, u64 subdev_mask,
 261                       struct nvkm_device **pdevice)
 262 {
 263         struct nvkm_device_tegra *tdev;
 264         int ret;
 265
 266         if (!(tdev = kzalloc(sizeof(*tdev), GFP_KERNEL)))
 267                 return -ENOMEM;
 268
 269         tdev->func = func;
 270         tdev->pdev = pdev;
 271         tdev->irq = -1;
 272
 273         tdev->vdd = devm_regulator_get(&pdev->dev, "vdd");
 274         if (IS_ERR(tdev->vdd)) {
 275                 ret = PTR_ERR(tdev->vdd);
 276                 goto free;
 277         }
 278
 279         tdev->rst = devm_reset_control_get(&pdev->dev, "gpu");
 280         if (IS_ERR(tdev->rst)) {
 281                 ret = PTR_ERR(tdev->rst);
 282                 goto free;
 283         }
 284
 285         tdev->clk = devm_clk_get(&pdev->dev, "gpu");
 286         if (IS_ERR(tdev->clk)) {
 287                 ret = PTR_ERR(tdev->clk);
 288                 goto free;
 289         }
 290
 291         tdev->clk_pwr = devm_clk_get(&pdev->dev, "pwr");
 292         if (IS_ERR(tdev->clk_pwr)) {
 293                 ret = PTR_ERR(tdev->clk_pwr);
 294                 goto free;
 295         }
 296
 297         nvkm_device_tegra_probe_iommu(tdev);
 298
 299         ret = nvkm_device_tegra_power_up(tdev);
 300         if (ret)
 301                 goto remove;
 302
 303         tdev->gpu_speedo = tegra_sku_info.gpu_speedo_value;
 304         ret = nvkm_device_ctor(&nvkm_device_tegra_func, NULL, &pdev->dev,
 305                                NVKM_DEVICE_TEGRA, pdev->id, NULL,
 306                                cfg, dbg, detect, mmio, subdev_mask,
 307                                &tdev->device);
 308         if (ret)
 309                 goto powerdown;
 310
 311         *pdevice = &tdev->device;
 312
 313         return 0;
 314
 315 powerdown:
 316         nvkm_device_tegra_power_down(tdev);
 317 remove:
 318         nvkm_device_tegra_remove_iommu(tdev);
 319 free:
 320         kfree(tdev);
 321         return ret;
 322 }
 323 #else
 324 int
 325 nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func,
 326                       struct platform_device *pdev,
 327                       const char *cfg, const char *dbg,
 328                       bool detect, bool mmio, u64 subdev_mask,
 329                       struct nvkm_device **pdevice)
 330 {
 331         return -ENOSYS;
 332 }
 333 #endif