1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __NVKM_BUS_HWSQ_H__
3 #define __NVKM_BUS_HWSQ_H__
4 #include <subdev/bus.h>
7 struct nvkm_subdev *subdev;
8 struct nvkm_hwsq *hwsq;
16 u32 stride; /* in bytes */
21 static inline struct hwsq_reg
22 hwsq_stride(u32 addr, u32 stride, u32 mask)
24 return (struct hwsq_reg) {
34 static inline struct hwsq_reg
35 hwsq_reg2(u32 addr1, u32 addr2)
37 return (struct hwsq_reg) {
41 .stride = addr2 - addr1,
47 static inline struct hwsq_reg
50 return (struct hwsq_reg) {
61 hwsq_init(struct hwsq *ram, struct nvkm_subdev *subdev)
65 ret = nvkm_hwsq_init(subdev, &ram->hwsq);
75 hwsq_exec(struct hwsq *ram, bool exec)
79 ret = nvkm_hwsq_fini(&ram->hwsq, exec);
86 hwsq_rd32(struct hwsq *ram, struct hwsq_reg *reg)
88 struct nvkm_device *device = ram->subdev->device;
89 if (reg->sequence != ram->sequence)
90 reg->data = nvkm_rd32(device, reg->addr);
95 hwsq_wr32(struct hwsq *ram, struct hwsq_reg *reg, u32 data)
99 reg->sequence = ram->sequence;
102 for (mask = reg->mask; mask > 0; mask = (mask & ~1) >> 1) {
104 nvkm_hwsq_wr32(ram->hwsq, reg->addr+off, reg->data);
111 hwsq_nuke(struct hwsq *ram, struct hwsq_reg *reg)
117 hwsq_mask(struct hwsq *ram, struct hwsq_reg *reg, u32 mask, u32 data)
119 u32 temp = hwsq_rd32(ram, reg);
120 if (temp != ((temp & ~mask) | data) || reg->force)
121 hwsq_wr32(ram, reg, (temp & ~mask) | data);
126 hwsq_setf(struct hwsq *ram, u8 flag, int data)
128 nvkm_hwsq_setf(ram->hwsq, flag, data);
132 hwsq_wait(struct hwsq *ram, u8 flag, u8 data)
134 nvkm_hwsq_wait(ram->hwsq, flag, data);
138 hwsq_wait_vblank(struct hwsq *ram)
140 nvkm_hwsq_wait_vblank(ram->hwsq);
144 hwsq_nsec(struct hwsq *ram, u32 nsec)
146 nvkm_hwsq_nsec(ram->hwsq, nsec);