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24 * GK20A does not have dedicated video memory, and to accurately represent this
25 * fact Nouveau will not create a RAM device for it. Therefore its instmem
26 * implementation must be done directly on top of system memory, while
27 * preserving coherency for read and write operations.
29 * Instmem can be allocated through two means:
30 * 1) If an IOMMU unit has been probed, the IOMMU API is used to make memory
31 * pages contiguous to the GPU. This is the preferred way.
32 * 2) If no IOMMU unit is probed, the DMA API is used to allocate physically
35 * In both cases CPU read and writes are performed by creating a write-combined
36 * mapping. The GPU L2 cache must thus be flushed/invalidated when required. To
37 * be conservative we do this every time we acquire or release an instobj, but
38 * ideally L2 management should be handled at a higher level.
40 * To improve performance, CPU mappings are not removed upon instobj release.
41 * Instead they are placed into a LRU list to be recycled when the mapped space
42 * goes beyond a certain threshold. At the moment this limit is 1MB.
46 #include <core/memory.h>
48 #include <core/tegra.h>
49 #include <subdev/fb.h>
50 #include <subdev/ltc.h>
52 struct gk20a_instobj {
53 struct nvkm_memory memory;
55 struct gk20a_instmem *imem;
60 #define gk20a_instobj(p) container_of((p), struct gk20a_instobj, memory)
63 * Used for objects allocated using the DMA API
65 struct gk20a_instobj_dma {
66 struct gk20a_instobj base;
69 struct nvkm_mm_node r;
71 #define gk20a_instobj_dma(p) \
72 container_of(gk20a_instobj(p), struct gk20a_instobj_dma, base)
75 * Used for objects flattened using the IOMMU API
77 struct gk20a_instobj_iommu {
78 struct gk20a_instobj base;
80 /* to link into gk20a_instmem::vaddr_lru */
81 struct list_head vaddr_node;
82 /* how many clients are using vaddr? */
85 /* will point to the higher half of pages */
86 dma_addr_t *dma_addrs;
87 /* array of base.mem->size pages (+ dma_addr_ts) */
90 #define gk20a_instobj_iommu(p) \
91 container_of(gk20a_instobj(p), struct gk20a_instobj_iommu, base)
93 struct gk20a_instmem {
94 struct nvkm_instmem base;
96 /* protects vaddr_* and gk20a_instobj::vaddr* */
99 /* CPU mappings LRU */
100 unsigned int vaddr_use;
101 unsigned int vaddr_max;
102 struct list_head vaddr_lru;
104 /* Only used if IOMMU if present */
105 struct mutex *mm_mutex;
107 struct iommu_domain *domain;
108 unsigned long iommu_pgshift;
111 /* Only used by DMA API */
114 #define gk20a_instmem(p) container_of((p), struct gk20a_instmem, base)
116 static enum nvkm_memory_target
117 gk20a_instobj_target(struct nvkm_memory *memory)
119 return NVKM_MEM_TARGET_HOST;
123 gk20a_instobj_addr(struct nvkm_memory *memory)
125 return gk20a_instobj(memory)->mem.offset;
129 gk20a_instobj_size(struct nvkm_memory *memory)
131 return (u64)gk20a_instobj(memory)->mem.size << 12;
135 * Recycle the vaddr of obj. Must be called with gk20a_instmem::lock held.
138 gk20a_instobj_iommu_recycle_vaddr(struct gk20a_instobj_iommu *obj)
140 struct gk20a_instmem *imem = obj->base.imem;
141 /* there should not be any user left... */
142 WARN_ON(obj->use_cpt);
143 list_del(&obj->vaddr_node);
144 vunmap(obj->base.vaddr);
145 obj->base.vaddr = NULL;
146 imem->vaddr_use -= nvkm_memory_size(&obj->base.memory);
147 nvkm_debug(&imem->base.subdev, "vaddr used: %x/%x\n", imem->vaddr_use,
152 * Must be called while holding gk20a_instmem::lock
155 gk20a_instmem_vaddr_gc(struct gk20a_instmem *imem, const u64 size)
157 while (imem->vaddr_use + size > imem->vaddr_max) {
158 /* no candidate that can be unmapped, abort... */
159 if (list_empty(&imem->vaddr_lru))
162 gk20a_instobj_iommu_recycle_vaddr(
163 list_first_entry(&imem->vaddr_lru,
164 struct gk20a_instobj_iommu, vaddr_node));
168 static void __iomem *
169 gk20a_instobj_acquire_dma(struct nvkm_memory *memory)
171 struct gk20a_instobj *node = gk20a_instobj(memory);
172 struct gk20a_instmem *imem = node->imem;
173 struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
180 static void __iomem *
181 gk20a_instobj_acquire_iommu(struct nvkm_memory *memory)
183 struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory);
184 struct gk20a_instmem *imem = node->base.imem;
185 struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
186 const u64 size = nvkm_memory_size(memory);
191 spin_lock_irqsave(&imem->lock, flags);
193 if (node->base.vaddr) {
194 if (!node->use_cpt) {
195 /* remove from LRU list since mapping in use again */
196 list_del(&node->vaddr_node);
201 /* try to free some address space if we reached the limit */
202 gk20a_instmem_vaddr_gc(imem, size);
205 node->base.vaddr = vmap(node->pages, size >> PAGE_SHIFT, VM_MAP,
206 pgprot_writecombine(PAGE_KERNEL));
207 if (!node->base.vaddr) {
208 nvkm_error(&imem->base.subdev, "cannot map instobj - "
209 "this is not going to end well...\n");
213 imem->vaddr_use += size;
214 nvkm_debug(&imem->base.subdev, "vaddr used: %x/%x\n",
215 imem->vaddr_use, imem->vaddr_max);
219 spin_unlock_irqrestore(&imem->lock, flags);
221 return node->base.vaddr;
225 gk20a_instobj_release_dma(struct nvkm_memory *memory)
227 struct gk20a_instobj *node = gk20a_instobj(memory);
228 struct gk20a_instmem *imem = node->imem;
229 struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
231 /* in case we got a write-combined mapping */
233 nvkm_ltc_invalidate(ltc);
237 gk20a_instobj_release_iommu(struct nvkm_memory *memory)
239 struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory);
240 struct gk20a_instmem *imem = node->base.imem;
241 struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
244 spin_lock_irqsave(&imem->lock, flags);
246 /* we should at least have one user to release... */
247 if (WARN_ON(node->use_cpt == 0))
250 /* add unused objs to the LRU list to recycle their mapping */
251 if (--node->use_cpt == 0)
252 list_add_tail(&node->vaddr_node, &imem->vaddr_lru);
255 spin_unlock_irqrestore(&imem->lock, flags);
258 nvkm_ltc_invalidate(ltc);
262 gk20a_instobj_rd32(struct nvkm_memory *memory, u64 offset)
264 struct gk20a_instobj *node = gk20a_instobj(memory);
266 return node->vaddr[offset / 4];
270 gk20a_instobj_wr32(struct nvkm_memory *memory, u64 offset, u32 data)
272 struct gk20a_instobj *node = gk20a_instobj(memory);
274 node->vaddr[offset / 4] = data;
278 gk20a_instobj_map(struct nvkm_memory *memory, struct nvkm_vma *vma, u64 offset)
280 struct gk20a_instobj *node = gk20a_instobj(memory);
282 nvkm_vm_map_at(vma, offset, &node->mem);
286 gk20a_instobj_dtor_dma(struct nvkm_memory *memory)
288 struct gk20a_instobj_dma *node = gk20a_instobj_dma(memory);
289 struct gk20a_instmem *imem = node->base.imem;
290 struct device *dev = imem->base.subdev.device->dev;
292 if (unlikely(!node->base.vaddr))
295 dma_free_attrs(dev, node->base.mem.size << PAGE_SHIFT, node->base.vaddr,
296 node->handle, imem->attrs);
303 gk20a_instobj_dtor_iommu(struct nvkm_memory *memory)
305 struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory);
306 struct gk20a_instmem *imem = node->base.imem;
307 struct device *dev = imem->base.subdev.device->dev;
308 struct nvkm_mm_node *r;
312 if (unlikely(list_empty(&node->base.mem.regions)))
315 spin_lock_irqsave(&imem->lock, flags);
317 /* vaddr has already been recycled */
318 if (node->base.vaddr)
319 gk20a_instobj_iommu_recycle_vaddr(node);
321 spin_unlock_irqrestore(&imem->lock, flags);
323 r = list_first_entry(&node->base.mem.regions, struct nvkm_mm_node,
326 /* clear IOMMU bit to unmap pages */
327 r->offset &= ~BIT(imem->iommu_bit - imem->iommu_pgshift);
329 /* Unmap pages from GPU address space and free them */
330 for (i = 0; i < node->base.mem.size; i++) {
331 iommu_unmap(imem->domain,
332 (r->offset + i) << imem->iommu_pgshift, PAGE_SIZE);
333 dma_unmap_page(dev, node->dma_addrs[i], PAGE_SIZE,
335 __free_page(node->pages[i]);
338 /* Release area from GPU address space */
339 mutex_lock(imem->mm_mutex);
340 nvkm_mm_free(imem->mm, &r);
341 mutex_unlock(imem->mm_mutex);
347 static const struct nvkm_memory_func
348 gk20a_instobj_func_dma = {
349 .dtor = gk20a_instobj_dtor_dma,
350 .target = gk20a_instobj_target,
351 .addr = gk20a_instobj_addr,
352 .size = gk20a_instobj_size,
353 .acquire = gk20a_instobj_acquire_dma,
354 .release = gk20a_instobj_release_dma,
355 .rd32 = gk20a_instobj_rd32,
356 .wr32 = gk20a_instobj_wr32,
357 .map = gk20a_instobj_map,
360 static const struct nvkm_memory_func
361 gk20a_instobj_func_iommu = {
362 .dtor = gk20a_instobj_dtor_iommu,
363 .target = gk20a_instobj_target,
364 .addr = gk20a_instobj_addr,
365 .size = gk20a_instobj_size,
366 .acquire = gk20a_instobj_acquire_iommu,
367 .release = gk20a_instobj_release_iommu,
368 .rd32 = gk20a_instobj_rd32,
369 .wr32 = gk20a_instobj_wr32,
370 .map = gk20a_instobj_map,
374 gk20a_instobj_ctor_dma(struct gk20a_instmem *imem, u32 npages, u32 align,
375 struct gk20a_instobj **_node)
377 struct gk20a_instobj_dma *node;
378 struct nvkm_subdev *subdev = &imem->base.subdev;
379 struct device *dev = subdev->device->dev;
381 if (!(node = kzalloc(sizeof(*node), GFP_KERNEL)))
383 *_node = &node->base;
385 nvkm_memory_ctor(&gk20a_instobj_func_dma, &node->base.memory);
387 node->base.vaddr = dma_alloc_attrs(dev, npages << PAGE_SHIFT,
388 &node->handle, GFP_KERNEL,
390 if (!node->base.vaddr) {
391 nvkm_error(subdev, "cannot allocate DMA memory\n");
395 /* alignment check */
396 if (unlikely(node->handle & (align - 1)))
398 "memory not aligned as requested: %pad (0x%x)\n",
399 &node->handle, align);
401 /* present memory for being mapped using small pages */
403 node->r.offset = node->handle >> 12;
404 node->r.length = (npages << PAGE_SHIFT) >> 12;
406 node->base.mem.offset = node->handle;
408 INIT_LIST_HEAD(&node->base.mem.regions);
409 list_add_tail(&node->r.rl_entry, &node->base.mem.regions);
415 gk20a_instobj_ctor_iommu(struct gk20a_instmem *imem, u32 npages, u32 align,
416 struct gk20a_instobj **_node)
418 struct gk20a_instobj_iommu *node;
419 struct nvkm_subdev *subdev = &imem->base.subdev;
420 struct device *dev = subdev->device->dev;
421 struct nvkm_mm_node *r;
426 * despite their variable size, instmem allocations are small enough
427 * (< 1 page) to be handled by kzalloc
429 if (!(node = kzalloc(sizeof(*node) + ((sizeof(node->pages[0]) +
430 sizeof(*node->dma_addrs)) * npages), GFP_KERNEL)))
432 *_node = &node->base;
433 node->dma_addrs = (void *)(node->pages + npages);
435 nvkm_memory_ctor(&gk20a_instobj_func_iommu, &node->base.memory);
437 /* Allocate backing memory */
438 for (i = 0; i < npages; i++) {
439 struct page *p = alloc_page(GFP_KERNEL);
447 dma_adr = dma_map_page(dev, p, 0, PAGE_SIZE, DMA_BIDIRECTIONAL);
448 if (dma_mapping_error(dev, dma_adr)) {
449 nvkm_error(subdev, "DMA mapping error!\n");
453 node->dma_addrs[i] = dma_adr;
456 mutex_lock(imem->mm_mutex);
457 /* Reserve area from GPU address space */
458 ret = nvkm_mm_head(imem->mm, 0, 1, npages, npages,
459 align >> imem->iommu_pgshift, &r);
460 mutex_unlock(imem->mm_mutex);
462 nvkm_error(subdev, "IOMMU space is full!\n");
466 /* Map into GPU address space */
467 for (i = 0; i < npages; i++) {
468 u32 offset = (r->offset + i) << imem->iommu_pgshift;
470 ret = iommu_map(imem->domain, offset, node->dma_addrs[i],
471 PAGE_SIZE, IOMMU_READ | IOMMU_WRITE);
473 nvkm_error(subdev, "IOMMU mapping failure: %d\n", ret);
477 iommu_unmap(imem->domain, offset, PAGE_SIZE);
483 /* IOMMU bit tells that an address is to be resolved through the IOMMU */
484 r->offset |= BIT(imem->iommu_bit - imem->iommu_pgshift);
486 node->base.mem.offset = ((u64)r->offset) << imem->iommu_pgshift;
488 INIT_LIST_HEAD(&node->base.mem.regions);
489 list_add_tail(&r->rl_entry, &node->base.mem.regions);
494 mutex_lock(imem->mm_mutex);
495 nvkm_mm_free(imem->mm, &r);
496 mutex_unlock(imem->mm_mutex);
499 for (i = 0; i < npages && node->pages[i] != NULL; i++) {
500 dma_addr_t dma_addr = node->dma_addrs[i];
502 dma_unmap_page(dev, dma_addr, PAGE_SIZE,
504 __free_page(node->pages[i]);
511 gk20a_instobj_new(struct nvkm_instmem *base, u32 size, u32 align, bool zero,
512 struct nvkm_memory **pmemory)
514 struct gk20a_instmem *imem = gk20a_instmem(base);
515 struct nvkm_subdev *subdev = &imem->base.subdev;
516 struct gk20a_instobj *node = NULL;
519 nvkm_debug(subdev, "%s (%s): size: %x align: %x\n", __func__,
520 imem->domain ? "IOMMU" : "DMA", size, align);
522 /* Round size and align to page bounds */
523 size = max(roundup(size, PAGE_SIZE), PAGE_SIZE);
524 align = max(roundup(align, PAGE_SIZE), PAGE_SIZE);
527 ret = gk20a_instobj_ctor_iommu(imem, size >> PAGE_SHIFT,
530 ret = gk20a_instobj_ctor_dma(imem, size >> PAGE_SHIFT,
532 *pmemory = node ? &node->memory : NULL;
538 /* present memory for being mapped using small pages */
539 node->mem.size = size >> 12;
540 node->mem.memtype = 0;
541 node->mem.page_shift = 12;
543 nvkm_debug(subdev, "alloc size: 0x%x, align: 0x%x, gaddr: 0x%llx\n",
544 size, align, node->mem.offset);
550 gk20a_instmem_dtor(struct nvkm_instmem *base)
552 struct gk20a_instmem *imem = gk20a_instmem(base);
554 /* perform some sanity checks... */
555 if (!list_empty(&imem->vaddr_lru))
556 nvkm_warn(&base->subdev, "instobj LRU not empty!\n");
558 if (imem->vaddr_use != 0)
559 nvkm_warn(&base->subdev, "instobj vmap area not empty! "
560 "0x%x bytes still mapped\n", imem->vaddr_use);
565 static const struct nvkm_instmem_func
567 .dtor = gk20a_instmem_dtor,
568 .memory_new = gk20a_instobj_new,
574 gk20a_instmem_new(struct nvkm_device *device, int index,
575 struct nvkm_instmem **pimem)
577 struct nvkm_device_tegra *tdev = device->func->tegra(device);
578 struct gk20a_instmem *imem;
580 if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL)))
582 nvkm_instmem_ctor(&gk20a_instmem, device, index, &imem->base);
583 spin_lock_init(&imem->lock);
584 *pimem = &imem->base;
586 /* do not allow more than 1MB of CPU-mapped instmem */
588 imem->vaddr_max = 0x100000;
589 INIT_LIST_HEAD(&imem->vaddr_lru);
591 if (tdev->iommu.domain) {
592 imem->mm_mutex = &tdev->iommu.mutex;
593 imem->mm = &tdev->iommu.mm;
594 imem->domain = tdev->iommu.domain;
595 imem->iommu_pgshift = tdev->iommu.pgshift;
596 imem->iommu_bit = tdev->func->iommu_bit;
598 nvkm_info(&imem->base.subdev, "using IOMMU\n");
600 imem->attrs = DMA_ATTR_NON_CONSISTENT |
601 DMA_ATTR_WEAK_ORDERING |
602 DMA_ATTR_WRITE_COMBINE;
604 nvkm_info(&imem->base.subdev, "using DMA API\n");