drivers/gpu/drm/tilcdc/tilcdc_drv.c

   1 /*
   2  * Copyright (C) 2012 Texas Instruments
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 /* LCDC DRM driver, based on da8xx-fb */
  19
  20 #include <linux/component.h>
  21 #include <linux/pinctrl/consumer.h>
  22 #include <linux/suspend.h>
  23 #include <drm/drm_atomic.h>
  24 #include <drm/drm_atomic_helper.h>
  25 #include <drm/drm_fb_helper.h>
  26
  27 #include "tilcdc_drv.h"
  28 #include "tilcdc_regs.h"
  29 #include "tilcdc_tfp410.h"
  30 #include "tilcdc_panel.h"
  31 #include "tilcdc_external.h"
  32
  33 static LIST_HEAD(module_list);
  34
  35 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 };
  36
  37 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565,
  38                                                DRM_FORMAT_BGR888,
  39                                                DRM_FORMAT_XBGR8888 };
  40
  41 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565,
  42                                               DRM_FORMAT_RGB888,
  43                                               DRM_FORMAT_XRGB8888 };
  44
  45 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565,
  46                                              DRM_FORMAT_RGB888,
  47                                              DRM_FORMAT_XRGB8888 };
  48
  49 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
  50                 const struct tilcdc_module_ops *funcs)
  51 {
  52         mod->name = name;
  53         mod->funcs = funcs;
  54         INIT_LIST_HEAD(&mod->list);
  55         list_add(&mod->list, &module_list);
  56 }
  57
  58 void tilcdc_module_cleanup(struct tilcdc_module *mod)
  59 {
  60         list_del(&mod->list);
  61 }
  62
  63 static struct of_device_id tilcdc_of_match[];
  64
  65 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
  66                 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
  67 {
  68         return drm_fb_cma_create(dev, file_priv, mode_cmd);
  69 }
  70
  71 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
  72 {
  73         struct tilcdc_drm_private *priv = dev->dev_private;
  74         drm_fbdev_cma_hotplug_event(priv->fbdev);
  75 }
  76
  77 static int tilcdc_atomic_check(struct drm_device *dev,
  78                                struct drm_atomic_state *state)
  79 {
  80         int ret;
  81
  82         ret = drm_atomic_helper_check_modeset(dev, state);
  83         if (ret)
  84                 return ret;
  85
  86         ret = drm_atomic_helper_check_planes(dev, state);
  87         if (ret)
  88                 return ret;
  89
  90         /*
  91          * tilcdc ->atomic_check can update ->mode_changed if pixel format
  92          * changes, hence will we check modeset changes again.
  93          */
  94         ret = drm_atomic_helper_check_modeset(dev, state);
  95         if (ret)
  96                 return ret;
  97
  98         return ret;
  99 }
 100
 101 static int tilcdc_commit(struct drm_device *dev,
 102                   struct drm_atomic_state *state,
 103                   bool async)
 104 {
 105         int ret;
 106
 107         ret = drm_atomic_helper_prepare_planes(dev, state);
 108         if (ret)
 109                 return ret;
 110
 111         ret = drm_atomic_helper_swap_state(state, true);
 112         if (ret) {
 113                 drm_atomic_helper_cleanup_planes(dev, state);
 114                 return ret;
 115         }
 116
 117         /*
 118          * Everything below can be run asynchronously without the need to grab
 119          * any modeset locks at all under one condition: It must be guaranteed
 120          * that the asynchronous work has either been cancelled (if the driver
 121          * supports it, which at least requires that the framebuffers get
 122          * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
 123          * before the new state gets committed on the software side with
 124          * drm_atomic_helper_swap_state().
 125          *
 126          * This scheme allows new atomic state updates to be prepared and
 127          * checked in parallel to the asynchronous completion of the previous
 128          * update. Which is important since compositors need to figure out the
 129          * composition of the next frame right after having submitted the
 130          * current layout.
 131          */
 132
 133         drm_atomic_helper_commit_modeset_disables(dev, state);
 134
 135         drm_atomic_helper_commit_planes(dev, state, 0);
 136
 137         drm_atomic_helper_commit_modeset_enables(dev, state);
 138
 139         drm_atomic_helper_wait_for_vblanks(dev, state);
 140
 141         drm_atomic_helper_cleanup_planes(dev, state);
 142
 143         return 0;
 144 }
 145
 146 static const struct drm_mode_config_funcs mode_config_funcs = {
 147         .fb_create = tilcdc_fb_create,
 148         .output_poll_changed = tilcdc_fb_output_poll_changed,
 149         .atomic_check = tilcdc_atomic_check,
 150         .atomic_commit = tilcdc_commit,
 151 };
 152
 153 static void modeset_init(struct drm_device *dev)
 154 {
 155         struct tilcdc_drm_private *priv = dev->dev_private;
 156         struct tilcdc_module *mod;
 157
 158         list_for_each_entry(mod, &module_list, list) {
 159                 DBG("loading module: %s", mod->name);
 160                 mod->funcs->modeset_init(mod, dev);
 161         }
 162
 163         dev->mode_config.min_width = 0;
 164         dev->mode_config.min_height = 0;
 165         dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
 166         dev->mode_config.max_height = 2048;
 167         dev->mode_config.funcs = &mode_config_funcs;
 168 }
 169
 170 #ifdef CONFIG_CPU_FREQ
 171 static int cpufreq_transition(struct notifier_block *nb,
 172                                      unsigned long val, void *data)
 173 {
 174         struct tilcdc_drm_private *priv = container_of(nb,
 175                         struct tilcdc_drm_private, freq_transition);
 176
 177         if (val == CPUFREQ_POSTCHANGE)
 178                 tilcdc_crtc_update_clk(priv->crtc);
 179
 180         return 0;
 181 }
 182 #endif
 183
 184 /*
 185  * DRM operations:
 186  */
 187
 188 static void tilcdc_fini(struct drm_device *dev)
 189 {
 190         struct tilcdc_drm_private *priv = dev->dev_private;
 191
 192 #ifdef CONFIG_CPU_FREQ
 193         if (priv->freq_transition.notifier_call)
 194                 cpufreq_unregister_notifier(&priv->freq_transition,
 195                                             CPUFREQ_TRANSITION_NOTIFIER);
 196 #endif
 197
 198         if (priv->crtc)
 199                 tilcdc_crtc_shutdown(priv->crtc);
 200
 201         if (priv->is_registered)
 202                 drm_dev_unregister(dev);
 203
 204         drm_kms_helper_poll_fini(dev);
 205
 206         if (priv->fbdev)
 207                 drm_fbdev_cma_fini(priv->fbdev);
 208
 209         drm_irq_uninstall(dev);
 210         drm_mode_config_cleanup(dev);
 211
 212         if (priv->clk)
 213                 clk_put(priv->clk);
 214
 215         if (priv->mmio)
 216                 iounmap(priv->mmio);
 217
 218         if (priv->wq) {
 219                 flush_workqueue(priv->wq);
 220                 destroy_workqueue(priv->wq);
 221         }
 222
 223         dev->dev_private = NULL;
 224
 225         pm_runtime_disable(dev->dev);
 226
 227         drm_dev_unref(dev);
 228 }
 229
 230 static int tilcdc_init(struct drm_driver *ddrv, struct device *dev)
 231 {
 232         struct drm_device *ddev;
 233         struct platform_device *pdev = to_platform_device(dev);
 234         struct device_node *node = dev->of_node;
 235         struct tilcdc_drm_private *priv;
 236         struct resource *res;
 237         u32 bpp = 0;
 238         int ret;
 239
 240         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 241         if (!priv) {
 242                 dev_err(dev, "failed to allocate private data\n");
 243                 return -ENOMEM;
 244         }
 245
 246         ddev = drm_dev_alloc(ddrv, dev);
 247         if (IS_ERR(ddev))
 248                 return PTR_ERR(ddev);
 249
 250         ddev->dev_private = priv;
 251         platform_set_drvdata(pdev, ddev);
 252         drm_mode_config_init(ddev);
 253
 254         priv->is_componentized =
 255                 tilcdc_get_external_components(dev, NULL) > 0;
 256
 257         priv->wq = alloc_ordered_workqueue("tilcdc", 0);
 258         if (!priv->wq) {
 259                 ret = -ENOMEM;
 260                 goto init_failed;
 261         }
 262
 263         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 264         if (!res) {
 265                 dev_err(dev, "failed to get memory resource\n");
 266                 ret = -EINVAL;
 267                 goto init_failed;
 268         }
 269
 270         priv->mmio = ioremap_nocache(res->start, resource_size(res));
 271         if (!priv->mmio) {
 272                 dev_err(dev, "failed to ioremap\n");
 273                 ret = -ENOMEM;
 274                 goto init_failed;
 275         }
 276
 277         priv->clk = clk_get(dev, "fck");
 278         if (IS_ERR(priv->clk)) {
 279                 dev_err(dev, "failed to get functional clock\n");
 280                 ret = -ENODEV;
 281                 goto init_failed;
 282         }
 283
 284         if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
 285                 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
 286
 287         DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
 288
 289         if (of_property_read_u32(node, "max-width", &priv->max_width))
 290                 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
 291
 292         DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
 293
 294         if (of_property_read_u32(node, "max-pixelclock",
 295                                         &priv->max_pixelclock))
 296                 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
 297
 298         DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
 299
 300         pm_runtime_enable(dev);
 301
 302         /* Determine LCD IP Version */
 303         pm_runtime_get_sync(dev);
 304         switch (tilcdc_read(ddev, LCDC_PID_REG)) {
 305         case 0x4c100102:
 306                 priv->rev = 1;
 307                 break;
 308         case 0x4f200800:
 309         case 0x4f201000:
 310                 priv->rev = 2;
 311                 break;
 312         default:
 313                 dev_warn(dev, "Unknown PID Reg value 0x%08x, "
 314                         "defaulting to LCD revision 1\n",
 315                         tilcdc_read(ddev, LCDC_PID_REG));
 316                 priv->rev = 1;
 317                 break;
 318         }
 319
 320         pm_runtime_put_sync(dev);
 321
 322         if (priv->rev == 1) {
 323                 DBG("Revision 1 LCDC supports only RGB565 format");
 324                 priv->pixelformats = tilcdc_rev1_formats;
 325                 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
 326                 bpp = 16;
 327         } else {
 328                 const char *str = "\0";
 329
 330                 of_property_read_string(node, "blue-and-red-wiring", &str);
 331                 if (0 == strcmp(str, "crossed")) {
 332                         DBG("Configured for crossed blue and red wires");
 333                         priv->pixelformats = tilcdc_crossed_formats;
 334                         priv->num_pixelformats =
 335                                 ARRAY_SIZE(tilcdc_crossed_formats);
 336                         bpp = 32; /* Choose bpp with RGB support for fbdef */
 337                 } else if (0 == strcmp(str, "straight")) {
 338                         DBG("Configured for straight blue and red wires");
 339                         priv->pixelformats = tilcdc_straight_formats;
 340                         priv->num_pixelformats =
 341                                 ARRAY_SIZE(tilcdc_straight_formats);
 342                         bpp = 16; /* Choose bpp with RGB support for fbdef */
 343                 } else {
 344                         DBG("Blue and red wiring '%s' unknown, use legacy mode",
 345                             str);
 346                         priv->pixelformats = tilcdc_legacy_formats;
 347                         priv->num_pixelformats =
 348                                 ARRAY_SIZE(tilcdc_legacy_formats);
 349                         bpp = 16; /* This is just a guess */
 350                 }
 351         }
 352
 353         ret = tilcdc_crtc_create(ddev);
 354         if (ret < 0) {
 355                 dev_err(dev, "failed to create crtc\n");
 356                 goto init_failed;
 357         }
 358         modeset_init(ddev);
 359
 360 #ifdef CONFIG_CPU_FREQ
 361         priv->freq_transition.notifier_call = cpufreq_transition;
 362         ret = cpufreq_register_notifier(&priv->freq_transition,
 363                         CPUFREQ_TRANSITION_NOTIFIER);
 364         if (ret) {
 365                 dev_err(dev, "failed to register cpufreq notifier\n");
 366                 priv->freq_transition.notifier_call = NULL;
 367                 goto init_failed;
 368         }
 369 #endif
 370
 371         if (priv->is_componentized) {
 372                 ret = component_bind_all(dev, ddev);
 373                 if (ret < 0)
 374                         goto init_failed;
 375
 376                 ret = tilcdc_add_component_encoder(ddev);
 377                 if (ret < 0)
 378                         goto init_failed;
 379         } else {
 380                 ret = tilcdc_attach_external_device(ddev);
 381                 if (ret)
 382                         goto init_failed;
 383         }
 384
 385         if (!priv->external_connector &&
 386             ((priv->num_encoders == 0) || (priv->num_connectors == 0))) {
 387                 dev_err(dev, "no encoders/connectors found\n");
 388                 ret = -ENXIO;
 389                 goto init_failed;
 390         }
 391
 392         ret = drm_vblank_init(ddev, 1);
 393         if (ret < 0) {
 394                 dev_err(dev, "failed to initialize vblank\n");
 395                 goto init_failed;
 396         }
 397
 398         ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
 399         if (ret < 0) {
 400                 dev_err(dev, "failed to install IRQ handler\n");
 401                 goto init_failed;
 402         }
 403
 404         drm_mode_config_reset(ddev);
 405
 406         priv->fbdev = drm_fbdev_cma_init(ddev, bpp,
 407                                          ddev->mode_config.num_connector);
 408         if (IS_ERR(priv->fbdev)) {
 409                 ret = PTR_ERR(priv->fbdev);
 410                 goto init_failed;
 411         }
 412
 413         drm_kms_helper_poll_init(ddev);
 414
 415         ret = drm_dev_register(ddev, 0);
 416         if (ret)
 417                 goto init_failed;
 418
 419         priv->is_registered = true;
 420         return 0;
 421
 422 init_failed:
 423         tilcdc_fini(ddev);
 424
 425         return ret;
 426 }
 427
 428 static void tilcdc_lastclose(struct drm_device *dev)
 429 {
 430         struct tilcdc_drm_private *priv = dev->dev_private;
 431         drm_fbdev_cma_restore_mode(priv->fbdev);
 432 }
 433
 434 static irqreturn_t tilcdc_irq(int irq, void *arg)
 435 {
 436         struct drm_device *dev = arg;
 437         struct tilcdc_drm_private *priv = dev->dev_private;
 438         return tilcdc_crtc_irq(priv->crtc);
 439 }
 440
 441 #if defined(CONFIG_DEBUG_FS)
 442 static const struct {
 443         const char *name;
 444         uint8_t  rev;
 445         uint8_t  save;
 446         uint32_t reg;
 447 } registers[] =         {
 448 #define REG(rev, save, reg) { #reg, rev, save, reg }
 449                 /* exists in revision 1: */
 450                 REG(1, false, LCDC_PID_REG),
 451                 REG(1, true,  LCDC_CTRL_REG),
 452                 REG(1, false, LCDC_STAT_REG),
 453                 REG(1, true,  LCDC_RASTER_CTRL_REG),
 454                 REG(1, true,  LCDC_RASTER_TIMING_0_REG),
 455                 REG(1, true,  LCDC_RASTER_TIMING_1_REG),
 456                 REG(1, true,  LCDC_RASTER_TIMING_2_REG),
 457                 REG(1, true,  LCDC_DMA_CTRL_REG),
 458                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_0_REG),
 459                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_0_REG),
 460                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_1_REG),
 461                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_1_REG),
 462                 /* new in revision 2: */
 463                 REG(2, false, LCDC_RAW_STAT_REG),
 464                 REG(2, false, LCDC_MASKED_STAT_REG),
 465                 REG(2, true, LCDC_INT_ENABLE_SET_REG),
 466                 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
 467                 REG(2, false, LCDC_END_OF_INT_IND_REG),
 468                 REG(2, true,  LCDC_CLK_ENABLE_REG),
 469 #undef REG
 470 };
 471
 472 #endif
 473
 474 #ifdef CONFIG_DEBUG_FS
 475 static int tilcdc_regs_show(struct seq_file *m, void *arg)
 476 {
 477         struct drm_info_node *node = (struct drm_info_node *) m->private;
 478         struct drm_device *dev = node->minor->dev;
 479         struct tilcdc_drm_private *priv = dev->dev_private;
 480         unsigned i;
 481
 482         pm_runtime_get_sync(dev->dev);
 483
 484         seq_printf(m, "revision: %d\n", priv->rev);
 485
 486         for (i = 0; i < ARRAY_SIZE(registers); i++)
 487                 if (priv->rev >= registers[i].rev)
 488                         seq_printf(m, "%s:\t %08x\n", registers[i].name,
 489                                         tilcdc_read(dev, registers[i].reg));
 490
 491         pm_runtime_put_sync(dev->dev);
 492
 493         return 0;
 494 }
 495
 496 static int tilcdc_mm_show(struct seq_file *m, void *arg)
 497 {
 498         struct drm_info_node *node = (struct drm_info_node *) m->private;
 499         struct drm_device *dev = node->minor->dev;
 500         struct drm_printer p = drm_seq_file_printer(m);
 501         drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p);
 502         return 0;
 503 }
 504
 505 static struct drm_info_list tilcdc_debugfs_list[] = {
 506                 { "regs", tilcdc_regs_show, 0 },
 507                 { "mm",   tilcdc_mm_show,   0 },
 508                 { "fb",   drm_fb_cma_debugfs_show, 0 },
 509 };
 510
 511 static int tilcdc_debugfs_init(struct drm_minor *minor)
 512 {
 513         struct drm_device *dev = minor->dev;
 514         struct tilcdc_module *mod;
 515         int ret;
 516
 517         ret = drm_debugfs_create_files(tilcdc_debugfs_list,
 518                         ARRAY_SIZE(tilcdc_debugfs_list),
 519                         minor->debugfs_root, minor);
 520
 521         list_for_each_entry(mod, &module_list, list)
 522                 if (mod->funcs->debugfs_init)
 523                         mod->funcs->debugfs_init(mod, minor);
 524
 525         if (ret) {
 526                 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
 527                 return ret;
 528         }
 529
 530         return ret;
 531 }
 532 #endif
 533
 534 DEFINE_DRM_GEM_CMA_FOPS(fops);
 535
 536 static struct drm_driver tilcdc_driver = {
 537         .driver_features    = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET |
 538                                DRIVER_PRIME | DRIVER_ATOMIC),
 539         .lastclose          = tilcdc_lastclose,
 540         .irq_handler        = tilcdc_irq,
 541         .gem_free_object_unlocked = drm_gem_cma_free_object,
 542         .gem_vm_ops         = &drm_gem_cma_vm_ops,
 543         .dumb_create        = drm_gem_cma_dumb_create,
 544
 545         .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
 546         .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
 547         .gem_prime_import       = drm_gem_prime_import,
 548         .gem_prime_export       = drm_gem_prime_export,
 549         .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
 550         .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
 551         .gem_prime_vmap         = drm_gem_cma_prime_vmap,
 552         .gem_prime_vunmap       = drm_gem_cma_prime_vunmap,
 553         .gem_prime_mmap         = drm_gem_cma_prime_mmap,
 554 #ifdef CONFIG_DEBUG_FS
 555         .debugfs_init       = tilcdc_debugfs_init,
 556 #endif
 557         .fops               = &fops,
 558         .name               = "tilcdc",
 559         .desc               = "TI LCD Controller DRM",
 560         .date               = "20121205",
 561         .major              = 1,
 562         .minor              = 0,
 563 };
 564
 565 /*
 566  * Power management:
 567  */
 568
 569 #ifdef CONFIG_PM_SLEEP
 570 static int tilcdc_pm_suspend(struct device *dev)
 571 {
 572         struct drm_device *ddev = dev_get_drvdata(dev);
 573         struct tilcdc_drm_private *priv = ddev->dev_private;
 574
 575         priv->saved_state = drm_atomic_helper_suspend(ddev);
 576
 577         /* Select sleep pin state */
 578         pinctrl_pm_select_sleep_state(dev);
 579
 580         return 0;
 581 }
 582
 583 static int tilcdc_pm_resume(struct device *dev)
 584 {
 585         struct drm_device *ddev = dev_get_drvdata(dev);
 586         struct tilcdc_drm_private *priv = ddev->dev_private;
 587         int ret = 0;
 588
 589         /* Select default pin state */
 590         pinctrl_pm_select_default_state(dev);
 591
 592         if (priv->saved_state)
 593                 ret = drm_atomic_helper_resume(ddev, priv->saved_state);
 594
 595         return ret;
 596 }
 597 #endif
 598
 599 static const struct dev_pm_ops tilcdc_pm_ops = {
 600         SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
 601 };
 602
 603 /*
 604  * Platform driver:
 605  */
 606 static int tilcdc_bind(struct device *dev)
 607 {
 608         return tilcdc_init(&tilcdc_driver, dev);
 609 }
 610
 611 static void tilcdc_unbind(struct device *dev)
 612 {
 613         struct drm_device *ddev = dev_get_drvdata(dev);
 614
 615         /* Check if a subcomponent has already triggered the unloading. */
 616         if (!ddev->dev_private)
 617                 return;
 618
 619         tilcdc_fini(dev_get_drvdata(dev));
 620 }
 621
 622 static const struct component_master_ops tilcdc_comp_ops = {
 623         .bind = tilcdc_bind,
 624         .unbind = tilcdc_unbind,
 625 };
 626
 627 static int tilcdc_pdev_probe(struct platform_device *pdev)
 628 {
 629         struct component_match *match = NULL;
 630         int ret;
 631
 632         /* bail out early if no DT data: */
 633         if (!pdev->dev.of_node) {
 634                 dev_err(&pdev->dev, "device-tree data is missing\n");
 635                 return -ENXIO;
 636         }
 637
 638         ret = tilcdc_get_external_components(&pdev->dev, &match);
 639         if (ret < 0)
 640                 return ret;
 641         else if (ret == 0)
 642                 return tilcdc_init(&tilcdc_driver, &pdev->dev);
 643         else
 644                 return component_master_add_with_match(&pdev->dev,
 645                                                        &tilcdc_comp_ops,
 646                                                        match);
 647 }
 648
 649 static int tilcdc_pdev_remove(struct platform_device *pdev)
 650 {
 651         int ret;
 652
 653         ret = tilcdc_get_external_components(&pdev->dev, NULL);
 654         if (ret < 0)
 655                 return ret;
 656         else if (ret == 0)
 657                 tilcdc_fini(platform_get_drvdata(pdev));
 658         else
 659                 component_master_del(&pdev->dev, &tilcdc_comp_ops);
 660
 661         return 0;
 662 }
 663
 664 static struct of_device_id tilcdc_of_match[] = {
 665                 { .compatible = "ti,am33xx-tilcdc", },
 666                 { .compatible = "ti,da850-tilcdc", },
 667                 { },
 668 };
 669 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
 670
 671 static struct platform_driver tilcdc_platform_driver = {
 672         .probe      = tilcdc_pdev_probe,
 673         .remove     = tilcdc_pdev_remove,
 674         .driver     = {
 675                 .name   = "tilcdc",
 676                 .pm     = &tilcdc_pm_ops,
 677                 .of_match_table = tilcdc_of_match,
 678         },
 679 };
 680
 681 static int __init tilcdc_drm_init(void)
 682 {
 683         DBG("init");
 684         tilcdc_tfp410_init();
 685         tilcdc_panel_init();
 686         return platform_driver_register(&tilcdc_platform_driver);
 687 }
 688
 689 static void __exit tilcdc_drm_fini(void)
 690 {
 691         DBG("fini");
 692         platform_driver_unregister(&tilcdc_platform_driver);
 693         tilcdc_panel_fini();
 694         tilcdc_tfp410_fini();
 695 }
 696
 697 module_init(tilcdc_drm_init);
 698 module_exit(tilcdc_drm_fini);
 699
 700 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
 701 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
 702 MODULE_LICENSE("GPL");