drivers/gpu/drm/vc4/vc4_dpi.c

   1 /*
   2  * Copyright (C) 2016 Broadcom Limited
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License version 2 as published by
   6  * the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16
  17 /**
  18  * DOC: VC4 DPI module
  19  *
  20  * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
  21  * signals.  On BCM2835, these can be routed out to GPIO0-27 with the
  22  * ALT2 function.
  23  */
  24
  25 #include <drm/drm_atomic_helper.h>
  26 #include <drm/drm_bridge.h>
  27 #include <drm/drm_crtc_helper.h>
  28 #include <drm/drm_edid.h>
  29 #include <drm/drm_of.h>
  30 #include <drm/drm_panel.h>
  31 #include <linux/clk.h>
  32 #include <linux/component.h>
  33 #include <linux/of_graph.h>
  34 #include <linux/of_platform.h>
  35 #include "vc4_drv.h"
  36 #include "vc4_regs.h"
  37
  38 #define DPI_C                   0x00
  39 # define DPI_OUTPUT_ENABLE_MODE         BIT(16)
  40
  41 /* The order field takes the incoming 24 bit RGB from the pixel valve
  42  * and shuffles the 3 channels.
  43  */
  44 # define DPI_ORDER_MASK                 VC4_MASK(15, 14)
  45 # define DPI_ORDER_SHIFT                14
  46 # define DPI_ORDER_RGB                  0
  47 # define DPI_ORDER_BGR                  1
  48 # define DPI_ORDER_GRB                  2
  49 # define DPI_ORDER_BRG                  3
  50
  51 /* The format field takes the ORDER-shuffled pixel valve data and
  52  * formats it onto the output lines.
  53  */
  54 # define DPI_FORMAT_MASK                VC4_MASK(13, 11)
  55 # define DPI_FORMAT_SHIFT               11
  56 /* This define is named in the hardware, but actually just outputs 0. */
  57 # define DPI_FORMAT_9BIT_666_RGB        0
  58 /* Outputs 00000000rrrrrggggggbbbbb */
  59 # define DPI_FORMAT_16BIT_565_RGB_1     1
  60 /* Outputs 000rrrrr00gggggg000bbbbb */
  61 # define DPI_FORMAT_16BIT_565_RGB_2     2
  62 /* Outputs 00rrrrr000gggggg00bbbbb0 */
  63 # define DPI_FORMAT_16BIT_565_RGB_3     3
  64 /* Outputs 000000rrrrrrggggggbbbbbb */
  65 # define DPI_FORMAT_18BIT_666_RGB_1     4
  66 /* Outputs 00rrrrrr00gggggg00bbbbbb */
  67 # define DPI_FORMAT_18BIT_666_RGB_2     5
  68 /* Outputs rrrrrrrrggggggggbbbbbbbb */
  69 # define DPI_FORMAT_24BIT_888_RGB       6
  70
  71 /* Reverses the polarity of the corresponding signal */
  72 # define DPI_PIXEL_CLK_INVERT           BIT(10)
  73 # define DPI_HSYNC_INVERT               BIT(9)
  74 # define DPI_VSYNC_INVERT               BIT(8)
  75 # define DPI_OUTPUT_ENABLE_INVERT       BIT(7)
  76
  77 /* Outputs the signal the falling clock edge instead of rising. */
  78 # define DPI_HSYNC_NEGATE               BIT(6)
  79 # define DPI_VSYNC_NEGATE               BIT(5)
  80 # define DPI_OUTPUT_ENABLE_NEGATE       BIT(4)
  81
  82 /* Disables the signal */
  83 # define DPI_HSYNC_DISABLE              BIT(3)
  84 # define DPI_VSYNC_DISABLE              BIT(2)
  85 # define DPI_OUTPUT_ENABLE_DISABLE      BIT(1)
  86
  87 /* Power gate to the device, full reset at 0 -> 1 transition */
  88 # define DPI_ENABLE                     BIT(0)
  89
  90 /* All other registers besides DPI_C return the ID */
  91 #define DPI_ID                  0x04
  92 # define DPI_ID_VALUE           0x00647069
  93
  94 /* General DPI hardware state. */
  95 struct vc4_dpi {
  96         struct platform_device *pdev;
  97
  98         struct drm_encoder *encoder;
  99
 100         void __iomem *regs;
 101
 102         struct clk *pixel_clock;
 103         struct clk *core_clock;
 104 };
 105
 106 #define DPI_READ(offset) readl(dpi->regs + (offset))
 107 #define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
 108
 109 /* VC4 DPI encoder KMS struct */
 110 struct vc4_dpi_encoder {
 111         struct vc4_encoder base;
 112         struct vc4_dpi *dpi;
 113 };
 114
 115 static inline struct vc4_dpi_encoder *
 116 to_vc4_dpi_encoder(struct drm_encoder *encoder)
 117 {
 118         return container_of(encoder, struct vc4_dpi_encoder, base.base);
 119 }
 120
 121 #define DPI_REG(reg) { reg, #reg }
 122 static const struct {
 123         u32 reg;
 124         const char *name;
 125 } dpi_regs[] = {
 126         DPI_REG(DPI_C),
 127         DPI_REG(DPI_ID),
 128 };
 129
 130 #ifdef CONFIG_DEBUG_FS
 131 int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused)
 132 {
 133         struct drm_info_node *node = (struct drm_info_node *)m->private;
 134         struct drm_device *dev = node->minor->dev;
 135         struct vc4_dev *vc4 = to_vc4_dev(dev);
 136         struct vc4_dpi *dpi = vc4->dpi;
 137         int i;
 138
 139         if (!dpi)
 140                 return 0;
 141
 142         for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) {
 143                 seq_printf(m, "%s (0x%04x): 0x%08x\n",
 144                            dpi_regs[i].name, dpi_regs[i].reg,
 145                            DPI_READ(dpi_regs[i].reg));
 146         }
 147
 148         return 0;
 149 }
 150 #endif
 151
 152 static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
 153         .destroy = drm_encoder_cleanup,
 154 };
 155
 156 static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
 157 {
 158         struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
 159         struct vc4_dpi *dpi = vc4_encoder->dpi;
 160
 161         clk_disable_unprepare(dpi->pixel_clock);
 162 }
 163
 164 static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
 165 {
 166         struct drm_device *dev = encoder->dev;
 167         struct drm_display_mode *mode = &encoder->crtc->mode;
 168         struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
 169         struct vc4_dpi *dpi = vc4_encoder->dpi;
 170         struct drm_connector_list_iter conn_iter;
 171         struct drm_connector *connector = NULL, *connector_scan;
 172         u32 dpi_c = DPI_ENABLE | DPI_OUTPUT_ENABLE_MODE;
 173         int ret;
 174
 175         /* Look up the connector attached to DPI so we can get the
 176          * bus_format.  Ideally the bridge would tell us the
 177          * bus_format we want, but it doesn't yet, so assume that it's
 178          * uniform throughout the bridge chain.
 179          */
 180         drm_connector_list_iter_begin(dev, &conn_iter);
 181         drm_for_each_connector_iter(connector_scan, &conn_iter) {
 182                 if (connector_scan->encoder == encoder) {
 183                         connector = connector_scan;
 184                         break;
 185                 }
 186         }
 187         drm_connector_list_iter_end(&conn_iter);
 188
 189         if (connector) {
 190                 if (connector->display_info.num_bus_formats) {
 191                         u32 bus_format = connector->display_info.bus_formats[0];
 192
 193                         switch (bus_format) {
 194                         case MEDIA_BUS_FMT_RGB888_1X24:
 195                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
 196                                                        DPI_FORMAT);
 197                                 break;
 198                         case MEDIA_BUS_FMT_BGR888_1X24:
 199                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
 200                                                        DPI_FORMAT);
 201                                 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
 202                                                        DPI_ORDER);
 203                                 break;
 204                         case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
 205                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
 206                                                        DPI_FORMAT);
 207                                 break;
 208                         case MEDIA_BUS_FMT_RGB666_1X18:
 209                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
 210                                                        DPI_FORMAT);
 211                                 break;
 212                         case MEDIA_BUS_FMT_RGB565_1X16:
 213                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1,
 214                                                        DPI_FORMAT);
 215                                 break;
 216                         default:
 217                                 DRM_ERROR("Unknown media bus format %d\n",
 218                                           bus_format);
 219                                 break;
 220                         }
 221                 }
 222
 223                 if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
 224                         dpi_c |= DPI_PIXEL_CLK_INVERT;
 225
 226                 if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
 227                         dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
 228         } else {
 229                 /* Default to 24bit if no connector found. */
 230                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
 231         }
 232
 233         if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 234                 dpi_c |= DPI_HSYNC_INVERT;
 235         else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
 236                 dpi_c |= DPI_HSYNC_DISABLE;
 237
 238         if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 239                 dpi_c |= DPI_VSYNC_INVERT;
 240         else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
 241                 dpi_c |= DPI_VSYNC_DISABLE;
 242
 243         DPI_WRITE(DPI_C, dpi_c);
 244
 245         ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
 246         if (ret)
 247                 DRM_ERROR("Failed to set clock rate: %d\n", ret);
 248
 249         ret = clk_prepare_enable(dpi->pixel_clock);
 250         if (ret)
 251                 DRM_ERROR("Failed to set clock rate: %d\n", ret);
 252 }
 253
 254 static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
 255                                                        const struct drm_display_mode *mode)
 256 {
 257         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 258                 return MODE_NO_INTERLACE;
 259
 260         return MODE_OK;
 261 }
 262
 263 static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
 264         .disable = vc4_dpi_encoder_disable,
 265         .enable = vc4_dpi_encoder_enable,
 266         .mode_valid = vc4_dpi_encoder_mode_valid,
 267 };
 268
 269 static const struct of_device_id vc4_dpi_dt_match[] = {
 270         { .compatible = "brcm,bcm2835-dpi", .data = NULL },
 271         {}
 272 };
 273
 274 /* Sets up the next link in the display chain, whether it's a panel or
 275  * a bridge.
 276  */
 277 static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
 278 {
 279         struct device *dev = &dpi->pdev->dev;
 280         struct drm_panel *panel;
 281         struct drm_bridge *bridge;
 282         int ret;
 283
 284         ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
 285                                           &panel, &bridge);
 286         if (ret) {
 287                 /* If nothing was connected in the DT, that's not an
 288                  * error.
 289                  */
 290                 if (ret == -ENODEV)
 291                         return 0;
 292                 else
 293                         return ret;
 294         }
 295
 296         if (panel)
 297                 bridge = drm_panel_bridge_add(panel, DRM_MODE_CONNECTOR_DPI);
 298
 299         return drm_bridge_attach(dpi->encoder, bridge, NULL);
 300 }
 301
 302 static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
 303 {
 304         struct platform_device *pdev = to_platform_device(dev);
 305         struct drm_device *drm = dev_get_drvdata(master);
 306         struct vc4_dev *vc4 = to_vc4_dev(drm);
 307         struct vc4_dpi *dpi;
 308         struct vc4_dpi_encoder *vc4_dpi_encoder;
 309         int ret;
 310
 311         dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
 312         if (!dpi)
 313                 return -ENOMEM;
 314
 315         vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
 316                                        GFP_KERNEL);
 317         if (!vc4_dpi_encoder)
 318                 return -ENOMEM;
 319         vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
 320         vc4_dpi_encoder->dpi = dpi;
 321         dpi->encoder = &vc4_dpi_encoder->base.base;
 322
 323         dpi->pdev = pdev;
 324         dpi->regs = vc4_ioremap_regs(pdev, 0);
 325         if (IS_ERR(dpi->regs))
 326                 return PTR_ERR(dpi->regs);
 327
 328         if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
 329                 dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
 330                         DPI_READ(DPI_ID), DPI_ID_VALUE);
 331                 return -ENODEV;
 332         }
 333
 334         dpi->core_clock = devm_clk_get(dev, "core");
 335         if (IS_ERR(dpi->core_clock)) {
 336                 ret = PTR_ERR(dpi->core_clock);
 337                 if (ret != -EPROBE_DEFER)
 338                         DRM_ERROR("Failed to get core clock: %d\n", ret);
 339                 return ret;
 340         }
 341         dpi->pixel_clock = devm_clk_get(dev, "pixel");
 342         if (IS_ERR(dpi->pixel_clock)) {
 343                 ret = PTR_ERR(dpi->pixel_clock);
 344                 if (ret != -EPROBE_DEFER)
 345                         DRM_ERROR("Failed to get pixel clock: %d\n", ret);
 346                 return ret;
 347         }
 348
 349         ret = clk_prepare_enable(dpi->core_clock);
 350         if (ret)
 351                 DRM_ERROR("Failed to turn on core clock: %d\n", ret);
 352
 353         drm_encoder_init(drm, dpi->encoder, &vc4_dpi_encoder_funcs,
 354                          DRM_MODE_ENCODER_DPI, NULL);
 355         drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);
 356
 357         ret = vc4_dpi_init_bridge(dpi);
 358         if (ret)
 359                 goto err_destroy_encoder;
 360
 361         dev_set_drvdata(dev, dpi);
 362
 363         vc4->dpi = dpi;
 364
 365         return 0;
 366
 367 err_destroy_encoder:
 368         drm_encoder_cleanup(dpi->encoder);
 369         clk_disable_unprepare(dpi->core_clock);
 370         return ret;
 371 }
 372
 373 static void vc4_dpi_unbind(struct device *dev, struct device *master,
 374                            void *data)
 375 {
 376         struct drm_device *drm = dev_get_drvdata(master);
 377         struct vc4_dev *vc4 = to_vc4_dev(drm);
 378         struct vc4_dpi *dpi = dev_get_drvdata(dev);
 379
 380         drm_of_panel_bridge_remove(dev->of_node, 0, 0);
 381
 382         drm_encoder_cleanup(dpi->encoder);
 383
 384         clk_disable_unprepare(dpi->core_clock);
 385
 386         vc4->dpi = NULL;
 387 }
 388
 389 static const struct component_ops vc4_dpi_ops = {
 390         .bind   = vc4_dpi_bind,
 391         .unbind = vc4_dpi_unbind,
 392 };
 393
 394 static int vc4_dpi_dev_probe(struct platform_device *pdev)
 395 {
 396         return component_add(&pdev->dev, &vc4_dpi_ops);
 397 }
 398
 399 static int vc4_dpi_dev_remove(struct platform_device *pdev)
 400 {
 401         component_del(&pdev->dev, &vc4_dpi_ops);
 402         return 0;
 403 }
 404
 405 struct platform_driver vc4_dpi_driver = {
 406         .probe = vc4_dpi_dev_probe,
 407         .remove = vc4_dpi_dev_remove,
 408         .driver = {
 409                 .name = "vc4_dpi",
 410                 .of_match_table = vc4_dpi_dt_match,
 411         },
 412 };