drivers/gpu/drm/virtio/virtgpu_ioctl.c

   1 /*
   2  * Copyright (C) 2015 Red Hat, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Authors:
   6  *    Dave Airlie
   7  *    Alon Levy
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a
  10  * copy of this software and associated documentation files (the "Software"),
  11  * to deal in the Software without restriction, including without limitation
  12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13  * and/or sell copies of the Software, and to permit persons to whom the
  14  * Software is furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included in
  17  * all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25  * OTHER DEALINGS IN THE SOFTWARE.
  26  */
  27
  28 #include <drm/drmP.h>
  29 #include "virtgpu_drv.h"
  30 #include <drm/virtgpu_drm.h>
  31 #include "ttm/ttm_execbuf_util.h"
  32
  33 static void convert_to_hw_box(struct virtio_gpu_box *dst,
  34                               const struct drm_virtgpu_3d_box *src)
  35 {
  36         dst->x = cpu_to_le32(src->x);
  37         dst->y = cpu_to_le32(src->y);
  38         dst->z = cpu_to_le32(src->z);
  39         dst->w = cpu_to_le32(src->w);
  40         dst->h = cpu_to_le32(src->h);
  41         dst->d = cpu_to_le32(src->d);
  42 }
  43
  44 static int virtio_gpu_map_ioctl(struct drm_device *dev, void *data,
  45                                 struct drm_file *file_priv)
  46 {
  47         struct virtio_gpu_device *vgdev = dev->dev_private;
  48         struct drm_virtgpu_map *virtio_gpu_map = data;
  49
  50         return virtio_gpu_mode_dumb_mmap(file_priv, vgdev->ddev,
  51                                          virtio_gpu_map->handle,
  52                                          &virtio_gpu_map->offset);
  53 }
  54
  55 static int virtio_gpu_object_list_validate(struct ww_acquire_ctx *ticket,
  56                                            struct list_head *head)
  57 {
  58         struct ttm_validate_buffer *buf;
  59         struct ttm_buffer_object *bo;
  60         struct virtio_gpu_object *qobj;
  61         int ret;
  62
  63         ret = ttm_eu_reserve_buffers(ticket, head, true, NULL);
  64         if (ret != 0)
  65                 return ret;
  66
  67         list_for_each_entry(buf, head, head) {
  68                 bo = buf->bo;
  69                 qobj = container_of(bo, struct virtio_gpu_object, tbo);
  70                 ret = ttm_bo_validate(bo, &qobj->placement, false, false);
  71                 if (ret) {
  72                         ttm_eu_backoff_reservation(ticket, head);
  73                         return ret;
  74                 }
  75         }
  76         return 0;
  77 }
  78
  79 static void virtio_gpu_unref_list(struct list_head *head)
  80 {
  81         struct ttm_validate_buffer *buf;
  82         struct ttm_buffer_object *bo;
  83         struct virtio_gpu_object *qobj;
  84         list_for_each_entry(buf, head, head) {
  85                 bo = buf->bo;
  86                 qobj = container_of(bo, struct virtio_gpu_object, tbo);
  87
  88                 drm_gem_object_unreference_unlocked(&qobj->gem_base);
  89         }
  90 }
  91
  92 /*
  93  * Usage of execbuffer:
  94  * Relocations need to take into account the full VIRTIO_GPUDrawable size.
  95  * However, the command as passed from user space must *not* contain the initial
  96  * VIRTIO_GPUReleaseInfo struct (first XXX bytes)
  97  */
  98 static int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data,
  99                                  struct drm_file *drm_file)
 100 {
 101         struct drm_virtgpu_execbuffer *exbuf = data;
 102         struct virtio_gpu_device *vgdev = dev->dev_private;
 103         struct virtio_gpu_fpriv *vfpriv = drm_file->driver_priv;
 104         struct drm_gem_object *gobj;
 105         struct virtio_gpu_fence *fence;
 106         struct virtio_gpu_object *qobj;
 107         int ret;
 108         uint32_t *bo_handles = NULL;
 109         void __user *user_bo_handles = NULL;
 110         struct list_head validate_list;
 111         struct ttm_validate_buffer *buflist = NULL;
 112         int i;
 113         struct ww_acquire_ctx ticket;
 114         void *buf;
 115
 116         if (vgdev->has_virgl_3d == false)
 117                 return -ENOSYS;
 118
 119         INIT_LIST_HEAD(&validate_list);
 120         if (exbuf->num_bo_handles) {
 121
 122                 bo_handles = drm_malloc_ab(exbuf->num_bo_handles,
 123                                            sizeof(uint32_t));
 124                 buflist = drm_calloc_large(exbuf->num_bo_handles,
 125                                            sizeof(struct ttm_validate_buffer));
 126                 if (!bo_handles || !buflist) {
 127                         drm_free_large(bo_handles);
 128                         drm_free_large(buflist);
 129                         return -ENOMEM;
 130                 }
 131
 132                 user_bo_handles = (void __user *)(uintptr_t)exbuf->bo_handles;
 133                 if (copy_from_user(bo_handles, user_bo_handles,
 134                                    exbuf->num_bo_handles * sizeof(uint32_t))) {
 135                         ret = -EFAULT;
 136                         drm_free_large(bo_handles);
 137                         drm_free_large(buflist);
 138                         return ret;
 139                 }
 140
 141                 for (i = 0; i < exbuf->num_bo_handles; i++) {
 142                         gobj = drm_gem_object_lookup(drm_file, bo_handles[i]);
 143                         if (!gobj) {
 144                                 drm_free_large(bo_handles);
 145                                 drm_free_large(buflist);
 146                                 return -ENOENT;
 147                         }
 148
 149                         qobj = gem_to_virtio_gpu_obj(gobj);
 150                         buflist[i].bo = &qobj->tbo;
 151
 152                         list_add(&buflist[i].head, &validate_list);
 153                 }
 154                 drm_free_large(bo_handles);
 155         }
 156
 157         ret = virtio_gpu_object_list_validate(&ticket, &validate_list);
 158         if (ret)
 159                 goto out_free;
 160
 161         buf = memdup_user((void __user *)(uintptr_t)exbuf->command,
 162                           exbuf->size);
 163         if (IS_ERR(buf)) {
 164                 ret = PTR_ERR(buf);
 165                 goto out_unresv;
 166         }
 167         virtio_gpu_cmd_submit(vgdev, buf, exbuf->size,
 168                               vfpriv->ctx_id, &fence);
 169
 170         ttm_eu_fence_buffer_objects(&ticket, &validate_list, &fence->f);
 171
 172         /* fence the command bo */
 173         virtio_gpu_unref_list(&validate_list);
 174         drm_free_large(buflist);
 175         fence_put(&fence->f);
 176         return 0;
 177
 178 out_unresv:
 179         ttm_eu_backoff_reservation(&ticket, &validate_list);
 180 out_free:
 181         virtio_gpu_unref_list(&validate_list);
 182         drm_free_large(buflist);
 183         return ret;
 184 }
 185
 186 static int virtio_gpu_getparam_ioctl(struct drm_device *dev, void *data,
 187                                      struct drm_file *file_priv)
 188 {
 189         struct virtio_gpu_device *vgdev = dev->dev_private;
 190         struct drm_virtgpu_getparam *param = data;
 191         int value;
 192
 193         switch (param->param) {
 194         case VIRTGPU_PARAM_3D_FEATURES:
 195                 value = vgdev->has_virgl_3d == true ? 1 : 0;
 196                 break;
 197         case VIRTGPU_PARAM_CAPSET_QUERY_FIX:
 198                 value = 1;
 199                 break;
 200         default:
 201                 return -EINVAL;
 202         }
 203         if (copy_to_user((void __user *)(unsigned long)param->value,
 204                          &value, sizeof(int))) {
 205                 return -EFAULT;
 206         }
 207         return 0;
 208 }
 209
 210 static int virtio_gpu_resource_create_ioctl(struct drm_device *dev, void *data,
 211                                             struct drm_file *file_priv)
 212 {
 213         struct virtio_gpu_device *vgdev = dev->dev_private;
 214         struct drm_virtgpu_resource_create *rc = data;
 215         int ret;
 216         uint32_t res_id;
 217         struct virtio_gpu_object *qobj;
 218         struct drm_gem_object *obj;
 219         uint32_t handle = 0;
 220         uint32_t size;
 221         struct list_head validate_list;
 222         struct ttm_validate_buffer mainbuf;
 223         struct virtio_gpu_fence *fence = NULL;
 224         struct ww_acquire_ctx ticket;
 225         struct virtio_gpu_resource_create_3d rc_3d;
 226
 227         if (vgdev->has_virgl_3d == false) {
 228                 if (rc->depth > 1)
 229                         return -EINVAL;
 230                 if (rc->nr_samples > 1)
 231                         return -EINVAL;
 232                 if (rc->last_level > 1)
 233                         return -EINVAL;
 234                 if (rc->target != 2)
 235                         return -EINVAL;
 236                 if (rc->array_size > 1)
 237                         return -EINVAL;
 238         }
 239
 240         INIT_LIST_HEAD(&validate_list);
 241         memset(&mainbuf, 0, sizeof(struct ttm_validate_buffer));
 242
 243         virtio_gpu_resource_id_get(vgdev, &res_id);
 244
 245         size = rc->size;
 246
 247         /* allocate a single page size object */
 248         if (size == 0)
 249                 size = PAGE_SIZE;
 250
 251         qobj = virtio_gpu_alloc_object(dev, size, false, false);
 252         if (IS_ERR(qobj)) {
 253                 ret = PTR_ERR(qobj);
 254                 goto fail_id;
 255         }
 256         obj = &qobj->gem_base;
 257
 258         if (!vgdev->has_virgl_3d) {
 259                 virtio_gpu_cmd_create_resource(vgdev, res_id, rc->format,
 260                                                rc->width, rc->height);
 261
 262                 ret = virtio_gpu_object_attach(vgdev, qobj, res_id, NULL);
 263         } else {
 264                 /* use a gem reference since unref list undoes them */
 265                 drm_gem_object_reference(&qobj->gem_base);
 266                 mainbuf.bo = &qobj->tbo;
 267                 list_add(&mainbuf.head, &validate_list);
 268
 269                 ret = virtio_gpu_object_list_validate(&ticket, &validate_list);
 270                 if (ret) {
 271                         DRM_DEBUG("failed to validate\n");
 272                         goto fail_unref;
 273                 }
 274
 275                 rc_3d.resource_id = cpu_to_le32(res_id);
 276                 rc_3d.target = cpu_to_le32(rc->target);
 277                 rc_3d.format = cpu_to_le32(rc->format);
 278                 rc_3d.bind = cpu_to_le32(rc->bind);
 279                 rc_3d.width = cpu_to_le32(rc->width);
 280                 rc_3d.height = cpu_to_le32(rc->height);
 281                 rc_3d.depth = cpu_to_le32(rc->depth);
 282                 rc_3d.array_size = cpu_to_le32(rc->array_size);
 283                 rc_3d.last_level = cpu_to_le32(rc->last_level);
 284                 rc_3d.nr_samples = cpu_to_le32(rc->nr_samples);
 285                 rc_3d.flags = cpu_to_le32(rc->flags);
 286
 287                 virtio_gpu_cmd_resource_create_3d(vgdev, &rc_3d, NULL);
 288                 ret = virtio_gpu_object_attach(vgdev, qobj, res_id, &fence);
 289                 if (ret) {
 290                         ttm_eu_backoff_reservation(&ticket, &validate_list);
 291                         goto fail_unref;
 292                 }
 293                 ttm_eu_fence_buffer_objects(&ticket, &validate_list, &fence->f);
 294         }
 295
 296         qobj->hw_res_handle = res_id;
 297
 298         ret = drm_gem_handle_create(file_priv, obj, &handle);
 299         if (ret) {
 300
 301                 drm_gem_object_release(obj);
 302                 if (vgdev->has_virgl_3d) {
 303                         virtio_gpu_unref_list(&validate_list);
 304                         fence_put(&fence->f);
 305                 }
 306                 return ret;
 307         }
 308         drm_gem_object_unreference_unlocked(obj);
 309
 310         rc->res_handle = res_id; /* similiar to a VM address */
 311         rc->bo_handle = handle;
 312
 313         if (vgdev->has_virgl_3d) {
 314                 virtio_gpu_unref_list(&validate_list);
 315                 fence_put(&fence->f);
 316         }
 317         return 0;
 318 fail_unref:
 319         if (vgdev->has_virgl_3d) {
 320                 virtio_gpu_unref_list(&validate_list);
 321                 fence_put(&fence->f);
 322         }
 323 //fail_obj:
 324 //      drm_gem_object_handle_unreference_unlocked(obj);
 325 fail_id:
 326         virtio_gpu_resource_id_put(vgdev, res_id);
 327         return ret;
 328 }
 329
 330 static int virtio_gpu_resource_info_ioctl(struct drm_device *dev, void *data,
 331                                           struct drm_file *file_priv)
 332 {
 333         struct drm_virtgpu_resource_info *ri = data;
 334         struct drm_gem_object *gobj = NULL;
 335         struct virtio_gpu_object *qobj = NULL;
 336
 337         gobj = drm_gem_object_lookup(file_priv, ri->bo_handle);
 338         if (gobj == NULL)
 339                 return -ENOENT;
 340
 341         qobj = gem_to_virtio_gpu_obj(gobj);
 342
 343         ri->size = qobj->gem_base.size;
 344         ri->res_handle = qobj->hw_res_handle;
 345         drm_gem_object_unreference_unlocked(gobj);
 346         return 0;
 347 }
 348
 349 static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
 350                                                void *data,
 351                                                struct drm_file *file)
 352 {
 353         struct virtio_gpu_device *vgdev = dev->dev_private;
 354         struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 355         struct drm_virtgpu_3d_transfer_from_host *args = data;
 356         struct drm_gem_object *gobj = NULL;
 357         struct virtio_gpu_object *qobj = NULL;
 358         struct virtio_gpu_fence *fence;
 359         int ret;
 360         u32 offset = args->offset;
 361         struct virtio_gpu_box box;
 362
 363         if (vgdev->has_virgl_3d == false)
 364                 return -ENOSYS;
 365
 366         gobj = drm_gem_object_lookup(file, args->bo_handle);
 367         if (gobj == NULL)
 368                 return -ENOENT;
 369
 370         qobj = gem_to_virtio_gpu_obj(gobj);
 371
 372         ret = virtio_gpu_object_reserve(qobj, false);
 373         if (ret)
 374                 goto out;
 375
 376         ret = ttm_bo_validate(&qobj->tbo, &qobj->placement,
 377                               true, false);
 378         if (unlikely(ret))
 379                 goto out_unres;
 380
 381         convert_to_hw_box(&box, &args->box);
 382         virtio_gpu_cmd_transfer_from_host_3d
 383                 (vgdev, qobj->hw_res_handle,
 384                  vfpriv->ctx_id, offset, args->level,
 385                  &box, &fence);
 386         reservation_object_add_excl_fence(qobj->tbo.resv,
 387                                           &fence->f);
 388
 389         fence_put(&fence->f);
 390 out_unres:
 391         virtio_gpu_object_unreserve(qobj);
 392 out:
 393         drm_gem_object_unreference_unlocked(gobj);
 394         return ret;
 395 }
 396
 397 static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data,
 398                                              struct drm_file *file)
 399 {
 400         struct virtio_gpu_device *vgdev = dev->dev_private;
 401         struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 402         struct drm_virtgpu_3d_transfer_to_host *args = data;
 403         struct drm_gem_object *gobj = NULL;
 404         struct virtio_gpu_object *qobj = NULL;
 405         struct virtio_gpu_fence *fence;
 406         struct virtio_gpu_box box;
 407         int ret;
 408         u32 offset = args->offset;
 409
 410         gobj = drm_gem_object_lookup(file, args->bo_handle);
 411         if (gobj == NULL)
 412                 return -ENOENT;
 413
 414         qobj = gem_to_virtio_gpu_obj(gobj);
 415
 416         ret = virtio_gpu_object_reserve(qobj, false);
 417         if (ret)
 418                 goto out;
 419
 420         ret = ttm_bo_validate(&qobj->tbo, &qobj->placement,
 421                               true, false);
 422         if (unlikely(ret))
 423                 goto out_unres;
 424
 425         convert_to_hw_box(&box, &args->box);
 426         if (!vgdev->has_virgl_3d) {
 427                 virtio_gpu_cmd_transfer_to_host_2d
 428                         (vgdev, qobj->hw_res_handle, offset,
 429                          box.w, box.h, box.x, box.y, NULL);
 430         } else {
 431                 virtio_gpu_cmd_transfer_to_host_3d
 432                         (vgdev, qobj->hw_res_handle,
 433                          vfpriv ? vfpriv->ctx_id : 0, offset,
 434                          args->level, &box, &fence);
 435                 reservation_object_add_excl_fence(qobj->tbo.resv,
 436                                                   &fence->f);
 437                 fence_put(&fence->f);
 438         }
 439
 440 out_unres:
 441         virtio_gpu_object_unreserve(qobj);
 442 out:
 443         drm_gem_object_unreference_unlocked(gobj);
 444         return ret;
 445 }
 446
 447 static int virtio_gpu_wait_ioctl(struct drm_device *dev, void *data,
 448                             struct drm_file *file)
 449 {
 450         struct drm_virtgpu_3d_wait *args = data;
 451         struct drm_gem_object *gobj = NULL;
 452         struct virtio_gpu_object *qobj = NULL;
 453         int ret;
 454         bool nowait = false;
 455
 456         gobj = drm_gem_object_lookup(file, args->handle);
 457         if (gobj == NULL)
 458                 return -ENOENT;
 459
 460         qobj = gem_to_virtio_gpu_obj(gobj);
 461
 462         if (args->flags & VIRTGPU_WAIT_NOWAIT)
 463                 nowait = true;
 464         ret = virtio_gpu_object_wait(qobj, nowait);
 465
 466         drm_gem_object_unreference_unlocked(gobj);
 467         return ret;
 468 }
 469
 470 static int virtio_gpu_get_caps_ioctl(struct drm_device *dev,
 471                                 void *data, struct drm_file *file)
 472 {
 473         struct virtio_gpu_device *vgdev = dev->dev_private;
 474         struct drm_virtgpu_get_caps *args = data;
 475         unsigned size, host_caps_size;
 476         int i;
 477         int found_valid = -1;
 478         int ret;
 479         struct virtio_gpu_drv_cap_cache *cache_ent;
 480         void *ptr;
 481         if (vgdev->num_capsets == 0)
 482                 return -ENOSYS;
 483
 484         /* don't allow userspace to pass 0 */
 485         if (args->size == 0)
 486                 return -EINVAL;
 487
 488         spin_lock(&vgdev->display_info_lock);
 489         for (i = 0; i < vgdev->num_capsets; i++) {
 490                 if (vgdev->capsets[i].id == args->cap_set_id) {
 491                         if (vgdev->capsets[i].max_version >= args->cap_set_ver) {
 492                                 found_valid = i;
 493                                 break;
 494                         }
 495                 }
 496         }
 497
 498         if (found_valid == -1) {
 499                 spin_unlock(&vgdev->display_info_lock);
 500                 return -EINVAL;
 501         }
 502
 503         host_caps_size = vgdev->capsets[found_valid].max_size;
 504         /* only copy to user the minimum of the host caps size or the guest caps size */
 505         size = min(args->size, host_caps_size);
 506
 507         list_for_each_entry(cache_ent, &vgdev->cap_cache, head) {
 508                 if (cache_ent->id == args->cap_set_id &&
 509                     cache_ent->version == args->cap_set_ver) {
 510                         ptr = cache_ent->caps_cache;
 511                         spin_unlock(&vgdev->display_info_lock);
 512                         goto copy_exit;
 513                 }
 514         }
 515         spin_unlock(&vgdev->display_info_lock);
 516
 517         /* not in cache - need to talk to hw */
 518         virtio_gpu_cmd_get_capset(vgdev, found_valid, args->cap_set_ver,
 519                                   &cache_ent);
 520
 521         ret = wait_event_timeout(vgdev->resp_wq,
 522                                  atomic_read(&cache_ent->is_valid), 5 * HZ);
 523
 524         /* is_valid check must proceed before copy of the cache entry. */
 525         smp_rmb();
 526
 527         ptr = cache_ent->caps_cache;
 528
 529 copy_exit:
 530         if (copy_to_user((void __user *)(unsigned long)args->addr, ptr, size))
 531                 return -EFAULT;
 532
 533         return 0;
 534 }
 535
 536 struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS] = {
 537         DRM_IOCTL_DEF_DRV(VIRTGPU_MAP, virtio_gpu_map_ioctl,
 538                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 539
 540         DRM_IOCTL_DEF_DRV(VIRTGPU_EXECBUFFER, virtio_gpu_execbuffer_ioctl,
 541                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 542
 543         DRM_IOCTL_DEF_DRV(VIRTGPU_GETPARAM, virtio_gpu_getparam_ioctl,
 544                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 545
 546         DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_CREATE,
 547                           virtio_gpu_resource_create_ioctl,
 548                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 549
 550         DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_INFO, virtio_gpu_resource_info_ioctl,
 551                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 552
 553         /* make transfer async to the main ring? - no sure, can we
 554            thread these in the underlying GL */
 555         DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_FROM_HOST,
 556                           virtio_gpu_transfer_from_host_ioctl,
 557                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 558         DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_TO_HOST,
 559                           virtio_gpu_transfer_to_host_ioctl,
 560                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 561
 562         DRM_IOCTL_DEF_DRV(VIRTGPU_WAIT, virtio_gpu_wait_ioctl,
 563                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 564
 565         DRM_IOCTL_DEF_DRV(VIRTGPU_GET_CAPS, virtio_gpu_get_caps_ioctl,
 566                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 567 };