GNU Linux-libre 4.14.266-gnu1
[releases.git] / drivers / gpu / drm / zte / zx_hdmi.c
1 /*
2  * Copyright 2016 Linaro Ltd.
3  * Copyright 2016 ZTE Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  */
10
11 #include <linux/clk.h>
12 #include <linux/component.h>
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/hdmi.h>
16 #include <linux/irq.h>
17 #include <linux/mfd/syscon.h>
18 #include <linux/module.h>
19 #include <linux/mutex.h>
20 #include <linux/of_device.h>
21
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <drm/drm_edid.h>
25 #include <drm/drm_of.h>
26 #include <drm/drmP.h>
27
28 #include <sound/hdmi-codec.h>
29
30 #include "zx_hdmi_regs.h"
31 #include "zx_vou.h"
32
33 #define ZX_HDMI_INFOFRAME_SIZE          31
34 #define DDC_SEGMENT_ADDR                0x30
35
36 struct zx_hdmi_i2c {
37         struct i2c_adapter adap;
38         struct mutex lock;
39 };
40
41 struct zx_hdmi {
42         struct drm_connector connector;
43         struct drm_encoder encoder;
44         struct zx_hdmi_i2c *ddc;
45         struct device *dev;
46         struct drm_device *drm;
47         void __iomem *mmio;
48         struct clk *cec_clk;
49         struct clk *osc_clk;
50         struct clk *xclk;
51         bool sink_is_hdmi;
52         bool sink_has_audio;
53         struct platform_device *audio_pdev;
54 };
55
56 #define to_zx_hdmi(x) container_of(x, struct zx_hdmi, x)
57
58 static inline u8 hdmi_readb(struct zx_hdmi *hdmi, u16 offset)
59 {
60         return readl_relaxed(hdmi->mmio + offset * 4);
61 }
62
63 static inline void hdmi_writeb(struct zx_hdmi *hdmi, u16 offset, u8 val)
64 {
65         writel_relaxed(val, hdmi->mmio + offset * 4);
66 }
67
68 static inline void hdmi_writeb_mask(struct zx_hdmi *hdmi, u16 offset,
69                                     u8 mask, u8 val)
70 {
71         u8 tmp;
72
73         tmp = hdmi_readb(hdmi, offset);
74         tmp = (tmp & ~mask) | (val & mask);
75         hdmi_writeb(hdmi, offset, tmp);
76 }
77
78 static int zx_hdmi_infoframe_trans(struct zx_hdmi *hdmi,
79                                    union hdmi_infoframe *frame, u8 fsel)
80 {
81         u8 buffer[ZX_HDMI_INFOFRAME_SIZE];
82         int num;
83         int i;
84
85         hdmi_writeb(hdmi, TPI_INFO_FSEL, fsel);
86
87         num = hdmi_infoframe_pack(frame, buffer, ZX_HDMI_INFOFRAME_SIZE);
88         if (num < 0) {
89                 DRM_DEV_ERROR(hdmi->dev, "failed to pack infoframe: %d\n", num);
90                 return num;
91         }
92
93         for (i = 0; i < num; i++)
94                 hdmi_writeb(hdmi, TPI_INFO_B0 + i, buffer[i]);
95
96         hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_RPT,
97                          TPI_INFO_TRANS_RPT);
98         hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_EN,
99                          TPI_INFO_TRANS_EN);
100
101         return num;
102 }
103
104 static int zx_hdmi_config_video_vsi(struct zx_hdmi *hdmi,
105                                     struct drm_display_mode *mode)
106 {
107         union hdmi_infoframe frame;
108         int ret;
109
110         ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi,
111                                                           mode);
112         if (ret) {
113                 DRM_DEV_ERROR(hdmi->dev, "failed to get vendor infoframe: %d\n",
114                               ret);
115                 return ret;
116         }
117
118         return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_VSIF);
119 }
120
121 static int zx_hdmi_config_video_avi(struct zx_hdmi *hdmi,
122                                     struct drm_display_mode *mode)
123 {
124         union hdmi_infoframe frame;
125         int ret;
126
127         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, mode, false);
128         if (ret) {
129                 DRM_DEV_ERROR(hdmi->dev, "failed to get avi infoframe: %d\n",
130                               ret);
131                 return ret;
132         }
133
134         /* We always use YUV444 for HDMI output. */
135         frame.avi.colorspace = HDMI_COLORSPACE_YUV444;
136
137         return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AVI);
138 }
139
140 static void zx_hdmi_encoder_mode_set(struct drm_encoder *encoder,
141                                      struct drm_display_mode *mode,
142                                      struct drm_display_mode *adj_mode)
143 {
144         struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
145
146         if (hdmi->sink_is_hdmi) {
147                 zx_hdmi_config_video_avi(hdmi, mode);
148                 zx_hdmi_config_video_vsi(hdmi, mode);
149         }
150 }
151
152 static void zx_hdmi_phy_start(struct zx_hdmi *hdmi)
153 {
154         /* Copy from ZTE BSP code */
155         hdmi_writeb(hdmi, 0x222, 0x0);
156         hdmi_writeb(hdmi, 0x224, 0x4);
157         hdmi_writeb(hdmi, 0x909, 0x0);
158         hdmi_writeb(hdmi, 0x7b0, 0x90);
159         hdmi_writeb(hdmi, 0x7b1, 0x00);
160         hdmi_writeb(hdmi, 0x7b2, 0xa7);
161         hdmi_writeb(hdmi, 0x7b8, 0xaa);
162         hdmi_writeb(hdmi, 0x7b2, 0xa7);
163         hdmi_writeb(hdmi, 0x7b3, 0x0f);
164         hdmi_writeb(hdmi, 0x7b4, 0x0f);
165         hdmi_writeb(hdmi, 0x7b5, 0x55);
166         hdmi_writeb(hdmi, 0x7b7, 0x03);
167         hdmi_writeb(hdmi, 0x7b9, 0x12);
168         hdmi_writeb(hdmi, 0x7ba, 0x32);
169         hdmi_writeb(hdmi, 0x7bc, 0x68);
170         hdmi_writeb(hdmi, 0x7be, 0x40);
171         hdmi_writeb(hdmi, 0x7bf, 0x84);
172         hdmi_writeb(hdmi, 0x7c1, 0x0f);
173         hdmi_writeb(hdmi, 0x7c8, 0x02);
174         hdmi_writeb(hdmi, 0x7c9, 0x03);
175         hdmi_writeb(hdmi, 0x7ca, 0x40);
176         hdmi_writeb(hdmi, 0x7dc, 0x31);
177         hdmi_writeb(hdmi, 0x7e2, 0x04);
178         hdmi_writeb(hdmi, 0x7e0, 0x06);
179         hdmi_writeb(hdmi, 0x7cb, 0x68);
180         hdmi_writeb(hdmi, 0x7f9, 0x02);
181         hdmi_writeb(hdmi, 0x7b6, 0x02);
182         hdmi_writeb(hdmi, 0x7f3, 0x0);
183 }
184
185 static void zx_hdmi_hw_enable(struct zx_hdmi *hdmi)
186 {
187         /* Enable pclk */
188         hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, CLKPWD_PDIDCK);
189
190         /* Enable HDMI for TX */
191         hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, FUNC_HDMI_EN);
192
193         /* Enable deep color packet */
194         hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);
195
196         /* Enable HDMI/MHL mode for output */
197         hdmi_writeb_mask(hdmi, TEST_TXCTRL, TEST_TXCTRL_HDMI_MODE,
198                          TEST_TXCTRL_HDMI_MODE);
199
200         /* Configure reg_qc_sel */
201         hdmi_writeb(hdmi, HDMICTL4, 0x3);
202
203         /* Enable interrupt */
204         hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT,
205                          INTR1_MONITOR_DETECT);
206
207         /* Start up phy */
208         zx_hdmi_phy_start(hdmi);
209 }
210
211 static void zx_hdmi_hw_disable(struct zx_hdmi *hdmi)
212 {
213         /* Disable interrupt */
214         hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT, 0);
215
216         /* Disable deep color packet */
217         hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);
218
219         /* Disable HDMI for TX */
220         hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, 0);
221
222         /* Disable pclk */
223         hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, 0);
224 }
225
226 static void zx_hdmi_encoder_enable(struct drm_encoder *encoder)
227 {
228         struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
229
230         clk_prepare_enable(hdmi->cec_clk);
231         clk_prepare_enable(hdmi->osc_clk);
232         clk_prepare_enable(hdmi->xclk);
233
234         zx_hdmi_hw_enable(hdmi);
235
236         vou_inf_enable(VOU_HDMI, encoder->crtc);
237 }
238
239 static void zx_hdmi_encoder_disable(struct drm_encoder *encoder)
240 {
241         struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
242
243         vou_inf_disable(VOU_HDMI, encoder->crtc);
244
245         zx_hdmi_hw_disable(hdmi);
246
247         clk_disable_unprepare(hdmi->xclk);
248         clk_disable_unprepare(hdmi->osc_clk);
249         clk_disable_unprepare(hdmi->cec_clk);
250 }
251
252 static const struct drm_encoder_helper_funcs zx_hdmi_encoder_helper_funcs = {
253         .enable = zx_hdmi_encoder_enable,
254         .disable = zx_hdmi_encoder_disable,
255         .mode_set = zx_hdmi_encoder_mode_set,
256 };
257
258 static const struct drm_encoder_funcs zx_hdmi_encoder_funcs = {
259         .destroy = drm_encoder_cleanup,
260 };
261
262 static int zx_hdmi_connector_get_modes(struct drm_connector *connector)
263 {
264         struct zx_hdmi *hdmi = to_zx_hdmi(connector);
265         struct edid *edid;
266         int ret;
267
268         edid = drm_get_edid(connector, &hdmi->ddc->adap);
269         if (!edid)
270                 return 0;
271
272         hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid);
273         hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
274         drm_mode_connector_update_edid_property(connector, edid);
275         ret = drm_add_edid_modes(connector, edid);
276         kfree(edid);
277
278         return ret;
279 }
280
281 static enum drm_mode_status
282 zx_hdmi_connector_mode_valid(struct drm_connector *connector,
283                              struct drm_display_mode *mode)
284 {
285         return MODE_OK;
286 }
287
288 static struct drm_connector_helper_funcs zx_hdmi_connector_helper_funcs = {
289         .get_modes = zx_hdmi_connector_get_modes,
290         .mode_valid = zx_hdmi_connector_mode_valid,
291 };
292
293 static enum drm_connector_status
294 zx_hdmi_connector_detect(struct drm_connector *connector, bool force)
295 {
296         struct zx_hdmi *hdmi = to_zx_hdmi(connector);
297
298         return (hdmi_readb(hdmi, TPI_HPD_RSEN) & TPI_HPD_CONNECTION) ?
299                 connector_status_connected : connector_status_disconnected;
300 }
301
302 static const struct drm_connector_funcs zx_hdmi_connector_funcs = {
303         .fill_modes = drm_helper_probe_single_connector_modes,
304         .detect = zx_hdmi_connector_detect,
305         .destroy = drm_connector_cleanup,
306         .reset = drm_atomic_helper_connector_reset,
307         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
308         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
309 };
310
311 static int zx_hdmi_register(struct drm_device *drm, struct zx_hdmi *hdmi)
312 {
313         struct drm_encoder *encoder = &hdmi->encoder;
314
315         encoder->possible_crtcs = VOU_CRTC_MASK;
316
317         drm_encoder_init(drm, encoder, &zx_hdmi_encoder_funcs,
318                          DRM_MODE_ENCODER_TMDS, NULL);
319         drm_encoder_helper_add(encoder, &zx_hdmi_encoder_helper_funcs);
320
321         hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD;
322
323         drm_connector_init(drm, &hdmi->connector, &zx_hdmi_connector_funcs,
324                            DRM_MODE_CONNECTOR_HDMIA);
325         drm_connector_helper_add(&hdmi->connector,
326                                  &zx_hdmi_connector_helper_funcs);
327
328         drm_mode_connector_attach_encoder(&hdmi->connector, encoder);
329
330         return 0;
331 }
332
333 static irqreturn_t zx_hdmi_irq_thread(int irq, void *dev_id)
334 {
335         struct zx_hdmi *hdmi = dev_id;
336
337         drm_helper_hpd_irq_event(hdmi->connector.dev);
338
339         return IRQ_HANDLED;
340 }
341
342 static irqreturn_t zx_hdmi_irq_handler(int irq, void *dev_id)
343 {
344         struct zx_hdmi *hdmi = dev_id;
345         u8 lstat;
346
347         lstat = hdmi_readb(hdmi, L1_INTR_STAT);
348
349         /* Monitor detect/HPD interrupt */
350         if (lstat & L1_INTR_STAT_INTR1) {
351                 u8 stat;
352
353                 stat = hdmi_readb(hdmi, INTR1_STAT);
354                 hdmi_writeb(hdmi, INTR1_STAT, stat);
355
356                 if (stat & INTR1_MONITOR_DETECT)
357                         return IRQ_WAKE_THREAD;
358         }
359
360         return IRQ_NONE;
361 }
362
363 static int zx_hdmi_audio_startup(struct device *dev, void *data)
364 {
365         struct zx_hdmi *hdmi = dev_get_drvdata(dev);
366         struct drm_encoder *encoder = &hdmi->encoder;
367
368         vou_inf_hdmi_audio_sel(encoder->crtc, VOU_HDMI_AUD_SPDIF);
369
370         return 0;
371 }
372
373 static void zx_hdmi_audio_shutdown(struct device *dev, void *data)
374 {
375         struct zx_hdmi *hdmi = dev_get_drvdata(dev);
376
377         /* Disable audio input */
378         hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, 0);
379 }
380
381 static inline int zx_hdmi_audio_get_n(unsigned int fs)
382 {
383         unsigned int n;
384
385         if (fs && (fs % 44100) == 0)
386                 n = 6272 * (fs / 44100);
387         else
388                 n = fs * 128 / 1000;
389
390         return n;
391 }
392
393 static int zx_hdmi_audio_hw_params(struct device *dev,
394                                    void *data,
395                                    struct hdmi_codec_daifmt *daifmt,
396                                    struct hdmi_codec_params *params)
397 {
398         struct zx_hdmi *hdmi = dev_get_drvdata(dev);
399         struct hdmi_audio_infoframe *cea = &params->cea;
400         union hdmi_infoframe frame;
401         int n;
402
403         /* We only support spdif for now */
404         if (daifmt->fmt != HDMI_SPDIF) {
405                 DRM_DEV_ERROR(hdmi->dev, "invalid daifmt %d\n", daifmt->fmt);
406                 return -EINVAL;
407         }
408
409         switch (params->sample_width) {
410         case 16:
411                 hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
412                                  SPDIF_SAMPLE_SIZE_16BIT);
413                 break;
414         case 20:
415                 hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
416                                  SPDIF_SAMPLE_SIZE_20BIT);
417                 break;
418         case 24:
419                 hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
420                                  SPDIF_SAMPLE_SIZE_24BIT);
421                 break;
422         default:
423                 DRM_DEV_ERROR(hdmi->dev, "invalid sample width %d\n",
424                               params->sample_width);
425                 return -EINVAL;
426         }
427
428         /* CTS is calculated by hardware, and we only need to take care of N */
429         n = zx_hdmi_audio_get_n(params->sample_rate);
430         hdmi_writeb(hdmi, N_SVAL1, n & 0xff);
431         hdmi_writeb(hdmi, N_SVAL2, (n >> 8) & 0xff);
432         hdmi_writeb(hdmi, N_SVAL3, (n >> 16) & 0xf);
433
434         /* Enable spdif mode */
435         hdmi_writeb_mask(hdmi, AUD_MODE, SPDIF_EN, SPDIF_EN);
436
437         /* Enable audio input */
438         hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, AUD_IN_EN);
439
440         memcpy(&frame.audio, cea, sizeof(*cea));
441
442         return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AUDIO);
443 }
444
445 static int zx_hdmi_audio_digital_mute(struct device *dev, void *data,
446                                       bool enable)
447 {
448         struct zx_hdmi *hdmi = dev_get_drvdata(dev);
449
450         if (enable)
451                 hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE,
452                                  TPI_AUD_MUTE);
453         else
454                 hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE, 0);
455
456         return 0;
457 }
458
459 static int zx_hdmi_audio_get_eld(struct device *dev, void *data,
460                                  uint8_t *buf, size_t len)
461 {
462         struct zx_hdmi *hdmi = dev_get_drvdata(dev);
463         struct drm_connector *connector = &hdmi->connector;
464
465         memcpy(buf, connector->eld, min(sizeof(connector->eld), len));
466
467         return 0;
468 }
469
470 static const struct hdmi_codec_ops zx_hdmi_codec_ops = {
471         .audio_startup = zx_hdmi_audio_startup,
472         .hw_params = zx_hdmi_audio_hw_params,
473         .audio_shutdown = zx_hdmi_audio_shutdown,
474         .digital_mute = zx_hdmi_audio_digital_mute,
475         .get_eld = zx_hdmi_audio_get_eld,
476 };
477
478 static struct hdmi_codec_pdata zx_hdmi_codec_pdata = {
479         .ops = &zx_hdmi_codec_ops,
480         .spdif = 1,
481 };
482
483 static int zx_hdmi_audio_register(struct zx_hdmi *hdmi)
484 {
485         struct platform_device *pdev;
486
487         pdev = platform_device_register_data(hdmi->dev, HDMI_CODEC_DRV_NAME,
488                                              PLATFORM_DEVID_AUTO,
489                                              &zx_hdmi_codec_pdata,
490                                              sizeof(zx_hdmi_codec_pdata));
491         if (IS_ERR(pdev))
492                 return PTR_ERR(pdev);
493
494         hdmi->audio_pdev = pdev;
495
496         return 0;
497 }
498
499 static int zx_hdmi_i2c_read(struct zx_hdmi *hdmi, struct i2c_msg *msg)
500 {
501         int len = msg->len;
502         u8 *buf = msg->buf;
503         int retry = 0;
504         int ret = 0;
505
506         /* Bits [9:8] of bytes */
507         hdmi_writeb(hdmi, ZX_DDC_DIN_CNT2, (len >> 8) & 0xff);
508         /* Bits [7:0] of bytes */
509         hdmi_writeb(hdmi, ZX_DDC_DIN_CNT1, len & 0xff);
510
511         /* Clear FIFO */
512         hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK, DDC_CMD_CLEAR_FIFO);
513
514         /* Kick off the read */
515         hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK,
516                          DDC_CMD_SEQUENTIAL_READ);
517
518         while (len > 0) {
519                 int cnt, i;
520
521                 /* FIFO needs some time to get ready */
522                 usleep_range(500, 1000);
523
524                 cnt = hdmi_readb(hdmi, ZX_DDC_DOUT_CNT) & DDC_DOUT_CNT_MASK;
525                 if (cnt == 0) {
526                         if (++retry > 5) {
527                                 DRM_DEV_ERROR(hdmi->dev,
528                                               "DDC FIFO read timed out!");
529                                 return -ETIMEDOUT;
530                         }
531                         continue;
532                 }
533
534                 for (i = 0; i < cnt; i++)
535                         *buf++ = hdmi_readb(hdmi, ZX_DDC_DATA);
536                 len -= cnt;
537         }
538
539         return ret;
540 }
541
542 static int zx_hdmi_i2c_write(struct zx_hdmi *hdmi, struct i2c_msg *msg)
543 {
544         /*
545          * The DDC I2C adapter is only for reading EDID data, so we assume
546          * that the write to this adapter must be the EDID data offset.
547          */
548         if ((msg->len != 1) ||
549             ((msg->addr != DDC_ADDR) && (msg->addr != DDC_SEGMENT_ADDR)))
550                 return -EINVAL;
551
552         if (msg->addr == DDC_SEGMENT_ADDR)
553                 hdmi_writeb(hdmi, ZX_DDC_SEGM, msg->addr << 1);
554         else if (msg->addr == DDC_ADDR)
555                 hdmi_writeb(hdmi, ZX_DDC_ADDR, msg->addr << 1);
556
557         hdmi_writeb(hdmi, ZX_DDC_OFFSET, msg->buf[0]);
558
559         return 0;
560 }
561
562 static int zx_hdmi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
563                             int num)
564 {
565         struct zx_hdmi *hdmi = i2c_get_adapdata(adap);
566         struct zx_hdmi_i2c *ddc = hdmi->ddc;
567         int i, ret = 0;
568
569         mutex_lock(&ddc->lock);
570
571         /* Enable DDC master access */
572         hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, HW_DDC_MASTER);
573
574         for (i = 0; i < num; i++) {
575                 DRM_DEV_DEBUG(hdmi->dev,
576                               "xfer: num: %d/%d, len: %d, flags: %#x\n",
577                               i + 1, num, msgs[i].len, msgs[i].flags);
578
579                 if (msgs[i].flags & I2C_M_RD)
580                         ret = zx_hdmi_i2c_read(hdmi, &msgs[i]);
581                 else
582                         ret = zx_hdmi_i2c_write(hdmi, &msgs[i]);
583
584                 if (ret < 0)
585                         break;
586         }
587
588         if (!ret)
589                 ret = num;
590
591         /* Disable DDC master access */
592         hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, 0);
593
594         mutex_unlock(&ddc->lock);
595
596         return ret;
597 }
598
599 static u32 zx_hdmi_i2c_func(struct i2c_adapter *adapter)
600 {
601         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
602 }
603
604 static const struct i2c_algorithm zx_hdmi_algorithm = {
605         .master_xfer    = zx_hdmi_i2c_xfer,
606         .functionality  = zx_hdmi_i2c_func,
607 };
608
609 static int zx_hdmi_ddc_register(struct zx_hdmi *hdmi)
610 {
611         struct i2c_adapter *adap;
612         struct zx_hdmi_i2c *ddc;
613         int ret;
614
615         ddc = devm_kzalloc(hdmi->dev, sizeof(*ddc), GFP_KERNEL);
616         if (!ddc)
617                 return -ENOMEM;
618
619         hdmi->ddc = ddc;
620         mutex_init(&ddc->lock);
621
622         adap = &ddc->adap;
623         adap->owner = THIS_MODULE;
624         adap->class = I2C_CLASS_DDC;
625         adap->dev.parent = hdmi->dev;
626         adap->algo = &zx_hdmi_algorithm;
627         snprintf(adap->name, sizeof(adap->name), "zx hdmi i2c");
628
629         ret = i2c_add_adapter(adap);
630         if (ret) {
631                 DRM_DEV_ERROR(hdmi->dev, "failed to add I2C adapter: %d\n",
632                               ret);
633                 return ret;
634         }
635
636         i2c_set_adapdata(adap, hdmi);
637
638         return 0;
639 }
640
641 static int zx_hdmi_bind(struct device *dev, struct device *master, void *data)
642 {
643         struct platform_device *pdev = to_platform_device(dev);
644         struct drm_device *drm = data;
645         struct resource *res;
646         struct zx_hdmi *hdmi;
647         int irq;
648         int ret;
649
650         hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
651         if (!hdmi)
652                 return -ENOMEM;
653
654         hdmi->dev = dev;
655         hdmi->drm = drm;
656
657         dev_set_drvdata(dev, hdmi);
658
659         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
660         hdmi->mmio = devm_ioremap_resource(dev, res);
661         if (IS_ERR(hdmi->mmio)) {
662                 ret = PTR_ERR(hdmi->mmio);
663                 DRM_DEV_ERROR(dev, "failed to remap hdmi region: %d\n", ret);
664                 return ret;
665         }
666
667         irq = platform_get_irq(pdev, 0);
668         if (irq < 0)
669                 return irq;
670
671         hdmi->cec_clk = devm_clk_get(hdmi->dev, "osc_cec");
672         if (IS_ERR(hdmi->cec_clk)) {
673                 ret = PTR_ERR(hdmi->cec_clk);
674                 DRM_DEV_ERROR(dev, "failed to get cec_clk: %d\n", ret);
675                 return ret;
676         }
677
678         hdmi->osc_clk = devm_clk_get(hdmi->dev, "osc_clk");
679         if (IS_ERR(hdmi->osc_clk)) {
680                 ret = PTR_ERR(hdmi->osc_clk);
681                 DRM_DEV_ERROR(dev, "failed to get osc_clk: %d\n", ret);
682                 return ret;
683         }
684
685         hdmi->xclk = devm_clk_get(hdmi->dev, "xclk");
686         if (IS_ERR(hdmi->xclk)) {
687                 ret = PTR_ERR(hdmi->xclk);
688                 DRM_DEV_ERROR(dev, "failed to get xclk: %d\n", ret);
689                 return ret;
690         }
691
692         ret = zx_hdmi_ddc_register(hdmi);
693         if (ret) {
694                 DRM_DEV_ERROR(dev, "failed to register ddc: %d\n", ret);
695                 return ret;
696         }
697
698         ret = zx_hdmi_audio_register(hdmi);
699         if (ret) {
700                 DRM_DEV_ERROR(dev, "failed to register audio: %d\n", ret);
701                 return ret;
702         }
703
704         ret = zx_hdmi_register(drm, hdmi);
705         if (ret) {
706                 DRM_DEV_ERROR(dev, "failed to register hdmi: %d\n", ret);
707                 return ret;
708         }
709
710         ret = devm_request_threaded_irq(dev, irq, zx_hdmi_irq_handler,
711                                         zx_hdmi_irq_thread, IRQF_SHARED,
712                                         dev_name(dev), hdmi);
713         if (ret) {
714                 DRM_DEV_ERROR(dev, "failed to request threaded irq: %d\n", ret);
715                 return ret;
716         }
717
718         return 0;
719 }
720
721 static void zx_hdmi_unbind(struct device *dev, struct device *master,
722                            void *data)
723 {
724         struct zx_hdmi *hdmi = dev_get_drvdata(dev);
725
726         hdmi->connector.funcs->destroy(&hdmi->connector);
727         hdmi->encoder.funcs->destroy(&hdmi->encoder);
728
729         if (hdmi->audio_pdev)
730                 platform_device_unregister(hdmi->audio_pdev);
731 }
732
733 static const struct component_ops zx_hdmi_component_ops = {
734         .bind = zx_hdmi_bind,
735         .unbind = zx_hdmi_unbind,
736 };
737
738 static int zx_hdmi_probe(struct platform_device *pdev)
739 {
740         return component_add(&pdev->dev, &zx_hdmi_component_ops);
741 }
742
743 static int zx_hdmi_remove(struct platform_device *pdev)
744 {
745         component_del(&pdev->dev, &zx_hdmi_component_ops);
746         return 0;
747 }
748
749 static const struct of_device_id zx_hdmi_of_match[] = {
750         { .compatible = "zte,zx296718-hdmi", },
751         { /* end */ },
752 };
753 MODULE_DEVICE_TABLE(of, zx_hdmi_of_match);
754
755 struct platform_driver zx_hdmi_driver = {
756         .probe = zx_hdmi_probe,
757         .remove = zx_hdmi_remove,
758         .driver = {
759                 .name = "zx-hdmi",
760                 .of_match_table = zx_hdmi_of_match,
761         },
762 };