drivers/gpu/ipu-v3/ipu-image-convert.c

   1 /*
   2  * Copyright (C) 2012-2016 Mentor Graphics Inc.
   3  *
   4  * Queued image conversion support, with tiling and rotation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; either version 2 of the License, or (at your
   9  * option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  13  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  * for more details.
  15  */
  16
  17 #include <linux/interrupt.h>
  18 #include <linux/dma-mapping.h>
  19 #include <video/imx-ipu-image-convert.h>
  20 #include "ipu-prv.h"
  21
  22 /*
  23  * The IC Resizer has a restriction that the output frame from the
  24  * resizer must be 1024 or less in both width (pixels) and height
  25  * (lines).
  26  *
  27  * The image converter attempts to split up a conversion when
  28  * the desired output (converted) frame resolution exceeds the
  29  * IC resizer limit of 1024 in either dimension.
  30  *
  31  * If either dimension of the output frame exceeds the limit, the
  32  * dimension is split into 1, 2, or 4 equal stripes, for a maximum
  33  * of 4*4 or 16 tiles. A conversion is then carried out for each
  34  * tile (but taking care to pass the full frame stride length to
  35  * the DMA channel's parameter memory!). IDMA double-buffering is used
  36  * to convert each tile back-to-back when possible (see note below
  37  * when double_buffering boolean is set).
  38  *
  39  * Note that the input frame must be split up into the same number
  40  * of tiles as the output frame.
  41  *
  42  * FIXME: at this point there is no attempt to deal with visible seams
  43  * at the tile boundaries when upscaling. The seams are caused by a reset
  44  * of the bilinear upscale interpolation when starting a new tile. The
  45  * seams are barely visible for small upscale factors, but become
  46  * increasingly visible as the upscale factor gets larger, since more
  47  * interpolated pixels get thrown out at the tile boundaries. A possilble
  48  * fix might be to overlap tiles of different sizes, but this must be done
  49  * while also maintaining the IDMAC dma buffer address alignment and 8x8 IRT
  50  * alignment restrictions of each tile.
  51  */
  52
  53 #define MAX_STRIPES_W    4
  54 #define MAX_STRIPES_H    4
  55 #define MAX_TILES (MAX_STRIPES_W * MAX_STRIPES_H)
  56
  57 #define MIN_W     16
  58 #define MIN_H     8
  59 #define MAX_W     4096
  60 #define MAX_H     4096
  61
  62 enum ipu_image_convert_type {
  63         IMAGE_CONVERT_IN = 0,
  64         IMAGE_CONVERT_OUT,
  65 };
  66
  67 struct ipu_image_convert_dma_buf {
  68         void          *virt;
  69         dma_addr_t    phys;
  70         unsigned long len;
  71 };
  72
  73 struct ipu_image_convert_dma_chan {
  74         int in;
  75         int out;
  76         int rot_in;
  77         int rot_out;
  78         int vdi_in_p;
  79         int vdi_in;
  80         int vdi_in_n;
  81 };
  82
  83 /* dimensions of one tile */
  84 struct ipu_image_tile {
  85         u32 width;
  86         u32 height;
  87         /* size and strides are in bytes */
  88         u32 size;
  89         u32 stride;
  90         u32 rot_stride;
  91         /* start Y or packed offset of this tile */
  92         u32 offset;
  93         /* offset from start to tile in U plane, for planar formats */
  94         u32 u_off;
  95         /* offset from start to tile in V plane, for planar formats */
  96         u32 v_off;
  97 };
  98
  99 struct ipu_image_convert_image {
 100         struct ipu_image base;
 101         enum ipu_image_convert_type type;
 102
 103         const struct ipu_image_pixfmt *fmt;
 104         unsigned int stride;
 105
 106         /* # of rows (horizontal stripes) if dest height is > 1024 */
 107         unsigned int num_rows;
 108         /* # of columns (vertical stripes) if dest width is > 1024 */
 109         unsigned int num_cols;
 110
 111         struct ipu_image_tile tile[MAX_TILES];
 112 };
 113
 114 struct ipu_image_pixfmt {
 115         u32     fourcc;        /* V4L2 fourcc */
 116         int     bpp;           /* total bpp */
 117         int     uv_width_dec;  /* decimation in width for U/V planes */
 118         int     uv_height_dec; /* decimation in height for U/V planes */
 119         bool    planar;        /* planar format */
 120         bool    uv_swapped;    /* U and V planes are swapped */
 121         bool    uv_packed;     /* partial planar (U and V in same plane) */
 122 };
 123
 124 struct ipu_image_convert_ctx;
 125 struct ipu_image_convert_chan;
 126 struct ipu_image_convert_priv;
 127
 128 struct ipu_image_convert_ctx {
 129         struct ipu_image_convert_chan *chan;
 130
 131         ipu_image_convert_cb_t complete;
 132         void *complete_context;
 133
 134         /* Source/destination image data and rotation mode */
 135         struct ipu_image_convert_image in;
 136         struct ipu_image_convert_image out;
 137         enum ipu_rotate_mode rot_mode;
 138
 139         /* intermediate buffer for rotation */
 140         struct ipu_image_convert_dma_buf rot_intermediate[2];
 141
 142         /* current buffer number for double buffering */
 143         int cur_buf_num;
 144
 145         bool aborting;
 146         struct completion aborted;
 147
 148         /* can we use double-buffering for this conversion operation? */
 149         bool double_buffering;
 150         /* num_rows * num_cols */
 151         unsigned int num_tiles;
 152         /* next tile to process */
 153         unsigned int next_tile;
 154         /* where to place converted tile in dest image */
 155         unsigned int out_tile_map[MAX_TILES];
 156
 157         struct list_head list;
 158 };
 159
 160 struct ipu_image_convert_chan {
 161         struct ipu_image_convert_priv *priv;
 162
 163         enum ipu_ic_task ic_task;
 164         const struct ipu_image_convert_dma_chan *dma_ch;
 165
 166         struct ipu_ic *ic;
 167         struct ipuv3_channel *in_chan;
 168         struct ipuv3_channel *out_chan;
 169         struct ipuv3_channel *rotation_in_chan;
 170         struct ipuv3_channel *rotation_out_chan;
 171
 172         /* the IPU end-of-frame irqs */
 173         int out_eof_irq;
 174         int rot_out_eof_irq;
 175
 176         spinlock_t irqlock;
 177
 178         /* list of convert contexts */
 179         struct list_head ctx_list;
 180         /* queue of conversion runs */
 181         struct list_head pending_q;
 182         /* queue of completed runs */
 183         struct list_head done_q;
 184
 185         /* the current conversion run */
 186         struct ipu_image_convert_run *current_run;
 187 };
 188
 189 struct ipu_image_convert_priv {
 190         struct ipu_image_convert_chan chan[IC_NUM_TASKS];
 191         struct ipu_soc *ipu;
 192 };
 193
 194 static const struct ipu_image_convert_dma_chan
 195 image_convert_dma_chan[IC_NUM_TASKS] = {
 196         [IC_TASK_VIEWFINDER] = {
 197                 .in = IPUV3_CHANNEL_MEM_IC_PRP_VF,
 198                 .out = IPUV3_CHANNEL_IC_PRP_VF_MEM,
 199                 .rot_in = IPUV3_CHANNEL_MEM_ROT_VF,
 200                 .rot_out = IPUV3_CHANNEL_ROT_VF_MEM,
 201                 .vdi_in_p = IPUV3_CHANNEL_MEM_VDI_PREV,
 202                 .vdi_in = IPUV3_CHANNEL_MEM_VDI_CUR,
 203                 .vdi_in_n = IPUV3_CHANNEL_MEM_VDI_NEXT,
 204         },
 205         [IC_TASK_POST_PROCESSOR] = {
 206                 .in = IPUV3_CHANNEL_MEM_IC_PP,
 207                 .out = IPUV3_CHANNEL_IC_PP_MEM,
 208                 .rot_in = IPUV3_CHANNEL_MEM_ROT_PP,
 209                 .rot_out = IPUV3_CHANNEL_ROT_PP_MEM,
 210         },
 211 };
 212
 213 static const struct ipu_image_pixfmt image_convert_formats[] = {
 214         {
 215                 .fourcc = V4L2_PIX_FMT_RGB565,
 216                 .bpp    = 16,
 217         }, {
 218                 .fourcc = V4L2_PIX_FMT_RGB24,
 219                 .bpp    = 24,
 220         }, {
 221                 .fourcc = V4L2_PIX_FMT_BGR24,
 222                 .bpp    = 24,
 223         }, {
 224                 .fourcc = V4L2_PIX_FMT_RGB32,
 225                 .bpp    = 32,
 226         }, {
 227                 .fourcc = V4L2_PIX_FMT_BGR32,
 228                 .bpp    = 32,
 229         }, {
 230                 .fourcc = V4L2_PIX_FMT_XRGB32,
 231                 .bpp    = 32,
 232         }, {
 233                 .fourcc = V4L2_PIX_FMT_XBGR32,
 234                 .bpp    = 32,
 235         }, {
 236                 .fourcc = V4L2_PIX_FMT_YUYV,
 237                 .bpp    = 16,
 238                 .uv_width_dec = 2,
 239                 .uv_height_dec = 1,
 240         }, {
 241                 .fourcc = V4L2_PIX_FMT_UYVY,
 242                 .bpp    = 16,
 243                 .uv_width_dec = 2,
 244                 .uv_height_dec = 1,
 245         }, {
 246                 .fourcc = V4L2_PIX_FMT_YUV420,
 247                 .bpp    = 12,
 248                 .planar = true,
 249                 .uv_width_dec = 2,
 250                 .uv_height_dec = 2,
 251         }, {
 252                 .fourcc = V4L2_PIX_FMT_YVU420,
 253                 .bpp    = 12,
 254                 .planar = true,
 255                 .uv_width_dec = 2,
 256                 .uv_height_dec = 2,
 257                 .uv_swapped = true,
 258         }, {
 259                 .fourcc = V4L2_PIX_FMT_NV12,
 260                 .bpp    = 12,
 261                 .planar = true,
 262                 .uv_width_dec = 2,
 263                 .uv_height_dec = 2,
 264                 .uv_packed = true,
 265         }, {
 266                 .fourcc = V4L2_PIX_FMT_YUV422P,
 267                 .bpp    = 16,
 268                 .planar = true,
 269                 .uv_width_dec = 2,
 270                 .uv_height_dec = 1,
 271         }, {
 272                 .fourcc = V4L2_PIX_FMT_NV16,
 273                 .bpp    = 16,
 274                 .planar = true,
 275                 .uv_width_dec = 2,
 276                 .uv_height_dec = 1,
 277                 .uv_packed = true,
 278         },
 279 };
 280
 281 static const struct ipu_image_pixfmt *get_format(u32 fourcc)
 282 {
 283         const struct ipu_image_pixfmt *ret = NULL;
 284         unsigned int i;
 285
 286         for (i = 0; i < ARRAY_SIZE(image_convert_formats); i++) {
 287                 if (image_convert_formats[i].fourcc == fourcc) {
 288                         ret = &image_convert_formats[i];
 289                         break;
 290                 }
 291         }
 292
 293         return ret;
 294 }
 295
 296 static void dump_format(struct ipu_image_convert_ctx *ctx,
 297                         struct ipu_image_convert_image *ic_image)
 298 {
 299         struct ipu_image_convert_chan *chan = ctx->chan;
 300         struct ipu_image_convert_priv *priv = chan->priv;
 301
 302         dev_dbg(priv->ipu->dev,
 303                 "task %u: ctx %p: %s format: %dx%d (%dx%d tiles of size %dx%d), %c%c%c%c\n",
 304                 chan->ic_task, ctx,
 305                 ic_image->type == IMAGE_CONVERT_OUT ? "Output" : "Input",
 306                 ic_image->base.pix.width, ic_image->base.pix.height,
 307                 ic_image->num_cols, ic_image->num_rows,
 308                 ic_image->tile[0].width, ic_image->tile[0].height,
 309                 ic_image->fmt->fourcc & 0xff,
 310                 (ic_image->fmt->fourcc >> 8) & 0xff,
 311                 (ic_image->fmt->fourcc >> 16) & 0xff,
 312                 (ic_image->fmt->fourcc >> 24) & 0xff);
 313 }
 314
 315 int ipu_image_convert_enum_format(int index, u32 *fourcc)
 316 {
 317         const struct ipu_image_pixfmt *fmt;
 318
 319         if (index >= (int)ARRAY_SIZE(image_convert_formats))
 320                 return -EINVAL;
 321
 322         /* Format found */
 323         fmt = &image_convert_formats[index];
 324         *fourcc = fmt->fourcc;
 325         return 0;
 326 }
 327 EXPORT_SYMBOL_GPL(ipu_image_convert_enum_format);
 328
 329 static void free_dma_buf(struct ipu_image_convert_priv *priv,
 330                          struct ipu_image_convert_dma_buf *buf)
 331 {
 332         if (buf->virt)
 333                 dma_free_coherent(priv->ipu->dev,
 334                                   buf->len, buf->virt, buf->phys);
 335         buf->virt = NULL;
 336         buf->phys = 0;
 337 }
 338
 339 static int alloc_dma_buf(struct ipu_image_convert_priv *priv,
 340                          struct ipu_image_convert_dma_buf *buf,
 341                          int size)
 342 {
 343         buf->len = PAGE_ALIGN(size);
 344         buf->virt = dma_alloc_coherent(priv->ipu->dev, buf->len, &buf->phys,
 345                                        GFP_DMA | GFP_KERNEL);
 346         if (!buf->virt) {
 347                 dev_err(priv->ipu->dev, "failed to alloc dma buffer\n");
 348                 return -ENOMEM;
 349         }
 350
 351         return 0;
 352 }
 353
 354 static inline int num_stripes(int dim)
 355 {
 356         if (dim <= 1024)
 357                 return 1;
 358         else if (dim <= 2048)
 359                 return 2;
 360         else
 361                 return 4;
 362 }
 363
 364 static void calc_tile_dimensions(struct ipu_image_convert_ctx *ctx,
 365                                  struct ipu_image_convert_image *image)
 366 {
 367         int i;
 368
 369         for (i = 0; i < ctx->num_tiles; i++) {
 370                 struct ipu_image_tile *tile = &image->tile[i];
 371
 372                 tile->height = image->base.pix.height / image->num_rows;
 373                 tile->width = image->base.pix.width / image->num_cols;
 374                 tile->size = ((tile->height * image->fmt->bpp) >> 3) *
 375                         tile->width;
 376
 377                 if (image->fmt->planar) {
 378                         tile->stride = tile->width;
 379                         tile->rot_stride = tile->height;
 380                 } else {
 381                         tile->stride =
 382                                 (image->fmt->bpp * tile->width) >> 3;
 383                         tile->rot_stride =
 384                                 (image->fmt->bpp * tile->height) >> 3;
 385                 }
 386         }
 387 }
 388
 389 /*
 390  * Use the rotation transformation to find the tile coordinates
 391  * (row, col) of a tile in the destination frame that corresponds
 392  * to the given tile coordinates of a source frame. The destination
 393  * coordinate is then converted to a tile index.
 394  */
 395 static int transform_tile_index(struct ipu_image_convert_ctx *ctx,
 396                                 int src_row, int src_col)
 397 {
 398         struct ipu_image_convert_chan *chan = ctx->chan;
 399         struct ipu_image_convert_priv *priv = chan->priv;
 400         struct ipu_image_convert_image *s_image = &ctx->in;
 401         struct ipu_image_convert_image *d_image = &ctx->out;
 402         int dst_row, dst_col;
 403
 404         /* with no rotation it's a 1:1 mapping */
 405         if (ctx->rot_mode == IPU_ROTATE_NONE)
 406                 return src_row * s_image->num_cols + src_col;
 407
 408         /*
 409          * before doing the transform, first we have to translate
 410          * source row,col for an origin in the center of s_image
 411          */
 412         src_row = src_row * 2 - (s_image->num_rows - 1);
 413         src_col = src_col * 2 - (s_image->num_cols - 1);
 414
 415         /* do the rotation transform */
 416         if (ctx->rot_mode & IPU_ROT_BIT_90) {
 417                 dst_col = -src_row;
 418                 dst_row = src_col;
 419         } else {
 420                 dst_col = src_col;
 421                 dst_row = src_row;
 422         }
 423
 424         /* apply flip */
 425         if (ctx->rot_mode & IPU_ROT_BIT_HFLIP)
 426                 dst_col = -dst_col;
 427         if (ctx->rot_mode & IPU_ROT_BIT_VFLIP)
 428                 dst_row = -dst_row;
 429
 430         dev_dbg(priv->ipu->dev, "task %u: ctx %p: [%d,%d] --> [%d,%d]\n",
 431                 chan->ic_task, ctx, src_col, src_row, dst_col, dst_row);
 432
 433         /*
 434          * finally translate dest row,col using an origin in upper
 435          * left of d_image
 436          */
 437         dst_row += d_image->num_rows - 1;
 438         dst_col += d_image->num_cols - 1;
 439         dst_row /= 2;
 440         dst_col /= 2;
 441
 442         return dst_row * d_image->num_cols + dst_col;
 443 }
 444
 445 /*
 446  * Fill the out_tile_map[] with transformed destination tile indeces.
 447  */
 448 static void calc_out_tile_map(struct ipu_image_convert_ctx *ctx)
 449 {
 450         struct ipu_image_convert_image *s_image = &ctx->in;
 451         unsigned int row, col, tile = 0;
 452
 453         for (row = 0; row < s_image->num_rows; row++) {
 454                 for (col = 0; col < s_image->num_cols; col++) {
 455                         ctx->out_tile_map[tile] =
 456                                 transform_tile_index(ctx, row, col);
 457                         tile++;
 458                 }
 459         }
 460 }
 461
 462 static void calc_tile_offsets_planar(struct ipu_image_convert_ctx *ctx,
 463                                      struct ipu_image_convert_image *image)
 464 {
 465         struct ipu_image_convert_chan *chan = ctx->chan;
 466         struct ipu_image_convert_priv *priv = chan->priv;
 467         const struct ipu_image_pixfmt *fmt = image->fmt;
 468         unsigned int row, col, tile = 0;
 469         u32 H, w, h, y_stride, uv_stride;
 470         u32 uv_row_off, uv_col_off, uv_off, u_off, v_off, tmp;
 471         u32 y_row_off, y_col_off, y_off;
 472         u32 y_size, uv_size;
 473
 474         /* setup some convenience vars */
 475         H = image->base.pix.height;
 476
 477         y_stride = image->stride;
 478         uv_stride = y_stride / fmt->uv_width_dec;
 479         if (fmt->uv_packed)
 480                 uv_stride *= 2;
 481
 482         y_size = H * y_stride;
 483         uv_size = y_size / (fmt->uv_width_dec * fmt->uv_height_dec);
 484
 485         for (row = 0; row < image->num_rows; row++) {
 486                 w = image->tile[tile].width;
 487                 h = image->tile[tile].height;
 488                 y_row_off = row * h * y_stride;
 489                 uv_row_off = (row * h * uv_stride) / fmt->uv_height_dec;
 490
 491                 for (col = 0; col < image->num_cols; col++) {
 492                         y_col_off = col * w;
 493                         uv_col_off = y_col_off / fmt->uv_width_dec;
 494                         if (fmt->uv_packed)
 495                                 uv_col_off *= 2;
 496
 497                         y_off = y_row_off + y_col_off;
 498                         uv_off = uv_row_off + uv_col_off;
 499
 500                         u_off = y_size - y_off + uv_off;
 501                         v_off = (fmt->uv_packed) ? 0 : u_off + uv_size;
 502                         if (fmt->uv_swapped) {
 503                                 tmp = u_off;
 504                                 u_off = v_off;
 505                                 v_off = tmp;
 506                         }
 507
 508                         image->tile[tile].offset = y_off;
 509                         image->tile[tile].u_off = u_off;
 510                         image->tile[tile++].v_off = v_off;
 511
 512                         dev_dbg(priv->ipu->dev,
 513                                 "task %u: ctx %p: %s@[%d,%d]: y_off %08x, u_off %08x, v_off %08x\n",
 514                                 chan->ic_task, ctx,
 515                                 image->type == IMAGE_CONVERT_IN ?
 516                                 "Input" : "Output", row, col,
 517                                 y_off, u_off, v_off);
 518                 }
 519         }
 520 }
 521
 522 static void calc_tile_offsets_packed(struct ipu_image_convert_ctx *ctx,
 523                                      struct ipu_image_convert_image *image)
 524 {
 525         struct ipu_image_convert_chan *chan = ctx->chan;
 526         struct ipu_image_convert_priv *priv = chan->priv;
 527         const struct ipu_image_pixfmt *fmt = image->fmt;
 528         unsigned int row, col, tile = 0;
 529         u32 w, h, bpp, stride;
 530         u32 row_off, col_off;
 531
 532         /* setup some convenience vars */
 533         stride = image->stride;
 534         bpp = fmt->bpp;
 535
 536         for (row = 0; row < image->num_rows; row++) {
 537                 w = image->tile[tile].width;
 538                 h = image->tile[tile].height;
 539                 row_off = row * h * stride;
 540
 541                 for (col = 0; col < image->num_cols; col++) {
 542                         col_off = (col * w * bpp) >> 3;
 543
 544                         image->tile[tile].offset = row_off + col_off;
 545                         image->tile[tile].u_off = 0;
 546                         image->tile[tile++].v_off = 0;
 547
 548                         dev_dbg(priv->ipu->dev,
 549                                 "task %u: ctx %p: %s@[%d,%d]: phys %08x\n",
 550                                 chan->ic_task, ctx,
 551                                 image->type == IMAGE_CONVERT_IN ?
 552                                 "Input" : "Output", row, col,
 553                                 row_off + col_off);
 554                 }
 555         }
 556 }
 557
 558 static void calc_tile_offsets(struct ipu_image_convert_ctx *ctx,
 559                               struct ipu_image_convert_image *image)
 560 {
 561         if (image->fmt->planar)
 562                 calc_tile_offsets_planar(ctx, image);
 563         else
 564                 calc_tile_offsets_packed(ctx, image);
 565 }
 566
 567 /*
 568  * return the number of runs in given queue (pending_q or done_q)
 569  * for this context. hold irqlock when calling.
 570  */
 571 static int get_run_count(struct ipu_image_convert_ctx *ctx,
 572                          struct list_head *q)
 573 {
 574         struct ipu_image_convert_run *run;
 575         int count = 0;
 576
 577         lockdep_assert_held(&ctx->chan->irqlock);
 578
 579         list_for_each_entry(run, q, list) {
 580                 if (run->ctx == ctx)
 581                         count++;
 582         }
 583
 584         return count;
 585 }
 586
 587 static void convert_stop(struct ipu_image_convert_run *run)
 588 {
 589         struct ipu_image_convert_ctx *ctx = run->ctx;
 590         struct ipu_image_convert_chan *chan = ctx->chan;
 591         struct ipu_image_convert_priv *priv = chan->priv;
 592
 593         dev_dbg(priv->ipu->dev, "%s: task %u: stopping ctx %p run %p\n",
 594                 __func__, chan->ic_task, ctx, run);
 595
 596         /* disable IC tasks and the channels */
 597         ipu_ic_task_disable(chan->ic);
 598         ipu_idmac_disable_channel(chan->in_chan);
 599         ipu_idmac_disable_channel(chan->out_chan);
 600
 601         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
 602                 ipu_idmac_disable_channel(chan->rotation_in_chan);
 603                 ipu_idmac_disable_channel(chan->rotation_out_chan);
 604                 ipu_idmac_unlink(chan->out_chan, chan->rotation_in_chan);
 605         }
 606
 607         ipu_ic_disable(chan->ic);
 608 }
 609
 610 static void init_idmac_channel(struct ipu_image_convert_ctx *ctx,
 611                                struct ipuv3_channel *channel,
 612                                struct ipu_image_convert_image *image,
 613                                enum ipu_rotate_mode rot_mode,
 614                                bool rot_swap_width_height)
 615 {
 616         struct ipu_image_convert_chan *chan = ctx->chan;
 617         unsigned int burst_size;
 618         u32 width, height, stride;
 619         dma_addr_t addr0, addr1 = 0;
 620         struct ipu_image tile_image;
 621         unsigned int tile_idx[2];
 622
 623         if (image->type == IMAGE_CONVERT_OUT) {
 624                 tile_idx[0] = ctx->out_tile_map[0];
 625                 tile_idx[1] = ctx->out_tile_map[1];
 626         } else {
 627                 tile_idx[0] = 0;
 628                 tile_idx[1] = 1;
 629         }
 630
 631         if (rot_swap_width_height) {
 632                 width = image->tile[0].height;
 633                 height = image->tile[0].width;
 634                 stride = image->tile[0].rot_stride;
 635                 addr0 = ctx->rot_intermediate[0].phys;
 636                 if (ctx->double_buffering)
 637                         addr1 = ctx->rot_intermediate[1].phys;
 638         } else {
 639                 width = image->tile[0].width;
 640                 height = image->tile[0].height;
 641                 stride = image->stride;
 642                 addr0 = image->base.phys0 +
 643                         image->tile[tile_idx[0]].offset;
 644                 if (ctx->double_buffering)
 645                         addr1 = image->base.phys0 +
 646                                 image->tile[tile_idx[1]].offset;
 647         }
 648
 649         ipu_cpmem_zero(channel);
 650
 651         memset(&tile_image, 0, sizeof(tile_image));
 652         tile_image.pix.width = tile_image.rect.width = width;
 653         tile_image.pix.height = tile_image.rect.height = height;
 654         tile_image.pix.bytesperline = stride;
 655         tile_image.pix.pixelformat =  image->fmt->fourcc;
 656         tile_image.phys0 = addr0;
 657         tile_image.phys1 = addr1;
 658         ipu_cpmem_set_image(channel, &tile_image);
 659
 660         if (image->fmt->planar && !rot_swap_width_height)
 661                 ipu_cpmem_set_uv_offset(channel,
 662                                         image->tile[tile_idx[0]].u_off,
 663                                         image->tile[tile_idx[0]].v_off);
 664
 665         if (rot_mode)
 666                 ipu_cpmem_set_rotation(channel, rot_mode);
 667
 668         if (channel == chan->rotation_in_chan ||
 669             channel == chan->rotation_out_chan) {
 670                 burst_size = 8;
 671                 ipu_cpmem_set_block_mode(channel);
 672         } else
 673                 burst_size = (width % 16) ? 8 : 16;
 674
 675         ipu_cpmem_set_burstsize(channel, burst_size);
 676
 677         ipu_ic_task_idma_init(chan->ic, channel, width, height,
 678                               burst_size, rot_mode);
 679
 680         /*
 681          * Setting a non-zero AXI ID collides with the PRG AXI snooping, so
 682          * only do this when there is no PRG present.
 683          */
 684         if (!channel->ipu->prg_priv)
 685                 ipu_cpmem_set_axi_id(channel, 1);
 686
 687         ipu_idmac_set_double_buffer(channel, ctx->double_buffering);
 688 }
 689
 690 static int convert_start(struct ipu_image_convert_run *run)
 691 {
 692         struct ipu_image_convert_ctx *ctx = run->ctx;
 693         struct ipu_image_convert_chan *chan = ctx->chan;
 694         struct ipu_image_convert_priv *priv = chan->priv;
 695         struct ipu_image_convert_image *s_image = &ctx->in;
 696         struct ipu_image_convert_image *d_image = &ctx->out;
 697         enum ipu_color_space src_cs, dest_cs;
 698         unsigned int dest_width, dest_height;
 699         int ret;
 700
 701         dev_dbg(priv->ipu->dev, "%s: task %u: starting ctx %p run %p\n",
 702                 __func__, chan->ic_task, ctx, run);
 703
 704         src_cs = ipu_pixelformat_to_colorspace(s_image->fmt->fourcc);
 705         dest_cs = ipu_pixelformat_to_colorspace(d_image->fmt->fourcc);
 706
 707         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
 708                 /* swap width/height for resizer */
 709                 dest_width = d_image->tile[0].height;
 710                 dest_height = d_image->tile[0].width;
 711         } else {
 712                 dest_width = d_image->tile[0].width;
 713                 dest_height = d_image->tile[0].height;
 714         }
 715
 716         /* setup the IC resizer and CSC */
 717         ret = ipu_ic_task_init(chan->ic,
 718                                s_image->tile[0].width,
 719                                s_image->tile[0].height,
 720                                dest_width,
 721                                dest_height,
 722                                src_cs, dest_cs);
 723         if (ret) {
 724                 dev_err(priv->ipu->dev, "ipu_ic_task_init failed, %d\n", ret);
 725                 return ret;
 726         }
 727
 728         /* init the source MEM-->IC PP IDMAC channel */
 729         init_idmac_channel(ctx, chan->in_chan, s_image,
 730                            IPU_ROTATE_NONE, false);
 731
 732         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
 733                 /* init the IC PP-->MEM IDMAC channel */
 734                 init_idmac_channel(ctx, chan->out_chan, d_image,
 735                                    IPU_ROTATE_NONE, true);
 736
 737                 /* init the MEM-->IC PP ROT IDMAC channel */
 738                 init_idmac_channel(ctx, chan->rotation_in_chan, d_image,
 739                                    ctx->rot_mode, true);
 740
 741                 /* init the destination IC PP ROT-->MEM IDMAC channel */
 742                 init_idmac_channel(ctx, chan->rotation_out_chan, d_image,
 743                                    IPU_ROTATE_NONE, false);
 744
 745                 /* now link IC PP-->MEM to MEM-->IC PP ROT */
 746                 ipu_idmac_link(chan->out_chan, chan->rotation_in_chan);
 747         } else {
 748                 /* init the destination IC PP-->MEM IDMAC channel */
 749                 init_idmac_channel(ctx, chan->out_chan, d_image,
 750                                    ctx->rot_mode, false);
 751         }
 752
 753         /* enable the IC */
 754         ipu_ic_enable(chan->ic);
 755
 756         /* set buffers ready */
 757         ipu_idmac_select_buffer(chan->in_chan, 0);
 758         ipu_idmac_select_buffer(chan->out_chan, 0);
 759         if (ipu_rot_mode_is_irt(ctx->rot_mode))
 760                 ipu_idmac_select_buffer(chan->rotation_out_chan, 0);
 761         if (ctx->double_buffering) {
 762                 ipu_idmac_select_buffer(chan->in_chan, 1);
 763                 ipu_idmac_select_buffer(chan->out_chan, 1);
 764                 if (ipu_rot_mode_is_irt(ctx->rot_mode))
 765                         ipu_idmac_select_buffer(chan->rotation_out_chan, 1);
 766         }
 767
 768         /* enable the channels! */
 769         ipu_idmac_enable_channel(chan->in_chan);
 770         ipu_idmac_enable_channel(chan->out_chan);
 771         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
 772                 ipu_idmac_enable_channel(chan->rotation_in_chan);
 773                 ipu_idmac_enable_channel(chan->rotation_out_chan);
 774         }
 775
 776         ipu_ic_task_enable(chan->ic);
 777
 778         ipu_cpmem_dump(chan->in_chan);
 779         ipu_cpmem_dump(chan->out_chan);
 780         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
 781                 ipu_cpmem_dump(chan->rotation_in_chan);
 782                 ipu_cpmem_dump(chan->rotation_out_chan);
 783         }
 784
 785         ipu_dump(priv->ipu);
 786
 787         return 0;
 788 }
 789
 790 /* hold irqlock when calling */
 791 static int do_run(struct ipu_image_convert_run *run)
 792 {
 793         struct ipu_image_convert_ctx *ctx = run->ctx;
 794         struct ipu_image_convert_chan *chan = ctx->chan;
 795
 796         lockdep_assert_held(&chan->irqlock);
 797
 798         ctx->in.base.phys0 = run->in_phys;
 799         ctx->out.base.phys0 = run->out_phys;
 800
 801         ctx->cur_buf_num = 0;
 802         ctx->next_tile = 1;
 803
 804         /* remove run from pending_q and set as current */
 805         list_del(&run->list);
 806         chan->current_run = run;
 807
 808         return convert_start(run);
 809 }
 810
 811 /* hold irqlock when calling */
 812 static void run_next(struct ipu_image_convert_chan *chan)
 813 {
 814         struct ipu_image_convert_priv *priv = chan->priv;
 815         struct ipu_image_convert_run *run, *tmp;
 816         int ret;
 817
 818         lockdep_assert_held(&chan->irqlock);
 819
 820         list_for_each_entry_safe(run, tmp, &chan->pending_q, list) {
 821                 /* skip contexts that are aborting */
 822                 if (run->ctx->aborting) {
 823                         dev_dbg(priv->ipu->dev,
 824                                 "%s: task %u: skipping aborting ctx %p run %p\n",
 825                                 __func__, chan->ic_task, run->ctx, run);
 826                         continue;
 827                 }
 828
 829                 ret = do_run(run);
 830                 if (!ret)
 831                         break;
 832
 833                 /*
 834                  * something went wrong with start, add the run
 835                  * to done q and continue to the next run in the
 836                  * pending q.
 837                  */
 838                 run->status = ret;
 839                 list_add_tail(&run->list, &chan->done_q);
 840                 chan->current_run = NULL;
 841         }
 842 }
 843
 844 static void empty_done_q(struct ipu_image_convert_chan *chan)
 845 {
 846         struct ipu_image_convert_priv *priv = chan->priv;
 847         struct ipu_image_convert_run *run;
 848         unsigned long flags;
 849
 850         spin_lock_irqsave(&chan->irqlock, flags);
 851
 852         while (!list_empty(&chan->done_q)) {
 853                 run = list_entry(chan->done_q.next,
 854                                  struct ipu_image_convert_run,
 855                                  list);
 856
 857                 list_del(&run->list);
 858
 859                 dev_dbg(priv->ipu->dev,
 860                         "%s: task %u: completing ctx %p run %p with %d\n",
 861                         __func__, chan->ic_task, run->ctx, run, run->status);
 862
 863                 /* call the completion callback and free the run */
 864                 spin_unlock_irqrestore(&chan->irqlock, flags);
 865                 run->ctx->complete(run, run->ctx->complete_context);
 866                 spin_lock_irqsave(&chan->irqlock, flags);
 867         }
 868
 869         spin_unlock_irqrestore(&chan->irqlock, flags);
 870 }
 871
 872 /*
 873  * the bottom half thread clears out the done_q, calling the
 874  * completion handler for each.
 875  */
 876 static irqreturn_t do_bh(int irq, void *dev_id)
 877 {
 878         struct ipu_image_convert_chan *chan = dev_id;
 879         struct ipu_image_convert_priv *priv = chan->priv;
 880         struct ipu_image_convert_ctx *ctx;
 881         unsigned long flags;
 882
 883         dev_dbg(priv->ipu->dev, "%s: task %u: enter\n", __func__,
 884                 chan->ic_task);
 885
 886         empty_done_q(chan);
 887
 888         spin_lock_irqsave(&chan->irqlock, flags);
 889
 890         /*
 891          * the done_q is cleared out, signal any contexts
 892          * that are aborting that abort can complete.
 893          */
 894         list_for_each_entry(ctx, &chan->ctx_list, list) {
 895                 if (ctx->aborting) {
 896                         dev_dbg(priv->ipu->dev,
 897                                 "%s: task %u: signaling abort for ctx %p\n",
 898                                 __func__, chan->ic_task, ctx);
 899                         complete(&ctx->aborted);
 900                 }
 901         }
 902
 903         spin_unlock_irqrestore(&chan->irqlock, flags);
 904
 905         dev_dbg(priv->ipu->dev, "%s: task %u: exit\n", __func__,
 906                 chan->ic_task);
 907
 908         return IRQ_HANDLED;
 909 }
 910
 911 /* hold irqlock when calling */
 912 static irqreturn_t do_irq(struct ipu_image_convert_run *run)
 913 {
 914         struct ipu_image_convert_ctx *ctx = run->ctx;
 915         struct ipu_image_convert_chan *chan = ctx->chan;
 916         struct ipu_image_tile *src_tile, *dst_tile;
 917         struct ipu_image_convert_image *s_image = &ctx->in;
 918         struct ipu_image_convert_image *d_image = &ctx->out;
 919         struct ipuv3_channel *outch;
 920         unsigned int dst_idx;
 921
 922         lockdep_assert_held(&chan->irqlock);
 923
 924         outch = ipu_rot_mode_is_irt(ctx->rot_mode) ?
 925                 chan->rotation_out_chan : chan->out_chan;
 926
 927         /*
 928          * It is difficult to stop the channel DMA before the channels
 929          * enter the paused state. Without double-buffering the channels
 930          * are always in a paused state when the EOF irq occurs, so it
 931          * is safe to stop the channels now. For double-buffering we
 932          * just ignore the abort until the operation completes, when it
 933          * is safe to shut down.
 934          */
 935         if (ctx->aborting && !ctx->double_buffering) {
 936                 convert_stop(run);
 937                 run->status = -EIO;
 938                 goto done;
 939         }
 940
 941         if (ctx->next_tile == ctx->num_tiles) {
 942                 /*
 943                  * the conversion is complete
 944                  */
 945                 convert_stop(run);
 946                 run->status = 0;
 947                 goto done;
 948         }
 949
 950         /*
 951          * not done, place the next tile buffers.
 952          */
 953         if (!ctx->double_buffering) {
 954
 955                 src_tile = &s_image->tile[ctx->next_tile];
 956                 dst_idx = ctx->out_tile_map[ctx->next_tile];
 957                 dst_tile = &d_image->tile[dst_idx];
 958
 959                 ipu_cpmem_set_buffer(chan->in_chan, 0,
 960                                      s_image->base.phys0 + src_tile->offset);
 961                 ipu_cpmem_set_buffer(outch, 0,
 962                                      d_image->base.phys0 + dst_tile->offset);
 963                 if (s_image->fmt->planar)
 964                         ipu_cpmem_set_uv_offset(chan->in_chan,
 965                                                 src_tile->u_off,
 966                                                 src_tile->v_off);
 967                 if (d_image->fmt->planar)
 968                         ipu_cpmem_set_uv_offset(outch,
 969                                                 dst_tile->u_off,
 970                                                 dst_tile->v_off);
 971
 972                 ipu_idmac_select_buffer(chan->in_chan, 0);
 973                 ipu_idmac_select_buffer(outch, 0);
 974
 975         } else if (ctx->next_tile < ctx->num_tiles - 1) {
 976
 977                 src_tile = &s_image->tile[ctx->next_tile + 1];
 978                 dst_idx = ctx->out_tile_map[ctx->next_tile + 1];
 979                 dst_tile = &d_image->tile[dst_idx];
 980
 981                 ipu_cpmem_set_buffer(chan->in_chan, ctx->cur_buf_num,
 982                                      s_image->base.phys0 + src_tile->offset);
 983                 ipu_cpmem_set_buffer(outch, ctx->cur_buf_num,
 984                                      d_image->base.phys0 + dst_tile->offset);
 985
 986                 ipu_idmac_select_buffer(chan->in_chan, ctx->cur_buf_num);
 987                 ipu_idmac_select_buffer(outch, ctx->cur_buf_num);
 988
 989                 ctx->cur_buf_num ^= 1;
 990         }
 991
 992         ctx->next_tile++;
 993         return IRQ_HANDLED;
 994 done:
 995         list_add_tail(&run->list, &chan->done_q);
 996         chan->current_run = NULL;
 997         run_next(chan);
 998         return IRQ_WAKE_THREAD;
 999 }
1000
1001 static irqreturn_t eof_irq(int irq, void *data)
1002 {
1003         struct ipu_image_convert_chan *chan = data;
1004         struct ipu_image_convert_priv *priv = chan->priv;
1005         struct ipu_image_convert_ctx *ctx;
1006         struct ipu_image_convert_run *run;
1007         unsigned long flags;
1008         irqreturn_t ret;
1009
1010         spin_lock_irqsave(&chan->irqlock, flags);
1011
1012         /* get current run and its context */
1013         run = chan->current_run;
1014         if (!run) {
1015                 ret = IRQ_NONE;
1016                 goto out;
1017         }
1018
1019         ctx = run->ctx;
1020
1021         if (irq == chan->out_eof_irq) {
1022                 if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
1023                         /* this is a rotation op, just ignore */
1024                         ret = IRQ_HANDLED;
1025                         goto out;
1026                 }
1027         } else if (irq == chan->rot_out_eof_irq) {
1028                 if (!ipu_rot_mode_is_irt(ctx->rot_mode)) {
1029                         /* this was NOT a rotation op, shouldn't happen */
1030                         dev_err(priv->ipu->dev,
1031                                 "Unexpected rotation interrupt\n");
1032                         ret = IRQ_HANDLED;
1033                         goto out;
1034                 }
1035         } else {
1036                 dev_err(priv->ipu->dev, "Received unknown irq %d\n", irq);
1037                 ret = IRQ_NONE;
1038                 goto out;
1039         }
1040
1041         ret = do_irq(run);
1042 out:
1043         spin_unlock_irqrestore(&chan->irqlock, flags);
1044         return ret;
1045 }
1046
1047 /*
1048  * try to force the completion of runs for this ctx. Called when
1049  * abort wait times out in ipu_image_convert_abort().
1050  */
1051 static void force_abort(struct ipu_image_convert_ctx *ctx)
1052 {
1053         struct ipu_image_convert_chan *chan = ctx->chan;
1054         struct ipu_image_convert_run *run;
1055         unsigned long flags;
1056
1057         spin_lock_irqsave(&chan->irqlock, flags);
1058
1059         run = chan->current_run;
1060         if (run && run->ctx == ctx) {
1061                 convert_stop(run);
1062                 run->status = -EIO;
1063                 list_add_tail(&run->list, &chan->done_q);
1064                 chan->current_run = NULL;
1065                 run_next(chan);
1066         }
1067
1068         spin_unlock_irqrestore(&chan->irqlock, flags);
1069
1070         empty_done_q(chan);
1071 }
1072
1073 static void release_ipu_resources(struct ipu_image_convert_chan *chan)
1074 {
1075         if (chan->out_eof_irq >= 0)
1076                 free_irq(chan->out_eof_irq, chan);
1077         if (chan->rot_out_eof_irq >= 0)
1078                 free_irq(chan->rot_out_eof_irq, chan);
1079
1080         if (!IS_ERR_OR_NULL(chan->in_chan))
1081                 ipu_idmac_put(chan->in_chan);
1082         if (!IS_ERR_OR_NULL(chan->out_chan))
1083                 ipu_idmac_put(chan->out_chan);
1084         if (!IS_ERR_OR_NULL(chan->rotation_in_chan))
1085                 ipu_idmac_put(chan->rotation_in_chan);
1086         if (!IS_ERR_OR_NULL(chan->rotation_out_chan))
1087                 ipu_idmac_put(chan->rotation_out_chan);
1088         if (!IS_ERR_OR_NULL(chan->ic))
1089                 ipu_ic_put(chan->ic);
1090
1091         chan->in_chan = chan->out_chan = chan->rotation_in_chan =
1092                 chan->rotation_out_chan = NULL;
1093         chan->out_eof_irq = chan->rot_out_eof_irq = -1;
1094 }
1095
1096 static int get_ipu_resources(struct ipu_image_convert_chan *chan)
1097 {
1098         const struct ipu_image_convert_dma_chan *dma = chan->dma_ch;
1099         struct ipu_image_convert_priv *priv = chan->priv;
1100         int ret;
1101
1102         /* get IC */
1103         chan->ic = ipu_ic_get(priv->ipu, chan->ic_task);
1104         if (IS_ERR(chan->ic)) {
1105                 dev_err(priv->ipu->dev, "could not acquire IC\n");
1106                 ret = PTR_ERR(chan->ic);
1107                 goto err;
1108         }
1109
1110         /* get IDMAC channels */
1111         chan->in_chan = ipu_idmac_get(priv->ipu, dma->in);
1112         chan->out_chan = ipu_idmac_get(priv->ipu, dma->out);
1113         if (IS_ERR(chan->in_chan) || IS_ERR(chan->out_chan)) {
1114                 dev_err(priv->ipu->dev, "could not acquire idmac channels\n");
1115                 ret = -EBUSY;
1116                 goto err;
1117         }
1118
1119         chan->rotation_in_chan = ipu_idmac_get(priv->ipu, dma->rot_in);
1120         chan->rotation_out_chan = ipu_idmac_get(priv->ipu, dma->rot_out);
1121         if (IS_ERR(chan->rotation_in_chan) || IS_ERR(chan->rotation_out_chan)) {
1122                 dev_err(priv->ipu->dev,
1123                         "could not acquire idmac rotation channels\n");
1124                 ret = -EBUSY;
1125                 goto err;
1126         }
1127
1128         /* acquire the EOF interrupts */
1129         chan->out_eof_irq = ipu_idmac_channel_irq(priv->ipu,
1130                                                   chan->out_chan,
1131                                                   IPU_IRQ_EOF);
1132
1133         ret = request_threaded_irq(chan->out_eof_irq, eof_irq, do_bh,
1134                                    0, "ipu-ic", chan);
1135         if (ret < 0) {
1136                 dev_err(priv->ipu->dev, "could not acquire irq %d\n",
1137                          chan->out_eof_irq);
1138                 chan->out_eof_irq = -1;
1139                 goto err;
1140         }
1141
1142         chan->rot_out_eof_irq = ipu_idmac_channel_irq(priv->ipu,
1143                                                      chan->rotation_out_chan,
1144                                                      IPU_IRQ_EOF);
1145
1146         ret = request_threaded_irq(chan->rot_out_eof_irq, eof_irq, do_bh,
1147                                    0, "ipu-ic", chan);
1148         if (ret < 0) {
1149                 dev_err(priv->ipu->dev, "could not acquire irq %d\n",
1150                         chan->rot_out_eof_irq);
1151                 chan->rot_out_eof_irq = -1;
1152                 goto err;
1153         }
1154
1155         return 0;
1156 err:
1157         release_ipu_resources(chan);
1158         return ret;
1159 }
1160
1161 static int fill_image(struct ipu_image_convert_ctx *ctx,
1162                       struct ipu_image_convert_image *ic_image,
1163                       struct ipu_image *image,
1164                       enum ipu_image_convert_type type)
1165 {
1166         struct ipu_image_convert_priv *priv = ctx->chan->priv;
1167
1168         ic_image->base = *image;
1169         ic_image->type = type;
1170
1171         ic_image->fmt = get_format(image->pix.pixelformat);
1172         if (!ic_image->fmt) {
1173                 dev_err(priv->ipu->dev, "pixelformat not supported for %s\n",
1174                         type == IMAGE_CONVERT_OUT ? "Output" : "Input");
1175                 return -EINVAL;
1176         }
1177
1178         if (ic_image->fmt->planar)
1179                 ic_image->stride = ic_image->base.pix.width;
1180         else
1181                 ic_image->stride  = ic_image->base.pix.bytesperline;
1182
1183         calc_tile_dimensions(ctx, ic_image);
1184         calc_tile_offsets(ctx, ic_image);
1185
1186         return 0;
1187 }
1188
1189 /* borrowed from drivers/media/v4l2-core/v4l2-common.c */
1190 static unsigned int clamp_align(unsigned int x, unsigned int min,
1191                                 unsigned int max, unsigned int align)
1192 {
1193         /* Bits that must be zero to be aligned */
1194         unsigned int mask = ~((1 << align) - 1);
1195
1196         /* Clamp to aligned min and max */
1197         x = clamp(x, (min + ~mask) & mask, max & mask);
1198
1199         /* Round to nearest aligned value */
1200         if (align)
1201                 x = (x + (1 << (align - 1))) & mask;
1202
1203         return x;
1204 }
1205
1206 /*
1207  * We have to adjust the tile width such that the tile physaddrs and
1208  * U and V plane offsets are multiples of 8 bytes as required by
1209  * the IPU DMA Controller. For the planar formats, this corresponds
1210  * to a pixel alignment of 16 (but use a more formal equation since
1211  * the variables are available). For all the packed formats, 8 is
1212  * good enough.
1213  */
1214 static inline u32 tile_width_align(const struct ipu_image_pixfmt *fmt)
1215 {
1216         return fmt->planar ? 8 * fmt->uv_width_dec : 8;
1217 }
1218
1219 /*
1220  * For tile height alignment, we have to ensure that the output tile
1221  * heights are multiples of 8 lines if the IRT is required by the
1222  * given rotation mode (the IRT performs rotations on 8x8 blocks
1223  * at a time). If the IRT is not used, or for input image tiles,
1224  * 2 lines are good enough.
1225  */
1226 static inline u32 tile_height_align(enum ipu_image_convert_type type,
1227                                     enum ipu_rotate_mode rot_mode)
1228 {
1229         return (type == IMAGE_CONVERT_OUT &&
1230                 ipu_rot_mode_is_irt(rot_mode)) ? 8 : 2;
1231 }
1232
1233 /* Adjusts input/output images to IPU restrictions */
1234 void ipu_image_convert_adjust(struct ipu_image *in, struct ipu_image *out,
1235                               enum ipu_rotate_mode rot_mode)
1236 {
1237         const struct ipu_image_pixfmt *infmt, *outfmt;
1238         unsigned int num_in_rows, num_in_cols;
1239         unsigned int num_out_rows, num_out_cols;
1240         u32 w_align, h_align;
1241
1242         infmt = get_format(in->pix.pixelformat);
1243         outfmt = get_format(out->pix.pixelformat);
1244
1245         /* set some default pixel formats if needed */
1246         if (!infmt) {
1247                 in->pix.pixelformat = V4L2_PIX_FMT_RGB24;
1248                 infmt = get_format(V4L2_PIX_FMT_RGB24);
1249         }
1250         if (!outfmt) {
1251                 out->pix.pixelformat = V4L2_PIX_FMT_RGB24;
1252                 outfmt = get_format(V4L2_PIX_FMT_RGB24);
1253         }
1254
1255         /* image converter does not handle fields */
1256         in->pix.field = out->pix.field = V4L2_FIELD_NONE;
1257
1258         /* resizer cannot downsize more than 4:1 */
1259         if (ipu_rot_mode_is_irt(rot_mode)) {
1260                 out->pix.height = max_t(__u32, out->pix.height,
1261                                         in->pix.width / 4);
1262                 out->pix.width = max_t(__u32, out->pix.width,
1263                                        in->pix.height / 4);
1264         } else {
1265                 out->pix.width = max_t(__u32, out->pix.width,
1266                                        in->pix.width / 4);
1267                 out->pix.height = max_t(__u32, out->pix.height,
1268                                         in->pix.height / 4);
1269         }
1270
1271         /* get tiling rows/cols from output format */
1272         num_out_rows = num_stripes(out->pix.height);
1273         num_out_cols = num_stripes(out->pix.width);
1274         if (ipu_rot_mode_is_irt(rot_mode)) {
1275                 num_in_rows = num_out_cols;
1276                 num_in_cols = num_out_rows;
1277         } else {
1278                 num_in_rows = num_out_rows;
1279                 num_in_cols = num_out_cols;
1280         }
1281
1282         /* align input width/height */
1283         w_align = ilog2(tile_width_align(infmt) * num_in_cols);
1284         h_align = ilog2(tile_height_align(IMAGE_CONVERT_IN, rot_mode) *
1285                         num_in_rows);
1286         in->pix.width = clamp_align(in->pix.width, MIN_W, MAX_W, w_align);
1287         in->pix.height = clamp_align(in->pix.height, MIN_H, MAX_H, h_align);
1288
1289         /* align output width/height */
1290         w_align = ilog2(tile_width_align(outfmt) * num_out_cols);
1291         h_align = ilog2(tile_height_align(IMAGE_CONVERT_OUT, rot_mode) *
1292                         num_out_rows);
1293         out->pix.width = clamp_align(out->pix.width, MIN_W, MAX_W, w_align);
1294         out->pix.height = clamp_align(out->pix.height, MIN_H, MAX_H, h_align);
1295
1296         /* set input/output strides and image sizes */
1297         in->pix.bytesperline = (in->pix.width * infmt->bpp) >> 3;
1298         in->pix.sizeimage = in->pix.height * in->pix.bytesperline;
1299         out->pix.bytesperline = (out->pix.width * outfmt->bpp) >> 3;
1300         out->pix.sizeimage = out->pix.height * out->pix.bytesperline;
1301 }
1302 EXPORT_SYMBOL_GPL(ipu_image_convert_adjust);
1303
1304 /*
1305  * this is used by ipu_image_convert_prepare() to verify set input and
1306  * output images are valid before starting the conversion. Clients can
1307  * also call it before calling ipu_image_convert_prepare().
1308  */
1309 int ipu_image_convert_verify(struct ipu_image *in, struct ipu_image *out,
1310                              enum ipu_rotate_mode rot_mode)
1311 {
1312         struct ipu_image testin, testout;
1313
1314         testin = *in;
1315         testout = *out;
1316
1317         ipu_image_convert_adjust(&testin, &testout, rot_mode);
1318
1319         if (testin.pix.width != in->pix.width ||
1320             testin.pix.height != in->pix.height ||
1321             testout.pix.width != out->pix.width ||
1322             testout.pix.height != out->pix.height)
1323                 return -EINVAL;
1324
1325         return 0;
1326 }
1327 EXPORT_SYMBOL_GPL(ipu_image_convert_verify);
1328
1329 /*
1330  * Call ipu_image_convert_prepare() to prepare for the conversion of
1331  * given images and rotation mode. Returns a new conversion context.
1332  */
1333 struct ipu_image_convert_ctx *
1334 ipu_image_convert_prepare(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
1335                           struct ipu_image *in, struct ipu_image *out,
1336                           enum ipu_rotate_mode rot_mode,
1337                           ipu_image_convert_cb_t complete,
1338                           void *complete_context)
1339 {
1340         struct ipu_image_convert_priv *priv = ipu->image_convert_priv;
1341         struct ipu_image_convert_image *s_image, *d_image;
1342         struct ipu_image_convert_chan *chan;
1343         struct ipu_image_convert_ctx *ctx;
1344         unsigned long flags;
1345         bool get_res;
1346         int ret;
1347
1348         if (!in || !out || !complete ||
1349             (ic_task != IC_TASK_VIEWFINDER &&
1350              ic_task != IC_TASK_POST_PROCESSOR))
1351                 return ERR_PTR(-EINVAL);
1352
1353         /* verify the in/out images before continuing */
1354         ret = ipu_image_convert_verify(in, out, rot_mode);
1355         if (ret) {
1356                 dev_err(priv->ipu->dev, "%s: in/out formats invalid\n",
1357                         __func__);
1358                 return ERR_PTR(ret);
1359         }
1360
1361         chan = &priv->chan[ic_task];
1362
1363         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1364         if (!ctx)
1365                 return ERR_PTR(-ENOMEM);
1366
1367         dev_dbg(priv->ipu->dev, "%s: task %u: ctx %p\n", __func__,
1368                 chan->ic_task, ctx);
1369
1370         ctx->chan = chan;
1371         init_completion(&ctx->aborted);
1372
1373         s_image = &ctx->in;
1374         d_image = &ctx->out;
1375
1376         /* set tiling and rotation */
1377         d_image->num_rows = num_stripes(out->pix.height);
1378         d_image->num_cols = num_stripes(out->pix.width);
1379         if (ipu_rot_mode_is_irt(rot_mode)) {
1380                 s_image->num_rows = d_image->num_cols;
1381                 s_image->num_cols = d_image->num_rows;
1382         } else {
1383                 s_image->num_rows = d_image->num_rows;
1384                 s_image->num_cols = d_image->num_cols;
1385         }
1386
1387         ctx->num_tiles = d_image->num_cols * d_image->num_rows;
1388         ctx->rot_mode = rot_mode;
1389
1390         ret = fill_image(ctx, s_image, in, IMAGE_CONVERT_IN);
1391         if (ret)
1392                 goto out_free;
1393         ret = fill_image(ctx, d_image, out, IMAGE_CONVERT_OUT);
1394         if (ret)
1395                 goto out_free;
1396
1397         calc_out_tile_map(ctx);
1398
1399         dump_format(ctx, s_image);
1400         dump_format(ctx, d_image);
1401
1402         ctx->complete = complete;
1403         ctx->complete_context = complete_context;
1404
1405         /*
1406          * Can we use double-buffering for this operation? If there is
1407          * only one tile (the whole image can be converted in a single
1408          * operation) there's no point in using double-buffering. Also,
1409          * the IPU's IDMAC channels allow only a single U and V plane
1410          * offset shared between both buffers, but these offsets change
1411          * for every tile, and therefore would have to be updated for
1412          * each buffer which is not possible. So double-buffering is
1413          * impossible when either the source or destination images are
1414          * a planar format (YUV420, YUV422P, etc.).
1415          */
1416         ctx->double_buffering = (ctx->num_tiles > 1 &&
1417                                  !s_image->fmt->planar &&
1418                                  !d_image->fmt->planar);
1419
1420         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
1421                 ret = alloc_dma_buf(priv, &ctx->rot_intermediate[0],
1422                                     d_image->tile[0].size);
1423                 if (ret)
1424                         goto out_free;
1425                 if (ctx->double_buffering) {
1426                         ret = alloc_dma_buf(priv,
1427                                             &ctx->rot_intermediate[1],
1428                                             d_image->tile[0].size);
1429                         if (ret)
1430                                 goto out_free_dmabuf0;
1431                 }
1432         }
1433
1434         spin_lock_irqsave(&chan->irqlock, flags);
1435
1436         get_res = list_empty(&chan->ctx_list);
1437
1438         list_add_tail(&ctx->list, &chan->ctx_list);
1439
1440         spin_unlock_irqrestore(&chan->irqlock, flags);
1441
1442         if (get_res) {
1443                 ret = get_ipu_resources(chan);
1444                 if (ret)
1445                         goto out_free_dmabuf1;
1446         }
1447
1448         return ctx;
1449
1450 out_free_dmabuf1:
1451         free_dma_buf(priv, &ctx->rot_intermediate[1]);
1452         spin_lock_irqsave(&chan->irqlock, flags);
1453         list_del(&ctx->list);
1454         spin_unlock_irqrestore(&chan->irqlock, flags);
1455 out_free_dmabuf0:
1456         free_dma_buf(priv, &ctx->rot_intermediate[0]);
1457 out_free:
1458         kfree(ctx);
1459         return ERR_PTR(ret);
1460 }
1461 EXPORT_SYMBOL_GPL(ipu_image_convert_prepare);
1462
1463 /*
1464  * Carry out a single image conversion run. Only the physaddr's of the input
1465  * and output image buffers are needed. The conversion context must have
1466  * been created previously with ipu_image_convert_prepare().
1467  */
1468 int ipu_image_convert_queue(struct ipu_image_convert_run *run)
1469 {
1470         struct ipu_image_convert_chan *chan;
1471         struct ipu_image_convert_priv *priv;
1472         struct ipu_image_convert_ctx *ctx;
1473         unsigned long flags;
1474         int ret = 0;
1475
1476         if (!run || !run->ctx || !run->in_phys || !run->out_phys)
1477                 return -EINVAL;
1478
1479         ctx = run->ctx;
1480         chan = ctx->chan;
1481         priv = chan->priv;
1482
1483         dev_dbg(priv->ipu->dev, "%s: task %u: ctx %p run %p\n", __func__,
1484                 chan->ic_task, ctx, run);
1485
1486         INIT_LIST_HEAD(&run->list);
1487
1488         spin_lock_irqsave(&chan->irqlock, flags);
1489
1490         if (ctx->aborting) {
1491                 ret = -EIO;
1492                 goto unlock;
1493         }
1494
1495         list_add_tail(&run->list, &chan->pending_q);
1496
1497         if (!chan->current_run) {
1498                 ret = do_run(run);
1499                 if (ret)
1500                         chan->current_run = NULL;
1501         }
1502 unlock:
1503         spin_unlock_irqrestore(&chan->irqlock, flags);
1504         return ret;
1505 }
1506 EXPORT_SYMBOL_GPL(ipu_image_convert_queue);
1507
1508 /* Abort any active or pending conversions for this context */
1509 static void __ipu_image_convert_abort(struct ipu_image_convert_ctx *ctx)
1510 {
1511         struct ipu_image_convert_chan *chan = ctx->chan;
1512         struct ipu_image_convert_priv *priv = chan->priv;
1513         struct ipu_image_convert_run *run, *active_run, *tmp;
1514         unsigned long flags;
1515         int run_count, ret;
1516         bool need_abort;
1517
1518         reinit_completion(&ctx->aborted);
1519
1520         spin_lock_irqsave(&chan->irqlock, flags);
1521
1522         /* move all remaining pending runs in this context to done_q */
1523         list_for_each_entry_safe(run, tmp, &chan->pending_q, list) {
1524                 if (run->ctx != ctx)
1525                         continue;
1526                 run->status = -EIO;
1527                 list_move_tail(&run->list, &chan->done_q);
1528         }
1529
1530         run_count = get_run_count(ctx, &chan->done_q);
1531         active_run = (chan->current_run && chan->current_run->ctx == ctx) ?
1532                 chan->current_run : NULL;
1533
1534         need_abort = (run_count || active_run);
1535
1536         ctx->aborting = true;
1537
1538         spin_unlock_irqrestore(&chan->irqlock, flags);
1539
1540         if (!need_abort) {
1541                 dev_dbg(priv->ipu->dev,
1542                         "%s: task %u: no abort needed for ctx %p\n",
1543                         __func__, chan->ic_task, ctx);
1544                 return;
1545         }
1546
1547         dev_dbg(priv->ipu->dev,
1548                 "%s: task %u: wait for completion: %d runs, active run %p\n",
1549                 __func__, chan->ic_task, run_count, active_run);
1550
1551         ret = wait_for_completion_timeout(&ctx->aborted,
1552                                           msecs_to_jiffies(10000));
1553         if (ret == 0) {
1554                 dev_warn(priv->ipu->dev, "%s: timeout\n", __func__);
1555                 force_abort(ctx);
1556         }
1557 }
1558
1559 void ipu_image_convert_abort(struct ipu_image_convert_ctx *ctx)
1560 {
1561         __ipu_image_convert_abort(ctx);
1562         ctx->aborting = false;
1563 }
1564 EXPORT_SYMBOL_GPL(ipu_image_convert_abort);
1565
1566 /* Unprepare image conversion context */
1567 void ipu_image_convert_unprepare(struct ipu_image_convert_ctx *ctx)
1568 {
1569         struct ipu_image_convert_chan *chan = ctx->chan;
1570         struct ipu_image_convert_priv *priv = chan->priv;
1571         unsigned long flags;
1572         bool put_res;
1573
1574         /* make sure no runs are hanging around */
1575         __ipu_image_convert_abort(ctx);
1576
1577         dev_dbg(priv->ipu->dev, "%s: task %u: removing ctx %p\n", __func__,
1578                 chan->ic_task, ctx);
1579
1580         spin_lock_irqsave(&chan->irqlock, flags);
1581
1582         list_del(&ctx->list);
1583
1584         put_res = list_empty(&chan->ctx_list);
1585
1586         spin_unlock_irqrestore(&chan->irqlock, flags);
1587
1588         if (put_res)
1589                 release_ipu_resources(chan);
1590
1591         free_dma_buf(priv, &ctx->rot_intermediate[1]);
1592         free_dma_buf(priv, &ctx->rot_intermediate[0]);
1593
1594         kfree(ctx);
1595 }
1596 EXPORT_SYMBOL_GPL(ipu_image_convert_unprepare);
1597
1598 /*
1599  * "Canned" asynchronous single image conversion. Allocates and returns
1600  * a new conversion run.  On successful return the caller must free the
1601  * run and call ipu_image_convert_unprepare() after conversion completes.
1602  */
1603 struct ipu_image_convert_run *
1604 ipu_image_convert(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
1605                   struct ipu_image *in, struct ipu_image *out,
1606                   enum ipu_rotate_mode rot_mode,
1607                   ipu_image_convert_cb_t complete,
1608                   void *complete_context)
1609 {
1610         struct ipu_image_convert_ctx *ctx;
1611         struct ipu_image_convert_run *run;
1612         int ret;
1613
1614         ctx = ipu_image_convert_prepare(ipu, ic_task, in, out, rot_mode,
1615                                         complete, complete_context);
1616         if (IS_ERR(ctx))
1617                 return ERR_CAST(ctx);
1618
1619         run = kzalloc(sizeof(*run), GFP_KERNEL);
1620         if (!run) {
1621                 ipu_image_convert_unprepare(ctx);
1622                 return ERR_PTR(-ENOMEM);
1623         }
1624
1625         run->ctx = ctx;
1626         run->in_phys = in->phys0;
1627         run->out_phys = out->phys0;
1628
1629         ret = ipu_image_convert_queue(run);
1630         if (ret) {
1631                 ipu_image_convert_unprepare(ctx);
1632                 kfree(run);
1633                 return ERR_PTR(ret);
1634         }
1635
1636         return run;
1637 }
1638 EXPORT_SYMBOL_GPL(ipu_image_convert);
1639
1640 /* "Canned" synchronous single image conversion */
1641 static void image_convert_sync_complete(struct ipu_image_convert_run *run,
1642                                         void *data)
1643 {
1644         struct completion *comp = data;
1645
1646         complete(comp);
1647 }
1648
1649 int ipu_image_convert_sync(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
1650                            struct ipu_image *in, struct ipu_image *out,
1651                            enum ipu_rotate_mode rot_mode)
1652 {
1653         struct ipu_image_convert_run *run;
1654         struct completion comp;
1655         int ret;
1656
1657         init_completion(&comp);
1658
1659         run = ipu_image_convert(ipu, ic_task, in, out, rot_mode,
1660                                 image_convert_sync_complete, &comp);
1661         if (IS_ERR(run))
1662                 return PTR_ERR(run);
1663
1664         ret = wait_for_completion_timeout(&comp, msecs_to_jiffies(10000));
1665         ret = (ret == 0) ? -ETIMEDOUT : 0;
1666
1667         ipu_image_convert_unprepare(run->ctx);
1668         kfree(run);
1669
1670         return ret;
1671 }
1672 EXPORT_SYMBOL_GPL(ipu_image_convert_sync);
1673
1674 int ipu_image_convert_init(struct ipu_soc *ipu, struct device *dev)
1675 {
1676         struct ipu_image_convert_priv *priv;
1677         int i;
1678
1679         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
1680         if (!priv)
1681                 return -ENOMEM;
1682
1683         ipu->image_convert_priv = priv;
1684         priv->ipu = ipu;
1685
1686         for (i = 0; i < IC_NUM_TASKS; i++) {
1687                 struct ipu_image_convert_chan *chan = &priv->chan[i];
1688
1689                 chan->ic_task = i;
1690                 chan->priv = priv;
1691                 chan->dma_ch = &image_convert_dma_chan[i];
1692                 chan->out_eof_irq = -1;
1693                 chan->rot_out_eof_irq = -1;
1694
1695                 spin_lock_init(&chan->irqlock);
1696                 INIT_LIST_HEAD(&chan->ctx_list);
1697                 INIT_LIST_HEAD(&chan->pending_q);
1698                 INIT_LIST_HEAD(&chan->done_q);
1699         }
1700
1701         return 0;
1702 }
1703
1704 void ipu_image_convert_exit(struct ipu_soc *ipu)
1705 {
1706 }