2 * coretemp.c - Linux kernel module for hardware monitoring
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * Inspired from many hwmon drivers
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/smp.h>
38 #include <linux/moduleparam.h>
39 #include <linux/pci.h>
41 #include <asm/processor.h>
42 #include <asm/cpu_device_id.h>
44 #define DRVNAME "coretemp"
47 * force_tjmax only matters when TjMax can't be read from the CPU itself.
48 * When set, it replaces the driver's suboptimal heuristic.
50 static int force_tjmax;
51 module_param_named(tjmax, force_tjmax, int, 0444);
52 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
54 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
55 #define NUM_REAL_CORES 128 /* Number of Real cores per cpu */
56 #define CORETEMP_NAME_LENGTH 19 /* String Length of attrs */
57 #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
58 #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
59 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
61 #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
62 #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
63 #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
66 #define for_each_sibling(i, cpu) \
67 for_each_cpu(i, topology_sibling_cpumask(cpu))
69 #define for_each_sibling(i, cpu) for (i = 0; false; )
73 * Per-Core Temperature Data
74 * @last_updated: The time when the current temperature value was updated
75 * earlier (in jiffies).
76 * @cpu_core_id: The CPU Core from which temperature values should be read
77 * This value is passed as "id" field to rdmsr/wrmsr functions.
78 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
79 * from where the temperature values should be read.
80 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
81 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
82 * Otherwise, temp_data holds coretemp data.
83 * @valid: If this is 1, the current temperature is valid.
89 unsigned long last_updated;
96 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
97 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
98 struct attribute *attrs[TOTAL_ATTRS + 1];
99 struct attribute_group attr_group;
100 struct mutex update_lock;
103 /* Platform Data per Physical CPU */
104 struct platform_data {
105 struct device *hwmon_dev;
107 struct temp_data *core_data[MAX_CORE_DATA];
108 struct device_attribute name_attr;
112 struct list_head list;
113 struct platform_device *pdev;
117 static LIST_HEAD(pdev_list);
118 static DEFINE_MUTEX(pdev_list_mutex);
120 static ssize_t show_label(struct device *dev,
121 struct device_attribute *devattr, char *buf)
123 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
124 struct platform_data *pdata = dev_get_drvdata(dev);
125 struct temp_data *tdata = pdata->core_data[attr->index];
127 if (tdata->is_pkg_data)
128 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
130 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
133 static ssize_t show_crit_alarm(struct device *dev,
134 struct device_attribute *devattr, char *buf)
137 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
138 struct platform_data *pdata = dev_get_drvdata(dev);
139 struct temp_data *tdata = pdata->core_data[attr->index];
141 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
143 return sprintf(buf, "%d\n", (eax >> 5) & 1);
146 static ssize_t show_tjmax(struct device *dev,
147 struct device_attribute *devattr, char *buf)
149 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
150 struct platform_data *pdata = dev_get_drvdata(dev);
152 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
155 static ssize_t show_ttarget(struct device *dev,
156 struct device_attribute *devattr, char *buf)
158 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
159 struct platform_data *pdata = dev_get_drvdata(dev);
161 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
164 static ssize_t show_temp(struct device *dev,
165 struct device_attribute *devattr, char *buf)
168 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
169 struct platform_data *pdata = dev_get_drvdata(dev);
170 struct temp_data *tdata = pdata->core_data[attr->index];
172 mutex_lock(&tdata->update_lock);
174 /* Check whether the time interval has elapsed */
175 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
176 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
178 * Ignore the valid bit. In all observed cases the register
179 * value is either low or zero if the valid bit is 0.
180 * Return it instead of reporting an error which doesn't
181 * really help at all.
183 tdata->temp = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000;
185 tdata->last_updated = jiffies;
188 mutex_unlock(&tdata->update_lock);
189 return sprintf(buf, "%d\n", tdata->temp);
197 static const struct tjmax_pci tjmax_pci_table[] = {
198 { 0x0708, 110000 }, /* CE41x0 (Sodaville ) */
199 { 0x0c72, 102000 }, /* Atom S1240 (Centerton) */
200 { 0x0c73, 95000 }, /* Atom S1220 (Centerton) */
201 { 0x0c75, 95000 }, /* Atom S1260 (Centerton) */
209 static const struct tjmax tjmax_table[] = {
210 { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
211 { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
222 static const struct tjmax_model tjmax_model_table[] = {
223 { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
224 { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others
225 * Note: Also matches 230 and 330,
226 * which are covered by tjmax_table
228 { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
229 * Note: TjMax for E6xxT is 110C, but CPU type
230 * is undetectable by software
232 { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
233 { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z27x0) */
234 { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx)
235 * Also matches S12x0 (stepping 9), covered by
240 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
242 /* The 100C is default for both mobile and non mobile CPUs */
245 int tjmax_ee = 85000;
250 struct pci_dev *host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
253 * Explicit tjmax table entries override heuristics.
254 * First try PCI host bridge IDs, followed by model ID strings
255 * and model/stepping information.
257 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) {
258 for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) {
259 if (host_bridge->device == tjmax_pci_table[i].device) {
260 pci_dev_put(host_bridge);
261 return tjmax_pci_table[i].tjmax;
265 pci_dev_put(host_bridge);
267 for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
268 if (strstr(c->x86_model_id, tjmax_table[i].id))
269 return tjmax_table[i].tjmax;
272 for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
273 const struct tjmax_model *tm = &tjmax_model_table[i];
274 if (c->x86_model == tm->model &&
275 (tm->mask == ANY || c->x86_stepping == tm->mask))
279 /* Early chips have no MSR for TjMax */
281 if (c->x86_model == 0xf && c->x86_stepping < 4)
284 if (c->x86_model > 0xe && usemsr_ee) {
288 * Now we can detect the mobile CPU using Intel provided table
289 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
290 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
292 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
295 "Unable to access MSR 0x17, assuming desktop"
298 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
300 * Trust bit 28 up to Penryn, I could not find any
301 * documentation on that; if you happen to know
302 * someone at Intel please ask
306 /* Platform ID bits 52:50 (EDX starts at bit 32) */
307 platform_id = (edx >> 18) & 0x7;
310 * Mobile Penryn CPU seems to be platform ID 7 or 5
313 if (c->x86_model == 0x17 &&
314 (platform_id == 5 || platform_id == 7)) {
316 * If MSR EE bit is set, set it to 90 degrees C,
317 * otherwise 105 degrees C
326 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
329 "Unable to access MSR 0xEE, for Tjmax, left"
331 } else if (eax & 0x40000000) {
334 } else if (tjmax == 100000) {
336 * If we don't use msr EE it means we are desktop CPU
337 * (with exeception of Atom)
339 dev_warn(dev, "Using relative temperature scale!\n");
345 static bool cpu_has_tjmax(struct cpuinfo_x86 *c)
347 u8 model = c->x86_model;
349 return model > 0xe &&
357 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
364 * A new feature of current Intel(R) processors, the
365 * IA32_TEMPERATURE_TARGET contains the TjMax value
367 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
369 if (cpu_has_tjmax(c))
370 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
372 val = (eax >> 16) & 0xff;
374 * If the TjMax is not plausible, an assumption
378 dev_dbg(dev, "TjMax is %d degrees C\n", val);
384 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
386 return force_tjmax * 1000;
390 * An assumption is made for early CPUs and unreadable MSR.
391 * NOTE: the calculated value may not be correct.
393 return adjust_tjmax(c, id, dev);
396 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
400 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
401 struct device_attribute *devattr, char *buf) = {
402 show_label, show_crit_alarm, show_temp, show_tjmax,
404 static const char *const suffixes[TOTAL_ATTRS] = {
405 "label", "crit_alarm", "input", "crit", "max"
408 for (i = 0; i < tdata->attr_size; i++) {
409 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH,
410 "temp%d_%s", attr_no, suffixes[i]);
411 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
412 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
413 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
414 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
415 tdata->sd_attrs[i].index = attr_no;
416 tdata->attrs[i] = &tdata->sd_attrs[i].dev_attr.attr;
418 tdata->attr_group.attrs = tdata->attrs;
419 return sysfs_create_group(&dev->kobj, &tdata->attr_group);
423 static int chk_ucode_version(unsigned int cpu)
425 struct cpuinfo_x86 *c = &cpu_data(cpu);
428 * Check if we have problem with errata AE18 of Core processors:
429 * Readings might stop update when processor visited too deep sleep,
430 * fixed for stepping D0 (6EC).
432 if (c->x86_model == 0xe && c->x86_stepping < 0xc && c->microcode < 0x39) {
433 pr_err("Errata AE18 not fixed/*(DEBLOBBED)*/\n");
439 static struct platform_device *coretemp_get_pdev(unsigned int cpu)
441 u16 phys_proc_id = TO_PHYS_ID(cpu);
442 struct pdev_entry *p;
444 mutex_lock(&pdev_list_mutex);
446 list_for_each_entry(p, &pdev_list, list)
447 if (p->phys_proc_id == phys_proc_id) {
448 mutex_unlock(&pdev_list_mutex);
452 mutex_unlock(&pdev_list_mutex);
456 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
458 struct temp_data *tdata;
460 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
464 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
465 MSR_IA32_THERM_STATUS;
466 tdata->is_pkg_data = pkg_flag;
468 tdata->cpu_core_id = TO_CORE_ID(cpu);
469 tdata->attr_size = MAX_CORE_ATTRS;
470 mutex_init(&tdata->update_lock);
474 static int create_core_data(struct platform_device *pdev, unsigned int cpu,
477 struct temp_data *tdata;
478 struct platform_data *pdata = platform_get_drvdata(pdev);
479 struct cpuinfo_x86 *c = &cpu_data(cpu);
484 * Find attr number for sysfs:
485 * We map the attr number to core id of the CPU
486 * The attr number is always core id + 2
487 * The Pkgtemp will always show up as temp1_*, if available
489 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
491 if (attr_no > MAX_CORE_DATA - 1)
495 * Provide a single set of attributes for all HT siblings of a core
496 * to avoid duplicate sensors (the processor ID and core ID of all
497 * HT siblings of a core are the same).
498 * Skip if a HT sibling of this core is already registered.
499 * This is not an error.
501 if (pdata->core_data[attr_no] != NULL)
504 tdata = init_temp_data(cpu, pkg_flag);
508 /* Test if we can access the status register */
509 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
513 /* We can access status register. Get Critical Temperature */
514 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
517 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
518 * The target temperature is available on older CPUs but not in this
519 * register. Atoms don't have the register at all.
521 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
522 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
526 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
531 pdata->core_data[attr_no] = tdata;
533 /* Create sysfs interfaces */
534 err = create_core_attrs(tdata, pdata->hwmon_dev, attr_no);
540 pdata->core_data[attr_no] = NULL;
545 static void coretemp_add_core(unsigned int cpu, int pkg_flag)
547 struct platform_device *pdev = coretemp_get_pdev(cpu);
553 err = create_core_data(pdev, cpu, pkg_flag);
555 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
558 static void coretemp_remove_core(struct platform_data *pdata,
561 struct temp_data *tdata = pdata->core_data[indx];
563 /* if we errored on add then this is already gone */
567 /* Remove the sysfs attributes */
568 sysfs_remove_group(&pdata->hwmon_dev->kobj, &tdata->attr_group);
570 kfree(pdata->core_data[indx]);
571 pdata->core_data[indx] = NULL;
574 static int coretemp_probe(struct platform_device *pdev)
576 struct device *dev = &pdev->dev;
577 struct platform_data *pdata;
579 /* Initialize the per-package data structures */
580 pdata = devm_kzalloc(dev, sizeof(struct platform_data), GFP_KERNEL);
584 pdata->phys_proc_id = pdev->id;
585 platform_set_drvdata(pdev, pdata);
587 pdata->hwmon_dev = devm_hwmon_device_register_with_groups(dev, DRVNAME,
589 return PTR_ERR_OR_ZERO(pdata->hwmon_dev);
592 static int coretemp_remove(struct platform_device *pdev)
594 struct platform_data *pdata = platform_get_drvdata(pdev);
597 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
598 if (pdata->core_data[i])
599 coretemp_remove_core(pdata, i);
604 static struct platform_driver coretemp_driver = {
608 .probe = coretemp_probe,
609 .remove = coretemp_remove,
612 static int coretemp_device_add(unsigned int cpu)
615 struct platform_device *pdev;
616 struct pdev_entry *pdev_entry;
618 mutex_lock(&pdev_list_mutex);
620 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
623 pr_err("Device allocation failed\n");
627 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
630 goto exit_device_put;
633 err = platform_device_add(pdev);
635 pr_err("Device addition failed (%d)\n", err);
636 goto exit_device_free;
639 pdev_entry->pdev = pdev;
640 pdev_entry->phys_proc_id = pdev->id;
642 list_add_tail(&pdev_entry->list, &pdev_list);
643 mutex_unlock(&pdev_list_mutex);
650 platform_device_put(pdev);
652 mutex_unlock(&pdev_list_mutex);
656 static void coretemp_device_remove(unsigned int cpu)
658 struct pdev_entry *p, *n;
659 u16 phys_proc_id = TO_PHYS_ID(cpu);
661 mutex_lock(&pdev_list_mutex);
662 list_for_each_entry_safe(p, n, &pdev_list, list) {
663 if (p->phys_proc_id != phys_proc_id)
665 platform_device_unregister(p->pdev);
669 mutex_unlock(&pdev_list_mutex);
672 static bool is_any_core_online(struct platform_data *pdata)
676 /* Find online cores, except pkgtemp data */
677 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
678 if (pdata->core_data[i] &&
679 !pdata->core_data[i]->is_pkg_data) {
686 static void get_core_online(unsigned int cpu)
688 struct cpuinfo_x86 *c = &cpu_data(cpu);
689 struct platform_device *pdev = coretemp_get_pdev(cpu);
693 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
694 * sensors. We check this bit only, all the early CPUs
695 * without thermal sensors will be filtered out.
697 if (!cpu_has(c, X86_FEATURE_DTHERM))
701 /* Check the microcode version of the CPU */
702 if (chk_ucode_version(cpu))
706 * Alright, we have DTS support.
707 * We are bringing the _first_ core in this pkg
708 * online. So, initialize per-pkg data structures and
709 * then bring this core online.
711 err = coretemp_device_add(cpu);
715 * Check whether pkgtemp support is available.
716 * If so, add interfaces for pkgtemp.
718 if (cpu_has(c, X86_FEATURE_PTS))
719 coretemp_add_core(cpu, 1);
722 * Physical CPU device already exists.
723 * So, just add interfaces for this core.
725 coretemp_add_core(cpu, 0);
728 static void put_core_offline(unsigned int cpu)
731 struct platform_data *pdata;
732 struct platform_device *pdev = coretemp_get_pdev(cpu);
734 /* If the physical CPU device does not exist, just return */
738 pdata = platform_get_drvdata(pdev);
740 indx = TO_ATTR_NO(cpu);
742 /* The core id is too big, just return */
743 if (indx > MAX_CORE_DATA - 1)
746 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
747 coretemp_remove_core(pdata, indx);
750 * If a HT sibling of a core is taken offline, but another HT sibling
751 * of the same core is still online, register the alternate sibling.
752 * This ensures that exactly one set of attributes is provided as long
753 * as at least one HT sibling of a core is online.
755 for_each_sibling(i, cpu) {
759 * Display temperature sensor data for one HT sibling
760 * per core only, so abort the loop after one such
761 * sibling has been found.
767 * If all cores in this pkg are offline, remove the device.
768 * coretemp_device_remove calls unregister_platform_device,
769 * which in turn calls coretemp_remove. This removes the
770 * pkgtemp entry and does other clean ups.
772 if (!is_any_core_online(pdata))
773 coretemp_device_remove(cpu);
776 static int coretemp_cpu_callback(struct notifier_block *nfb,
777 unsigned long action, void *hcpu)
779 unsigned int cpu = (unsigned long) hcpu;
783 case CPU_DOWN_FAILED:
784 get_core_online(cpu);
786 case CPU_DOWN_PREPARE:
787 put_core_offline(cpu);
793 static struct notifier_block coretemp_cpu_notifier __refdata = {
794 .notifier_call = coretemp_cpu_callback,
797 static const struct x86_cpu_id __initconst coretemp_ids[] = {
798 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
801 MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
803 static int __init coretemp_init(void)
808 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
809 * sensors. We check this bit only, all the early CPUs
810 * without thermal sensors will be filtered out.
812 if (!x86_match_cpu(coretemp_ids))
815 err = platform_driver_register(&coretemp_driver);
819 cpu_notifier_register_begin();
820 for_each_online_cpu(i)
823 #ifndef CONFIG_HOTPLUG_CPU
824 if (list_empty(&pdev_list)) {
825 cpu_notifier_register_done();
827 goto exit_driver_unreg;
831 __register_hotcpu_notifier(&coretemp_cpu_notifier);
832 cpu_notifier_register_done();
835 #ifndef CONFIG_HOTPLUG_CPU
837 platform_driver_unregister(&coretemp_driver);
843 static void __exit coretemp_exit(void)
845 struct pdev_entry *p, *n;
847 cpu_notifier_register_begin();
848 __unregister_hotcpu_notifier(&coretemp_cpu_notifier);
849 mutex_lock(&pdev_list_mutex);
850 list_for_each_entry_safe(p, n, &pdev_list, list) {
851 platform_device_unregister(p->pdev);
855 mutex_unlock(&pdev_list_mutex);
856 cpu_notifier_register_done();
857 platform_driver_unregister(&coretemp_driver);
860 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
861 MODULE_DESCRIPTION("Intel Core temperature monitor");
862 MODULE_LICENSE("GPL");
864 module_init(coretemp_init)
865 module_exit(coretemp_exit)