drivers/hwmon/it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8620E  Super I/O chip w/LPC interface
  15  *            IT8622E  Super I/O chip w/LPC interface
  16  *            IT8623E  Super I/O chip w/LPC interface
  17  *            IT8628E  Super I/O chip w/LPC interface
  18  *            IT8705F  Super I/O chip w/LPC interface
  19  *            IT8712F  Super I/O chip w/LPC interface
  20  *            IT8716F  Super I/O chip w/LPC interface
  21  *            IT8718F  Super I/O chip w/LPC interface
  22  *            IT8720F  Super I/O chip w/LPC interface
  23  *            IT8721F  Super I/O chip w/LPC interface
  24  *            IT8726F  Super I/O chip w/LPC interface
  25  *            IT8728F  Super I/O chip w/LPC interface
  26  *            IT8732F  Super I/O chip w/LPC interface
  27  *            IT8758E  Super I/O chip w/LPC interface
  28  *            IT8771E  Super I/O chip w/LPC interface
  29  *            IT8772E  Super I/O chip w/LPC interface
  30  *            IT8781F  Super I/O chip w/LPC interface
  31  *            IT8782F  Super I/O chip w/LPC interface
  32  *            IT8783E/F Super I/O chip w/LPC interface
  33  *            IT8786E  Super I/O chip w/LPC interface
  34  *            IT8790E  Super I/O chip w/LPC interface
  35  *            IT8792E  Super I/O chip w/LPC interface
  36  *            Sis950   A clone of the IT8705F
  37  *
  38  *  Copyright (C) 2001 Chris Gauthron
  39  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  40  *
  41  *  This program is free software; you can redistribute it and/or modify
  42  *  it under the terms of the GNU General Public License as published by
  43  *  the Free Software Foundation; either version 2 of the License, or
  44  *  (at your option) any later version.
  45  *
  46  *  This program is distributed in the hope that it will be useful,
  47  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  48  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  49  *  GNU General Public License for more details.
  50  */
  51
  52 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  53
  54 #include <linux/bitops.h>
  55 #include <linux/module.h>
  56 #include <linux/init.h>
  57 #include <linux/slab.h>
  58 #include <linux/jiffies.h>
  59 #include <linux/platform_device.h>
  60 #include <linux/hwmon.h>
  61 #include <linux/hwmon-sysfs.h>
  62 #include <linux/hwmon-vid.h>
  63 #include <linux/err.h>
  64 #include <linux/mutex.h>
  65 #include <linux/sysfs.h>
  66 #include <linux/string.h>
  67 #include <linux/dmi.h>
  68 #include <linux/acpi.h>
  69 #include <linux/io.h>
  70
  71 #define DRVNAME "it87"
  72
  73 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  74              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  75              it8792, it8603, it8620, it8622, it8628 };
  76
  77 static unsigned short force_id;
  78 module_param(force_id, ushort, 0);
  79 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  80
  81 static struct platform_device *it87_pdev[2];
  82
  83 #define REG_2E  0x2e    /* The register to read/write */
  84 #define REG_4E  0x4e    /* Secondary register to read/write */
  85
  86 #define DEV     0x07    /* Register: Logical device select */
  87 #define PME     0x04    /* The device with the fan registers in it */
  88
  89 /* The device with the IT8718F/IT8720F VID value in it */
  90 #define GPIO    0x07
  91
  92 #define DEVID   0x20    /* Register: Device ID */
  93 #define DEVREV  0x22    /* Register: Device Revision */
  94
  95 static inline int superio_inb(int ioreg, int reg)
  96 {
  97         outb(reg, ioreg);
  98         return inb(ioreg + 1);
  99 }
 100
 101 static inline void superio_outb(int ioreg, int reg, int val)
 102 {
 103         outb(reg, ioreg);
 104         outb(val, ioreg + 1);
 105 }
 106
 107 static int superio_inw(int ioreg, int reg)
 108 {
 109         int val;
 110
 111         outb(reg++, ioreg);
 112         val = inb(ioreg + 1) << 8;
 113         outb(reg, ioreg);
 114         val |= inb(ioreg + 1);
 115         return val;
 116 }
 117
 118 static inline void superio_select(int ioreg, int ldn)
 119 {
 120         outb(DEV, ioreg);
 121         outb(ldn, ioreg + 1);
 122 }
 123
 124 static inline int superio_enter(int ioreg)
 125 {
 126         /*
 127          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 128          */
 129         if (!request_muxed_region(ioreg, 2, DRVNAME))
 130                 return -EBUSY;
 131
 132         outb(0x87, ioreg);
 133         outb(0x01, ioreg);
 134         outb(0x55, ioreg);
 135         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 136         return 0;
 137 }
 138
 139 static inline void superio_exit(int ioreg)
 140 {
 141         outb(0x02, ioreg);
 142         outb(0x02, ioreg + 1);
 143         release_region(ioreg, 2);
 144 }
 145
 146 /* Logical device 4 registers */
 147 #define IT8712F_DEVID 0x8712
 148 #define IT8705F_DEVID 0x8705
 149 #define IT8716F_DEVID 0x8716
 150 #define IT8718F_DEVID 0x8718
 151 #define IT8720F_DEVID 0x8720
 152 #define IT8721F_DEVID 0x8721
 153 #define IT8726F_DEVID 0x8726
 154 #define IT8728F_DEVID 0x8728
 155 #define IT8732F_DEVID 0x8732
 156 #define IT8792E_DEVID 0x8733
 157 #define IT8771E_DEVID 0x8771
 158 #define IT8772E_DEVID 0x8772
 159 #define IT8781F_DEVID 0x8781
 160 #define IT8782F_DEVID 0x8782
 161 #define IT8783E_DEVID 0x8783
 162 #define IT8786E_DEVID 0x8786
 163 #define IT8790E_DEVID 0x8790
 164 #define IT8603E_DEVID 0x8603
 165 #define IT8620E_DEVID 0x8620
 166 #define IT8622E_DEVID 0x8622
 167 #define IT8623E_DEVID 0x8623
 168 #define IT8628E_DEVID 0x8628
 169 #define IT87_ACT_REG  0x30
 170 #define IT87_BASE_REG 0x60
 171
 172 /* Logical device 7 registers (IT8712F and later) */
 173 #define IT87_SIO_GPIO1_REG      0x25
 174 #define IT87_SIO_GPIO2_REG      0x26
 175 #define IT87_SIO_GPIO3_REG      0x27
 176 #define IT87_SIO_GPIO4_REG      0x28
 177 #define IT87_SIO_GPIO5_REG      0x29
 178 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 179 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 180 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 181 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 182 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 183
 184 /* Update battery voltage after every reading if true */
 185 static bool update_vbat;
 186
 187 /* Not all BIOSes properly configure the PWM registers */
 188 static bool fix_pwm_polarity;
 189
 190 /* Many IT87 constants specified below */
 191
 192 /* Length of ISA address segment */
 193 #define IT87_EXTENT 8
 194
 195 /* Length of ISA address segment for Environmental Controller */
 196 #define IT87_EC_EXTENT 2
 197
 198 /* Offset of EC registers from ISA base address */
 199 #define IT87_EC_OFFSET 5
 200
 201 /* Where are the ISA address/data registers relative to the EC base address */
 202 #define IT87_ADDR_REG_OFFSET 0
 203 #define IT87_DATA_REG_OFFSET 1
 204
 205 /*----- The IT87 registers -----*/
 206
 207 #define IT87_REG_CONFIG        0x00
 208
 209 #define IT87_REG_ALARM1        0x01
 210 #define IT87_REG_ALARM2        0x02
 211 #define IT87_REG_ALARM3        0x03
 212
 213 /*
 214  * The IT8718F and IT8720F have the VID value in a different register, in
 215  * Super-I/O configuration space.
 216  */
 217 #define IT87_REG_VID           0x0a
 218 /*
 219  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 220  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 221  * mode.
 222  */
 223 #define IT87_REG_FAN_DIV       0x0b
 224 #define IT87_REG_FAN_16BIT     0x0c
 225
 226 /*
 227  * Monitors:
 228  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 229  * - up to 6 temp (1 to 6)
 230  * - up to 6 fan (1 to 6)
 231  */
 232
 233 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 234 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 235 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 236 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 237 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 238
 239 #define IT87_REG_FAN_MAIN_CTRL 0x13
 240 #define IT87_REG_FAN_CTL       0x14
 241 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 242 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 243
 244 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 245                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 246
 247 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 248
 249 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 250 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 251 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 252 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 253
 254 #define IT87_REG_VIN_ENABLE    0x50
 255 #define IT87_REG_TEMP_ENABLE   0x51
 256 #define IT87_REG_TEMP_EXTRA    0x55
 257 #define IT87_REG_BEEP_ENABLE   0x5c
 258
 259 #define IT87_REG_CHIPID        0x58
 260
 261 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 262
 263 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 264 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 265
 266 #define IT87_REG_TEMP456_ENABLE 0x77
 267
 268 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 269 #define NUM_VIN_LIMIT           8
 270 #define NUM_TEMP                6
 271 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 272 #define NUM_TEMP_LIMIT          3
 273 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 274 #define NUM_FAN_DIV             3
 275 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 276 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 277
 278 struct it87_devices {
 279         const char *name;
 280         const char * const suffix;
 281         u32 features;
 282         u8 peci_mask;
 283         u8 old_peci_mask;
 284 };
 285
 286 #define FEAT_12MV_ADC           BIT(0)
 287 #define FEAT_NEWER_AUTOPWM      BIT(1)
 288 #define FEAT_OLD_AUTOPWM        BIT(2)
 289 #define FEAT_16BIT_FANS         BIT(3)
 290 #define FEAT_TEMP_OFFSET        BIT(4)
 291 #define FEAT_TEMP_PECI          BIT(5)
 292 #define FEAT_TEMP_OLD_PECI      BIT(6)
 293 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 294 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 295 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 296 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 297 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 298 #define FEAT_10_9MV_ADC         BIT(12)
 299 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 300 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 301 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 302 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 303 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 304 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 305
 306 static const struct it87_devices it87_devices[] = {
 307         [it87] = {
 308                 .name = "it87",
 309                 .suffix = "F",
 310                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 311         },
 312         [it8712] = {
 313                 .name = "it8712",
 314                 .suffix = "F",
 315                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 316                                                 /* may need to overwrite */
 317         },
 318         [it8716] = {
 319                 .name = "it8716",
 320                 .suffix = "F",
 321                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 322                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 323         },
 324         [it8718] = {
 325                 .name = "it8718",
 326                 .suffix = "F",
 327                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 328                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 329                   | FEAT_PWM_FREQ2,
 330                 .old_peci_mask = 0x4,
 331         },
 332         [it8720] = {
 333                 .name = "it8720",
 334                 .suffix = "F",
 335                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 336                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 337                   | FEAT_PWM_FREQ2,
 338                 .old_peci_mask = 0x4,
 339         },
 340         [it8721] = {
 341                 .name = "it8721",
 342                 .suffix = "F",
 343                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 344                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 345                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 346                   | FEAT_PWM_FREQ2,
 347                 .peci_mask = 0x05,
 348                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 349         },
 350         [it8728] = {
 351                 .name = "it8728",
 352                 .suffix = "F",
 353                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 354                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 355                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 356                 .peci_mask = 0x07,
 357         },
 358         [it8732] = {
 359                 .name = "it8732",
 360                 .suffix = "F",
 361                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 362                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 363                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 364                 .peci_mask = 0x07,
 365                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 366         },
 367         [it8771] = {
 368                 .name = "it8771",
 369                 .suffix = "E",
 370                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 371                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 372                   | FEAT_PWM_FREQ2,
 373                                 /* PECI: guesswork */
 374                                 /* 12mV ADC (OHM) */
 375                                 /* 16 bit fans (OHM) */
 376                                 /* three fans, always 16 bit (guesswork) */
 377                 .peci_mask = 0x07,
 378         },
 379         [it8772] = {
 380                 .name = "it8772",
 381                 .suffix = "E",
 382                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 383                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 384                   | FEAT_PWM_FREQ2,
 385                                 /* PECI (coreboot) */
 386                                 /* 12mV ADC (HWSensors4, OHM) */
 387                                 /* 16 bit fans (HWSensors4, OHM) */
 388                                 /* three fans, always 16 bit (datasheet) */
 389                 .peci_mask = 0x07,
 390         },
 391         [it8781] = {
 392                 .name = "it8781",
 393                 .suffix = "F",
 394                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 395                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 396                 .old_peci_mask = 0x4,
 397         },
 398         [it8782] = {
 399                 .name = "it8782",
 400                 .suffix = "F",
 401                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 402                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 403                 .old_peci_mask = 0x4,
 404         },
 405         [it8783] = {
 406                 .name = "it8783",
 407                 .suffix = "E/F",
 408                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 409                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 410                 .old_peci_mask = 0x4,
 411         },
 412         [it8786] = {
 413                 .name = "it8786",
 414                 .suffix = "E",
 415                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 416                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 417                   | FEAT_PWM_FREQ2,
 418                 .peci_mask = 0x07,
 419         },
 420         [it8790] = {
 421                 .name = "it8790",
 422                 .suffix = "E",
 423                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 424                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 425                   | FEAT_PWM_FREQ2,
 426                 .peci_mask = 0x07,
 427         },
 428         [it8792] = {
 429                 .name = "it8792",
 430                 .suffix = "E",
 431                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 432                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 433                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 434                 .peci_mask = 0x07,
 435                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 436         },
 437         [it8603] = {
 438                 .name = "it8603",
 439                 .suffix = "E",
 440                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 441                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 442                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 443                 .peci_mask = 0x07,
 444         },
 445         [it8620] = {
 446                 .name = "it8620",
 447                 .suffix = "E",
 448                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 449                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 450                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 451                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 452                 .peci_mask = 0x07,
 453         },
 454         [it8622] = {
 455                 .name = "it8622",
 456                 .suffix = "E",
 457                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 458                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 459                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 460                   | FEAT_AVCC3 | FEAT_VIN3_5V,
 461                 .peci_mask = 0x07,
 462         },
 463         [it8628] = {
 464                 .name = "it8628",
 465                 .suffix = "E",
 466                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 467                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 468                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 469                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 470                 .peci_mask = 0x07,
 471         },
 472 };
 473
 474 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 475 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 476 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 477 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 478 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 479 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 480 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 481                                  ((data)->peci_mask & BIT(nr)))
 482 #define has_temp_old_peci(data, nr) \
 483                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 484                                  ((data)->old_peci_mask & BIT(nr)))
 485 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 486 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 487                                                      FEAT_SIX_FANS))
 488 #define has_vid(data)           ((data)->features & FEAT_VID)
 489 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 490 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 491 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 492 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 493                                                      | FEAT_SIX_PWM))
 494 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 495 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 496 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 497 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 498 #define has_scaling(data)       ((data)->features & (FEAT_12MV_ADC | \
 499                                                      FEAT_10_9MV_ADC))
 500
 501 struct it87_sio_data {
 502         int sioaddr;
 503         enum chips type;
 504         /* Values read from Super-I/O config space */
 505         u8 revision;
 506         u8 vid_value;
 507         u8 beep_pin;
 508         u8 internal;    /* Internal sensors can be labeled */
 509         bool need_in7_reroute;
 510         /* Features skipped based on config or DMI */
 511         u16 skip_in;
 512         u8 skip_vid;
 513         u8 skip_fan;
 514         u8 skip_pwm;
 515         u8 skip_temp;
 516 };
 517
 518 /*
 519  * For each registered chip, we need to keep some data in memory.
 520  * The structure is dynamically allocated.
 521  */
 522 struct it87_data {
 523         const struct attribute_group *groups[7];
 524         int sioaddr;
 525         enum chips type;
 526         u32 features;
 527         u8 peci_mask;
 528         u8 old_peci_mask;
 529
 530         unsigned short addr;
 531         const char *name;
 532         struct mutex update_lock;
 533         char valid;             /* !=0 if following fields are valid */
 534         unsigned long last_updated;     /* In jiffies */
 535
 536         u16 in_scaled;          /* Internal voltage sensors are scaled */
 537         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 538         u16 has_in;             /* Bitfield, voltage sensors enabled */
 539         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 540         bool need_in7_reroute;
 541         u8 has_fan;             /* Bitfield, fans enabled */
 542         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 543         u8 has_temp;            /* Bitfield, temp sensors enabled */
 544         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 545         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 546         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 547         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 548         bool has_vid;           /* True if VID supported */
 549         u8 vid;                 /* Register encoding, combined */
 550         u8 vrm;
 551         u32 alarms;             /* Register encoding, combined */
 552         bool has_beep;          /* true if beep supported */
 553         u8 beeps;               /* Register encoding */
 554         u8 fan_main_ctrl;       /* Register value */
 555         u8 fan_ctl;             /* Register value */
 556
 557         /*
 558          * The following 3 arrays correspond to the same registers up to
 559          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 560          * 7, and we want to preserve settings on mode changes, so we have
 561          * to track all values separately.
 562          * Starting with the IT8721F, the manual PWM duty cycles are stored
 563          * in separate registers (8-bit values), so the separate tracking
 564          * is no longer needed, but it is still done to keep the driver
 565          * simple.
 566          */
 567         u8 has_pwm;             /* Bitfield, pwm control enabled */
 568         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 569         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 570         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 571
 572         /* Automatic fan speed control registers */
 573         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 574         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 575 };
 576
 577 static int adc_lsb(const struct it87_data *data, int nr)
 578 {
 579         int lsb;
 580
 581         if (has_12mv_adc(data))
 582                 lsb = 120;
 583         else if (has_10_9mv_adc(data))
 584                 lsb = 109;
 585         else
 586                 lsb = 160;
 587         if (data->in_scaled & BIT(nr))
 588                 lsb <<= 1;
 589         return lsb;
 590 }
 591
 592 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 593 {
 594         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 595         return clamp_val(val, 0, 255);
 596 }
 597
 598 static int in_from_reg(const struct it87_data *data, int nr, int val)
 599 {
 600         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 601 }
 602
 603 static inline u8 FAN_TO_REG(long rpm, int div)
 604 {
 605         if (rpm == 0)
 606                 return 255;
 607         rpm = clamp_val(rpm, 1, 1000000);
 608         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 609 }
 610
 611 static inline u16 FAN16_TO_REG(long rpm)
 612 {
 613         if (rpm == 0)
 614                 return 0xffff;
 615         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 616 }
 617
 618 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 619                                 1350000 / ((val) * (div)))
 620 /* The divider is fixed to 2 in 16-bit mode */
 621 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 622                              1350000 / ((val) * 2))
 623
 624 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 625                                     ((val) + 500) / 1000), -128, 127))
 626 #define TEMP_FROM_REG(val) ((val) * 1000)
 627
 628 static u8 pwm_to_reg(const struct it87_data *data, long val)
 629 {
 630         if (has_newer_autopwm(data))
 631                 return val;
 632         else
 633                 return val >> 1;
 634 }
 635
 636 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 637 {
 638         if (has_newer_autopwm(data))
 639                 return reg;
 640         else
 641                 return (reg & 0x7f) << 1;
 642 }
 643
 644 static int DIV_TO_REG(int val)
 645 {
 646         int answer = 0;
 647
 648         while (answer < 7 && (val >>= 1))
 649                 answer++;
 650         return answer;
 651 }
 652
 653 #define DIV_FROM_REG(val) BIT(val)
 654
 655 /*
 656  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 657  * depending on the chip type, to calculate the actual PWM frequency.
 658  *
 659  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 660  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 661  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 662  * sometimes just one. It is unknown if this is a datasheet error or real,
 663  * so this is ignored for now.
 664  */
 665 static const unsigned int pwm_freq[8] = {
 666         48000000,
 667         24000000,
 668         12000000,
 669         8000000,
 670         6000000,
 671         3000000,
 672         1500000,
 673         750000,
 674 };
 675
 676 /*
 677  * Must be called with data->update_lock held, except during initialization.
 678  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 679  * would slow down the IT87 access and should not be necessary.
 680  */
 681 static int it87_read_value(struct it87_data *data, u8 reg)
 682 {
 683         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 684         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 685 }
 686
 687 /*
 688  * Must be called with data->update_lock held, except during initialization.
 689  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 690  * would slow down the IT87 access and should not be necessary.
 691  */
 692 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
 693 {
 694         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 695         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 696 }
 697
 698 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 699 {
 700         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 701         if (has_newer_autopwm(data)) {
 702                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 703                 data->pwm_duty[nr] = it87_read_value(data,
 704                                                      IT87_REG_PWM_DUTY[nr]);
 705         } else {
 706                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 707                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 708                 else                            /* Manual mode */
 709                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 710         }
 711
 712         if (has_old_autopwm(data)) {
 713                 int i;
 714
 715                 for (i = 0; i < 5 ; i++)
 716                         data->auto_temp[nr][i] = it87_read_value(data,
 717                                                 IT87_REG_AUTO_TEMP(nr, i));
 718                 for (i = 0; i < 3 ; i++)
 719                         data->auto_pwm[nr][i] = it87_read_value(data,
 720                                                 IT87_REG_AUTO_PWM(nr, i));
 721         } else if (has_newer_autopwm(data)) {
 722                 int i;
 723
 724                 /*
 725                  * 0: temperature hysteresis (base + 5)
 726                  * 1: fan off temperature (base + 0)
 727                  * 2: fan start temperature (base + 1)
 728                  * 3: fan max temperature (base + 2)
 729                  */
 730                 data->auto_temp[nr][0] =
 731                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 732
 733                 for (i = 0; i < 3 ; i++)
 734                         data->auto_temp[nr][i + 1] =
 735                                 it87_read_value(data,
 736                                                 IT87_REG_AUTO_TEMP(nr, i));
 737                 /*
 738                  * 0: start pwm value (base + 3)
 739                  * 1: pwm slope (base + 4, 1/8th pwm)
 740                  */
 741                 data->auto_pwm[nr][0] =
 742                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 743                 data->auto_pwm[nr][1] =
 744                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 745         }
 746 }
 747
 748 static struct it87_data *it87_update_device(struct device *dev)
 749 {
 750         struct it87_data *data = dev_get_drvdata(dev);
 751         int i;
 752
 753         mutex_lock(&data->update_lock);
 754
 755         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 756             !data->valid) {
 757                 if (update_vbat) {
 758                         /*
 759                          * Cleared after each update, so reenable.  Value
 760                          * returned by this read will be previous value
 761                          */
 762                         it87_write_value(data, IT87_REG_CONFIG,
 763                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 764                 }
 765                 for (i = 0; i < NUM_VIN; i++) {
 766                         if (!(data->has_in & BIT(i)))
 767                                 continue;
 768
 769                         data->in[i][0] =
 770                                 it87_read_value(data, IT87_REG_VIN[i]);
 771
 772                         /* VBAT and AVCC don't have limit registers */
 773                         if (i >= NUM_VIN_LIMIT)
 774                                 continue;
 775
 776                         data->in[i][1] =
 777                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 778                         data->in[i][2] =
 779                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 780                 }
 781
 782                 for (i = 0; i < NUM_FAN; i++) {
 783                         /* Skip disabled fans */
 784                         if (!(data->has_fan & BIT(i)))
 785                                 continue;
 786
 787                         data->fan[i][1] =
 788                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 789                         data->fan[i][0] = it87_read_value(data,
 790                                        IT87_REG_FAN[i]);
 791                         /* Add high byte if in 16-bit mode */
 792                         if (has_16bit_fans(data)) {
 793                                 data->fan[i][0] |= it87_read_value(data,
 794                                                 IT87_REG_FANX[i]) << 8;
 795                                 data->fan[i][1] |= it87_read_value(data,
 796                                                 IT87_REG_FANX_MIN[i]) << 8;
 797                         }
 798                 }
 799                 for (i = 0; i < NUM_TEMP; i++) {
 800                         if (!(data->has_temp & BIT(i)))
 801                                 continue;
 802                         data->temp[i][0] =
 803                                 it87_read_value(data, IT87_REG_TEMP(i));
 804
 805                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 806                                 data->temp[i][3] =
 807                                   it87_read_value(data,
 808                                                   IT87_REG_TEMP_OFFSET[i]);
 809
 810                         if (i >= NUM_TEMP_LIMIT)
 811                                 continue;
 812
 813                         data->temp[i][1] =
 814                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 815                         data->temp[i][2] =
 816                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 817                 }
 818
 819                 /* Newer chips don't have clock dividers */
 820                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 821                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 822                         data->fan_div[0] = i & 0x07;
 823                         data->fan_div[1] = (i >> 3) & 0x07;
 824                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 825                 }
 826
 827                 data->alarms =
 828                         it87_read_value(data, IT87_REG_ALARM1) |
 829                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 830                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 831                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 832
 833                 data->fan_main_ctrl = it87_read_value(data,
 834                                 IT87_REG_FAN_MAIN_CTRL);
 835                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 836                 for (i = 0; i < NUM_PWM; i++) {
 837                         if (!(data->has_pwm & BIT(i)))
 838                                 continue;
 839                         it87_update_pwm_ctrl(data, i);
 840                 }
 841
 842                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 843                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 844                 /*
 845                  * The IT8705F does not have VID capability.
 846                  * The IT8718F and later don't use IT87_REG_VID for the
 847                  * same purpose.
 848                  */
 849                 if (data->type == it8712 || data->type == it8716) {
 850                         data->vid = it87_read_value(data, IT87_REG_VID);
 851                         /*
 852                          * The older IT8712F revisions had only 5 VID pins,
 853                          * but we assume it is always safe to read 6 bits.
 854                          */
 855                         data->vid &= 0x3f;
 856                 }
 857                 data->last_updated = jiffies;
 858                 data->valid = 1;
 859         }
 860
 861         mutex_unlock(&data->update_lock);
 862
 863         return data;
 864 }
 865
 866 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 867                        char *buf)
 868 {
 869         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 870         struct it87_data *data = it87_update_device(dev);
 871         int index = sattr->index;
 872         int nr = sattr->nr;
 873
 874         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 875 }
 876
 877 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 878                       const char *buf, size_t count)
 879 {
 880         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 881         struct it87_data *data = dev_get_drvdata(dev);
 882         int index = sattr->index;
 883         int nr = sattr->nr;
 884         unsigned long val;
 885
 886         if (kstrtoul(buf, 10, &val) < 0)
 887                 return -EINVAL;
 888
 889         mutex_lock(&data->update_lock);
 890         data->in[nr][index] = in_to_reg(data, nr, val);
 891         it87_write_value(data,
 892                          index == 1 ? IT87_REG_VIN_MIN(nr)
 893                                     : IT87_REG_VIN_MAX(nr),
 894                          data->in[nr][index]);
 895         mutex_unlock(&data->update_lock);
 896         return count;
 897 }
 898
 899 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 900 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 901                             0, 1);
 902 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 903                             0, 2);
 904
 905 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 906 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 907                             1, 1);
 908 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 909                             1, 2);
 910
 911 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 912 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 913                             2, 1);
 914 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 915                             2, 2);
 916
 917 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 918 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 919                             3, 1);
 920 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 921                             3, 2);
 922
 923 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 924 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 925                             4, 1);
 926 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 927                             4, 2);
 928
 929 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 930 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
 931                             5, 1);
 932 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
 933                             5, 2);
 934
 935 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
 936 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
 937                             6, 1);
 938 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
 939                             6, 2);
 940
 941 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
 942 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
 943                             7, 1);
 944 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
 945                             7, 2);
 946
 947 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
 948 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
 949 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
 950 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
 951 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
 952
 953 /* Up to 6 temperatures */
 954 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
 955                          char *buf)
 956 {
 957         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 958         int nr = sattr->nr;
 959         int index = sattr->index;
 960         struct it87_data *data = it87_update_device(dev);
 961
 962         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
 963 }
 964
 965 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
 966                         const char *buf, size_t count)
 967 {
 968         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 969         int nr = sattr->nr;
 970         int index = sattr->index;
 971         struct it87_data *data = dev_get_drvdata(dev);
 972         long val;
 973         u8 reg, regval;
 974
 975         if (kstrtol(buf, 10, &val) < 0)
 976                 return -EINVAL;
 977
 978         mutex_lock(&data->update_lock);
 979
 980         switch (index) {
 981         default:
 982         case 1:
 983                 reg = IT87_REG_TEMP_LOW(nr);
 984                 break;
 985         case 2:
 986                 reg = IT87_REG_TEMP_HIGH(nr);
 987                 break;
 988         case 3:
 989                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 990                 if (!(regval & 0x80)) {
 991                         regval |= 0x80;
 992                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
 993                 }
 994                 data->valid = 0;
 995                 reg = IT87_REG_TEMP_OFFSET[nr];
 996                 break;
 997         }
 998
 999         data->temp[nr][index] = TEMP_TO_REG(val);
1000         it87_write_value(data, reg, data->temp[nr][index]);
1001         mutex_unlock(&data->update_lock);
1002         return count;
1003 }
1004
1005 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1006 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1007                             0, 1);
1008 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1009                             0, 2);
1010 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1011                             set_temp, 0, 3);
1012 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1013 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1014                             1, 1);
1015 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1016                             1, 2);
1017 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1018                             set_temp, 1, 3);
1019 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1020 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1021                             2, 1);
1022 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1023                             2, 2);
1024 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1025                             set_temp, 2, 3);
1026 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1027 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1028 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1029
1030 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1031                               char *buf)
1032 {
1033         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1034         int nr = sensor_attr->index;
1035         struct it87_data *data = it87_update_device(dev);
1036         u8 reg = data->sensor;      /* In case value is updated while used */
1037         u8 extra = data->extra;
1038
1039         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1040             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1041                 return sprintf(buf, "6\n");  /* Intel PECI */
1042         if (reg & (1 << nr))
1043                 return sprintf(buf, "3\n");  /* thermal diode */
1044         if (reg & (8 << nr))
1045                 return sprintf(buf, "4\n");  /* thermistor */
1046         return sprintf(buf, "0\n");      /* disabled */
1047 }
1048
1049 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1050                              const char *buf, size_t count)
1051 {
1052         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1053         int nr = sensor_attr->index;
1054
1055         struct it87_data *data = dev_get_drvdata(dev);
1056         long val;
1057         u8 reg, extra;
1058
1059         if (kstrtol(buf, 10, &val) < 0)
1060                 return -EINVAL;
1061
1062         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1063         reg &= ~(1 << nr);
1064         reg &= ~(8 << nr);
1065         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1066                 reg &= 0x3f;
1067         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1068         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1069                 extra &= 0x7f;
1070         if (val == 2) { /* backwards compatibility */
1071                 dev_warn(dev,
1072                          "Sensor type 2 is deprecated, please use 4 instead\n");
1073                 val = 4;
1074         }
1075         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1076         if (val == 3)
1077                 reg |= 1 << nr;
1078         else if (val == 4)
1079                 reg |= 8 << nr;
1080         else if (has_temp_peci(data, nr) && val == 6)
1081                 reg |= (nr + 1) << 6;
1082         else if (has_temp_old_peci(data, nr) && val == 6)
1083                 extra |= 0x80;
1084         else if (val != 0)
1085                 return -EINVAL;
1086
1087         mutex_lock(&data->update_lock);
1088         data->sensor = reg;
1089         data->extra = extra;
1090         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1091         if (has_temp_old_peci(data, nr))
1092                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1093         data->valid = 0;        /* Force cache refresh */
1094         mutex_unlock(&data->update_lock);
1095         return count;
1096 }
1097
1098 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1099                           set_temp_type, 0);
1100 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1101                           set_temp_type, 1);
1102 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1103                           set_temp_type, 2);
1104
1105 /* 6 Fans */
1106
1107 static int pwm_mode(const struct it87_data *data, int nr)
1108 {
1109         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1110                 return 0;                               /* Full speed */
1111         if (data->pwm_ctrl[nr] & 0x80)
1112                 return 2;                               /* Automatic mode */
1113         if ((data->type == it8603 || nr >= 3) &&
1114             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1115                 return 0;                       /* Full speed */
1116
1117         return 1;                               /* Manual mode */
1118 }
1119
1120 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1121                         char *buf)
1122 {
1123         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1124         int nr = sattr->nr;
1125         int index = sattr->index;
1126         int speed;
1127         struct it87_data *data = it87_update_device(dev);
1128
1129         speed = has_16bit_fans(data) ?
1130                 FAN16_FROM_REG(data->fan[nr][index]) :
1131                 FAN_FROM_REG(data->fan[nr][index],
1132                              DIV_FROM_REG(data->fan_div[nr]));
1133         return sprintf(buf, "%d\n", speed);
1134 }
1135
1136 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1137                             char *buf)
1138 {
1139         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1140         struct it87_data *data = it87_update_device(dev);
1141         int nr = sensor_attr->index;
1142
1143         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1144 }
1145
1146 static ssize_t show_pwm_enable(struct device *dev,
1147                                struct device_attribute *attr, char *buf)
1148 {
1149         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1150         struct it87_data *data = it87_update_device(dev);
1151         int nr = sensor_attr->index;
1152
1153         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1154 }
1155
1156 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1157                         char *buf)
1158 {
1159         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1160         struct it87_data *data = it87_update_device(dev);
1161         int nr = sensor_attr->index;
1162
1163         return sprintf(buf, "%d\n",
1164                        pwm_from_reg(data, data->pwm_duty[nr]));
1165 }
1166
1167 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1168                              char *buf)
1169 {
1170         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1171         struct it87_data *data = it87_update_device(dev);
1172         int nr = sensor_attr->index;
1173         unsigned int freq;
1174         int index;
1175
1176         if (has_pwm_freq2(data) && nr == 1)
1177                 index = (data->extra >> 4) & 0x07;
1178         else
1179                 index = (data->fan_ctl >> 4) & 0x07;
1180
1181         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1182
1183         return sprintf(buf, "%u\n", freq);
1184 }
1185
1186 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1187                        const char *buf, size_t count)
1188 {
1189         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1190         int nr = sattr->nr;
1191         int index = sattr->index;
1192
1193         struct it87_data *data = dev_get_drvdata(dev);
1194         long val;
1195         u8 reg;
1196
1197         if (kstrtol(buf, 10, &val) < 0)
1198                 return -EINVAL;
1199
1200         mutex_lock(&data->update_lock);
1201
1202         if (has_16bit_fans(data)) {
1203                 data->fan[nr][index] = FAN16_TO_REG(val);
1204                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1205                                  data->fan[nr][index] & 0xff);
1206                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1207                                  data->fan[nr][index] >> 8);
1208         } else {
1209                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1210                 switch (nr) {
1211                 case 0:
1212                         data->fan_div[nr] = reg & 0x07;
1213                         break;
1214                 case 1:
1215                         data->fan_div[nr] = (reg >> 3) & 0x07;
1216                         break;
1217                 case 2:
1218                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1219                         break;
1220                 }
1221                 data->fan[nr][index] =
1222                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1223                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1224                                  data->fan[nr][index]);
1225         }
1226
1227         mutex_unlock(&data->update_lock);
1228         return count;
1229 }
1230
1231 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1232                            const char *buf, size_t count)
1233 {
1234         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1235         struct it87_data *data = dev_get_drvdata(dev);
1236         int nr = sensor_attr->index;
1237         unsigned long val;
1238         int min;
1239         u8 old;
1240
1241         if (kstrtoul(buf, 10, &val) < 0)
1242                 return -EINVAL;
1243
1244         mutex_lock(&data->update_lock);
1245         old = it87_read_value(data, IT87_REG_FAN_DIV);
1246
1247         /* Save fan min limit */
1248         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1249
1250         switch (nr) {
1251         case 0:
1252         case 1:
1253                 data->fan_div[nr] = DIV_TO_REG(val);
1254                 break;
1255         case 2:
1256                 if (val < 8)
1257                         data->fan_div[nr] = 1;
1258                 else
1259                         data->fan_div[nr] = 3;
1260         }
1261         val = old & 0x80;
1262         val |= (data->fan_div[0] & 0x07);
1263         val |= (data->fan_div[1] & 0x07) << 3;
1264         if (data->fan_div[2] == 3)
1265                 val |= 0x1 << 6;
1266         it87_write_value(data, IT87_REG_FAN_DIV, val);
1267
1268         /* Restore fan min limit */
1269         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1270         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1271
1272         mutex_unlock(&data->update_lock);
1273         return count;
1274 }
1275
1276 /* Returns 0 if OK, -EINVAL otherwise */
1277 static int check_trip_points(struct device *dev, int nr)
1278 {
1279         const struct it87_data *data = dev_get_drvdata(dev);
1280         int i, err = 0;
1281
1282         if (has_old_autopwm(data)) {
1283                 for (i = 0; i < 3; i++) {
1284                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1285                                 err = -EINVAL;
1286                 }
1287                 for (i = 0; i < 2; i++) {
1288                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1289                                 err = -EINVAL;
1290                 }
1291         } else if (has_newer_autopwm(data)) {
1292                 for (i = 1; i < 3; i++) {
1293                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1294                                 err = -EINVAL;
1295                 }
1296         }
1297
1298         if (err) {
1299                 dev_err(dev,
1300                         "Inconsistent trip points, not switching to automatic mode\n");
1301                 dev_err(dev, "Adjust the trip points and try again\n");
1302         }
1303         return err;
1304 }
1305
1306 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1307                               const char *buf, size_t count)
1308 {
1309         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1310         struct it87_data *data = dev_get_drvdata(dev);
1311         int nr = sensor_attr->index;
1312         long val;
1313
1314         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1315                 return -EINVAL;
1316
1317         /* Check trip points before switching to automatic mode */
1318         if (val == 2) {
1319                 if (check_trip_points(dev, nr) < 0)
1320                         return -EINVAL;
1321         }
1322
1323         mutex_lock(&data->update_lock);
1324
1325         if (val == 0) {
1326                 if (nr < 3 && data->type != it8603) {
1327                         int tmp;
1328                         /* make sure the fan is on when in on/off mode */
1329                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1330                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1331                         /* set on/off mode */
1332                         data->fan_main_ctrl &= ~BIT(nr);
1333                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1334                                          data->fan_main_ctrl);
1335                 } else {
1336                         u8 ctrl;
1337
1338                         /* No on/off mode, set maximum pwm value */
1339                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1340                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1341                                          data->pwm_duty[nr]);
1342                         /* and set manual mode */
1343                         if (has_newer_autopwm(data)) {
1344                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1345                                         data->pwm_temp_map[nr];
1346                         } else {
1347                                 ctrl = data->pwm_duty[nr];
1348                         }
1349                         data->pwm_ctrl[nr] = ctrl;
1350                         it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1351                 }
1352         } else {
1353                 u8 ctrl;
1354
1355                 if (has_newer_autopwm(data)) {
1356                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1357                                 data->pwm_temp_map[nr];
1358                         if (val != 1)
1359                                 ctrl |= 0x80;
1360                 } else {
1361                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1362                 }
1363                 data->pwm_ctrl[nr] = ctrl;
1364                 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1365
1366                 if (data->type != it8603 && nr < 3) {
1367                         /* set SmartGuardian mode */
1368                         data->fan_main_ctrl |= BIT(nr);
1369                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1370                                          data->fan_main_ctrl);
1371                 }
1372         }
1373
1374         mutex_unlock(&data->update_lock);
1375         return count;
1376 }
1377
1378 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1379                        const char *buf, size_t count)
1380 {
1381         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1382         struct it87_data *data = dev_get_drvdata(dev);
1383         int nr = sensor_attr->index;
1384         long val;
1385
1386         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1387                 return -EINVAL;
1388
1389         mutex_lock(&data->update_lock);
1390         it87_update_pwm_ctrl(data, nr);
1391         if (has_newer_autopwm(data)) {
1392                 /*
1393                  * If we are in automatic mode, the PWM duty cycle register
1394                  * is read-only so we can't write the value.
1395                  */
1396                 if (data->pwm_ctrl[nr] & 0x80) {
1397                         mutex_unlock(&data->update_lock);
1398                         return -EBUSY;
1399                 }
1400                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1401                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1402                                  data->pwm_duty[nr]);
1403         } else {
1404                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1405                 /*
1406                  * If we are in manual mode, write the duty cycle immediately;
1407                  * otherwise, just store it for later use.
1408                  */
1409                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1410                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1411                         it87_write_value(data, IT87_REG_PWM[nr],
1412                                          data->pwm_ctrl[nr]);
1413                 }
1414         }
1415         mutex_unlock(&data->update_lock);
1416         return count;
1417 }
1418
1419 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1420                             const char *buf, size_t count)
1421 {
1422         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1423         struct it87_data *data = dev_get_drvdata(dev);
1424         int nr = sensor_attr->index;
1425         unsigned long val;
1426         int i;
1427
1428         if (kstrtoul(buf, 10, &val) < 0)
1429                 return -EINVAL;
1430
1431         val = clamp_val(val, 0, 1000000);
1432         val *= has_newer_autopwm(data) ? 256 : 128;
1433
1434         /* Search for the nearest available frequency */
1435         for (i = 0; i < 7; i++) {
1436                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1437                         break;
1438         }
1439
1440         mutex_lock(&data->update_lock);
1441         if (nr == 0) {
1442                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1443                 data->fan_ctl |= i << 4;
1444                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1445         } else {
1446                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1447                 data->extra |= i << 4;
1448                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1449         }
1450         mutex_unlock(&data->update_lock);
1451
1452         return count;
1453 }
1454
1455 static ssize_t show_pwm_temp_map(struct device *dev,
1456                                  struct device_attribute *attr, char *buf)
1457 {
1458         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1459         struct it87_data *data = it87_update_device(dev);
1460         int nr = sensor_attr->index;
1461         int map;
1462
1463         map = data->pwm_temp_map[nr];
1464         if (map >= 3)
1465                 map = 0;        /* Should never happen */
1466         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1467                 map += 3;
1468
1469         return sprintf(buf, "%d\n", (int)BIT(map));
1470 }
1471
1472 static ssize_t set_pwm_temp_map(struct device *dev,
1473                                 struct device_attribute *attr, const char *buf,
1474                                 size_t count)
1475 {
1476         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1477         struct it87_data *data = dev_get_drvdata(dev);
1478         int nr = sensor_attr->index;
1479         long val;
1480         u8 reg;
1481
1482         if (kstrtol(buf, 10, &val) < 0)
1483                 return -EINVAL;
1484
1485         if (nr >= 3)
1486                 val -= 3;
1487
1488         switch (val) {
1489         case BIT(0):
1490                 reg = 0x00;
1491                 break;
1492         case BIT(1):
1493                 reg = 0x01;
1494                 break;
1495         case BIT(2):
1496                 reg = 0x02;
1497                 break;
1498         default:
1499                 return -EINVAL;
1500         }
1501
1502         mutex_lock(&data->update_lock);
1503         it87_update_pwm_ctrl(data, nr);
1504         data->pwm_temp_map[nr] = reg;
1505         /*
1506          * If we are in automatic mode, write the temp mapping immediately;
1507          * otherwise, just store it for later use.
1508          */
1509         if (data->pwm_ctrl[nr] & 0x80) {
1510                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1511                                                 data->pwm_temp_map[nr];
1512                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1513         }
1514         mutex_unlock(&data->update_lock);
1515         return count;
1516 }
1517
1518 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1519                              char *buf)
1520 {
1521         struct it87_data *data = it87_update_device(dev);
1522         struct sensor_device_attribute_2 *sensor_attr =
1523                         to_sensor_dev_attr_2(attr);
1524         int nr = sensor_attr->nr;
1525         int point = sensor_attr->index;
1526
1527         return sprintf(buf, "%d\n",
1528                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1529 }
1530
1531 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1532                             const char *buf, size_t count)
1533 {
1534         struct it87_data *data = dev_get_drvdata(dev);
1535         struct sensor_device_attribute_2 *sensor_attr =
1536                         to_sensor_dev_attr_2(attr);
1537         int nr = sensor_attr->nr;
1538         int point = sensor_attr->index;
1539         int regaddr;
1540         long val;
1541
1542         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1543                 return -EINVAL;
1544
1545         mutex_lock(&data->update_lock);
1546         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1547         if (has_newer_autopwm(data))
1548                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1549         else
1550                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1551         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1552         mutex_unlock(&data->update_lock);
1553         return count;
1554 }
1555
1556 static ssize_t show_auto_pwm_slope(struct device *dev,
1557                                    struct device_attribute *attr, char *buf)
1558 {
1559         struct it87_data *data = it87_update_device(dev);
1560         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1561         int nr = sensor_attr->index;
1562
1563         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1564 }
1565
1566 static ssize_t set_auto_pwm_slope(struct device *dev,
1567                                   struct device_attribute *attr,
1568                                   const char *buf, size_t count)
1569 {
1570         struct it87_data *data = dev_get_drvdata(dev);
1571         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1572         int nr = sensor_attr->index;
1573         unsigned long val;
1574
1575         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1576                 return -EINVAL;
1577
1578         mutex_lock(&data->update_lock);
1579         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1580         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1581                          data->auto_pwm[nr][1]);
1582         mutex_unlock(&data->update_lock);
1583         return count;
1584 }
1585
1586 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1587                               char *buf)
1588 {
1589         struct it87_data *data = it87_update_device(dev);
1590         struct sensor_device_attribute_2 *sensor_attr =
1591                         to_sensor_dev_attr_2(attr);
1592         int nr = sensor_attr->nr;
1593         int point = sensor_attr->index;
1594         int reg;
1595
1596         if (has_old_autopwm(data) || point)
1597                 reg = data->auto_temp[nr][point];
1598         else
1599                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1600
1601         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1602 }
1603
1604 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1605                              const char *buf, size_t count)
1606 {
1607         struct it87_data *data = dev_get_drvdata(dev);
1608         struct sensor_device_attribute_2 *sensor_attr =
1609                         to_sensor_dev_attr_2(attr);
1610         int nr = sensor_attr->nr;
1611         int point = sensor_attr->index;
1612         long val;
1613         int reg;
1614
1615         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1616                 return -EINVAL;
1617
1618         mutex_lock(&data->update_lock);
1619         if (has_newer_autopwm(data) && !point) {
1620                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1621                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1622                 data->auto_temp[nr][0] = reg;
1623                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1624         } else {
1625                 reg = TEMP_TO_REG(val);
1626                 data->auto_temp[nr][point] = reg;
1627                 if (has_newer_autopwm(data))
1628                         point--;
1629                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1630         }
1631         mutex_unlock(&data->update_lock);
1632         return count;
1633 }
1634
1635 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1636 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1637                             0, 1);
1638 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1639                           set_fan_div, 0);
1640
1641 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1642 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1643                             1, 1);
1644 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1645                           set_fan_div, 1);
1646
1647 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1648 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1649                             2, 1);
1650 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1651                           set_fan_div, 2);
1652
1653 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1654 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1655                             3, 1);
1656
1657 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1658 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1659                             4, 1);
1660
1661 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1662 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1663                             5, 1);
1664
1665 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1666                           show_pwm_enable, set_pwm_enable, 0);
1667 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1668 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1669                           set_pwm_freq, 0);
1670 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1671                           show_pwm_temp_map, set_pwm_temp_map, 0);
1672 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1673                             show_auto_pwm, set_auto_pwm, 0, 0);
1674 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1675                             show_auto_pwm, set_auto_pwm, 0, 1);
1676 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1677                             show_auto_pwm, set_auto_pwm, 0, 2);
1678 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1679                             show_auto_pwm, NULL, 0, 3);
1680 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1681                             show_auto_temp, set_auto_temp, 0, 1);
1682 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1683                             show_auto_temp, set_auto_temp, 0, 0);
1684 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1685                             show_auto_temp, set_auto_temp, 0, 2);
1686 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1687                             show_auto_temp, set_auto_temp, 0, 3);
1688 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1689                             show_auto_temp, set_auto_temp, 0, 4);
1690 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1691                             show_auto_pwm, set_auto_pwm, 0, 0);
1692 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1693                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1694
1695 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1696                           show_pwm_enable, set_pwm_enable, 1);
1697 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1698 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1699 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1700                           show_pwm_temp_map, set_pwm_temp_map, 1);
1701 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1702                             show_auto_pwm, set_auto_pwm, 1, 0);
1703 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1704                             show_auto_pwm, set_auto_pwm, 1, 1);
1705 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1706                             show_auto_pwm, set_auto_pwm, 1, 2);
1707 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1708                             show_auto_pwm, NULL, 1, 3);
1709 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1710                             show_auto_temp, set_auto_temp, 1, 1);
1711 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1712                             show_auto_temp, set_auto_temp, 1, 0);
1713 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1714                             show_auto_temp, set_auto_temp, 1, 2);
1715 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1716                             show_auto_temp, set_auto_temp, 1, 3);
1717 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1718                             show_auto_temp, set_auto_temp, 1, 4);
1719 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1720                             show_auto_pwm, set_auto_pwm, 1, 0);
1721 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1722                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1723
1724 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1725                           show_pwm_enable, set_pwm_enable, 2);
1726 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1727 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1728 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1729                           show_pwm_temp_map, set_pwm_temp_map, 2);
1730 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1731                             show_auto_pwm, set_auto_pwm, 2, 0);
1732 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1733                             show_auto_pwm, set_auto_pwm, 2, 1);
1734 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1735                             show_auto_pwm, set_auto_pwm, 2, 2);
1736 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1737                             show_auto_pwm, NULL, 2, 3);
1738 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1739                             show_auto_temp, set_auto_temp, 2, 1);
1740 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1741                             show_auto_temp, set_auto_temp, 2, 0);
1742 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1743                             show_auto_temp, set_auto_temp, 2, 2);
1744 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1745                             show_auto_temp, set_auto_temp, 2, 3);
1746 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1747                             show_auto_temp, set_auto_temp, 2, 4);
1748 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1749                             show_auto_pwm, set_auto_pwm, 2, 0);
1750 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1751                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1752
1753 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1754                           show_pwm_enable, set_pwm_enable, 3);
1755 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1756 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1757 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1758                           show_pwm_temp_map, set_pwm_temp_map, 3);
1759 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1760                             show_auto_temp, set_auto_temp, 2, 1);
1761 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1762                             show_auto_temp, set_auto_temp, 2, 0);
1763 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1764                             show_auto_temp, set_auto_temp, 2, 2);
1765 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1766                             show_auto_temp, set_auto_temp, 2, 3);
1767 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1768                             show_auto_pwm, set_auto_pwm, 3, 0);
1769 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1770                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1771
1772 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1773                           show_pwm_enable, set_pwm_enable, 4);
1774 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1775 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1776 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1777                           show_pwm_temp_map, set_pwm_temp_map, 4);
1778 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1779                             show_auto_temp, set_auto_temp, 2, 1);
1780 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1781                             show_auto_temp, set_auto_temp, 2, 0);
1782 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1783                             show_auto_temp, set_auto_temp, 2, 2);
1784 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1785                             show_auto_temp, set_auto_temp, 2, 3);
1786 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1787                             show_auto_pwm, set_auto_pwm, 4, 0);
1788 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1789                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1790
1791 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1792                           show_pwm_enable, set_pwm_enable, 5);
1793 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1794 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1795 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1796                           show_pwm_temp_map, set_pwm_temp_map, 5);
1797 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1798                             show_auto_temp, set_auto_temp, 2, 1);
1799 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1800                             show_auto_temp, set_auto_temp, 2, 0);
1801 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1802                             show_auto_temp, set_auto_temp, 2, 2);
1803 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1804                             show_auto_temp, set_auto_temp, 2, 3);
1805 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1806                             show_auto_pwm, set_auto_pwm, 5, 0);
1807 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1808                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1809
1810 /* Alarms */
1811 static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
1812                            char *buf)
1813 {
1814         struct it87_data *data = it87_update_device(dev);
1815
1816         return sprintf(buf, "%u\n", data->alarms);
1817 }
1818 static DEVICE_ATTR_RO(alarms);
1819
1820 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1821                           char *buf)
1822 {
1823         struct it87_data *data = it87_update_device(dev);
1824         int bitnr = to_sensor_dev_attr(attr)->index;
1825
1826         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1827 }
1828
1829 static ssize_t clear_intrusion(struct device *dev,
1830                                struct device_attribute *attr, const char *buf,
1831                                size_t count)
1832 {
1833         struct it87_data *data = dev_get_drvdata(dev);
1834         int config;
1835         long val;
1836
1837         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1838                 return -EINVAL;
1839
1840         mutex_lock(&data->update_lock);
1841         config = it87_read_value(data, IT87_REG_CONFIG);
1842         if (config < 0) {
1843                 count = config;
1844         } else {
1845                 config |= BIT(5);
1846                 it87_write_value(data, IT87_REG_CONFIG, config);
1847                 /* Invalidate cache to force re-read */
1848                 data->valid = 0;
1849         }
1850         mutex_unlock(&data->update_lock);
1851
1852         return count;
1853 }
1854
1855 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1856 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1857 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1858 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1859 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1860 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1861 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1862 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1863 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1864 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1865 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1866 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1867 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1868 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1869 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1870 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1871 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1872 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1873                           show_alarm, clear_intrusion, 4);
1874
1875 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1876                          char *buf)
1877 {
1878         struct it87_data *data = it87_update_device(dev);
1879         int bitnr = to_sensor_dev_attr(attr)->index;
1880
1881         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1882 }
1883
1884 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1885                         const char *buf, size_t count)
1886 {
1887         int bitnr = to_sensor_dev_attr(attr)->index;
1888         struct it87_data *data = dev_get_drvdata(dev);
1889         long val;
1890
1891         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1892                 return -EINVAL;
1893
1894         mutex_lock(&data->update_lock);
1895         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1896         if (val)
1897                 data->beeps |= BIT(bitnr);
1898         else
1899                 data->beeps &= ~BIT(bitnr);
1900         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1901         mutex_unlock(&data->update_lock);
1902         return count;
1903 }
1904
1905 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1906                           show_beep, set_beep, 1);
1907 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1908 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1909 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1910 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1911 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1912 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1913 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1914 /* fanX_beep writability is set later */
1915 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1916 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1917 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1918 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1919 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1920 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1921 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1922                           show_beep, set_beep, 2);
1923 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1924 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1925
1926 static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
1927                         char *buf)
1928 {
1929         struct it87_data *data = dev_get_drvdata(dev);
1930
1931         return sprintf(buf, "%u\n", data->vrm);
1932 }
1933
1934 static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
1935                          const char *buf, size_t count)
1936 {
1937         struct it87_data *data = dev_get_drvdata(dev);
1938         unsigned long val;
1939
1940         if (kstrtoul(buf, 10, &val) < 0)
1941                 return -EINVAL;
1942
1943         data->vrm = val;
1944
1945         return count;
1946 }
1947 static DEVICE_ATTR_RW(vrm);
1948
1949 static ssize_t cpu0_vid_show(struct device *dev,
1950                              struct device_attribute *attr, char *buf)
1951 {
1952         struct it87_data *data = it87_update_device(dev);
1953
1954         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1955 }
1956 static DEVICE_ATTR_RO(cpu0_vid);
1957
1958 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1959                           char *buf)
1960 {
1961         static const char * const labels[] = {
1962                 "+5V",
1963                 "5VSB",
1964                 "Vbat",
1965                 "AVCC",
1966         };
1967         static const char * const labels_it8721[] = {
1968                 "+3.3V",
1969                 "3VSB",
1970                 "Vbat",
1971                 "+3.3V",
1972         };
1973         struct it87_data *data = dev_get_drvdata(dev);
1974         int nr = to_sensor_dev_attr(attr)->index;
1975         const char *label;
1976
1977         if (has_vin3_5v(data) && nr == 0)
1978                 label = labels[0];
1979         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1980                 label = labels_it8721[nr];
1981         else
1982                 label = labels[nr];
1983
1984         return sprintf(buf, "%s\n", label);
1985 }
1986 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1987 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1988 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1989 /* AVCC3 */
1990 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
1991
1992 static umode_t it87_in_is_visible(struct kobject *kobj,
1993                                   struct attribute *attr, int index)
1994 {
1995         struct device *dev = container_of(kobj, struct device, kobj);
1996         struct it87_data *data = dev_get_drvdata(dev);
1997         int i = index / 5;      /* voltage index */
1998         int a = index % 5;      /* attribute index */
1999
2000         if (index >= 40) {      /* in8 and higher only have input attributes */
2001                 i = index - 40 + 8;
2002                 a = 0;
2003         }
2004
2005         if (!(data->has_in & BIT(i)))
2006                 return 0;
2007
2008         if (a == 4 && !data->has_beep)
2009                 return 0;
2010
2011         return attr->mode;
2012 }
2013
2014 static struct attribute *it87_attributes_in[] = {
2015         &sensor_dev_attr_in0_input.dev_attr.attr,
2016         &sensor_dev_attr_in0_min.dev_attr.attr,
2017         &sensor_dev_attr_in0_max.dev_attr.attr,
2018         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2019         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2020
2021         &sensor_dev_attr_in1_input.dev_attr.attr,
2022         &sensor_dev_attr_in1_min.dev_attr.attr,
2023         &sensor_dev_attr_in1_max.dev_attr.attr,
2024         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2025         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2026
2027         &sensor_dev_attr_in2_input.dev_attr.attr,
2028         &sensor_dev_attr_in2_min.dev_attr.attr,
2029         &sensor_dev_attr_in2_max.dev_attr.attr,
2030         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2031         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2032
2033         &sensor_dev_attr_in3_input.dev_attr.attr,
2034         &sensor_dev_attr_in3_min.dev_attr.attr,
2035         &sensor_dev_attr_in3_max.dev_attr.attr,
2036         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2037         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2038
2039         &sensor_dev_attr_in4_input.dev_attr.attr,
2040         &sensor_dev_attr_in4_min.dev_attr.attr,
2041         &sensor_dev_attr_in4_max.dev_attr.attr,
2042         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2043         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2044
2045         &sensor_dev_attr_in5_input.dev_attr.attr,
2046         &sensor_dev_attr_in5_min.dev_attr.attr,
2047         &sensor_dev_attr_in5_max.dev_attr.attr,
2048         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2049         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2050
2051         &sensor_dev_attr_in6_input.dev_attr.attr,
2052         &sensor_dev_attr_in6_min.dev_attr.attr,
2053         &sensor_dev_attr_in6_max.dev_attr.attr,
2054         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2055         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2056
2057         &sensor_dev_attr_in7_input.dev_attr.attr,
2058         &sensor_dev_attr_in7_min.dev_attr.attr,
2059         &sensor_dev_attr_in7_max.dev_attr.attr,
2060         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2061         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2062
2063         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2064         &sensor_dev_attr_in9_input.dev_attr.attr,
2065         &sensor_dev_attr_in10_input.dev_attr.attr,
2066         &sensor_dev_attr_in11_input.dev_attr.attr,
2067         &sensor_dev_attr_in12_input.dev_attr.attr,
2068         NULL
2069 };
2070
2071 static const struct attribute_group it87_group_in = {
2072         .attrs = it87_attributes_in,
2073         .is_visible = it87_in_is_visible,
2074 };
2075
2076 static umode_t it87_temp_is_visible(struct kobject *kobj,
2077                                     struct attribute *attr, int index)
2078 {
2079         struct device *dev = container_of(kobj, struct device, kobj);
2080         struct it87_data *data = dev_get_drvdata(dev);
2081         int i = index / 7;      /* temperature index */
2082         int a = index % 7;      /* attribute index */
2083
2084         if (index >= 21) {
2085                 i = index - 21 + 3;
2086                 a = 0;
2087         }
2088
2089         if (!(data->has_temp & BIT(i)))
2090                 return 0;
2091
2092         if (a == 5 && !has_temp_offset(data))
2093                 return 0;
2094
2095         if (a == 6 && !data->has_beep)
2096                 return 0;
2097
2098         return attr->mode;
2099 }
2100
2101 static struct attribute *it87_attributes_temp[] = {
2102         &sensor_dev_attr_temp1_input.dev_attr.attr,
2103         &sensor_dev_attr_temp1_max.dev_attr.attr,
2104         &sensor_dev_attr_temp1_min.dev_attr.attr,
2105         &sensor_dev_attr_temp1_type.dev_attr.attr,
2106         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2107         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2108         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2109
2110         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2111         &sensor_dev_attr_temp2_max.dev_attr.attr,
2112         &sensor_dev_attr_temp2_min.dev_attr.attr,
2113         &sensor_dev_attr_temp2_type.dev_attr.attr,
2114         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2115         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2116         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2117
2118         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2119         &sensor_dev_attr_temp3_max.dev_attr.attr,
2120         &sensor_dev_attr_temp3_min.dev_attr.attr,
2121         &sensor_dev_attr_temp3_type.dev_attr.attr,
2122         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2123         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2124         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2125
2126         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2127         &sensor_dev_attr_temp5_input.dev_attr.attr,
2128         &sensor_dev_attr_temp6_input.dev_attr.attr,
2129         NULL
2130 };
2131
2132 static const struct attribute_group it87_group_temp = {
2133         .attrs = it87_attributes_temp,
2134         .is_visible = it87_temp_is_visible,
2135 };
2136
2137 static umode_t it87_is_visible(struct kobject *kobj,
2138                                struct attribute *attr, int index)
2139 {
2140         struct device *dev = container_of(kobj, struct device, kobj);
2141         struct it87_data *data = dev_get_drvdata(dev);
2142
2143         if ((index == 2 || index == 3) && !data->has_vid)
2144                 return 0;
2145
2146         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2147                 return 0;
2148
2149         return attr->mode;
2150 }
2151
2152 static struct attribute *it87_attributes[] = {
2153         &dev_attr_alarms.attr,
2154         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2155         &dev_attr_vrm.attr,                             /* 2 */
2156         &dev_attr_cpu0_vid.attr,                        /* 3 */
2157         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2158         &sensor_dev_attr_in7_label.dev_attr.attr,
2159         &sensor_dev_attr_in8_label.dev_attr.attr,
2160         &sensor_dev_attr_in9_label.dev_attr.attr,
2161         NULL
2162 };
2163
2164 static const struct attribute_group it87_group = {
2165         .attrs = it87_attributes,
2166         .is_visible = it87_is_visible,
2167 };
2168
2169 static umode_t it87_fan_is_visible(struct kobject *kobj,
2170                                    struct attribute *attr, int index)
2171 {
2172         struct device *dev = container_of(kobj, struct device, kobj);
2173         struct it87_data *data = dev_get_drvdata(dev);
2174         int i = index / 5;      /* fan index */
2175         int a = index % 5;      /* attribute index */
2176
2177         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2178                 i = (index - 15) / 4 + 3;
2179                 a = (index - 15) % 4;
2180         }
2181
2182         if (!(data->has_fan & BIT(i)))
2183                 return 0;
2184
2185         if (a == 3) {                           /* beep */
2186                 if (!data->has_beep)
2187                         return 0;
2188                 /* first fan beep attribute is writable */
2189                 if (i == __ffs(data->has_fan))
2190                         return attr->mode | S_IWUSR;
2191         }
2192
2193         if (a == 4 && has_16bit_fans(data))     /* divisor */
2194                 return 0;
2195
2196         return attr->mode;
2197 }
2198
2199 static struct attribute *it87_attributes_fan[] = {
2200         &sensor_dev_attr_fan1_input.dev_attr.attr,
2201         &sensor_dev_attr_fan1_min.dev_attr.attr,
2202         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2203         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2204         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2205
2206         &sensor_dev_attr_fan2_input.dev_attr.attr,
2207         &sensor_dev_attr_fan2_min.dev_attr.attr,
2208         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2209         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2210         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2211
2212         &sensor_dev_attr_fan3_input.dev_attr.attr,
2213         &sensor_dev_attr_fan3_min.dev_attr.attr,
2214         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2215         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2216         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2217
2218         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2219         &sensor_dev_attr_fan4_min.dev_attr.attr,
2220         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2221         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2222
2223         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2224         &sensor_dev_attr_fan5_min.dev_attr.attr,
2225         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2226         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2227
2228         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2229         &sensor_dev_attr_fan6_min.dev_attr.attr,
2230         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2231         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2232         NULL
2233 };
2234
2235 static const struct attribute_group it87_group_fan = {
2236         .attrs = it87_attributes_fan,
2237         .is_visible = it87_fan_is_visible,
2238 };
2239
2240 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2241                                    struct attribute *attr, int index)
2242 {
2243         struct device *dev = container_of(kobj, struct device, kobj);
2244         struct it87_data *data = dev_get_drvdata(dev);
2245         int i = index / 4;      /* pwm index */
2246         int a = index % 4;      /* attribute index */
2247
2248         if (!(data->has_pwm & BIT(i)))
2249                 return 0;
2250
2251         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2252         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2253                 return attr->mode | S_IWUSR;
2254
2255         /* pwm2_freq is writable if there are two pwm frequency selects */
2256         if (has_pwm_freq2(data) && i == 1 && a == 2)
2257                 return attr->mode | S_IWUSR;
2258
2259         return attr->mode;
2260 }
2261
2262 static struct attribute *it87_attributes_pwm[] = {
2263         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2264         &sensor_dev_attr_pwm1.dev_attr.attr,
2265         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2266         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2267
2268         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2269         &sensor_dev_attr_pwm2.dev_attr.attr,
2270         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2271         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2272
2273         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2274         &sensor_dev_attr_pwm3.dev_attr.attr,
2275         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2276         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2277
2278         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2279         &sensor_dev_attr_pwm4.dev_attr.attr,
2280         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2281         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2282
2283         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2284         &sensor_dev_attr_pwm5.dev_attr.attr,
2285         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2286         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2287
2288         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2289         &sensor_dev_attr_pwm6.dev_attr.attr,
2290         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2291         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2292
2293         NULL
2294 };
2295
2296 static const struct attribute_group it87_group_pwm = {
2297         .attrs = it87_attributes_pwm,
2298         .is_visible = it87_pwm_is_visible,
2299 };
2300
2301 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2302                                         struct attribute *attr, int index)
2303 {
2304         struct device *dev = container_of(kobj, struct device, kobj);
2305         struct it87_data *data = dev_get_drvdata(dev);
2306         int i = index / 11;     /* pwm index */
2307         int a = index % 11;     /* attribute index */
2308
2309         if (index >= 33) {      /* pwm 4..6 */
2310                 i = (index - 33) / 6 + 3;
2311                 a = (index - 33) % 6 + 4;
2312         }
2313
2314         if (!(data->has_pwm & BIT(i)))
2315                 return 0;
2316
2317         if (has_newer_autopwm(data)) {
2318                 if (a < 4)      /* no auto point pwm */
2319                         return 0;
2320                 if (a == 8)     /* no auto_point4 */
2321                         return 0;
2322         }
2323         if (has_old_autopwm(data)) {
2324                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2325                         return 0;
2326         }
2327
2328         return attr->mode;
2329 }
2330
2331 static struct attribute *it87_attributes_auto_pwm[] = {
2332         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2333         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2334         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2335         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2336         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2337         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2338         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2339         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2340         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2341         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2342         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2343
2344         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2345         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2346         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2347         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2348         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2349         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2350         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2351         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2352         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2353         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2354         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2355
2356         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2357         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2358         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2359         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2360         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2361         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2362         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2363         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2364         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2365         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2366         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2367
2368         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2369         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2370         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2371         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2372         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2373         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2374
2375         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2376         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2377         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2378         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2379         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2380         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2381
2382         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2383         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2384         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2385         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2386         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2387         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2388
2389         NULL,
2390 };
2391
2392 static const struct attribute_group it87_group_auto_pwm = {
2393         .attrs = it87_attributes_auto_pwm,
2394         .is_visible = it87_auto_pwm_is_visible,
2395 };
2396
2397 /* SuperIO detection - will change isa_address if a chip is found */
2398 static int __init it87_find(int sioaddr, unsigned short *address,
2399                             struct it87_sio_data *sio_data)
2400 {
2401         int err;
2402         u16 chip_type;
2403         const char *board_vendor, *board_name;
2404         const struct it87_devices *config;
2405
2406         err = superio_enter(sioaddr);
2407         if (err)
2408                 return err;
2409
2410         err = -ENODEV;
2411         chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2412
2413         switch (chip_type) {
2414         case IT8705F_DEVID:
2415                 sio_data->type = it87;
2416                 break;
2417         case IT8712F_DEVID:
2418                 sio_data->type = it8712;
2419                 break;
2420         case IT8716F_DEVID:
2421         case IT8726F_DEVID:
2422                 sio_data->type = it8716;
2423                 break;
2424         case IT8718F_DEVID:
2425                 sio_data->type = it8718;
2426                 break;
2427         case IT8720F_DEVID:
2428                 sio_data->type = it8720;
2429                 break;
2430         case IT8721F_DEVID:
2431                 sio_data->type = it8721;
2432                 break;
2433         case IT8728F_DEVID:
2434                 sio_data->type = it8728;
2435                 break;
2436         case IT8732F_DEVID:
2437                 sio_data->type = it8732;
2438                 break;
2439         case IT8792E_DEVID:
2440                 sio_data->type = it8792;
2441                 break;
2442         case IT8771E_DEVID:
2443                 sio_data->type = it8771;
2444                 break;
2445         case IT8772E_DEVID:
2446                 sio_data->type = it8772;
2447                 break;
2448         case IT8781F_DEVID:
2449                 sio_data->type = it8781;
2450                 break;
2451         case IT8782F_DEVID:
2452                 sio_data->type = it8782;
2453                 break;
2454         case IT8783E_DEVID:
2455                 sio_data->type = it8783;
2456                 break;
2457         case IT8786E_DEVID:
2458                 sio_data->type = it8786;
2459                 break;
2460         case IT8790E_DEVID:
2461                 sio_data->type = it8790;
2462                 break;
2463         case IT8603E_DEVID:
2464         case IT8623E_DEVID:
2465                 sio_data->type = it8603;
2466                 break;
2467         case IT8620E_DEVID:
2468                 sio_data->type = it8620;
2469                 break;
2470         case IT8622E_DEVID:
2471                 sio_data->type = it8622;
2472                 break;
2473         case IT8628E_DEVID:
2474                 sio_data->type = it8628;
2475                 break;
2476         case 0xffff:    /* No device at all */
2477                 goto exit;
2478         default:
2479                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2480                 goto exit;
2481         }
2482
2483         superio_select(sioaddr, PME);
2484         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2485                 pr_info("Device not activated, skipping\n");
2486                 goto exit;
2487         }
2488
2489         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2490         if (*address == 0) {
2491                 pr_info("Base address not set, skipping\n");
2492                 goto exit;
2493         }
2494
2495         err = 0;
2496         sio_data->sioaddr = sioaddr;
2497         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2498         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2499                 it87_devices[sio_data->type].suffix,
2500                 *address, sio_data->revision);
2501
2502         config = &it87_devices[sio_data->type];
2503
2504         /* in7 (VSB or VCCH5V) is always internal on some chips */
2505         if (has_in7_internal(config))
2506                 sio_data->internal |= BIT(1);
2507
2508         /* in8 (Vbat) is always internal */
2509         sio_data->internal |= BIT(2);
2510
2511         /* in9 (AVCC3), always internal if supported */
2512         if (has_avcc3(config))
2513                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2514         else
2515                 sio_data->skip_in |= BIT(9);
2516
2517         if (!has_five_pwm(config))
2518                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2519         else if (!has_six_pwm(config))
2520                 sio_data->skip_pwm |= BIT(5);
2521
2522         if (!has_vid(config))
2523                 sio_data->skip_vid = 1;
2524
2525         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2526         if (sio_data->type == it87) {
2527                 /* The IT8705F has a different LD number for GPIO */
2528                 superio_select(sioaddr, 5);
2529                 sio_data->beep_pin = superio_inb(sioaddr,
2530                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2531         } else if (sio_data->type == it8783) {
2532                 int reg25, reg27, reg2a, reg2c, regef;
2533
2534                 superio_select(sioaddr, GPIO);
2535
2536                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2537                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2538                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2539                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2540                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2541
2542                 /* Check if fan3 is there or not */
2543                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2544                         sio_data->skip_fan |= BIT(2);
2545                 if ((reg25 & BIT(4)) ||
2546                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2547                         sio_data->skip_pwm |= BIT(2);
2548
2549                 /* Check if fan2 is there or not */
2550                 if (reg27 & BIT(7))
2551                         sio_data->skip_fan |= BIT(1);
2552                 if (reg27 & BIT(3))
2553                         sio_data->skip_pwm |= BIT(1);
2554
2555                 /* VIN5 */
2556                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2557                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2558
2559                 /* VIN6 */
2560                 if (reg27 & BIT(1))
2561                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2562
2563                 /*
2564                  * VIN7
2565                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2566                  */
2567                 if (reg27 & BIT(2)) {
2568                         /*
2569                          * The data sheet is a bit unclear regarding the
2570                          * internal voltage divider for VCCH5V. It says
2571                          * "This bit enables and switches VIN7 (pin 91) to the
2572                          * internal voltage divider for VCCH5V".
2573                          * This is different to other chips, where the internal
2574                          * voltage divider would connect VIN7 to an internal
2575                          * voltage source. Maybe that is the case here as well.
2576                          *
2577                          * Since we don't know for sure, re-route it if that is
2578                          * not the case, and ask the user to report if the
2579                          * resulting voltage is sane.
2580                          */
2581                         if (!(reg2c & BIT(1))) {
2582                                 reg2c |= BIT(1);
2583                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2584                                              reg2c);
2585                                 sio_data->need_in7_reroute = true;
2586                                 pr_notice("Routing internal VCCH5V to in7.\n");
2587                         }
2588                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2589                         pr_notice("Please report if it displays a reasonable voltage.\n");
2590                 }
2591
2592                 if (reg2c & BIT(0))
2593                         sio_data->internal |= BIT(0);
2594                 if (reg2c & BIT(1))
2595                         sio_data->internal |= BIT(1);
2596
2597                 sio_data->beep_pin = superio_inb(sioaddr,
2598                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2599         } else if (sio_data->type == it8603) {
2600                 int reg27, reg29;
2601
2602                 superio_select(sioaddr, GPIO);
2603
2604                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2605
2606                 /* Check if fan3 is there or not */
2607                 if (reg27 & BIT(6))
2608                         sio_data->skip_pwm |= BIT(2);
2609                 if (reg27 & BIT(7))
2610                         sio_data->skip_fan |= BIT(2);
2611
2612                 /* Check if fan2 is there or not */
2613                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2614                 if (reg29 & BIT(1))
2615                         sio_data->skip_pwm |= BIT(1);
2616                 if (reg29 & BIT(2))
2617                         sio_data->skip_fan |= BIT(1);
2618
2619                 sio_data->skip_in |= BIT(5); /* No VIN5 */
2620                 sio_data->skip_in |= BIT(6); /* No VIN6 */
2621
2622                 sio_data->beep_pin = superio_inb(sioaddr,
2623                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2624         } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2625                 int reg;
2626
2627                 superio_select(sioaddr, GPIO);
2628
2629                 /* Check for pwm5 */
2630                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2631                 if (reg & BIT(6))
2632                         sio_data->skip_pwm |= BIT(4);
2633
2634                 /* Check for fan4, fan5 */
2635                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2636                 if (!(reg & BIT(5)))
2637                         sio_data->skip_fan |= BIT(3);
2638                 if (!(reg & BIT(4)))
2639                         sio_data->skip_fan |= BIT(4);
2640
2641                 /* Check for pwm3, fan3 */
2642                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2643                 if (reg & BIT(6))
2644                         sio_data->skip_pwm |= BIT(2);
2645                 if (reg & BIT(7))
2646                         sio_data->skip_fan |= BIT(2);
2647
2648                 /* Check for pwm4 */
2649                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2650                 if (reg & BIT(2))
2651                         sio_data->skip_pwm |= BIT(3);
2652
2653                 /* Check for pwm2, fan2 */
2654                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2655                 if (reg & BIT(1))
2656                         sio_data->skip_pwm |= BIT(1);
2657                 if (reg & BIT(2))
2658                         sio_data->skip_fan |= BIT(1);
2659                 /* Check for pwm6, fan6 */
2660                 if (!(reg & BIT(7))) {
2661                         sio_data->skip_pwm |= BIT(5);
2662                         sio_data->skip_fan |= BIT(5);
2663                 }
2664
2665                 /* Check if AVCC is on VIN3 */
2666                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2667                 if (reg & BIT(0))
2668                         sio_data->internal |= BIT(0);
2669                 else
2670                         sio_data->skip_in |= BIT(9);
2671
2672                 sio_data->beep_pin = superio_inb(sioaddr,
2673                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2674         } else if (sio_data->type == it8622) {
2675                 int reg;
2676
2677                 superio_select(sioaddr, GPIO);
2678
2679                 /* Check for pwm4, fan4 */
2680                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2681                 if (reg & BIT(6))
2682                         sio_data->skip_fan |= BIT(3);
2683                 if (reg & BIT(5))
2684                         sio_data->skip_pwm |= BIT(3);
2685
2686                 /* Check for pwm3, fan3, pwm5, fan5 */
2687                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2688                 if (reg & BIT(6))
2689                         sio_data->skip_pwm |= BIT(2);
2690                 if (reg & BIT(7))
2691                         sio_data->skip_fan |= BIT(2);
2692                 if (reg & BIT(3))
2693                         sio_data->skip_pwm |= BIT(4);
2694                 if (reg & BIT(1))
2695                         sio_data->skip_fan |= BIT(4);
2696
2697                 /* Check for pwm2, fan2 */
2698                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2699                 if (reg & BIT(1))
2700                         sio_data->skip_pwm |= BIT(1);
2701                 if (reg & BIT(2))
2702                         sio_data->skip_fan |= BIT(1);
2703
2704                 /* Check for AVCC */
2705                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2706                 if (!(reg & BIT(0)))
2707                         sio_data->skip_in |= BIT(9);
2708
2709                 sio_data->beep_pin = superio_inb(sioaddr,
2710                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2711         } else {
2712                 int reg;
2713                 bool uart6;
2714
2715                 superio_select(sioaddr, GPIO);
2716
2717                 /* Check for fan4, fan5 */
2718                 if (has_five_fans(config)) {
2719                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2720                         switch (sio_data->type) {
2721                         case it8718:
2722                                 if (reg & BIT(5))
2723                                         sio_data->skip_fan |= BIT(3);
2724                                 if (reg & BIT(4))
2725                                         sio_data->skip_fan |= BIT(4);
2726                                 break;
2727                         case it8720:
2728                         case it8721:
2729                         case it8728:
2730                                 if (!(reg & BIT(5)))
2731                                         sio_data->skip_fan |= BIT(3);
2732                                 if (!(reg & BIT(4)))
2733                                         sio_data->skip_fan |= BIT(4);
2734                                 break;
2735                         default:
2736                                 break;
2737                         }
2738                 }
2739
2740                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2741                 if (!sio_data->skip_vid) {
2742                         /* We need at least 4 VID pins */
2743                         if (reg & 0x0f) {
2744                                 pr_info("VID is disabled (pins used for GPIO)\n");
2745                                 sio_data->skip_vid = 1;
2746                         }
2747                 }
2748
2749                 /* Check if fan3 is there or not */
2750                 if (reg & BIT(6))
2751                         sio_data->skip_pwm |= BIT(2);
2752                 if (reg & BIT(7))
2753                         sio_data->skip_fan |= BIT(2);
2754
2755                 /* Check if fan2 is there or not */
2756                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2757                 if (reg & BIT(1))
2758                         sio_data->skip_pwm |= BIT(1);
2759                 if (reg & BIT(2))
2760                         sio_data->skip_fan |= BIT(1);
2761
2762                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2763                     !(sio_data->skip_vid))
2764                         sio_data->vid_value = superio_inb(sioaddr,
2765                                                           IT87_SIO_VID_REG);
2766
2767                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2768
2769                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2770
2771                 /*
2772                  * The IT8720F has no VIN7 pin, so VCCH5V should always be
2773                  * routed internally to VIN7 with an internal divider.
2774                  * Curiously, there still is a configuration bit to control
2775                  * this, which means it can be set incorrectly. And even
2776                  * more curiously, many boards out there are improperly
2777                  * configured, even though the IT8720F datasheet claims
2778                  * that the internal routing of VCCH5V to VIN7 is the default
2779                  * setting. So we force the internal routing in this case.
2780                  *
2781                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2782                  * If UART6 is enabled, re-route VIN7 to the internal divider
2783                  * if that is not already the case.
2784                  */
2785                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2786                         reg |= BIT(1);
2787                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2788                         sio_data->need_in7_reroute = true;
2789                         pr_notice("Routing internal VCCH5V to in7\n");
2790                 }
2791                 if (reg & BIT(0))
2792                         sio_data->internal |= BIT(0);
2793                 if (reg & BIT(1))
2794                         sio_data->internal |= BIT(1);
2795
2796                 /*
2797                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2798                  * While VIN7 can be routed to the internal voltage divider,
2799                  * VIN5 and VIN6 are not available if UART6 is enabled.
2800                  *
2801                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2802                  * is the temperature source. Since we can not read the
2803                  * temperature source here, skip_temp is preliminary.
2804                  */
2805                 if (uart6) {
2806                         sio_data->skip_in |= BIT(5) | BIT(6);
2807                         sio_data->skip_temp |= BIT(2);
2808                 }
2809
2810                 sio_data->beep_pin = superio_inb(sioaddr,
2811                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2812         }
2813         if (sio_data->beep_pin)
2814                 pr_info("Beeping is supported\n");
2815
2816         /* Disable specific features based on DMI strings */
2817         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2818         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2819         if (board_vendor && board_name) {
2820                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2821                     strcmp(board_name, "FN68PT") == 0) {
2822                         /*
2823                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2824                          * connected to a fan, but to something else. One user
2825                          * has reported instant system power-off when changing
2826                          * the PWM2 duty cycle, so we disable it.
2827                          * I use the board name string as the trigger in case
2828                          * the same board is ever used in other systems.
2829                          */
2830                         pr_info("Disabling pwm2 due to hardware constraints\n");
2831                         sio_data->skip_pwm = BIT(1);
2832                 }
2833         }
2834
2835 exit:
2836         superio_exit(sioaddr);
2837         return err;
2838 }
2839
2840 /*
2841  * Some chips seem to have default value 0xff for all limit
2842  * registers. For low voltage limits it makes no sense and triggers
2843  * alarms, so change to 0 instead. For high temperature limits, it
2844  * means -1 degree C, which surprisingly doesn't trigger an alarm,
2845  * but is still confusing, so change to 127 degrees C.
2846  */
2847 static void it87_check_limit_regs(struct it87_data *data)
2848 {
2849         int i, reg;
2850
2851         for (i = 0; i < NUM_VIN_LIMIT; i++) {
2852                 reg = it87_read_value(data, IT87_REG_VIN_MIN(i));
2853                 if (reg == 0xff)
2854                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2855         }
2856         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2857                 reg = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2858                 if (reg == 0xff)
2859                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2860         }
2861 }
2862
2863 /* Check if voltage monitors are reset manually or by some reason */
2864 static void it87_check_voltage_monitors_reset(struct it87_data *data)
2865 {
2866         int reg;
2867
2868         reg = it87_read_value(data, IT87_REG_VIN_ENABLE);
2869         if ((reg & 0xff) == 0) {
2870                 /* Enable all voltage monitors */
2871                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2872         }
2873 }
2874
2875 /* Check if tachometers are reset manually or by some reason */
2876 static void it87_check_tachometers_reset(struct platform_device *pdev)
2877 {
2878         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2879         struct it87_data *data = platform_get_drvdata(pdev);
2880         u8 mask, fan_main_ctrl;
2881
2882         mask = 0x70 & ~(sio_data->skip_fan << 4);
2883         fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2884         if ((fan_main_ctrl & mask) == 0) {
2885                 /* Enable all fan tachometers */
2886                 fan_main_ctrl |= mask;
2887                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2888                                  fan_main_ctrl);
2889         }
2890 }
2891
2892 /* Set tachometers to 16-bit mode if needed */
2893 static void it87_check_tachometers_16bit_mode(struct platform_device *pdev)
2894 {
2895         struct it87_data *data = platform_get_drvdata(pdev);
2896         int reg;
2897
2898         if (!has_fan16_config(data))
2899                 return;
2900
2901         reg = it87_read_value(data, IT87_REG_FAN_16BIT);
2902         if (~reg & 0x07 & data->has_fan) {
2903                 dev_dbg(&pdev->dev,
2904                         "Setting fan1-3 to 16-bit mode\n");
2905                 it87_write_value(data, IT87_REG_FAN_16BIT,
2906                                  reg | 0x07);
2907         }
2908 }
2909
2910 static void it87_start_monitoring(struct it87_data *data)
2911 {
2912         it87_write_value(data, IT87_REG_CONFIG,
2913                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2914                          | (update_vbat ? 0x41 : 0x01));
2915 }
2916
2917 /* Called when we have found a new IT87. */
2918 static void it87_init_device(struct platform_device *pdev)
2919 {
2920         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2921         struct it87_data *data = platform_get_drvdata(pdev);
2922         int tmp, i;
2923
2924         /*
2925          * For each PWM channel:
2926          * - If it is in automatic mode, setting to manual mode should set
2927          *   the fan to full speed by default.
2928          * - If it is in manual mode, we need a mapping to temperature
2929          *   channels to use when later setting to automatic mode later.
2930          *   Use a 1:1 mapping by default (we are clueless.)
2931          * In both cases, the value can (and should) be changed by the user
2932          * prior to switching to a different mode.
2933          * Note that this is no longer needed for the IT8721F and later, as
2934          * these have separate registers for the temperature mapping and the
2935          * manual duty cycle.
2936          */
2937         for (i = 0; i < NUM_AUTO_PWM; i++) {
2938                 data->pwm_temp_map[i] = i;
2939                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2940                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2941         }
2942
2943         it87_check_limit_regs(data);
2944
2945         /*
2946          * Temperature channels are not forcibly enabled, as they can be
2947          * set to two different sensor types and we can't guess which one
2948          * is correct for a given system. These channels can be enabled at
2949          * run-time through the temp{1-3}_type sysfs accessors if needed.
2950          */
2951
2952         it87_check_voltage_monitors_reset(data);
2953
2954         it87_check_tachometers_reset(pdev);
2955
2956         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2957         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2958
2959         it87_check_tachometers_16bit_mode(pdev);
2960
2961         /* Check for additional fans */
2962         if (has_five_fans(data)) {
2963                 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2964
2965                 if (tmp & BIT(4))
2966                         data->has_fan |= BIT(3); /* fan4 enabled */
2967                 if (tmp & BIT(5))
2968                         data->has_fan |= BIT(4); /* fan5 enabled */
2969                 if (has_six_fans(data) && (tmp & BIT(2)))
2970                         data->has_fan |= BIT(5); /* fan6 enabled */
2971         }
2972
2973         /* Fan input pins may be used for alternative functions */
2974         data->has_fan &= ~sio_data->skip_fan;
2975
2976         /* Check if pwm5, pwm6 are enabled */
2977         if (has_six_pwm(data)) {
2978                 /* The following code may be IT8620E specific */
2979                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2980                 if ((tmp & 0xc0) == 0xc0)
2981                         sio_data->skip_pwm |= BIT(4);
2982                 if (!(tmp & BIT(3)))
2983                         sio_data->skip_pwm |= BIT(5);
2984         }
2985
2986         it87_start_monitoring(data);
2987 }
2988
2989 /* Return 1 if and only if the PWM interface is safe to use */
2990 static int it87_check_pwm(struct device *dev)
2991 {
2992         struct it87_data *data = dev_get_drvdata(dev);
2993         /*
2994          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2995          * and polarity set to active low is sign that this is the case so we
2996          * disable pwm control to protect the user.
2997          */
2998         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2999
3000         if ((tmp & 0x87) == 0) {
3001                 if (fix_pwm_polarity) {
3002                         /*
3003                          * The user asks us to attempt a chip reconfiguration.
3004                          * This means switching to active high polarity and
3005                          * inverting all fan speed values.
3006                          */
3007                         int i;
3008                         u8 pwm[3];
3009
3010                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3011                                 pwm[i] = it87_read_value(data,
3012                                                          IT87_REG_PWM[i]);
3013
3014                         /*
3015                          * If any fan is in automatic pwm mode, the polarity
3016                          * might be correct, as suspicious as it seems, so we
3017                          * better don't change anything (but still disable the
3018                          * PWM interface).
3019                          */
3020                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3021                                 dev_info(dev,
3022                                          "Reconfiguring PWM to active high polarity\n");
3023                                 it87_write_value(data, IT87_REG_FAN_CTL,
3024                                                  tmp | 0x87);
3025                                 for (i = 0; i < 3; i++)
3026                                         it87_write_value(data,
3027                                                          IT87_REG_PWM[i],
3028                                                          0x7f & ~pwm[i]);
3029                                 return 1;
3030                         }
3031
3032                         dev_info(dev,
3033                                  "PWM configuration is too broken to be fixed\n");
3034                 }
3035
3036                 return 0;
3037         } else if (fix_pwm_polarity) {
3038                 dev_info(dev,
3039                          "PWM configuration looks sane, won't touch\n");
3040         }
3041
3042         return 1;
3043 }
3044
3045 static int it87_probe(struct platform_device *pdev)
3046 {
3047         struct it87_data *data;
3048         struct resource *res;
3049         struct device *dev = &pdev->dev;
3050         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3051         int enable_pwm_interface;
3052         struct device *hwmon_dev;
3053
3054         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3055         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3056                                  DRVNAME)) {
3057                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3058                         (unsigned long)res->start,
3059                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3060                 return -EBUSY;
3061         }
3062
3063         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3064         if (!data)
3065                 return -ENOMEM;
3066
3067         data->addr = res->start;
3068         data->sioaddr = sio_data->sioaddr;
3069         data->type = sio_data->type;
3070         data->features = it87_devices[sio_data->type].features;
3071         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3072         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3073         /*
3074          * IT8705F Datasheet 0.4.1, 3h == Version G.
3075          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3076          * These are the first revisions with 16-bit tachometer support.
3077          */
3078         switch (data->type) {
3079         case it87:
3080                 if (sio_data->revision >= 0x03) {
3081                         data->features &= ~FEAT_OLD_AUTOPWM;
3082                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3083                 }
3084                 break;
3085         case it8712:
3086                 if (sio_data->revision >= 0x08) {
3087                         data->features &= ~FEAT_OLD_AUTOPWM;
3088                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3089                                           FEAT_FIVE_FANS;
3090                 }
3091                 break;
3092         default:
3093                 break;
3094         }
3095
3096         /* Now, we do the remaining detection. */
3097         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3098             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3099                 return -ENODEV;
3100
3101         platform_set_drvdata(pdev, data);
3102
3103         mutex_init(&data->update_lock);
3104
3105         /* Check PWM configuration */
3106         enable_pwm_interface = it87_check_pwm(dev);
3107         if (!enable_pwm_interface)
3108                 dev_info(dev,
3109                          "Detected broken BIOS defaults, disabling PWM interface\n");
3110
3111         /* Starting with IT8721F, we handle scaling of internal voltages */
3112         if (has_scaling(data)) {
3113                 if (sio_data->internal & BIT(0))
3114                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3115                 if (sio_data->internal & BIT(1))
3116                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3117                 if (sio_data->internal & BIT(2))
3118                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3119                 if (sio_data->internal & BIT(3))
3120                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3121         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3122                    sio_data->type == it8783) {
3123                 if (sio_data->internal & BIT(0))
3124                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3125                 if (sio_data->internal & BIT(1))
3126                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3127         }
3128
3129         data->has_temp = 0x07;
3130         if (sio_data->skip_temp & BIT(2)) {
3131                 if (sio_data->type == it8782 &&
3132                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3133                         data->has_temp &= ~BIT(2);
3134         }
3135
3136         data->in_internal = sio_data->internal;
3137         data->need_in7_reroute = sio_data->need_in7_reroute;
3138         data->has_in = 0x3ff & ~sio_data->skip_in;
3139
3140         if (has_six_temp(data)) {
3141                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3142
3143                 /* Check for additional temperature sensors */
3144                 if ((reg & 0x03) >= 0x02)
3145                         data->has_temp |= BIT(3);
3146                 if (((reg >> 2) & 0x03) >= 0x02)
3147                         data->has_temp |= BIT(4);
3148                 if (((reg >> 4) & 0x03) >= 0x02)
3149                         data->has_temp |= BIT(5);
3150
3151                 /* Check for additional voltage sensors */
3152                 if ((reg & 0x03) == 0x01)
3153                         data->has_in |= BIT(10);
3154                 if (((reg >> 2) & 0x03) == 0x01)
3155                         data->has_in |= BIT(11);
3156                 if (((reg >> 4) & 0x03) == 0x01)
3157                         data->has_in |= BIT(12);
3158         }
3159
3160         data->has_beep = !!sio_data->beep_pin;
3161
3162         /* Initialize the IT87 chip */
3163         it87_init_device(pdev);
3164
3165         if (!sio_data->skip_vid) {
3166                 data->has_vid = true;
3167                 data->vrm = vid_which_vrm();
3168                 /* VID reading from Super-I/O config space if available */
3169                 data->vid = sio_data->vid_value;
3170         }
3171
3172         /* Prepare for sysfs hooks */
3173         data->groups[0] = &it87_group;
3174         data->groups[1] = &it87_group_in;
3175         data->groups[2] = &it87_group_temp;
3176         data->groups[3] = &it87_group_fan;
3177
3178         if (enable_pwm_interface) {
3179                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3180                 data->has_pwm &= ~sio_data->skip_pwm;
3181
3182                 data->groups[4] = &it87_group_pwm;
3183                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3184                         data->groups[5] = &it87_group_auto_pwm;
3185         }
3186
3187         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3188                                         it87_devices[sio_data->type].name,
3189                                         data, data->groups);
3190         return PTR_ERR_OR_ZERO(hwmon_dev);
3191 }
3192
3193 static void __maybe_unused it87_resume_sio(struct platform_device *pdev)
3194 {
3195         struct it87_data *data = dev_get_drvdata(&pdev->dev);
3196         int err;
3197         int reg2c;
3198
3199         if (!data->need_in7_reroute)
3200                 return;
3201
3202         err = superio_enter(data->sioaddr);
3203         if (err) {
3204                 dev_warn(&pdev->dev,
3205                          "Unable to enter Super I/O to reroute in7 (%d)",
3206                          err);
3207                 return;
3208         }
3209
3210         superio_select(data->sioaddr, GPIO);
3211
3212         reg2c = superio_inb(data->sioaddr, IT87_SIO_PINX2_REG);
3213         if (!(reg2c & BIT(1))) {
3214                 dev_dbg(&pdev->dev,
3215                         "Routing internal VCCH5V to in7 again");
3216
3217                 reg2c |= BIT(1);
3218                 superio_outb(data->sioaddr, IT87_SIO_PINX2_REG,
3219                              reg2c);
3220         }
3221
3222         superio_exit(data->sioaddr);
3223 }
3224
3225 static int __maybe_unused it87_resume(struct device *dev)
3226 {
3227         struct platform_device *pdev = to_platform_device(dev);
3228         struct it87_data *data = dev_get_drvdata(dev);
3229
3230         it87_resume_sio(pdev);
3231
3232         mutex_lock(&data->update_lock);
3233
3234         it87_check_pwm(dev);
3235         it87_check_limit_regs(data);
3236         it87_check_voltage_monitors_reset(data);
3237         it87_check_tachometers_reset(pdev);
3238         it87_check_tachometers_16bit_mode(pdev);
3239
3240         it87_start_monitoring(data);
3241
3242         /* force update */
3243         data->valid = 0;
3244
3245         mutex_unlock(&data->update_lock);
3246
3247         it87_update_device(dev);
3248
3249         return 0;
3250 }
3251
3252 static SIMPLE_DEV_PM_OPS(it87_dev_pm_ops, NULL, it87_resume);
3253
3254 static struct platform_driver it87_driver = {
3255         .driver = {
3256                 .name   = DRVNAME,
3257                 .pm     = &it87_dev_pm_ops,
3258         },
3259         .probe  = it87_probe,
3260 };
3261
3262 static int __init it87_device_add(int index, unsigned short address,
3263                                   const struct it87_sio_data *sio_data)
3264 {
3265         struct platform_device *pdev;
3266         struct resource res = {
3267                 .start  = address + IT87_EC_OFFSET,
3268                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3269                 .name   = DRVNAME,
3270                 .flags  = IORESOURCE_IO,
3271         };
3272         int err;
3273
3274         err = acpi_check_resource_conflict(&res);
3275         if (err)
3276                 return err;
3277
3278         pdev = platform_device_alloc(DRVNAME, address);
3279         if (!pdev)
3280                 return -ENOMEM;
3281
3282         err = platform_device_add_resources(pdev, &res, 1);
3283         if (err) {
3284                 pr_err("Device resource addition failed (%d)\n", err);
3285                 goto exit_device_put;
3286         }
3287
3288         err = platform_device_add_data(pdev, sio_data,
3289                                        sizeof(struct it87_sio_data));
3290         if (err) {
3291                 pr_err("Platform data allocation failed\n");
3292                 goto exit_device_put;
3293         }
3294
3295         err = platform_device_add(pdev);
3296         if (err) {
3297                 pr_err("Device addition failed (%d)\n", err);
3298                 goto exit_device_put;
3299         }
3300
3301         it87_pdev[index] = pdev;
3302         return 0;
3303
3304 exit_device_put:
3305         platform_device_put(pdev);
3306         return err;
3307 }
3308
3309 static int __init sm_it87_init(void)
3310 {
3311         int sioaddr[2] = { REG_2E, REG_4E };
3312         struct it87_sio_data sio_data;
3313         unsigned short isa_address[2];
3314         bool found = false;
3315         int i, err;
3316
3317         err = platform_driver_register(&it87_driver);
3318         if (err)
3319                 return err;
3320
3321         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3322                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3323                 isa_address[i] = 0;
3324                 err = it87_find(sioaddr[i], &isa_address[i], &sio_data);
3325                 if (err || isa_address[i] == 0)
3326                         continue;
3327                 /*
3328                  * Don't register second chip if its ISA address matches
3329                  * the first chip's ISA address.
3330                  */
3331                 if (i && isa_address[i] == isa_address[0])
3332                         break;
3333
3334                 err = it87_device_add(i, isa_address[i], &sio_data);
3335                 if (err)
3336                         goto exit_dev_unregister;
3337
3338                 found = true;
3339
3340                 /*
3341                  * IT8705F may respond on both SIO addresses.
3342                  * Stop probing after finding one.
3343                  */
3344                 if (sio_data.type == it87)
3345                         break;
3346         }
3347
3348         if (!found) {
3349                 err = -ENODEV;
3350                 goto exit_unregister;
3351         }
3352         return 0;
3353
3354 exit_dev_unregister:
3355         /* NULL check handled by platform_device_unregister */
3356         platform_device_unregister(it87_pdev[0]);
3357 exit_unregister:
3358         platform_driver_unregister(&it87_driver);
3359         return err;
3360 }
3361
3362 static void __exit sm_it87_exit(void)
3363 {
3364         /* NULL check handled by platform_device_unregister */
3365         platform_device_unregister(it87_pdev[1]);
3366         platform_device_unregister(it87_pdev[0]);
3367         platform_driver_unregister(&it87_driver);
3368 }
3369
3370 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3371 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3372 module_param(update_vbat, bool, 0);
3373 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3374 module_param(fix_pwm_polarity, bool, 0);
3375 MODULE_PARM_DESC(fix_pwm_polarity,
3376                  "Force PWM polarity to active high (DANGEROUS)");
3377 MODULE_LICENSE("GPL");
3378
3379 module_init(sm_it87_init);
3380 module_exit(sm_it87_exit);