drivers/hwtracing/coresight/coresight-etb10.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
   4  *
   5  * Description: CoreSight Embedded Trace Buffer driver
   6  */
   7
   8 #include <asm/local.h>
   9 #include <linux/kernel.h>
  10 #include <linux/init.h>
  11 #include <linux/types.h>
  12 #include <linux/device.h>
  13 #include <linux/io.h>
  14 #include <linux/err.h>
  15 #include <linux/fs.h>
  16 #include <linux/miscdevice.h>
  17 #include <linux/uaccess.h>
  18 #include <linux/slab.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/pm_runtime.h>
  21 #include <linux/seq_file.h>
  22 #include <linux/coresight.h>
  23 #include <linux/amba/bus.h>
  24 #include <linux/clk.h>
  25 #include <linux/circ_buf.h>
  26 #include <linux/mm.h>
  27 #include <linux/perf_event.h>
  28
  29
  30 #include "coresight-priv.h"
  31
  32 #define ETB_RAM_DEPTH_REG       0x004
  33 #define ETB_STATUS_REG          0x00c
  34 #define ETB_RAM_READ_DATA_REG   0x010
  35 #define ETB_RAM_READ_POINTER    0x014
  36 #define ETB_RAM_WRITE_POINTER   0x018
  37 #define ETB_TRG                 0x01c
  38 #define ETB_CTL_REG             0x020
  39 #define ETB_RWD_REG             0x024
  40 #define ETB_FFSR                0x300
  41 #define ETB_FFCR                0x304
  42 #define ETB_ITMISCOP0           0xee0
  43 #define ETB_ITTRFLINACK         0xee4
  44 #define ETB_ITTRFLIN            0xee8
  45 #define ETB_ITATBDATA0          0xeeC
  46 #define ETB_ITATBCTR2           0xef0
  47 #define ETB_ITATBCTR1           0xef4
  48 #define ETB_ITATBCTR0           0xef8
  49
  50 /* register description */
  51 /* STS - 0x00C */
  52 #define ETB_STATUS_RAM_FULL     BIT(0)
  53 /* CTL - 0x020 */
  54 #define ETB_CTL_CAPT_EN         BIT(0)
  55 /* FFCR - 0x304 */
  56 #define ETB_FFCR_EN_FTC         BIT(0)
  57 #define ETB_FFCR_FON_MAN        BIT(6)
  58 #define ETB_FFCR_STOP_FI        BIT(12)
  59 #define ETB_FFCR_STOP_TRIGGER   BIT(13)
  60
  61 #define ETB_FFCR_BIT            6
  62 #define ETB_FFSR_BIT            1
  63 #define ETB_FRAME_SIZE_WORDS    4
  64
  65 /**
  66  * struct etb_drvdata - specifics associated to an ETB component
  67  * @base:       memory mapped base address for this component.
  68  * @dev:        the device entity associated to this component.
  69  * @atclk:      optional clock for the core parts of the ETB.
  70  * @csdev:      component vitals needed by the framework.
  71  * @miscdev:    specifics to handle "/dev/xyz.etb" entry.
  72  * @spinlock:   only one at a time pls.
  73  * @reading:    synchronise user space access to etb buffer.
  74  * @mode:       this ETB is being used.
  75  * @buf:        area of memory where ETB buffer content gets sent.
  76  * @buffer_depth: size of @buf.
  77  * @trigger_cntr: amount of words to store after a trigger.
  78  */
  79 struct etb_drvdata {
  80         void __iomem            *base;
  81         struct device           *dev;
  82         struct clk              *atclk;
  83         struct coresight_device *csdev;
  84         struct miscdevice       miscdev;
  85         spinlock_t              spinlock;
  86         local_t                 reading;
  87         local_t                 mode;
  88         u8                      *buf;
  89         u32                     buffer_depth;
  90         u32                     trigger_cntr;
  91 };
  92
  93 static unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata)
  94 {
  95         u32 depth = 0;
  96
  97         pm_runtime_get_sync(drvdata->dev);
  98
  99         /* RO registers don't need locking */
 100         depth = readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG);
 101
 102         pm_runtime_put(drvdata->dev);
 103         return depth;
 104 }
 105
 106 static void etb_enable_hw(struct etb_drvdata *drvdata)
 107 {
 108         int i;
 109         u32 depth;
 110
 111         CS_UNLOCK(drvdata->base);
 112
 113         depth = drvdata->buffer_depth;
 114         /* reset write RAM pointer address */
 115         writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
 116         /* clear entire RAM buffer */
 117         for (i = 0; i < depth; i++)
 118                 writel_relaxed(0x0, drvdata->base + ETB_RWD_REG);
 119
 120         /* reset write RAM pointer address */
 121         writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
 122         /* reset read RAM pointer address */
 123         writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
 124
 125         writel_relaxed(drvdata->trigger_cntr, drvdata->base + ETB_TRG);
 126         writel_relaxed(ETB_FFCR_EN_FTC | ETB_FFCR_STOP_TRIGGER,
 127                        drvdata->base + ETB_FFCR);
 128         /* ETB trace capture enable */
 129         writel_relaxed(ETB_CTL_CAPT_EN, drvdata->base + ETB_CTL_REG);
 130
 131         CS_LOCK(drvdata->base);
 132 }
 133
 134 static int etb_enable(struct coresight_device *csdev, u32 mode)
 135 {
 136         u32 val;
 137         unsigned long flags;
 138         struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 139
 140         val = local_cmpxchg(&drvdata->mode,
 141                             CS_MODE_DISABLED, mode);
 142         /*
 143          * When accessing from Perf, a HW buffer can be handled
 144          * by a single trace entity.  In sysFS mode many tracers
 145          * can be logging to the same HW buffer.
 146          */
 147         if (val == CS_MODE_PERF)
 148                 return -EBUSY;
 149
 150         /* Don't let perf disturb sysFS sessions */
 151         if (val == CS_MODE_SYSFS && mode == CS_MODE_PERF)
 152                 return -EBUSY;
 153
 154         /* Nothing to do, the tracer is already enabled. */
 155         if (val == CS_MODE_SYSFS)
 156                 goto out;
 157
 158         spin_lock_irqsave(&drvdata->spinlock, flags);
 159         etb_enable_hw(drvdata);
 160         spin_unlock_irqrestore(&drvdata->spinlock, flags);
 161
 162 out:
 163         dev_info(drvdata->dev, "ETB enabled\n");
 164         return 0;
 165 }
 166
 167 static void etb_disable_hw(struct etb_drvdata *drvdata)
 168 {
 169         u32 ffcr;
 170
 171         CS_UNLOCK(drvdata->base);
 172
 173         ffcr = readl_relaxed(drvdata->base + ETB_FFCR);
 174         /* stop formatter when a stop has completed */
 175         ffcr |= ETB_FFCR_STOP_FI;
 176         writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
 177         /* manually generate a flush of the system */
 178         ffcr |= ETB_FFCR_FON_MAN;
 179         writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
 180
 181         if (coresight_timeout(drvdata->base, ETB_FFCR, ETB_FFCR_BIT, 0)) {
 182                 dev_err(drvdata->dev,
 183                 "timeout while waiting for completion of Manual Flush\n");
 184         }
 185
 186         /* disable trace capture */
 187         writel_relaxed(0x0, drvdata->base + ETB_CTL_REG);
 188
 189         if (coresight_timeout(drvdata->base, ETB_FFSR, ETB_FFSR_BIT, 1)) {
 190                 dev_err(drvdata->dev,
 191                         "timeout while waiting for Formatter to Stop\n");
 192         }
 193
 194         CS_LOCK(drvdata->base);
 195 }
 196
 197 static void etb_dump_hw(struct etb_drvdata *drvdata)
 198 {
 199         bool lost = false;
 200         int i;
 201         u8 *buf_ptr;
 202         u32 read_data, depth;
 203         u32 read_ptr, write_ptr;
 204         u32 frame_off, frame_endoff;
 205
 206         CS_UNLOCK(drvdata->base);
 207
 208         read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
 209         write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
 210
 211         frame_off = write_ptr % ETB_FRAME_SIZE_WORDS;
 212         frame_endoff = ETB_FRAME_SIZE_WORDS - frame_off;
 213         if (frame_off) {
 214                 dev_err(drvdata->dev,
 215                         "write_ptr: %lu not aligned to formatter frame size\n",
 216                         (unsigned long)write_ptr);
 217                 dev_err(drvdata->dev, "frameoff: %lu, frame_endoff: %lu\n",
 218                         (unsigned long)frame_off, (unsigned long)frame_endoff);
 219                 write_ptr += frame_endoff;
 220         }
 221
 222         if ((readl_relaxed(drvdata->base + ETB_STATUS_REG)
 223                       & ETB_STATUS_RAM_FULL) == 0) {
 224                 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
 225         } else {
 226                 writel_relaxed(write_ptr, drvdata->base + ETB_RAM_READ_POINTER);
 227                 lost = true;
 228         }
 229
 230         depth = drvdata->buffer_depth;
 231         buf_ptr = drvdata->buf;
 232         for (i = 0; i < depth; i++) {
 233                 read_data = readl_relaxed(drvdata->base +
 234                                           ETB_RAM_READ_DATA_REG);
 235                 *(u32 *)buf_ptr = read_data;
 236                 buf_ptr += 4;
 237         }
 238
 239         if (lost)
 240                 coresight_insert_barrier_packet(drvdata->buf);
 241
 242         if (frame_off) {
 243                 buf_ptr -= (frame_endoff * 4);
 244                 for (i = 0; i < frame_endoff; i++) {
 245                         *buf_ptr++ = 0x0;
 246                         *buf_ptr++ = 0x0;
 247                         *buf_ptr++ = 0x0;
 248                         *buf_ptr++ = 0x0;
 249                 }
 250         }
 251
 252         writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
 253
 254         CS_LOCK(drvdata->base);
 255 }
 256
 257 static void etb_disable(struct coresight_device *csdev)
 258 {
 259         struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 260         unsigned long flags;
 261
 262         spin_lock_irqsave(&drvdata->spinlock, flags);
 263         etb_disable_hw(drvdata);
 264         etb_dump_hw(drvdata);
 265         spin_unlock_irqrestore(&drvdata->spinlock, flags);
 266
 267         local_set(&drvdata->mode, CS_MODE_DISABLED);
 268
 269         dev_info(drvdata->dev, "ETB disabled\n");
 270 }
 271
 272 static void *etb_alloc_buffer(struct coresight_device *csdev, int cpu,
 273                               void **pages, int nr_pages, bool overwrite)
 274 {
 275         int node;
 276         struct cs_buffers *buf;
 277
 278         node = (cpu == -1) ? NUMA_NO_NODE : cpu_to_node(cpu);
 279
 280         buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
 281         if (!buf)
 282                 return NULL;
 283
 284         buf->snapshot = overwrite;
 285         buf->nr_pages = nr_pages;
 286         buf->data_pages = pages;
 287
 288         return buf;
 289 }
 290
 291 static void etb_free_buffer(void *config)
 292 {
 293         struct cs_buffers *buf = config;
 294
 295         kfree(buf);
 296 }
 297
 298 static int etb_set_buffer(struct coresight_device *csdev,
 299                           struct perf_output_handle *handle,
 300                           void *sink_config)
 301 {
 302         int ret = 0;
 303         unsigned long head;
 304         struct cs_buffers *buf = sink_config;
 305
 306         /* wrap head around to the amount of space we have */
 307         head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
 308
 309         /* find the page to write to */
 310         buf->cur = head / PAGE_SIZE;
 311
 312         /* and offset within that page */
 313         buf->offset = head % PAGE_SIZE;
 314
 315         local_set(&buf->data_size, 0);
 316
 317         return ret;
 318 }
 319
 320 static unsigned long etb_reset_buffer(struct coresight_device *csdev,
 321                                       struct perf_output_handle *handle,
 322                                       void *sink_config)
 323 {
 324         unsigned long size = 0;
 325         struct cs_buffers *buf = sink_config;
 326
 327         if (buf) {
 328                 /*
 329                  * In snapshot mode ->data_size holds the new address of the
 330                  * ring buffer's head.  The size itself is the whole address
 331                  * range since we want the latest information.
 332                  */
 333                 if (buf->snapshot)
 334                         handle->head = local_xchg(&buf->data_size,
 335                                                   buf->nr_pages << PAGE_SHIFT);
 336
 337                 /*
 338                  * Tell the tracer PMU how much we got in this run and if
 339                  * something went wrong along the way.  Nobody else can use
 340                  * this cs_buffers instance until we are done.  As such
 341                  * resetting parameters here and squaring off with the ring
 342                  * buffer API in the tracer PMU is fine.
 343                  */
 344                 size = local_xchg(&buf->data_size, 0);
 345         }
 346
 347         return size;
 348 }
 349
 350 static void etb_update_buffer(struct coresight_device *csdev,
 351                               struct perf_output_handle *handle,
 352                               void *sink_config)
 353 {
 354         bool lost = false;
 355         int i, cur;
 356         u8 *buf_ptr;
 357         const u32 *barrier;
 358         u32 read_ptr, write_ptr, capacity;
 359         u32 status, read_data, to_read;
 360         unsigned long offset;
 361         struct cs_buffers *buf = sink_config;
 362         struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 363
 364         if (!buf)
 365                 return;
 366
 367         capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS;
 368
 369         etb_disable_hw(drvdata);
 370         CS_UNLOCK(drvdata->base);
 371
 372         /* unit is in words, not bytes */
 373         read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
 374         write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
 375
 376         /*
 377          * Entries should be aligned to the frame size.  If they are not
 378          * go back to the last alignment point to give decoding tools a
 379          * chance to fix things.
 380          */
 381         if (write_ptr % ETB_FRAME_SIZE_WORDS) {
 382                 dev_err(drvdata->dev,
 383                         "write_ptr: %lu not aligned to formatter frame size\n",
 384                         (unsigned long)write_ptr);
 385
 386                 write_ptr &= ~(ETB_FRAME_SIZE_WORDS - 1);
 387                 lost = true;
 388         }
 389
 390         /*
 391          * Get a hold of the status register and see if a wrap around
 392          * has occurred.  If so adjust things accordingly.  Otherwise
 393          * start at the beginning and go until the write pointer has
 394          * been reached.
 395          */
 396         status = readl_relaxed(drvdata->base + ETB_STATUS_REG);
 397         if (status & ETB_STATUS_RAM_FULL) {
 398                 lost = true;
 399                 to_read = capacity;
 400                 read_ptr = write_ptr;
 401         } else {
 402                 to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->buffer_depth);
 403                 to_read *= ETB_FRAME_SIZE_WORDS;
 404         }
 405
 406         /*
 407          * Make sure we don't overwrite data that hasn't been consumed yet.
 408          * It is entirely possible that the HW buffer has more data than the
 409          * ring buffer can currently handle.  If so adjust the start address
 410          * to take only the last traces.
 411          *
 412          * In snapshot mode we are looking to get the latest traces only and as
 413          * such, we don't care about not overwriting data that hasn't been
 414          * processed by user space.
 415          */
 416         if (!buf->snapshot && to_read > handle->size) {
 417                 u32 mask = ~(ETB_FRAME_SIZE_WORDS - 1);
 418
 419                 /* The new read pointer must be frame size aligned */
 420                 to_read = handle->size & mask;
 421                 /*
 422                  * Move the RAM read pointer up, keeping in mind that
 423                  * everything is in frame size units.
 424                  */
 425                 read_ptr = (write_ptr + drvdata->buffer_depth) -
 426                                         to_read / ETB_FRAME_SIZE_WORDS;
 427                 /* Wrap around if need be*/
 428                 if (read_ptr > (drvdata->buffer_depth - 1))
 429                         read_ptr -= drvdata->buffer_depth;
 430                 /* let the decoder know we've skipped ahead */
 431                 lost = true;
 432         }
 433
 434         if (lost)
 435                 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
 436
 437         /* finally tell HW where we want to start reading from */
 438         writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
 439
 440         cur = buf->cur;
 441         offset = buf->offset;
 442         barrier = barrier_pkt;
 443
 444         for (i = 0; i < to_read; i += 4) {
 445                 buf_ptr = buf->data_pages[cur] + offset;
 446                 read_data = readl_relaxed(drvdata->base +
 447                                           ETB_RAM_READ_DATA_REG);
 448                 if (lost && i < CORESIGHT_BARRIER_PKT_SIZE) {
 449                         read_data = *barrier;
 450                         barrier++;
 451                 }
 452
 453                 *(u32 *)buf_ptr = read_data;
 454                 buf_ptr += 4;
 455
 456                 offset += 4;
 457                 if (offset >= PAGE_SIZE) {
 458                         offset = 0;
 459                         cur++;
 460                         /* wrap around at the end of the buffer */
 461                         cur &= buf->nr_pages - 1;
 462                 }
 463         }
 464
 465         /* reset ETB buffer for next run */
 466         writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
 467         writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
 468
 469         /*
 470          * In snapshot mode all we have to do is communicate to
 471          * perf_aux_output_end() the address of the current head.  In full
 472          * trace mode the same function expects a size to move rb->aux_head
 473          * forward.
 474          */
 475         if (buf->snapshot)
 476                 local_set(&buf->data_size, (cur * PAGE_SIZE) + offset);
 477         else
 478                 local_add(to_read, &buf->data_size);
 479
 480         etb_enable_hw(drvdata);
 481         CS_LOCK(drvdata->base);
 482 }
 483
 484 static const struct coresight_ops_sink etb_sink_ops = {
 485         .enable         = etb_enable,
 486         .disable        = etb_disable,
 487         .alloc_buffer   = etb_alloc_buffer,
 488         .free_buffer    = etb_free_buffer,
 489         .set_buffer     = etb_set_buffer,
 490         .reset_buffer   = etb_reset_buffer,
 491         .update_buffer  = etb_update_buffer,
 492 };
 493
 494 static const struct coresight_ops etb_cs_ops = {
 495         .sink_ops       = &etb_sink_ops,
 496 };
 497
 498 static void etb_dump(struct etb_drvdata *drvdata)
 499 {
 500         unsigned long flags;
 501
 502         spin_lock_irqsave(&drvdata->spinlock, flags);
 503         if (local_read(&drvdata->mode) == CS_MODE_SYSFS) {
 504                 etb_disable_hw(drvdata);
 505                 etb_dump_hw(drvdata);
 506                 etb_enable_hw(drvdata);
 507         }
 508         spin_unlock_irqrestore(&drvdata->spinlock, flags);
 509
 510         dev_info(drvdata->dev, "ETB dumped\n");
 511 }
 512
 513 static int etb_open(struct inode *inode, struct file *file)
 514 {
 515         struct etb_drvdata *drvdata = container_of(file->private_data,
 516                                                    struct etb_drvdata, miscdev);
 517
 518         if (local_cmpxchg(&drvdata->reading, 0, 1))
 519                 return -EBUSY;
 520
 521         dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__);
 522         return 0;
 523 }
 524
 525 static ssize_t etb_read(struct file *file, char __user *data,
 526                                 size_t len, loff_t *ppos)
 527 {
 528         u32 depth;
 529         struct etb_drvdata *drvdata = container_of(file->private_data,
 530                                                    struct etb_drvdata, miscdev);
 531
 532         etb_dump(drvdata);
 533
 534         depth = drvdata->buffer_depth;
 535         if (*ppos + len > depth * 4)
 536                 len = depth * 4 - *ppos;
 537
 538         if (copy_to_user(data, drvdata->buf + *ppos, len)) {
 539                 dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__);
 540                 return -EFAULT;
 541         }
 542
 543         *ppos += len;
 544
 545         dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n",
 546                 __func__, len, (int)(depth * 4 - *ppos));
 547         return len;
 548 }
 549
 550 static int etb_release(struct inode *inode, struct file *file)
 551 {
 552         struct etb_drvdata *drvdata = container_of(file->private_data,
 553                                                    struct etb_drvdata, miscdev);
 554         local_set(&drvdata->reading, 0);
 555
 556         dev_dbg(drvdata->dev, "%s: released\n", __func__);
 557         return 0;
 558 }
 559
 560 static const struct file_operations etb_fops = {
 561         .owner          = THIS_MODULE,
 562         .open           = etb_open,
 563         .read           = etb_read,
 564         .release        = etb_release,
 565         .llseek         = no_llseek,
 566 };
 567
 568 #define coresight_etb10_reg(name, offset)               \
 569         coresight_simple_reg32(struct etb_drvdata, name, offset)
 570
 571 coresight_etb10_reg(rdp, ETB_RAM_DEPTH_REG);
 572 coresight_etb10_reg(sts, ETB_STATUS_REG);
 573 coresight_etb10_reg(rrp, ETB_RAM_READ_POINTER);
 574 coresight_etb10_reg(rwp, ETB_RAM_WRITE_POINTER);
 575 coresight_etb10_reg(trg, ETB_TRG);
 576 coresight_etb10_reg(ctl, ETB_CTL_REG);
 577 coresight_etb10_reg(ffsr, ETB_FFSR);
 578 coresight_etb10_reg(ffcr, ETB_FFCR);
 579
 580 static struct attribute *coresight_etb_mgmt_attrs[] = {
 581         &dev_attr_rdp.attr,
 582         &dev_attr_sts.attr,
 583         &dev_attr_rrp.attr,
 584         &dev_attr_rwp.attr,
 585         &dev_attr_trg.attr,
 586         &dev_attr_ctl.attr,
 587         &dev_attr_ffsr.attr,
 588         &dev_attr_ffcr.attr,
 589         NULL,
 590 };
 591
 592 static ssize_t trigger_cntr_show(struct device *dev,
 593                             struct device_attribute *attr, char *buf)
 594 {
 595         struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
 596         unsigned long val = drvdata->trigger_cntr;
 597
 598         return sprintf(buf, "%#lx\n", val);
 599 }
 600
 601 static ssize_t trigger_cntr_store(struct device *dev,
 602                              struct device_attribute *attr,
 603                              const char *buf, size_t size)
 604 {
 605         int ret;
 606         unsigned long val;
 607         struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
 608
 609         ret = kstrtoul(buf, 16, &val);
 610         if (ret)
 611                 return ret;
 612
 613         drvdata->trigger_cntr = val;
 614         return size;
 615 }
 616 static DEVICE_ATTR_RW(trigger_cntr);
 617
 618 static struct attribute *coresight_etb_attrs[] = {
 619         &dev_attr_trigger_cntr.attr,
 620         NULL,
 621 };
 622
 623 static const struct attribute_group coresight_etb_group = {
 624         .attrs = coresight_etb_attrs,
 625 };
 626
 627 static const struct attribute_group coresight_etb_mgmt_group = {
 628         .attrs = coresight_etb_mgmt_attrs,
 629         .name = "mgmt",
 630 };
 631
 632 const struct attribute_group *coresight_etb_groups[] = {
 633         &coresight_etb_group,
 634         &coresight_etb_mgmt_group,
 635         NULL,
 636 };
 637
 638 static int etb_probe(struct amba_device *adev, const struct amba_id *id)
 639 {
 640         int ret;
 641         void __iomem *base;
 642         struct device *dev = &adev->dev;
 643         struct coresight_platform_data *pdata = NULL;
 644         struct etb_drvdata *drvdata;
 645         struct resource *res = &adev->res;
 646         struct coresight_desc desc = { 0 };
 647         struct device_node *np = adev->dev.of_node;
 648
 649         if (np) {
 650                 pdata = of_get_coresight_platform_data(dev, np);
 651                 if (IS_ERR(pdata))
 652                         return PTR_ERR(pdata);
 653                 adev->dev.platform_data = pdata;
 654         }
 655
 656         drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
 657         if (!drvdata)
 658                 return -ENOMEM;
 659
 660         drvdata->dev = &adev->dev;
 661         drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
 662         if (!IS_ERR(drvdata->atclk)) {
 663                 ret = clk_prepare_enable(drvdata->atclk);
 664                 if (ret)
 665                         return ret;
 666         }
 667         dev_set_drvdata(dev, drvdata);
 668
 669         /* validity for the resource is already checked by the AMBA core */
 670         base = devm_ioremap_resource(dev, res);
 671         if (IS_ERR(base))
 672                 return PTR_ERR(base);
 673
 674         drvdata->base = base;
 675
 676         spin_lock_init(&drvdata->spinlock);
 677
 678         drvdata->buffer_depth = etb_get_buffer_depth(drvdata);
 679         pm_runtime_put(&adev->dev);
 680
 681         if (drvdata->buffer_depth & 0x80000000)
 682                 return -EINVAL;
 683
 684         drvdata->buf = devm_kcalloc(dev,
 685                                     drvdata->buffer_depth, 4, GFP_KERNEL);
 686         if (!drvdata->buf)
 687                 return -ENOMEM;
 688
 689         desc.type = CORESIGHT_DEV_TYPE_SINK;
 690         desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
 691         desc.ops = &etb_cs_ops;
 692         desc.pdata = pdata;
 693         desc.dev = dev;
 694         desc.groups = coresight_etb_groups;
 695         drvdata->csdev = coresight_register(&desc);
 696         if (IS_ERR(drvdata->csdev))
 697                 return PTR_ERR(drvdata->csdev);
 698
 699         drvdata->miscdev.name = pdata->name;
 700         drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
 701         drvdata->miscdev.fops = &etb_fops;
 702         ret = misc_register(&drvdata->miscdev);
 703         if (ret)
 704                 goto err_misc_register;
 705
 706         return 0;
 707
 708 err_misc_register:
 709         coresight_unregister(drvdata->csdev);
 710         return ret;
 711 }
 712
 713 #ifdef CONFIG_PM
 714 static int etb_runtime_suspend(struct device *dev)
 715 {
 716         struct etb_drvdata *drvdata = dev_get_drvdata(dev);
 717
 718         if (drvdata && !IS_ERR(drvdata->atclk))
 719                 clk_disable_unprepare(drvdata->atclk);
 720
 721         return 0;
 722 }
 723
 724 static int etb_runtime_resume(struct device *dev)
 725 {
 726         struct etb_drvdata *drvdata = dev_get_drvdata(dev);
 727
 728         if (drvdata && !IS_ERR(drvdata->atclk))
 729                 clk_prepare_enable(drvdata->atclk);
 730
 731         return 0;
 732 }
 733 #endif
 734
 735 static const struct dev_pm_ops etb_dev_pm_ops = {
 736         SET_RUNTIME_PM_OPS(etb_runtime_suspend, etb_runtime_resume, NULL)
 737 };
 738
 739 static const struct amba_id etb_ids[] = {
 740         {
 741                 .id     = 0x000bb907,
 742                 .mask   = 0x000fffff,
 743         },
 744         { 0, 0},
 745 };
 746
 747 static struct amba_driver etb_driver = {
 748         .drv = {
 749                 .name   = "coresight-etb10",
 750                 .owner  = THIS_MODULE,
 751                 .pm     = &etb_dev_pm_ops,
 752                 .suppress_bind_attrs = true,
 753
 754         },
 755         .probe          = etb_probe,
 756         .id_table       = etb_ids,
 757 };
 758 builtin_amba_driver(etb_driver);