drivers/hwtracing/coresight/coresight-etm-perf.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright(C) 2015 Linaro Limited. All rights reserved.
   4  * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
   5  */
   6
   7 #include <linux/coresight.h>
   8 #include <linux/coresight-pmu.h>
   9 #include <linux/cpumask.h>
  10 #include <linux/device.h>
  11 #include <linux/list.h>
  12 #include <linux/mm.h>
  13 #include <linux/init.h>
  14 #include <linux/perf_event.h>
  15 #include <linux/percpu-defs.h>
  16 #include <linux/slab.h>
  17 #include <linux/types.h>
  18 #include <linux/workqueue.h>
  19
  20 #include "coresight-etm-perf.h"
  21 #include "coresight-priv.h"
  22
  23 static struct pmu etm_pmu;
  24 static bool etm_perf_up;
  25
  26 /**
  27  * struct etm_event_data - Coresight specifics associated to an event
  28  * @work:               Handle to free allocated memory outside IRQ context.
  29  * @mask:               Hold the CPU(s) this event was set for.
  30  * @snk_config:         The sink configuration.
  31  * @path:               An array of path, each slot for one CPU.
  32  */
  33 struct etm_event_data {
  34         struct work_struct work;
  35         cpumask_t mask;
  36         void *snk_config;
  37         struct list_head * __percpu *path;
  38 };
  39
  40 static DEFINE_PER_CPU(struct perf_output_handle, ctx_handle);
  41 static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
  42
  43 /* ETMv3.5/PTM's ETMCR is 'config' */
  44 PMU_FORMAT_ATTR(cycacc,         "config:" __stringify(ETM_OPT_CYCACC));
  45 PMU_FORMAT_ATTR(timestamp,      "config:" __stringify(ETM_OPT_TS));
  46 PMU_FORMAT_ATTR(retstack,       "config:" __stringify(ETM_OPT_RETSTK));
  47
  48 static struct attribute *etm_config_formats_attr[] = {
  49         &format_attr_cycacc.attr,
  50         &format_attr_timestamp.attr,
  51         &format_attr_retstack.attr,
  52         NULL,
  53 };
  54
  55 static const struct attribute_group etm_pmu_format_group = {
  56         .name   = "format",
  57         .attrs  = etm_config_formats_attr,
  58 };
  59
  60 static const struct attribute_group *etm_pmu_attr_groups[] = {
  61         &etm_pmu_format_group,
  62         NULL,
  63 };
  64
  65 static inline struct list_head **
  66 etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
  67 {
  68         return per_cpu_ptr(data->path, cpu);
  69 }
  70
  71 static inline struct list_head *
  72 etm_event_cpu_path(struct etm_event_data *data, int cpu)
  73 {
  74         return *etm_event_cpu_path_ptr(data, cpu);
  75 }
  76
  77 static void etm_event_read(struct perf_event *event) {}
  78
  79 static int etm_addr_filters_alloc(struct perf_event *event)
  80 {
  81         struct etm_filters *filters;
  82         int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
  83
  84         filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
  85         if (!filters)
  86                 return -ENOMEM;
  87
  88         if (event->parent)
  89                 memcpy(filters, event->parent->hw.addr_filters,
  90                        sizeof(*filters));
  91
  92         event->hw.addr_filters = filters;
  93
  94         return 0;
  95 }
  96
  97 static void etm_event_destroy(struct perf_event *event)
  98 {
  99         kfree(event->hw.addr_filters);
 100         event->hw.addr_filters = NULL;
 101 }
 102
 103 static int etm_event_init(struct perf_event *event)
 104 {
 105         int ret = 0;
 106
 107         if (event->attr.type != etm_pmu.type) {
 108                 ret = -ENOENT;
 109                 goto out;
 110         }
 111
 112         ret = etm_addr_filters_alloc(event);
 113         if (ret)
 114                 goto out;
 115
 116         event->destroy = etm_event_destroy;
 117 out:
 118         return ret;
 119 }
 120
 121 static void free_event_data(struct work_struct *work)
 122 {
 123         int cpu;
 124         cpumask_t *mask;
 125         struct etm_event_data *event_data;
 126         struct coresight_device *sink;
 127
 128         event_data = container_of(work, struct etm_event_data, work);
 129         mask = &event_data->mask;
 130         /*
 131          * First deal with the sink configuration.  See comment in
 132          * etm_setup_aux() about why we take the first available path.
 133          */
 134         if (event_data->snk_config) {
 135                 cpu = cpumask_first(mask);
 136                 sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
 137                 if (sink_ops(sink)->free_buffer)
 138                         sink_ops(sink)->free_buffer(event_data->snk_config);
 139         }
 140
 141         for_each_cpu(cpu, mask) {
 142                 struct list_head **ppath;
 143
 144                 ppath = etm_event_cpu_path_ptr(event_data, cpu);
 145                 if (!(IS_ERR_OR_NULL(*ppath)))
 146                         coresight_release_path(*ppath);
 147                 *ppath = NULL;
 148         }
 149
 150         free_percpu(event_data->path);
 151         kfree(event_data);
 152 }
 153
 154 static void *alloc_event_data(int cpu)
 155 {
 156         cpumask_t *mask;
 157         struct etm_event_data *event_data;
 158
 159         /* First get memory for the session's data */
 160         event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
 161         if (!event_data)
 162                 return NULL;
 163
 164         /* Make sure nothing disappears under us */
 165         get_online_cpus();
 166
 167         mask = &event_data->mask;
 168         if (cpu != -1)
 169                 cpumask_set_cpu(cpu, mask);
 170         else
 171                 cpumask_copy(mask, cpu_online_mask);
 172         put_online_cpus();
 173
 174         /*
 175          * Each CPU has a single path between source and destination.  As such
 176          * allocate an array using CPU numbers as indexes.  That way a path
 177          * for any CPU can easily be accessed at any given time.  We proceed
 178          * the same way for sessions involving a single CPU.  The cost of
 179          * unused memory when dealing with single CPU trace scenarios is small
 180          * compared to the cost of searching through an optimized array.
 181          */
 182         event_data->path = alloc_percpu(struct list_head *);
 183
 184         if (!event_data->path) {
 185                 kfree(event_data);
 186                 return NULL;
 187         }
 188
 189         return event_data;
 190 }
 191
 192 static void etm_free_aux(void *data)
 193 {
 194         struct etm_event_data *event_data = data;
 195
 196         schedule_work(&event_data->work);
 197 }
 198
 199 static void *etm_setup_aux(struct perf_event *event, void **pages,
 200                            int nr_pages, bool overwrite)
 201 {
 202         int cpu = event->cpu;
 203         cpumask_t *mask;
 204         struct coresight_device *sink;
 205         struct etm_event_data *event_data = NULL;
 206
 207         event_data = alloc_event_data(cpu);
 208         if (!event_data)
 209                 return NULL;
 210         INIT_WORK(&event_data->work, free_event_data);
 211
 212         /*
 213          * In theory nothing prevent tracers in a trace session from being
 214          * associated with different sinks, nor having a sink per tracer.  But
 215          * until we have HW with this kind of topology we need to assume tracers
 216          * in a trace session are using the same sink.  Therefore go through
 217          * the coresight bus and pick the first enabled sink.
 218          *
 219          * When operated from sysFS users are responsible to enable the sink
 220          * while from perf, the perf tools will do it based on the choice made
 221          * on the cmd line.  As such the "enable_sink" flag in sysFS is reset.
 222          */
 223         sink = coresight_get_enabled_sink(true);
 224         if (!sink)
 225                 goto err;
 226
 227         mask = &event_data->mask;
 228
 229         /* Setup the path for each CPU in a trace session */
 230         for_each_cpu(cpu, mask) {
 231                 struct list_head *path;
 232                 struct coresight_device *csdev;
 233
 234                 csdev = per_cpu(csdev_src, cpu);
 235                 if (!csdev)
 236                         goto err;
 237
 238                 /*
 239                  * Building a path doesn't enable it, it simply builds a
 240                  * list of devices from source to sink that can be
 241                  * referenced later when the path is actually needed.
 242                  */
 243                 path = coresight_build_path(csdev, sink);
 244                 if (IS_ERR(path))
 245                         goto err;
 246
 247                 *etm_event_cpu_path_ptr(event_data, cpu) = path;
 248         }
 249
 250         if (!sink_ops(sink)->alloc_buffer)
 251                 goto err;
 252
 253         cpu = cpumask_first(mask);
 254         /* Get the AUX specific data from the sink buffer */
 255         event_data->snk_config =
 256                         sink_ops(sink)->alloc_buffer(sink, cpu, pages,
 257                                                      nr_pages, overwrite);
 258         if (!event_data->snk_config)
 259                 goto err;
 260
 261 out:
 262         return event_data;
 263
 264 err:
 265         etm_free_aux(event_data);
 266         event_data = NULL;
 267         goto out;
 268 }
 269
 270 static void etm_event_start(struct perf_event *event, int flags)
 271 {
 272         int cpu = smp_processor_id();
 273         struct etm_event_data *event_data;
 274         struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
 275         struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
 276         struct list_head *path;
 277
 278         if (!csdev)
 279                 goto fail;
 280
 281         /*
 282          * Deal with the ring buffer API and get a handle on the
 283          * session's information.
 284          */
 285         event_data = perf_aux_output_begin(handle, event);
 286         if (!event_data)
 287                 goto fail;
 288
 289         path = etm_event_cpu_path(event_data, cpu);
 290         /* We need a sink, no need to continue without one */
 291         sink = coresight_get_sink(path);
 292         if (WARN_ON_ONCE(!sink || !sink_ops(sink)->set_buffer))
 293                 goto fail_end_stop;
 294
 295         /* Configure the sink */
 296         if (sink_ops(sink)->set_buffer(sink, handle,
 297                                        event_data->snk_config))
 298                 goto fail_end_stop;
 299
 300         /* Nothing will happen without a path */
 301         if (coresight_enable_path(path, CS_MODE_PERF))
 302                 goto fail_end_stop;
 303
 304         /* Tell the perf core the event is alive */
 305         event->hw.state = 0;
 306
 307         /* Finally enable the tracer */
 308         if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
 309                 goto fail_disable_path;
 310
 311 out:
 312         return;
 313
 314 fail_disable_path:
 315         coresight_disable_path(path);
 316 fail_end_stop:
 317         perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
 318         perf_aux_output_end(handle, 0);
 319 fail:
 320         event->hw.state = PERF_HES_STOPPED;
 321         goto out;
 322 }
 323
 324 static void etm_event_stop(struct perf_event *event, int mode)
 325 {
 326         int cpu = smp_processor_id();
 327         unsigned long size;
 328         struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
 329         struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
 330         struct etm_event_data *event_data = perf_get_aux(handle);
 331         struct list_head *path;
 332
 333         if (event->hw.state == PERF_HES_STOPPED)
 334                 return;
 335
 336         if (!csdev)
 337                 return;
 338
 339         path = etm_event_cpu_path(event_data, cpu);
 340         if (!path)
 341                 return;
 342
 343         sink = coresight_get_sink(path);
 344         if (!sink)
 345                 return;
 346
 347         /* stop tracer */
 348         source_ops(csdev)->disable(csdev, event);
 349
 350         /* tell the core */
 351         event->hw.state = PERF_HES_STOPPED;
 352
 353         if (mode & PERF_EF_UPDATE) {
 354                 if (WARN_ON_ONCE(handle->event != event))
 355                         return;
 356
 357                 /* update trace information */
 358                 if (!sink_ops(sink)->update_buffer)
 359                         return;
 360
 361                 sink_ops(sink)->update_buffer(sink, handle,
 362                                               event_data->snk_config);
 363
 364                 if (!sink_ops(sink)->reset_buffer)
 365                         return;
 366
 367                 size = sink_ops(sink)->reset_buffer(sink, handle,
 368                                                     event_data->snk_config);
 369
 370                 perf_aux_output_end(handle, size);
 371         }
 372
 373         /* Disabling the path make its elements available to other sessions */
 374         coresight_disable_path(path);
 375 }
 376
 377 static int etm_event_add(struct perf_event *event, int mode)
 378 {
 379         int ret = 0;
 380         struct hw_perf_event *hwc = &event->hw;
 381
 382         if (mode & PERF_EF_START) {
 383                 etm_event_start(event, 0);
 384                 if (hwc->state & PERF_HES_STOPPED)
 385                         ret = -EINVAL;
 386         } else {
 387                 hwc->state = PERF_HES_STOPPED;
 388         }
 389
 390         return ret;
 391 }
 392
 393 static void etm_event_del(struct perf_event *event, int mode)
 394 {
 395         etm_event_stop(event, PERF_EF_UPDATE);
 396 }
 397
 398 static int etm_addr_filters_validate(struct list_head *filters)
 399 {
 400         bool range = false, address = false;
 401         int index = 0;
 402         struct perf_addr_filter *filter;
 403
 404         list_for_each_entry(filter, filters, entry) {
 405                 /*
 406                  * No need to go further if there's no more
 407                  * room for filters.
 408                  */
 409                 if (++index > ETM_ADDR_CMP_MAX)
 410                         return -EOPNOTSUPP;
 411
 412                 /* filter::size==0 means single address trigger */
 413                 if (filter->size) {
 414                         /*
 415                          * The existing code relies on START/STOP filters
 416                          * being address filters.
 417                          */
 418                         if (filter->action == PERF_ADDR_FILTER_ACTION_START ||
 419                             filter->action == PERF_ADDR_FILTER_ACTION_STOP)
 420                                 return -EOPNOTSUPP;
 421
 422                         range = true;
 423                 } else
 424                         address = true;
 425
 426                 /*
 427                  * At this time we don't allow range and start/stop filtering
 428                  * to cohabitate, they have to be mutually exclusive.
 429                  */
 430                 if (range && address)
 431                         return -EOPNOTSUPP;
 432         }
 433
 434         return 0;
 435 }
 436
 437 static void etm_addr_filters_sync(struct perf_event *event)
 438 {
 439         struct perf_addr_filters_head *head = perf_event_addr_filters(event);
 440         unsigned long start, stop;
 441         struct perf_addr_filter_range *fr = event->addr_filter_ranges;
 442         struct etm_filters *filters = event->hw.addr_filters;
 443         struct etm_filter *etm_filter;
 444         struct perf_addr_filter *filter;
 445         int i = 0;
 446
 447         list_for_each_entry(filter, &head->list, entry) {
 448                 start = fr[i].start;
 449                 stop = start + fr[i].size;
 450                 etm_filter = &filters->etm_filter[i];
 451
 452                 switch (filter->action) {
 453                 case PERF_ADDR_FILTER_ACTION_FILTER:
 454                         etm_filter->start_addr = start;
 455                         etm_filter->stop_addr = stop;
 456                         etm_filter->type = ETM_ADDR_TYPE_RANGE;
 457                         break;
 458                 case PERF_ADDR_FILTER_ACTION_START:
 459                         etm_filter->start_addr = start;
 460                         etm_filter->type = ETM_ADDR_TYPE_START;
 461                         break;
 462                 case PERF_ADDR_FILTER_ACTION_STOP:
 463                         etm_filter->stop_addr = stop;
 464                         etm_filter->type = ETM_ADDR_TYPE_STOP;
 465                         break;
 466                 }
 467                 i++;
 468         }
 469
 470         filters->nr_filters = i;
 471 }
 472
 473 int etm_perf_symlink(struct coresight_device *csdev, bool link)
 474 {
 475         char entry[sizeof("cpu9999999")];
 476         int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
 477         struct device *pmu_dev = etm_pmu.dev;
 478         struct device *cs_dev = &csdev->dev;
 479
 480         sprintf(entry, "cpu%d", cpu);
 481
 482         if (!etm_perf_up)
 483                 return -EPROBE_DEFER;
 484
 485         if (link) {
 486                 ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry);
 487                 if (ret)
 488                         return ret;
 489                 per_cpu(csdev_src, cpu) = csdev;
 490         } else {
 491                 sysfs_remove_link(&pmu_dev->kobj, entry);
 492                 per_cpu(csdev_src, cpu) = NULL;
 493         }
 494
 495         return 0;
 496 }
 497
 498 static int __init etm_perf_init(void)
 499 {
 500         int ret;
 501
 502         etm_pmu.capabilities            = PERF_PMU_CAP_EXCLUSIVE;
 503
 504         etm_pmu.attr_groups             = etm_pmu_attr_groups;
 505         etm_pmu.task_ctx_nr             = perf_sw_context;
 506         etm_pmu.read                    = etm_event_read;
 507         etm_pmu.event_init              = etm_event_init;
 508         etm_pmu.setup_aux               = etm_setup_aux;
 509         etm_pmu.free_aux                = etm_free_aux;
 510         etm_pmu.start                   = etm_event_start;
 511         etm_pmu.stop                    = etm_event_stop;
 512         etm_pmu.add                     = etm_event_add;
 513         etm_pmu.del                     = etm_event_del;
 514         etm_pmu.addr_filters_sync       = etm_addr_filters_sync;
 515         etm_pmu.addr_filters_validate   = etm_addr_filters_validate;
 516         etm_pmu.nr_addr_filters         = ETM_ADDR_CMP_MAX;
 517
 518         ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
 519         if (ret == 0)
 520                 etm_perf_up = true;
 521
 522         return ret;
 523 }
 524 device_initcall(etm_perf_init);