drivers/hwtracing/coresight/coresight-etm-perf.c

   1 /*
   2  * Copyright(C) 2015 Linaro Limited. All rights reserved.
   3  * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <linux/coresight.h>
  19 #include <linux/coresight-pmu.h>
  20 #include <linux/cpumask.h>
  21 #include <linux/device.h>
  22 #include <linux/list.h>
  23 #include <linux/mm.h>
  24 #include <linux/init.h>
  25 #include <linux/perf_event.h>
  26 #include <linux/percpu-defs.h>
  27 #include <linux/slab.h>
  28 #include <linux/types.h>
  29 #include <linux/workqueue.h>
  30
  31 #include "coresight-etm-perf.h"
  32 #include "coresight-priv.h"
  33
  34 static struct pmu etm_pmu;
  35 static bool etm_perf_up;
  36
  37 /**
  38  * struct etm_event_data - Coresight specifics associated to an event
  39  * @work:               Handle to free allocated memory outside IRQ context.
  40  * @mask:               Hold the CPU(s) this event was set for.
  41  * @snk_config:         The sink configuration.
  42  * @path:               An array of path, each slot for one CPU.
  43  */
  44 struct etm_event_data {
  45         struct work_struct work;
  46         cpumask_t mask;
  47         void *snk_config;
  48         struct list_head * __percpu *path;
  49 };
  50
  51 static DEFINE_PER_CPU(struct perf_output_handle, ctx_handle);
  52 static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
  53
  54 /* ETMv3.5/PTM's ETMCR is 'config' */
  55 PMU_FORMAT_ATTR(cycacc,         "config:" __stringify(ETM_OPT_CYCACC));
  56 PMU_FORMAT_ATTR(timestamp,      "config:" __stringify(ETM_OPT_TS));
  57 PMU_FORMAT_ATTR(retstack,       "config:" __stringify(ETM_OPT_RETSTK));
  58
  59 static struct attribute *etm_config_formats_attr[] = {
  60         &format_attr_cycacc.attr,
  61         &format_attr_timestamp.attr,
  62         &format_attr_retstack.attr,
  63         NULL,
  64 };
  65
  66 static const struct attribute_group etm_pmu_format_group = {
  67         .name   = "format",
  68         .attrs  = etm_config_formats_attr,
  69 };
  70
  71 static const struct attribute_group *etm_pmu_attr_groups[] = {
  72         &etm_pmu_format_group,
  73         NULL,
  74 };
  75
  76 static inline struct list_head **
  77 etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
  78 {
  79         return per_cpu_ptr(data->path, cpu);
  80 }
  81
  82 static inline struct list_head *
  83 etm_event_cpu_path(struct etm_event_data *data, int cpu)
  84 {
  85         return *etm_event_cpu_path_ptr(data, cpu);
  86 }
  87
  88 static void etm_event_read(struct perf_event *event) {}
  89
  90 static int etm_addr_filters_alloc(struct perf_event *event)
  91 {
  92         struct etm_filters *filters;
  93         int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
  94
  95         filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
  96         if (!filters)
  97                 return -ENOMEM;
  98
  99         if (event->parent)
 100                 memcpy(filters, event->parent->hw.addr_filters,
 101                        sizeof(*filters));
 102
 103         event->hw.addr_filters = filters;
 104
 105         return 0;
 106 }
 107
 108 static void etm_event_destroy(struct perf_event *event)
 109 {
 110         kfree(event->hw.addr_filters);
 111         event->hw.addr_filters = NULL;
 112 }
 113
 114 static int etm_event_init(struct perf_event *event)
 115 {
 116         int ret = 0;
 117
 118         if (event->attr.type != etm_pmu.type) {
 119                 ret = -ENOENT;
 120                 goto out;
 121         }
 122
 123         ret = etm_addr_filters_alloc(event);
 124         if (ret)
 125                 goto out;
 126
 127         event->destroy = etm_event_destroy;
 128 out:
 129         return ret;
 130 }
 131
 132 static void free_event_data(struct work_struct *work)
 133 {
 134         int cpu;
 135         cpumask_t *mask;
 136         struct etm_event_data *event_data;
 137         struct coresight_device *sink;
 138
 139         event_data = container_of(work, struct etm_event_data, work);
 140         mask = &event_data->mask;
 141         /*
 142          * First deal with the sink configuration.  See comment in
 143          * etm_setup_aux() about why we take the first available path.
 144          */
 145         if (event_data->snk_config) {
 146                 cpu = cpumask_first(mask);
 147                 sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
 148                 if (sink_ops(sink)->free_buffer)
 149                         sink_ops(sink)->free_buffer(event_data->snk_config);
 150         }
 151
 152         for_each_cpu(cpu, mask) {
 153                 struct list_head **ppath;
 154
 155                 ppath = etm_event_cpu_path_ptr(event_data, cpu);
 156                 if (!(IS_ERR_OR_NULL(*ppath)))
 157                         coresight_release_path(*ppath);
 158                 *ppath = NULL;
 159         }
 160
 161         free_percpu(event_data->path);
 162         kfree(event_data);
 163 }
 164
 165 static void *alloc_event_data(int cpu)
 166 {
 167         cpumask_t *mask;
 168         struct etm_event_data *event_data;
 169
 170         /* First get memory for the session's data */
 171         event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
 172         if (!event_data)
 173                 return NULL;
 174
 175         /* Make sure nothing disappears under us */
 176         get_online_cpus();
 177
 178         mask = &event_data->mask;
 179         if (cpu != -1)
 180                 cpumask_set_cpu(cpu, mask);
 181         else
 182                 cpumask_copy(mask, cpu_online_mask);
 183         put_online_cpus();
 184
 185         /*
 186          * Each CPU has a single path between source and destination.  As such
 187          * allocate an array using CPU numbers as indexes.  That way a path
 188          * for any CPU can easily be accessed at any given time.  We proceed
 189          * the same way for sessions involving a single CPU.  The cost of
 190          * unused memory when dealing with single CPU trace scenarios is small
 191          * compared to the cost of searching through an optimized array.
 192          */
 193         event_data->path = alloc_percpu(struct list_head *);
 194
 195         if (!event_data->path) {
 196                 kfree(event_data);
 197                 return NULL;
 198         }
 199
 200         return event_data;
 201 }
 202
 203 static void etm_free_aux(void *data)
 204 {
 205         struct etm_event_data *event_data = data;
 206
 207         schedule_work(&event_data->work);
 208 }
 209
 210 static void *etm_setup_aux(int event_cpu, void **pages,
 211                            int nr_pages, bool overwrite)
 212 {
 213         int cpu;
 214         cpumask_t *mask;
 215         struct coresight_device *sink;
 216         struct etm_event_data *event_data = NULL;
 217
 218         event_data = alloc_event_data(event_cpu);
 219         if (!event_data)
 220                 return NULL;
 221         INIT_WORK(&event_data->work, free_event_data);
 222
 223         /*
 224          * In theory nothing prevent tracers in a trace session from being
 225          * associated with different sinks, nor having a sink per tracer.  But
 226          * until we have HW with this kind of topology we need to assume tracers
 227          * in a trace session are using the same sink.  Therefore go through
 228          * the coresight bus and pick the first enabled sink.
 229          *
 230          * When operated from sysFS users are responsible to enable the sink
 231          * while from perf, the perf tools will do it based on the choice made
 232          * on the cmd line.  As such the "enable_sink" flag in sysFS is reset.
 233          */
 234         sink = coresight_get_enabled_sink(true);
 235         if (!sink)
 236                 goto err;
 237
 238         mask = &event_data->mask;
 239
 240         /* Setup the path for each CPU in a trace session */
 241         for_each_cpu(cpu, mask) {
 242                 struct list_head *path;
 243                 struct coresight_device *csdev;
 244
 245                 csdev = per_cpu(csdev_src, cpu);
 246                 if (!csdev)
 247                         goto err;
 248
 249                 /*
 250                  * Building a path doesn't enable it, it simply builds a
 251                  * list of devices from source to sink that can be
 252                  * referenced later when the path is actually needed.
 253                  */
 254                 path = coresight_build_path(csdev, sink);
 255                 if (IS_ERR(path))
 256                         goto err;
 257
 258                 *etm_event_cpu_path_ptr(event_data, cpu) = path;
 259         }
 260
 261         if (!sink_ops(sink)->alloc_buffer)
 262                 goto err;
 263
 264         cpu = cpumask_first(mask);
 265         /* Get the AUX specific data from the sink buffer */
 266         event_data->snk_config =
 267                         sink_ops(sink)->alloc_buffer(sink, cpu, pages,
 268                                                      nr_pages, overwrite);
 269         if (!event_data->snk_config)
 270                 goto err;
 271
 272 out:
 273         return event_data;
 274
 275 err:
 276         etm_free_aux(event_data);
 277         event_data = NULL;
 278         goto out;
 279 }
 280
 281 static void etm_event_start(struct perf_event *event, int flags)
 282 {
 283         int cpu = smp_processor_id();
 284         struct etm_event_data *event_data;
 285         struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
 286         struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
 287         struct list_head *path;
 288
 289         if (!csdev)
 290                 goto fail;
 291
 292         /*
 293          * Deal with the ring buffer API and get a handle on the
 294          * session's information.
 295          */
 296         event_data = perf_aux_output_begin(handle, event);
 297         if (!event_data)
 298                 goto fail;
 299
 300         path = etm_event_cpu_path(event_data, cpu);
 301         /* We need a sink, no need to continue without one */
 302         sink = coresight_get_sink(path);
 303         if (WARN_ON_ONCE(!sink || !sink_ops(sink)->set_buffer))
 304                 goto fail_end_stop;
 305
 306         /* Configure the sink */
 307         if (sink_ops(sink)->set_buffer(sink, handle,
 308                                        event_data->snk_config))
 309                 goto fail_end_stop;
 310
 311         /* Nothing will happen without a path */
 312         if (coresight_enable_path(path, CS_MODE_PERF))
 313                 goto fail_end_stop;
 314
 315         /* Tell the perf core the event is alive */
 316         event->hw.state = 0;
 317
 318         /* Finally enable the tracer */
 319         if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
 320                 goto fail_disable_path;
 321
 322 out:
 323         return;
 324
 325 fail_disable_path:
 326         coresight_disable_path(path);
 327 fail_end_stop:
 328         perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
 329         perf_aux_output_end(handle, 0);
 330 fail:
 331         event->hw.state = PERF_HES_STOPPED;
 332         goto out;
 333 }
 334
 335 static void etm_event_stop(struct perf_event *event, int mode)
 336 {
 337         int cpu = smp_processor_id();
 338         unsigned long size;
 339         struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
 340         struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
 341         struct etm_event_data *event_data = perf_get_aux(handle);
 342         struct list_head *path;
 343
 344         if (event->hw.state == PERF_HES_STOPPED)
 345                 return;
 346
 347         if (!csdev)
 348                 return;
 349
 350         path = etm_event_cpu_path(event_data, cpu);
 351         if (!path)
 352                 return;
 353
 354         sink = coresight_get_sink(path);
 355         if (!sink)
 356                 return;
 357
 358         /* stop tracer */
 359         source_ops(csdev)->disable(csdev, event);
 360
 361         /* tell the core */
 362         event->hw.state = PERF_HES_STOPPED;
 363
 364         if (mode & PERF_EF_UPDATE) {
 365                 if (WARN_ON_ONCE(handle->event != event))
 366                         return;
 367
 368                 /* update trace information */
 369                 if (!sink_ops(sink)->update_buffer)
 370                         return;
 371
 372                 sink_ops(sink)->update_buffer(sink, handle,
 373                                               event_data->snk_config);
 374
 375                 if (!sink_ops(sink)->reset_buffer)
 376                         return;
 377
 378                 size = sink_ops(sink)->reset_buffer(sink, handle,
 379                                                     event_data->snk_config);
 380
 381                 perf_aux_output_end(handle, size);
 382         }
 383
 384         /* Disabling the path make its elements available to other sessions */
 385         coresight_disable_path(path);
 386 }
 387
 388 static int etm_event_add(struct perf_event *event, int mode)
 389 {
 390         int ret = 0;
 391         struct hw_perf_event *hwc = &event->hw;
 392
 393         if (mode & PERF_EF_START) {
 394                 etm_event_start(event, 0);
 395                 if (hwc->state & PERF_HES_STOPPED)
 396                         ret = -EINVAL;
 397         } else {
 398                 hwc->state = PERF_HES_STOPPED;
 399         }
 400
 401         return ret;
 402 }
 403
 404 static void etm_event_del(struct perf_event *event, int mode)
 405 {
 406         etm_event_stop(event, PERF_EF_UPDATE);
 407 }
 408
 409 static int etm_addr_filters_validate(struct list_head *filters)
 410 {
 411         bool range = false, address = false;
 412         int index = 0;
 413         struct perf_addr_filter *filter;
 414
 415         list_for_each_entry(filter, filters, entry) {
 416                 /*
 417                  * No need to go further if there's no more
 418                  * room for filters.
 419                  */
 420                 if (++index > ETM_ADDR_CMP_MAX)
 421                         return -EOPNOTSUPP;
 422
 423                 /*
 424                  * As taken from the struct perf_addr_filter documentation:
 425                  *      @range: 1: range, 0: address
 426                  *
 427                  * At this time we don't allow range and start/stop filtering
 428                  * to cohabitate, they have to be mutually exclusive.
 429                  */
 430                 if ((filter->range == 1) && address)
 431                         return -EOPNOTSUPP;
 432
 433                 if ((filter->range == 0) && range)
 434                         return -EOPNOTSUPP;
 435
 436                 /*
 437                  * For range filtering, the second address in the address
 438                  * range comparator needs to be higher than the first.
 439                  * Invalid otherwise.
 440                  */
 441                 if (filter->range && filter->size == 0)
 442                         return -EINVAL;
 443
 444                 /*
 445                  * Everything checks out with this filter, record what we've
 446                  * received before moving on to the next one.
 447                  */
 448                 if (filter->range)
 449                         range = true;
 450                 else
 451                         address = true;
 452         }
 453
 454         return 0;
 455 }
 456
 457 static void etm_addr_filters_sync(struct perf_event *event)
 458 {
 459         struct perf_addr_filters_head *head = perf_event_addr_filters(event);
 460         unsigned long start, stop, *offs = event->addr_filters_offs;
 461         struct etm_filters *filters = event->hw.addr_filters;
 462         struct etm_filter *etm_filter;
 463         struct perf_addr_filter *filter;
 464         int i = 0;
 465
 466         list_for_each_entry(filter, &head->list, entry) {
 467                 start = filter->offset + offs[i];
 468                 stop = start + filter->size;
 469                 etm_filter = &filters->etm_filter[i];
 470
 471                 if (filter->range == 1) {
 472                         etm_filter->start_addr = start;
 473                         etm_filter->stop_addr = stop;
 474                         etm_filter->type = ETM_ADDR_TYPE_RANGE;
 475                 } else {
 476                         if (filter->filter == 1) {
 477                                 etm_filter->start_addr = start;
 478                                 etm_filter->type = ETM_ADDR_TYPE_START;
 479                         } else {
 480                                 etm_filter->stop_addr = stop;
 481                                 etm_filter->type = ETM_ADDR_TYPE_STOP;
 482                         }
 483                 }
 484                 i++;
 485         }
 486
 487         filters->nr_filters = i;
 488 }
 489
 490 int etm_perf_symlink(struct coresight_device *csdev, bool link)
 491 {
 492         char entry[sizeof("cpu9999999")];
 493         int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
 494         struct device *pmu_dev = etm_pmu.dev;
 495         struct device *cs_dev = &csdev->dev;
 496
 497         sprintf(entry, "cpu%d", cpu);
 498
 499         if (!etm_perf_up)
 500                 return -EPROBE_DEFER;
 501
 502         if (link) {
 503                 ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry);
 504                 if (ret)
 505                         return ret;
 506                 per_cpu(csdev_src, cpu) = csdev;
 507         } else {
 508                 sysfs_remove_link(&pmu_dev->kobj, entry);
 509                 per_cpu(csdev_src, cpu) = NULL;
 510         }
 511
 512         return 0;
 513 }
 514
 515 static int __init etm_perf_init(void)
 516 {
 517         int ret;
 518
 519         etm_pmu.capabilities            = PERF_PMU_CAP_EXCLUSIVE;
 520
 521         etm_pmu.attr_groups             = etm_pmu_attr_groups;
 522         etm_pmu.task_ctx_nr             = perf_sw_context;
 523         etm_pmu.read                    = etm_event_read;
 524         etm_pmu.event_init              = etm_event_init;
 525         etm_pmu.setup_aux               = etm_setup_aux;
 526         etm_pmu.free_aux                = etm_free_aux;
 527         etm_pmu.start                   = etm_event_start;
 528         etm_pmu.stop                    = etm_event_stop;
 529         etm_pmu.add                     = etm_event_add;
 530         etm_pmu.del                     = etm_event_del;
 531         etm_pmu.addr_filters_sync       = etm_addr_filters_sync;
 532         etm_pmu.addr_filters_validate   = etm_addr_filters_validate;
 533         etm_pmu.nr_addr_filters         = ETM_ADDR_CMP_MAX;
 534
 535         ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
 536         if (ret == 0)
 537                 etm_perf_up = true;
 538
 539         return ret;
 540 }
 541 device_initcall(etm_perf_init);