drivers/hwtracing/coresight/coresight-etm4x.c

   1 /* Copyright (c) 2014, The Linux Foundation. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/moduleparam.h>
  15 #include <linux/init.h>
  16 #include <linux/types.h>
  17 #include <linux/device.h>
  18 #include <linux/module.h>
  19 #include <linux/io.h>
  20 #include <linux/err.h>
  21 #include <linux/fs.h>
  22 #include <linux/slab.h>
  23 #include <linux/delay.h>
  24 #include <linux/smp.h>
  25 #include <linux/sysfs.h>
  26 #include <linux/stat.h>
  27 #include <linux/clk.h>
  28 #include <linux/cpu.h>
  29 #include <linux/coresight.h>
  30 #include <linux/pm_wakeup.h>
  31 #include <linux/amba/bus.h>
  32 #include <linux/seq_file.h>
  33 #include <linux/uaccess.h>
  34 #include <linux/pm_runtime.h>
  35 #include <asm/sections.h>
  36
  37 #include "coresight-etm4x.h"
  38
  39 static int boot_enable;
  40 module_param_named(boot_enable, boot_enable, int, S_IRUGO);
  41
  42 /* The number of ETMv4 currently registered */
  43 static int etm4_count;
  44 static struct etmv4_drvdata *etmdrvdata[NR_CPUS];
  45
  46 static void etm4_os_unlock(void *info)
  47 {
  48         struct etmv4_drvdata *drvdata = (struct etmv4_drvdata *)info;
  49
  50         /* Writing any value to ETMOSLAR unlocks the trace registers */
  51         writel_relaxed(0x0, drvdata->base + TRCOSLAR);
  52         isb();
  53 }
  54
  55 static bool etm4_arch_supported(u8 arch)
  56 {
  57         /* Mask out the minor version number */
  58         switch (arch & 0xf0) {
  59         case ETM_ARCH_V4:
  60                 break;
  61         default:
  62                 return false;
  63         }
  64         return true;
  65 }
  66
  67 static int etm4_trace_id(struct coresight_device *csdev)
  68 {
  69         struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
  70         unsigned long flags;
  71         int trace_id = -1;
  72
  73         if (!drvdata->enable)
  74                 return drvdata->trcid;
  75
  76         pm_runtime_get_sync(drvdata->dev);
  77         spin_lock_irqsave(&drvdata->spinlock, flags);
  78
  79         CS_UNLOCK(drvdata->base);
  80         trace_id = readl_relaxed(drvdata->base + TRCTRACEIDR);
  81         trace_id &= ETM_TRACEID_MASK;
  82         CS_LOCK(drvdata->base);
  83
  84         spin_unlock_irqrestore(&drvdata->spinlock, flags);
  85         pm_runtime_put(drvdata->dev);
  86
  87         return trace_id;
  88 }
  89
  90 static void etm4_enable_hw(void *info)
  91 {
  92         int i;
  93         struct etmv4_drvdata *drvdata = info;
  94
  95         CS_UNLOCK(drvdata->base);
  96
  97         etm4_os_unlock(drvdata);
  98
  99         /* Disable the trace unit before programming trace registers */
 100         writel_relaxed(0, drvdata->base + TRCPRGCTLR);
 101
 102         /* wait for TRCSTATR.IDLE to go up */
 103         if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1))
 104                 dev_err(drvdata->dev,
 105                         "timeout observed when probing at offset %#x\n",
 106                         TRCSTATR);
 107
 108         writel_relaxed(drvdata->pe_sel, drvdata->base + TRCPROCSELR);
 109         writel_relaxed(drvdata->cfg, drvdata->base + TRCCONFIGR);
 110         /* nothing specific implemented */
 111         writel_relaxed(0x0, drvdata->base + TRCAUXCTLR);
 112         writel_relaxed(drvdata->eventctrl0, drvdata->base + TRCEVENTCTL0R);
 113         writel_relaxed(drvdata->eventctrl1, drvdata->base + TRCEVENTCTL1R);
 114         writel_relaxed(drvdata->stall_ctrl, drvdata->base + TRCSTALLCTLR);
 115         writel_relaxed(drvdata->ts_ctrl, drvdata->base + TRCTSCTLR);
 116         writel_relaxed(drvdata->syncfreq, drvdata->base + TRCSYNCPR);
 117         writel_relaxed(drvdata->ccctlr, drvdata->base + TRCCCCTLR);
 118         writel_relaxed(drvdata->bb_ctrl, drvdata->base + TRCBBCTLR);
 119         writel_relaxed(drvdata->trcid, drvdata->base + TRCTRACEIDR);
 120         writel_relaxed(drvdata->vinst_ctrl, drvdata->base + TRCVICTLR);
 121         writel_relaxed(drvdata->viiectlr, drvdata->base + TRCVIIECTLR);
 122         writel_relaxed(drvdata->vissctlr,
 123                        drvdata->base + TRCVISSCTLR);
 124         writel_relaxed(drvdata->vipcssctlr,
 125                        drvdata->base + TRCVIPCSSCTLR);
 126         for (i = 0; i < drvdata->nrseqstate - 1; i++)
 127                 writel_relaxed(drvdata->seq_ctrl[i],
 128                                drvdata->base + TRCSEQEVRn(i));
 129         writel_relaxed(drvdata->seq_rst, drvdata->base + TRCSEQRSTEVR);
 130         writel_relaxed(drvdata->seq_state, drvdata->base + TRCSEQSTR);
 131         writel_relaxed(drvdata->ext_inp, drvdata->base + TRCEXTINSELR);
 132         for (i = 0; i < drvdata->nr_cntr; i++) {
 133                 writel_relaxed(drvdata->cntrldvr[i],
 134                                drvdata->base + TRCCNTRLDVRn(i));
 135                 writel_relaxed(drvdata->cntr_ctrl[i],
 136                                drvdata->base + TRCCNTCTLRn(i));
 137                 writel_relaxed(drvdata->cntr_val[i],
 138                                drvdata->base + TRCCNTVRn(i));
 139         }
 140
 141         /* Resource selector pair 0 is always implemented and reserved */
 142         for (i = 2; i < drvdata->nr_resource * 2; i++)
 143                 writel_relaxed(drvdata->res_ctrl[i],
 144                                drvdata->base + TRCRSCTLRn(i));
 145
 146         for (i = 0; i < drvdata->nr_ss_cmp; i++) {
 147                 writel_relaxed(drvdata->ss_ctrl[i],
 148                                drvdata->base + TRCSSCCRn(i));
 149                 writel_relaxed(drvdata->ss_status[i],
 150                                drvdata->base + TRCSSCSRn(i));
 151                 writel_relaxed(drvdata->ss_pe_cmp[i],
 152                                drvdata->base + TRCSSPCICRn(i));
 153         }
 154         for (i = 0; i < drvdata->nr_addr_cmp; i++) {
 155                 writeq_relaxed(drvdata->addr_val[i],
 156                                drvdata->base + TRCACVRn(i));
 157                 writeq_relaxed(drvdata->addr_acc[i],
 158                                drvdata->base + TRCACATRn(i));
 159         }
 160         for (i = 0; i < drvdata->numcidc; i++)
 161                 writeq_relaxed(drvdata->ctxid_pid[i],
 162                                drvdata->base + TRCCIDCVRn(i));
 163         writel_relaxed(drvdata->ctxid_mask0, drvdata->base + TRCCIDCCTLR0);
 164         writel_relaxed(drvdata->ctxid_mask1, drvdata->base + TRCCIDCCTLR1);
 165
 166         for (i = 0; i < drvdata->numvmidc; i++)
 167                 writeq_relaxed(drvdata->vmid_val[i],
 168                                drvdata->base + TRCVMIDCVRn(i));
 169         writel_relaxed(drvdata->vmid_mask0, drvdata->base + TRCVMIDCCTLR0);
 170         writel_relaxed(drvdata->vmid_mask1, drvdata->base + TRCVMIDCCTLR1);
 171
 172         /* Enable the trace unit */
 173         writel_relaxed(1, drvdata->base + TRCPRGCTLR);
 174
 175         /* wait for TRCSTATR.IDLE to go back down to '0' */
 176         if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 0))
 177                 dev_err(drvdata->dev,
 178                         "timeout observed when probing at offset %#x\n",
 179                         TRCSTATR);
 180
 181         CS_LOCK(drvdata->base);
 182
 183         dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu);
 184 }
 185
 186 static int etm4_enable(struct coresight_device *csdev)
 187 {
 188         struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 189         int ret;
 190
 191         pm_runtime_get_sync(drvdata->dev);
 192         spin_lock(&drvdata->spinlock);
 193
 194         /*
 195          * Executing etm4_enable_hw on the cpu whose ETM is being enabled
 196          * ensures that register writes occur when cpu is powered.
 197          */
 198         ret = smp_call_function_single(drvdata->cpu,
 199                                        etm4_enable_hw, drvdata, 1);
 200         if (ret)
 201                 goto err;
 202         drvdata->enable = true;
 203         drvdata->sticky_enable = true;
 204
 205         spin_unlock(&drvdata->spinlock);
 206
 207         dev_info(drvdata->dev, "ETM tracing enabled\n");
 208         return 0;
 209 err:
 210         spin_unlock(&drvdata->spinlock);
 211         pm_runtime_put(drvdata->dev);
 212         return ret;
 213 }
 214
 215 static void etm4_disable_hw(void *info)
 216 {
 217         u32 control;
 218         struct etmv4_drvdata *drvdata = info;
 219
 220         CS_UNLOCK(drvdata->base);
 221
 222         control = readl_relaxed(drvdata->base + TRCPRGCTLR);
 223
 224         /* EN, bit[0] Trace unit enable bit */
 225         control &= ~0x1;
 226
 227         /* make sure everything completes before disabling */
 228         mb();
 229         isb();
 230         writel_relaxed(control, drvdata->base + TRCPRGCTLR);
 231
 232         CS_LOCK(drvdata->base);
 233
 234         dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu);
 235 }
 236
 237 static void etm4_disable(struct coresight_device *csdev)
 238 {
 239         struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 240
 241         /*
 242          * Taking hotplug lock here protects from clocks getting disabled
 243          * with tracing being left on (crash scenario) if user disable occurs
 244          * after cpu online mask indicates the cpu is offline but before the
 245          * DYING hotplug callback is serviced by the ETM driver.
 246          */
 247         get_online_cpus();
 248         spin_lock(&drvdata->spinlock);
 249
 250         /*
 251          * Executing etm4_disable_hw on the cpu whose ETM is being disabled
 252          * ensures that register writes occur when cpu is powered.
 253          */
 254         smp_call_function_single(drvdata->cpu, etm4_disable_hw, drvdata, 1);
 255         drvdata->enable = false;
 256
 257         spin_unlock(&drvdata->spinlock);
 258         put_online_cpus();
 259
 260         pm_runtime_put(drvdata->dev);
 261
 262         dev_info(drvdata->dev, "ETM tracing disabled\n");
 263 }
 264
 265 static const struct coresight_ops_source etm4_source_ops = {
 266         .trace_id       = etm4_trace_id,
 267         .enable         = etm4_enable,
 268         .disable        = etm4_disable,
 269 };
 270
 271 static const struct coresight_ops etm4_cs_ops = {
 272         .source_ops     = &etm4_source_ops,
 273 };
 274
 275 static int etm4_set_mode_exclude(struct etmv4_drvdata *drvdata, bool exclude)
 276 {
 277         u8 idx = drvdata->addr_idx;
 278
 279         /*
 280          * TRCACATRn.TYPE bit[1:0]: type of comparison
 281          * the trace unit performs
 282          */
 283         if (BMVAL(drvdata->addr_acc[idx], 0, 1) == ETM_INSTR_ADDR) {
 284                 if (idx % 2 != 0)
 285                         return -EINVAL;
 286
 287                 /*
 288                  * We are performing instruction address comparison. Set the
 289                  * relevant bit of ViewInst Include/Exclude Control register
 290                  * for corresponding address comparator pair.
 291                  */
 292                 if (drvdata->addr_type[idx] != ETM_ADDR_TYPE_RANGE ||
 293                     drvdata->addr_type[idx + 1] != ETM_ADDR_TYPE_RANGE)
 294                         return -EINVAL;
 295
 296                 if (exclude == true) {
 297                         /*
 298                          * Set exclude bit and unset the include bit
 299                          * corresponding to comparator pair
 300                          */
 301                         drvdata->viiectlr |= BIT(idx / 2 + 16);
 302                         drvdata->viiectlr &= ~BIT(idx / 2);
 303                 } else {
 304                         /*
 305                          * Set include bit and unset exclude bit
 306                          * corresponding to comparator pair
 307                          */
 308                         drvdata->viiectlr |= BIT(idx / 2);
 309                         drvdata->viiectlr &= ~BIT(idx / 2 + 16);
 310                 }
 311         }
 312         return 0;
 313 }
 314
 315 static ssize_t nr_pe_cmp_show(struct device *dev,
 316                               struct device_attribute *attr,
 317                               char *buf)
 318 {
 319         unsigned long val;
 320         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 321
 322         val = drvdata->nr_pe_cmp;
 323         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 324 }
 325 static DEVICE_ATTR_RO(nr_pe_cmp);
 326
 327 static ssize_t nr_addr_cmp_show(struct device *dev,
 328                                 struct device_attribute *attr,
 329                                 char *buf)
 330 {
 331         unsigned long val;
 332         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 333
 334         val = drvdata->nr_addr_cmp;
 335         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 336 }
 337 static DEVICE_ATTR_RO(nr_addr_cmp);
 338
 339 static ssize_t nr_cntr_show(struct device *dev,
 340                             struct device_attribute *attr,
 341                             char *buf)
 342 {
 343         unsigned long val;
 344         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 345
 346         val = drvdata->nr_cntr;
 347         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 348 }
 349 static DEVICE_ATTR_RO(nr_cntr);
 350
 351 static ssize_t nr_ext_inp_show(struct device *dev,
 352                                struct device_attribute *attr,
 353                                char *buf)
 354 {
 355         unsigned long val;
 356         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 357
 358         val = drvdata->nr_ext_inp;
 359         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 360 }
 361 static DEVICE_ATTR_RO(nr_ext_inp);
 362
 363 static ssize_t numcidc_show(struct device *dev,
 364                             struct device_attribute *attr,
 365                             char *buf)
 366 {
 367         unsigned long val;
 368         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 369
 370         val = drvdata->numcidc;
 371         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 372 }
 373 static DEVICE_ATTR_RO(numcidc);
 374
 375 static ssize_t numvmidc_show(struct device *dev,
 376                              struct device_attribute *attr,
 377                              char *buf)
 378 {
 379         unsigned long val;
 380         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 381
 382         val = drvdata->numvmidc;
 383         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 384 }
 385 static DEVICE_ATTR_RO(numvmidc);
 386
 387 static ssize_t nrseqstate_show(struct device *dev,
 388                                struct device_attribute *attr,
 389                                char *buf)
 390 {
 391         unsigned long val;
 392         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 393
 394         val = drvdata->nrseqstate;
 395         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 396 }
 397 static DEVICE_ATTR_RO(nrseqstate);
 398
 399 static ssize_t nr_resource_show(struct device *dev,
 400                                 struct device_attribute *attr,
 401                                 char *buf)
 402 {
 403         unsigned long val;
 404         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 405
 406         val = drvdata->nr_resource;
 407         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 408 }
 409 static DEVICE_ATTR_RO(nr_resource);
 410
 411 static ssize_t nr_ss_cmp_show(struct device *dev,
 412                               struct device_attribute *attr,
 413                               char *buf)
 414 {
 415         unsigned long val;
 416         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 417
 418         val = drvdata->nr_ss_cmp;
 419         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 420 }
 421 static DEVICE_ATTR_RO(nr_ss_cmp);
 422
 423 static ssize_t reset_store(struct device *dev,
 424                            struct device_attribute *attr,
 425                            const char *buf, size_t size)
 426 {
 427         int i;
 428         unsigned long val;
 429         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 430
 431         if (kstrtoul(buf, 16, &val))
 432                 return -EINVAL;
 433
 434         spin_lock(&drvdata->spinlock);
 435         if (val)
 436                 drvdata->mode = 0x0;
 437
 438         /* Disable data tracing: do not trace load and store data transfers */
 439         drvdata->mode &= ~(ETM_MODE_LOAD | ETM_MODE_STORE);
 440         drvdata->cfg &= ~(BIT(1) | BIT(2));
 441
 442         /* Disable data value and data address tracing */
 443         drvdata->mode &= ~(ETM_MODE_DATA_TRACE_ADDR |
 444                            ETM_MODE_DATA_TRACE_VAL);
 445         drvdata->cfg &= ~(BIT(16) | BIT(17));
 446
 447         /* Disable all events tracing */
 448         drvdata->eventctrl0 = 0x0;
 449         drvdata->eventctrl1 = 0x0;
 450
 451         /* Disable timestamp event */
 452         drvdata->ts_ctrl = 0x0;
 453
 454         /* Disable stalling */
 455         drvdata->stall_ctrl = 0x0;
 456
 457         /* Reset trace synchronization period  to 2^8 = 256 bytes*/
 458         if (drvdata->syncpr == false)
 459                 drvdata->syncfreq = 0x8;
 460
 461         /*
 462          * Enable ViewInst to trace everything with start-stop logic in
 463          * started state. ARM recommends start-stop logic is set before
 464          * each trace run.
 465          */
 466         drvdata->vinst_ctrl |= BIT(0);
 467         if (drvdata->nr_addr_cmp == true) {
 468                 drvdata->mode |= ETM_MODE_VIEWINST_STARTSTOP;
 469                 /* SSSTATUS, bit[9] */
 470                 drvdata->vinst_ctrl |= BIT(9);
 471         }
 472
 473         /* No address range filtering for ViewInst */
 474         drvdata->viiectlr = 0x0;
 475
 476         /* No start-stop filtering for ViewInst */
 477         drvdata->vissctlr = 0x0;
 478
 479         /* Disable seq events */
 480         for (i = 0; i < drvdata->nrseqstate-1; i++)
 481                 drvdata->seq_ctrl[i] = 0x0;
 482         drvdata->seq_rst = 0x0;
 483         drvdata->seq_state = 0x0;
 484
 485         /* Disable external input events */
 486         drvdata->ext_inp = 0x0;
 487
 488         drvdata->cntr_idx = 0x0;
 489         for (i = 0; i < drvdata->nr_cntr; i++) {
 490                 drvdata->cntrldvr[i] = 0x0;
 491                 drvdata->cntr_ctrl[i] = 0x0;
 492                 drvdata->cntr_val[i] = 0x0;
 493         }
 494
 495         /* Resource selector pair 0 is always implemented and reserved */
 496         drvdata->res_idx = 0x2;
 497         for (i = 2; i < drvdata->nr_resource * 2; i++)
 498                 drvdata->res_ctrl[i] = 0x0;
 499
 500         for (i = 0; i < drvdata->nr_ss_cmp; i++) {
 501                 drvdata->ss_ctrl[i] = 0x0;
 502                 drvdata->ss_pe_cmp[i] = 0x0;
 503         }
 504
 505         drvdata->addr_idx = 0x0;
 506         for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) {
 507                 drvdata->addr_val[i] = 0x0;
 508                 drvdata->addr_acc[i] = 0x0;
 509                 drvdata->addr_type[i] = ETM_ADDR_TYPE_NONE;
 510         }
 511
 512         drvdata->ctxid_idx = 0x0;
 513         for (i = 0; i < drvdata->numcidc; i++) {
 514                 drvdata->ctxid_pid[i] = 0x0;
 515                 drvdata->ctxid_vpid[i] = 0x0;
 516         }
 517
 518         drvdata->ctxid_mask0 = 0x0;
 519         drvdata->ctxid_mask1 = 0x0;
 520
 521         drvdata->vmid_idx = 0x0;
 522         for (i = 0; i < drvdata->numvmidc; i++)
 523                 drvdata->vmid_val[i] = 0x0;
 524         drvdata->vmid_mask0 = 0x0;
 525         drvdata->vmid_mask1 = 0x0;
 526
 527         drvdata->trcid = drvdata->cpu + 1;
 528         spin_unlock(&drvdata->spinlock);
 529         return size;
 530 }
 531 static DEVICE_ATTR_WO(reset);
 532
 533 static ssize_t mode_show(struct device *dev,
 534                          struct device_attribute *attr,
 535                          char *buf)
 536 {
 537         unsigned long val;
 538         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 539
 540         val = drvdata->mode;
 541         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 542 }
 543
 544 static ssize_t mode_store(struct device *dev,
 545                           struct device_attribute *attr,
 546                           const char *buf, size_t size)
 547 {
 548         unsigned long val, mode;
 549         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 550
 551         if (kstrtoul(buf, 16, &val))
 552                 return -EINVAL;
 553
 554         spin_lock(&drvdata->spinlock);
 555         drvdata->mode = val & ETMv4_MODE_ALL;
 556
 557         if (drvdata->mode & ETM_MODE_EXCLUDE)
 558                 etm4_set_mode_exclude(drvdata, true);
 559         else
 560                 etm4_set_mode_exclude(drvdata, false);
 561
 562         if (drvdata->instrp0 == true) {
 563                 /* start by clearing instruction P0 field */
 564                 drvdata->cfg  &= ~(BIT(1) | BIT(2));
 565                 if (drvdata->mode & ETM_MODE_LOAD)
 566                         /* 0b01 Trace load instructions as P0 instructions */
 567                         drvdata->cfg  |= BIT(1);
 568                 if (drvdata->mode & ETM_MODE_STORE)
 569                         /* 0b10 Trace store instructions as P0 instructions */
 570                         drvdata->cfg  |= BIT(2);
 571                 if (drvdata->mode & ETM_MODE_LOAD_STORE)
 572                         /*
 573                          * 0b11 Trace load and store instructions
 574                          * as P0 instructions
 575                          */
 576                         drvdata->cfg  |= BIT(1) | BIT(2);
 577         }
 578
 579         /* bit[3], Branch broadcast mode */
 580         if ((drvdata->mode & ETM_MODE_BB) && (drvdata->trcbb == true))
 581                 drvdata->cfg |= BIT(3);
 582         else
 583                 drvdata->cfg &= ~BIT(3);
 584
 585         /* bit[4], Cycle counting instruction trace bit */
 586         if ((drvdata->mode & ETMv4_MODE_CYCACC) &&
 587                 (drvdata->trccci == true))
 588                 drvdata->cfg |= BIT(4);
 589         else
 590                 drvdata->cfg &= ~BIT(4);
 591
 592         /* bit[6], Context ID tracing bit */
 593         if ((drvdata->mode & ETMv4_MODE_CTXID) && (drvdata->ctxid_size))
 594                 drvdata->cfg |= BIT(6);
 595         else
 596                 drvdata->cfg &= ~BIT(6);
 597
 598         if ((drvdata->mode & ETM_MODE_VMID) && (drvdata->vmid_size))
 599                 drvdata->cfg |= BIT(7);
 600         else
 601                 drvdata->cfg &= ~BIT(7);
 602
 603         /* bits[10:8], Conditional instruction tracing bit */
 604         mode = ETM_MODE_COND(drvdata->mode);
 605         if (drvdata->trccond == true) {
 606                 drvdata->cfg &= ~(BIT(8) | BIT(9) | BIT(10));
 607                 drvdata->cfg |= mode << 8;
 608         }
 609
 610         /* bit[11], Global timestamp tracing bit */
 611         if ((drvdata->mode & ETMv4_MODE_TIMESTAMP) && (drvdata->ts_size))
 612                 drvdata->cfg |= BIT(11);
 613         else
 614                 drvdata->cfg &= ~BIT(11);
 615
 616         /* bit[12], Return stack enable bit */
 617         if ((drvdata->mode & ETM_MODE_RETURNSTACK) &&
 618                 (drvdata->retstack == true))
 619                 drvdata->cfg |= BIT(12);
 620         else
 621                 drvdata->cfg &= ~BIT(12);
 622
 623         /* bits[14:13], Q element enable field */
 624         mode = ETM_MODE_QELEM(drvdata->mode);
 625         /* start by clearing QE bits */
 626         drvdata->cfg &= ~(BIT(13) | BIT(14));
 627         /* if supported, Q elements with instruction counts are enabled */
 628         if ((mode & BIT(0)) && (drvdata->q_support & BIT(0)))
 629                 drvdata->cfg |= BIT(13);
 630         /*
 631          * if supported, Q elements with and without instruction
 632          * counts are enabled
 633          */
 634         if ((mode & BIT(1)) && (drvdata->q_support & BIT(1)))
 635                 drvdata->cfg |= BIT(14);
 636
 637         /* bit[11], AMBA Trace Bus (ATB) trigger enable bit */
 638         if ((drvdata->mode & ETM_MODE_ATB_TRIGGER) &&
 639             (drvdata->atbtrig == true))
 640                 drvdata->eventctrl1 |= BIT(11);
 641         else
 642                 drvdata->eventctrl1 &= ~BIT(11);
 643
 644         /* bit[12], Low-power state behavior override bit */
 645         if ((drvdata->mode & ETM_MODE_LPOVERRIDE) &&
 646             (drvdata->lpoverride == true))
 647                 drvdata->eventctrl1 |= BIT(12);
 648         else
 649                 drvdata->eventctrl1 &= ~BIT(12);
 650
 651         /* bit[8], Instruction stall bit */
 652         if (drvdata->mode & ETM_MODE_ISTALL_EN)
 653                 drvdata->stall_ctrl |= BIT(8);
 654         else
 655                 drvdata->stall_ctrl &= ~BIT(8);
 656
 657         /* bit[10], Prioritize instruction trace bit */
 658         if (drvdata->mode & ETM_MODE_INSTPRIO)
 659                 drvdata->stall_ctrl |= BIT(10);
 660         else
 661                 drvdata->stall_ctrl &= ~BIT(10);
 662
 663         /* bit[13], Trace overflow prevention bit */
 664         if ((drvdata->mode & ETM_MODE_NOOVERFLOW) &&
 665                 (drvdata->nooverflow == true))
 666                 drvdata->stall_ctrl |= BIT(13);
 667         else
 668                 drvdata->stall_ctrl &= ~BIT(13);
 669
 670         /* bit[9] Start/stop logic control bit */
 671         if (drvdata->mode & ETM_MODE_VIEWINST_STARTSTOP)
 672                 drvdata->vinst_ctrl |= BIT(9);
 673         else
 674                 drvdata->vinst_ctrl &= ~BIT(9);
 675
 676         /* bit[10], Whether a trace unit must trace a Reset exception */
 677         if (drvdata->mode & ETM_MODE_TRACE_RESET)
 678                 drvdata->vinst_ctrl |= BIT(10);
 679         else
 680                 drvdata->vinst_ctrl &= ~BIT(10);
 681
 682         /* bit[11], Whether a trace unit must trace a system error exception */
 683         if ((drvdata->mode & ETM_MODE_TRACE_ERR) &&
 684                 (drvdata->trc_error == true))
 685                 drvdata->vinst_ctrl |= BIT(11);
 686         else
 687                 drvdata->vinst_ctrl &= ~BIT(11);
 688
 689         spin_unlock(&drvdata->spinlock);
 690         return size;
 691 }
 692 static DEVICE_ATTR_RW(mode);
 693
 694 static ssize_t pe_show(struct device *dev,
 695                        struct device_attribute *attr,
 696                        char *buf)
 697 {
 698         unsigned long val;
 699         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 700
 701         val = drvdata->pe_sel;
 702         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 703 }
 704
 705 static ssize_t pe_store(struct device *dev,
 706                         struct device_attribute *attr,
 707                         const char *buf, size_t size)
 708 {
 709         unsigned long val;
 710         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 711
 712         if (kstrtoul(buf, 16, &val))
 713                 return -EINVAL;
 714
 715         spin_lock(&drvdata->spinlock);
 716         if (val > drvdata->nr_pe) {
 717                 spin_unlock(&drvdata->spinlock);
 718                 return -EINVAL;
 719         }
 720
 721         drvdata->pe_sel = val;
 722         spin_unlock(&drvdata->spinlock);
 723         return size;
 724 }
 725 static DEVICE_ATTR_RW(pe);
 726
 727 static ssize_t event_show(struct device *dev,
 728                           struct device_attribute *attr,
 729                           char *buf)
 730 {
 731         unsigned long val;
 732         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 733
 734         val = drvdata->eventctrl0;
 735         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 736 }
 737
 738 static ssize_t event_store(struct device *dev,
 739                            struct device_attribute *attr,
 740                            const char *buf, size_t size)
 741 {
 742         unsigned long val;
 743         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 744
 745         if (kstrtoul(buf, 16, &val))
 746                 return -EINVAL;
 747
 748         spin_lock(&drvdata->spinlock);
 749         switch (drvdata->nr_event) {
 750         case 0x0:
 751                 /* EVENT0, bits[7:0] */
 752                 drvdata->eventctrl0 = val & 0xFF;
 753                 break;
 754         case 0x1:
 755                  /* EVENT1, bits[15:8] */
 756                 drvdata->eventctrl0 = val & 0xFFFF;
 757                 break;
 758         case 0x2:
 759                 /* EVENT2, bits[23:16] */
 760                 drvdata->eventctrl0 = val & 0xFFFFFF;
 761                 break;
 762         case 0x3:
 763                 /* EVENT3, bits[31:24] */
 764                 drvdata->eventctrl0 = val;
 765                 break;
 766         default:
 767                 break;
 768         }
 769         spin_unlock(&drvdata->spinlock);
 770         return size;
 771 }
 772 static DEVICE_ATTR_RW(event);
 773
 774 static ssize_t event_instren_show(struct device *dev,
 775                                   struct device_attribute *attr,
 776                                   char *buf)
 777 {
 778         unsigned long val;
 779         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 780
 781         val = BMVAL(drvdata->eventctrl1, 0, 3);
 782         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 783 }
 784
 785 static ssize_t event_instren_store(struct device *dev,
 786                                    struct device_attribute *attr,
 787                                    const char *buf, size_t size)
 788 {
 789         unsigned long val;
 790         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 791
 792         if (kstrtoul(buf, 16, &val))
 793                 return -EINVAL;
 794
 795         spin_lock(&drvdata->spinlock);
 796         /* start by clearing all instruction event enable bits */
 797         drvdata->eventctrl1 &= ~(BIT(0) | BIT(1) | BIT(2) | BIT(3));
 798         switch (drvdata->nr_event) {
 799         case 0x0:
 800                 /* generate Event element for event 1 */
 801                 drvdata->eventctrl1 |= val & BIT(1);
 802                 break;
 803         case 0x1:
 804                 /* generate Event element for event 1 and 2 */
 805                 drvdata->eventctrl1 |= val & (BIT(0) | BIT(1));
 806                 break;
 807         case 0x2:
 808                 /* generate Event element for event 1, 2 and 3 */
 809                 drvdata->eventctrl1 |= val & (BIT(0) | BIT(1) | BIT(2));
 810                 break;
 811         case 0x3:
 812                 /* generate Event element for all 4 events */
 813                 drvdata->eventctrl1 |= val & 0xF;
 814                 break;
 815         default:
 816                 break;
 817         }
 818         spin_unlock(&drvdata->spinlock);
 819         return size;
 820 }
 821 static DEVICE_ATTR_RW(event_instren);
 822
 823 static ssize_t event_ts_show(struct device *dev,
 824                              struct device_attribute *attr,
 825                              char *buf)
 826 {
 827         unsigned long val;
 828         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 829
 830         val = drvdata->ts_ctrl;
 831         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 832 }
 833
 834 static ssize_t event_ts_store(struct device *dev,
 835                               struct device_attribute *attr,
 836                               const char *buf, size_t size)
 837 {
 838         unsigned long val;
 839         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 840
 841         if (kstrtoul(buf, 16, &val))
 842                 return -EINVAL;
 843         if (!drvdata->ts_size)
 844                 return -EINVAL;
 845
 846         drvdata->ts_ctrl = val & ETMv4_EVENT_MASK;
 847         return size;
 848 }
 849 static DEVICE_ATTR_RW(event_ts);
 850
 851 static ssize_t syncfreq_show(struct device *dev,
 852                              struct device_attribute *attr,
 853                              char *buf)
 854 {
 855         unsigned long val;
 856         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 857
 858         val = drvdata->syncfreq;
 859         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 860 }
 861
 862 static ssize_t syncfreq_store(struct device *dev,
 863                               struct device_attribute *attr,
 864                               const char *buf, size_t size)
 865 {
 866         unsigned long val;
 867         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 868
 869         if (kstrtoul(buf, 16, &val))
 870                 return -EINVAL;
 871         if (drvdata->syncpr == true)
 872                 return -EINVAL;
 873
 874         drvdata->syncfreq = val & ETMv4_SYNC_MASK;
 875         return size;
 876 }
 877 static DEVICE_ATTR_RW(syncfreq);
 878
 879 static ssize_t cyc_threshold_show(struct device *dev,
 880                                   struct device_attribute *attr,
 881                                   char *buf)
 882 {
 883         unsigned long val;
 884         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 885
 886         val = drvdata->ccctlr;
 887         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 888 }
 889
 890 static ssize_t cyc_threshold_store(struct device *dev,
 891                                    struct device_attribute *attr,
 892                                    const char *buf, size_t size)
 893 {
 894         unsigned long val;
 895         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 896
 897         if (kstrtoul(buf, 16, &val))
 898                 return -EINVAL;
 899         if (val < drvdata->ccitmin)
 900                 return -EINVAL;
 901
 902         drvdata->ccctlr = val & ETM_CYC_THRESHOLD_MASK;
 903         return size;
 904 }
 905 static DEVICE_ATTR_RW(cyc_threshold);
 906
 907 static ssize_t bb_ctrl_show(struct device *dev,
 908                             struct device_attribute *attr,
 909                             char *buf)
 910 {
 911         unsigned long val;
 912         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 913
 914         val = drvdata->bb_ctrl;
 915         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 916 }
 917
 918 static ssize_t bb_ctrl_store(struct device *dev,
 919                              struct device_attribute *attr,
 920                              const char *buf, size_t size)
 921 {
 922         unsigned long val;
 923         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 924
 925         if (kstrtoul(buf, 16, &val))
 926                 return -EINVAL;
 927         if (drvdata->trcbb == false)
 928                 return -EINVAL;
 929         if (!drvdata->nr_addr_cmp)
 930                 return -EINVAL;
 931         /*
 932          * Bit[7:0] selects which address range comparator is used for
 933          * branch broadcast control.
 934          */
 935         if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp)
 936                 return -EINVAL;
 937
 938         drvdata->bb_ctrl = val;
 939         return size;
 940 }
 941 static DEVICE_ATTR_RW(bb_ctrl);
 942
 943 static ssize_t event_vinst_show(struct device *dev,
 944                                 struct device_attribute *attr,
 945                                 char *buf)
 946 {
 947         unsigned long val;
 948         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 949
 950         val = drvdata->vinst_ctrl & ETMv4_EVENT_MASK;
 951         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 952 }
 953
 954 static ssize_t event_vinst_store(struct device *dev,
 955                                  struct device_attribute *attr,
 956                                  const char *buf, size_t size)
 957 {
 958         unsigned long val;
 959         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 960
 961         if (kstrtoul(buf, 16, &val))
 962                 return -EINVAL;
 963
 964         spin_lock(&drvdata->spinlock);
 965         val &= ETMv4_EVENT_MASK;
 966         drvdata->vinst_ctrl &= ~ETMv4_EVENT_MASK;
 967         drvdata->vinst_ctrl |= val;
 968         spin_unlock(&drvdata->spinlock);
 969         return size;
 970 }
 971 static DEVICE_ATTR_RW(event_vinst);
 972
 973 static ssize_t s_exlevel_vinst_show(struct device *dev,
 974                                     struct device_attribute *attr,
 975                                     char *buf)
 976 {
 977         unsigned long val;
 978         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 979
 980         val = BMVAL(drvdata->vinst_ctrl, 16, 19);
 981         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 982 }
 983
 984 static ssize_t s_exlevel_vinst_store(struct device *dev,
 985                                      struct device_attribute *attr,
 986                                      const char *buf, size_t size)
 987 {
 988         unsigned long val;
 989         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 990
 991         if (kstrtoul(buf, 16, &val))
 992                 return -EINVAL;
 993
 994         spin_lock(&drvdata->spinlock);
 995         /* clear all EXLEVEL_S bits (bit[18] is never implemented) */
 996         drvdata->vinst_ctrl &= ~(BIT(16) | BIT(17) | BIT(19));
 997         /* enable instruction tracing for corresponding exception level */
 998         val &= drvdata->s_ex_level;
 999         drvdata->vinst_ctrl |= (val << 16);
1000         spin_unlock(&drvdata->spinlock);
1001         return size;
1002 }
1003 static DEVICE_ATTR_RW(s_exlevel_vinst);
1004
1005 static ssize_t ns_exlevel_vinst_show(struct device *dev,
1006                                      struct device_attribute *attr,
1007                                      char *buf)
1008 {
1009         unsigned long val;
1010         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1011
1012         /* EXLEVEL_NS, bits[23:20] */
1013         val = BMVAL(drvdata->vinst_ctrl, 20, 23);
1014         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1015 }
1016
1017 static ssize_t ns_exlevel_vinst_store(struct device *dev,
1018                                       struct device_attribute *attr,
1019                                       const char *buf, size_t size)
1020 {
1021         unsigned long val;
1022         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1023
1024         if (kstrtoul(buf, 16, &val))
1025                 return -EINVAL;
1026
1027         spin_lock(&drvdata->spinlock);
1028         /* clear EXLEVEL_NS bits (bit[23] is never implemented */
1029         drvdata->vinst_ctrl &= ~(BIT(20) | BIT(21) | BIT(22));
1030         /* enable instruction tracing for corresponding exception level */
1031         val &= drvdata->ns_ex_level;
1032         drvdata->vinst_ctrl |= (val << 20);
1033         spin_unlock(&drvdata->spinlock);
1034         return size;
1035 }
1036 static DEVICE_ATTR_RW(ns_exlevel_vinst);
1037
1038 static ssize_t addr_idx_show(struct device *dev,
1039                              struct device_attribute *attr,
1040                              char *buf)
1041 {
1042         unsigned long val;
1043         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1044
1045         val = drvdata->addr_idx;
1046         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1047 }
1048
1049 static ssize_t addr_idx_store(struct device *dev,
1050                               struct device_attribute *attr,
1051                               const char *buf, size_t size)
1052 {
1053         unsigned long val;
1054         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1055
1056         if (kstrtoul(buf, 16, &val))
1057                 return -EINVAL;
1058         if (val >= drvdata->nr_addr_cmp * 2)
1059                 return -EINVAL;
1060
1061         /*
1062          * Use spinlock to ensure index doesn't change while it gets
1063          * dereferenced multiple times within a spinlock block elsewhere.
1064          */
1065         spin_lock(&drvdata->spinlock);
1066         drvdata->addr_idx = val;
1067         spin_unlock(&drvdata->spinlock);
1068         return size;
1069 }
1070 static DEVICE_ATTR_RW(addr_idx);
1071
1072 static ssize_t addr_instdatatype_show(struct device *dev,
1073                                       struct device_attribute *attr,
1074                                       char *buf)
1075 {
1076         ssize_t len;
1077         u8 val, idx;
1078         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1079
1080         spin_lock(&drvdata->spinlock);
1081         idx = drvdata->addr_idx;
1082         val = BMVAL(drvdata->addr_acc[idx], 0, 1);
1083         len = scnprintf(buf, PAGE_SIZE, "%s\n",
1084                         val == ETM_INSTR_ADDR ? "instr" :
1085                         (val == ETM_DATA_LOAD_ADDR ? "data_load" :
1086                         (val == ETM_DATA_STORE_ADDR ? "data_store" :
1087                         "data_load_store")));
1088         spin_unlock(&drvdata->spinlock);
1089         return len;
1090 }
1091
1092 static ssize_t addr_instdatatype_store(struct device *dev,
1093                                        struct device_attribute *attr,
1094                                        const char *buf, size_t size)
1095 {
1096         u8 idx;
1097         char str[20] = "";
1098         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1099
1100         if (strlen(buf) >= 20)
1101                 return -EINVAL;
1102         if (sscanf(buf, "%s", str) != 1)
1103                 return -EINVAL;
1104
1105         spin_lock(&drvdata->spinlock);
1106         idx = drvdata->addr_idx;
1107         if (!strcmp(str, "instr"))
1108                 /* TYPE, bits[1:0] */
1109                 drvdata->addr_acc[idx] &= ~(BIT(0) | BIT(1));
1110
1111         spin_unlock(&drvdata->spinlock);
1112         return size;
1113 }
1114 static DEVICE_ATTR_RW(addr_instdatatype);
1115
1116 static ssize_t addr_single_show(struct device *dev,
1117                                 struct device_attribute *attr,
1118                                 char *buf)
1119 {
1120         u8 idx;
1121         unsigned long val;
1122         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1123
1124         idx = drvdata->addr_idx;
1125         spin_lock(&drvdata->spinlock);
1126         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1127               drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
1128                 spin_unlock(&drvdata->spinlock);
1129                 return -EPERM;
1130         }
1131         val = (unsigned long)drvdata->addr_val[idx];
1132         spin_unlock(&drvdata->spinlock);
1133         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1134 }
1135
1136 static ssize_t addr_single_store(struct device *dev,
1137                                  struct device_attribute *attr,
1138                                  const char *buf, size_t size)
1139 {
1140         u8 idx;
1141         unsigned long val;
1142         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1143
1144         if (kstrtoul(buf, 16, &val))
1145                 return -EINVAL;
1146
1147         spin_lock(&drvdata->spinlock);
1148         idx = drvdata->addr_idx;
1149         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1150               drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
1151                 spin_unlock(&drvdata->spinlock);
1152                 return -EPERM;
1153         }
1154
1155         drvdata->addr_val[idx] = (u64)val;
1156         drvdata->addr_type[idx] = ETM_ADDR_TYPE_SINGLE;
1157         spin_unlock(&drvdata->spinlock);
1158         return size;
1159 }
1160 static DEVICE_ATTR_RW(addr_single);
1161
1162 static ssize_t addr_range_show(struct device *dev,
1163                                struct device_attribute *attr,
1164                                char *buf)
1165 {
1166         u8 idx;
1167         unsigned long val1, val2;
1168         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1169
1170         spin_lock(&drvdata->spinlock);
1171         idx = drvdata->addr_idx;
1172         if (idx % 2 != 0) {
1173                 spin_unlock(&drvdata->spinlock);
1174                 return -EPERM;
1175         }
1176         if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
1177                drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
1178               (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
1179                drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
1180                 spin_unlock(&drvdata->spinlock);
1181                 return -EPERM;
1182         }
1183
1184         val1 = (unsigned long)drvdata->addr_val[idx];
1185         val2 = (unsigned long)drvdata->addr_val[idx + 1];
1186         spin_unlock(&drvdata->spinlock);
1187         return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
1188 }
1189
1190 static ssize_t addr_range_store(struct device *dev,
1191                                 struct device_attribute *attr,
1192                                 const char *buf, size_t size)
1193 {
1194         u8 idx;
1195         unsigned long val1, val2;
1196         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1197
1198         if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
1199                 return -EINVAL;
1200         /* lower address comparator cannot have a higher address value */
1201         if (val1 > val2)
1202                 return -EINVAL;
1203
1204         spin_lock(&drvdata->spinlock);
1205         idx = drvdata->addr_idx;
1206         if (idx % 2 != 0) {
1207                 spin_unlock(&drvdata->spinlock);
1208                 return -EPERM;
1209         }
1210
1211         if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
1212                drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
1213               (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
1214                drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
1215                 spin_unlock(&drvdata->spinlock);
1216                 return -EPERM;
1217         }
1218
1219         drvdata->addr_val[idx] = (u64)val1;
1220         drvdata->addr_type[idx] = ETM_ADDR_TYPE_RANGE;
1221         drvdata->addr_val[idx + 1] = (u64)val2;
1222         drvdata->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE;
1223         /*
1224          * Program include or exclude control bits for vinst or vdata
1225          * whenever we change addr comparators to ETM_ADDR_TYPE_RANGE
1226          */
1227         if (drvdata->mode & ETM_MODE_EXCLUDE)
1228                 etm4_set_mode_exclude(drvdata, true);
1229         else
1230                 etm4_set_mode_exclude(drvdata, false);
1231
1232         spin_unlock(&drvdata->spinlock);
1233         return size;
1234 }
1235 static DEVICE_ATTR_RW(addr_range);
1236
1237 static ssize_t addr_start_show(struct device *dev,
1238                                struct device_attribute *attr,
1239                                char *buf)
1240 {
1241         u8 idx;
1242         unsigned long val;
1243         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1244
1245         spin_lock(&drvdata->spinlock);
1246         idx = drvdata->addr_idx;
1247
1248         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1249               drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) {
1250                 spin_unlock(&drvdata->spinlock);
1251                 return -EPERM;
1252         }
1253
1254         val = (unsigned long)drvdata->addr_val[idx];
1255         spin_unlock(&drvdata->spinlock);
1256         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1257 }
1258
1259 static ssize_t addr_start_store(struct device *dev,
1260                                 struct device_attribute *attr,
1261                                 const char *buf, size_t size)
1262 {
1263         u8 idx;
1264         unsigned long val;
1265         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1266
1267         if (kstrtoul(buf, 16, &val))
1268                 return -EINVAL;
1269
1270         spin_lock(&drvdata->spinlock);
1271         idx = drvdata->addr_idx;
1272         if (!drvdata->nr_addr_cmp) {
1273                 spin_unlock(&drvdata->spinlock);
1274                 return -EINVAL;
1275         }
1276         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1277               drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) {
1278                 spin_unlock(&drvdata->spinlock);
1279                 return -EPERM;
1280         }
1281
1282         drvdata->addr_val[idx] = (u64)val;
1283         drvdata->addr_type[idx] = ETM_ADDR_TYPE_START;
1284         drvdata->vissctlr |= BIT(idx);
1285         /* SSSTATUS, bit[9] - turn on start/stop logic */
1286         drvdata->vinst_ctrl |= BIT(9);
1287         spin_unlock(&drvdata->spinlock);
1288         return size;
1289 }
1290 static DEVICE_ATTR_RW(addr_start);
1291
1292 static ssize_t addr_stop_show(struct device *dev,
1293                               struct device_attribute *attr,
1294                               char *buf)
1295 {
1296         u8 idx;
1297         unsigned long val;
1298         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1299
1300         spin_lock(&drvdata->spinlock);
1301         idx = drvdata->addr_idx;
1302
1303         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1304               drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
1305                 spin_unlock(&drvdata->spinlock);
1306                 return -EPERM;
1307         }
1308
1309         val = (unsigned long)drvdata->addr_val[idx];
1310         spin_unlock(&drvdata->spinlock);
1311         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1312 }
1313
1314 static ssize_t addr_stop_store(struct device *dev,
1315                                struct device_attribute *attr,
1316                                const char *buf, size_t size)
1317 {
1318         u8 idx;
1319         unsigned long val;
1320         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1321
1322         if (kstrtoul(buf, 16, &val))
1323                 return -EINVAL;
1324
1325         spin_lock(&drvdata->spinlock);
1326         idx = drvdata->addr_idx;
1327         if (!drvdata->nr_addr_cmp) {
1328                 spin_unlock(&drvdata->spinlock);
1329                 return -EINVAL;
1330         }
1331         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1332                drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
1333                 spin_unlock(&drvdata->spinlock);
1334                 return -EPERM;
1335         }
1336
1337         drvdata->addr_val[idx] = (u64)val;
1338         drvdata->addr_type[idx] = ETM_ADDR_TYPE_STOP;
1339         drvdata->vissctlr |= BIT(idx + 16);
1340         /* SSSTATUS, bit[9] - turn on start/stop logic */
1341         drvdata->vinst_ctrl |= BIT(9);
1342         spin_unlock(&drvdata->spinlock);
1343         return size;
1344 }
1345 static DEVICE_ATTR_RW(addr_stop);
1346
1347 static ssize_t addr_ctxtype_show(struct device *dev,
1348                                  struct device_attribute *attr,
1349                                  char *buf)
1350 {
1351         ssize_t len;
1352         u8 idx, val;
1353         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1354
1355         spin_lock(&drvdata->spinlock);
1356         idx = drvdata->addr_idx;
1357         /* CONTEXTTYPE, bits[3:2] */
1358         val = BMVAL(drvdata->addr_acc[idx], 2, 3);
1359         len = scnprintf(buf, PAGE_SIZE, "%s\n", val == ETM_CTX_NONE ? "none" :
1360                         (val == ETM_CTX_CTXID ? "ctxid" :
1361                         (val == ETM_CTX_VMID ? "vmid" : "all")));
1362         spin_unlock(&drvdata->spinlock);
1363         return len;
1364 }
1365
1366 static ssize_t addr_ctxtype_store(struct device *dev,
1367                                   struct device_attribute *attr,
1368                                   const char *buf, size_t size)
1369 {
1370         u8 idx;
1371         char str[10] = "";
1372         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1373
1374         if (strlen(buf) >= 10)
1375                 return -EINVAL;
1376         if (sscanf(buf, "%s", str) != 1)
1377                 return -EINVAL;
1378
1379         spin_lock(&drvdata->spinlock);
1380         idx = drvdata->addr_idx;
1381         if (!strcmp(str, "none"))
1382                 /* start by clearing context type bits */
1383                 drvdata->addr_acc[idx] &= ~(BIT(2) | BIT(3));
1384         else if (!strcmp(str, "ctxid")) {
1385                 /* 0b01 The trace unit performs a Context ID */
1386                 if (drvdata->numcidc) {
1387                         drvdata->addr_acc[idx] |= BIT(2);
1388                         drvdata->addr_acc[idx] &= ~BIT(3);
1389                 }
1390         } else if (!strcmp(str, "vmid")) {
1391                 /* 0b10 The trace unit performs a VMID */
1392                 if (drvdata->numvmidc) {
1393                         drvdata->addr_acc[idx] &= ~BIT(2);
1394                         drvdata->addr_acc[idx] |= BIT(3);
1395                 }
1396         } else if (!strcmp(str, "all")) {
1397                 /*
1398                  * 0b11 The trace unit performs a Context ID
1399                  * comparison and a VMID
1400                  */
1401                 if (drvdata->numcidc)
1402                         drvdata->addr_acc[idx] |= BIT(2);
1403                 if (drvdata->numvmidc)
1404                         drvdata->addr_acc[idx] |= BIT(3);
1405         }
1406         spin_unlock(&drvdata->spinlock);
1407         return size;
1408 }
1409 static DEVICE_ATTR_RW(addr_ctxtype);
1410
1411 static ssize_t addr_context_show(struct device *dev,
1412                                  struct device_attribute *attr,
1413                                  char *buf)
1414 {
1415         u8 idx;
1416         unsigned long val;
1417         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1418
1419         spin_lock(&drvdata->spinlock);
1420         idx = drvdata->addr_idx;
1421         /* context ID comparator bits[6:4] */
1422         val = BMVAL(drvdata->addr_acc[idx], 4, 6);
1423         spin_unlock(&drvdata->spinlock);
1424         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1425 }
1426
1427 static ssize_t addr_context_store(struct device *dev,
1428                                   struct device_attribute *attr,
1429                                   const char *buf, size_t size)
1430 {
1431         u8 idx;
1432         unsigned long val;
1433         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1434
1435         if (kstrtoul(buf, 16, &val))
1436                 return -EINVAL;
1437         if ((drvdata->numcidc <= 1) && (drvdata->numvmidc <= 1))
1438                 return -EINVAL;
1439         if (val >=  (drvdata->numcidc >= drvdata->numvmidc ?
1440                      drvdata->numcidc : drvdata->numvmidc))
1441                 return -EINVAL;
1442
1443         spin_lock(&drvdata->spinlock);
1444         idx = drvdata->addr_idx;
1445         /* clear context ID comparator bits[6:4] */
1446         drvdata->addr_acc[idx] &= ~(BIT(4) | BIT(5) | BIT(6));
1447         drvdata->addr_acc[idx] |= (val << 4);
1448         spin_unlock(&drvdata->spinlock);
1449         return size;
1450 }
1451 static DEVICE_ATTR_RW(addr_context);
1452
1453 static ssize_t seq_idx_show(struct device *dev,
1454                             struct device_attribute *attr,
1455                             char *buf)
1456 {
1457         unsigned long val;
1458         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1459
1460         val = drvdata->seq_idx;
1461         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1462 }
1463
1464 static ssize_t seq_idx_store(struct device *dev,
1465                              struct device_attribute *attr,
1466                              const char *buf, size_t size)
1467 {
1468         unsigned long val;
1469         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1470
1471         if (kstrtoul(buf, 16, &val))
1472                 return -EINVAL;
1473         if (val >= drvdata->nrseqstate - 1)
1474                 return -EINVAL;
1475
1476         /*
1477          * Use spinlock to ensure index doesn't change while it gets
1478          * dereferenced multiple times within a spinlock block elsewhere.
1479          */
1480         spin_lock(&drvdata->spinlock);
1481         drvdata->seq_idx = val;
1482         spin_unlock(&drvdata->spinlock);
1483         return size;
1484 }
1485 static DEVICE_ATTR_RW(seq_idx);
1486
1487 static ssize_t seq_state_show(struct device *dev,
1488                               struct device_attribute *attr,
1489                               char *buf)
1490 {
1491         unsigned long val;
1492         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1493
1494         val = drvdata->seq_state;
1495         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1496 }
1497
1498 static ssize_t seq_state_store(struct device *dev,
1499                                struct device_attribute *attr,
1500                                const char *buf, size_t size)
1501 {
1502         unsigned long val;
1503         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1504
1505         if (kstrtoul(buf, 16, &val))
1506                 return -EINVAL;
1507         if (val >= drvdata->nrseqstate)
1508                 return -EINVAL;
1509
1510         drvdata->seq_state = val;
1511         return size;
1512 }
1513 static DEVICE_ATTR_RW(seq_state);
1514
1515 static ssize_t seq_event_show(struct device *dev,
1516                               struct device_attribute *attr,
1517                               char *buf)
1518 {
1519         u8 idx;
1520         unsigned long val;
1521         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1522
1523         spin_lock(&drvdata->spinlock);
1524         idx = drvdata->seq_idx;
1525         val = drvdata->seq_ctrl[idx];
1526         spin_unlock(&drvdata->spinlock);
1527         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1528 }
1529
1530 static ssize_t seq_event_store(struct device *dev,
1531                                struct device_attribute *attr,
1532                                const char *buf, size_t size)
1533 {
1534         u8 idx;
1535         unsigned long val;
1536         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1537
1538         if (kstrtoul(buf, 16, &val))
1539                 return -EINVAL;
1540
1541         spin_lock(&drvdata->spinlock);
1542         idx = drvdata->seq_idx;
1543         /* RST, bits[7:0] */
1544         drvdata->seq_ctrl[idx] = val & 0xFF;
1545         spin_unlock(&drvdata->spinlock);
1546         return size;
1547 }
1548 static DEVICE_ATTR_RW(seq_event);
1549
1550 static ssize_t seq_reset_event_show(struct device *dev,
1551                                     struct device_attribute *attr,
1552                                     char *buf)
1553 {
1554         unsigned long val;
1555         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1556
1557         val = drvdata->seq_rst;
1558         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1559 }
1560
1561 static ssize_t seq_reset_event_store(struct device *dev,
1562                                      struct device_attribute *attr,
1563                                      const char *buf, size_t size)
1564 {
1565         unsigned long val;
1566         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1567
1568         if (kstrtoul(buf, 16, &val))
1569                 return -EINVAL;
1570         if (!(drvdata->nrseqstate))
1571                 return -EINVAL;
1572
1573         drvdata->seq_rst = val & ETMv4_EVENT_MASK;
1574         return size;
1575 }
1576 static DEVICE_ATTR_RW(seq_reset_event);
1577
1578 static ssize_t cntr_idx_show(struct device *dev,
1579                              struct device_attribute *attr,
1580                              char *buf)
1581 {
1582         unsigned long val;
1583         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1584
1585         val = drvdata->cntr_idx;
1586         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1587 }
1588
1589 static ssize_t cntr_idx_store(struct device *dev,
1590                               struct device_attribute *attr,
1591                               const char *buf, size_t size)
1592 {
1593         unsigned long val;
1594         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1595
1596         if (kstrtoul(buf, 16, &val))
1597                 return -EINVAL;
1598         if (val >= drvdata->nr_cntr)
1599                 return -EINVAL;
1600
1601         /*
1602          * Use spinlock to ensure index doesn't change while it gets
1603          * dereferenced multiple times within a spinlock block elsewhere.
1604          */
1605         spin_lock(&drvdata->spinlock);
1606         drvdata->cntr_idx = val;
1607         spin_unlock(&drvdata->spinlock);
1608         return size;
1609 }
1610 static DEVICE_ATTR_RW(cntr_idx);
1611
1612 static ssize_t cntrldvr_show(struct device *dev,
1613                              struct device_attribute *attr,
1614                              char *buf)
1615 {
1616         u8 idx;
1617         unsigned long val;
1618         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1619
1620         spin_lock(&drvdata->spinlock);
1621         idx = drvdata->cntr_idx;
1622         val = drvdata->cntrldvr[idx];
1623         spin_unlock(&drvdata->spinlock);
1624         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1625 }
1626
1627 static ssize_t cntrldvr_store(struct device *dev,
1628                               struct device_attribute *attr,
1629                               const char *buf, size_t size)
1630 {
1631         u8 idx;
1632         unsigned long val;
1633         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1634
1635         if (kstrtoul(buf, 16, &val))
1636                 return -EINVAL;
1637         if (val > ETM_CNTR_MAX_VAL)
1638                 return -EINVAL;
1639
1640         spin_lock(&drvdata->spinlock);
1641         idx = drvdata->cntr_idx;
1642         drvdata->cntrldvr[idx] = val;
1643         spin_unlock(&drvdata->spinlock);
1644         return size;
1645 }
1646 static DEVICE_ATTR_RW(cntrldvr);
1647
1648 static ssize_t cntr_val_show(struct device *dev,
1649                              struct device_attribute *attr,
1650                              char *buf)
1651 {
1652         u8 idx;
1653         unsigned long val;
1654         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1655
1656         spin_lock(&drvdata->spinlock);
1657         idx = drvdata->cntr_idx;
1658         val = drvdata->cntr_val[idx];
1659         spin_unlock(&drvdata->spinlock);
1660         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1661 }
1662
1663 static ssize_t cntr_val_store(struct device *dev,
1664                               struct device_attribute *attr,
1665                               const char *buf, size_t size)
1666 {
1667         u8 idx;
1668         unsigned long val;
1669         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1670
1671         if (kstrtoul(buf, 16, &val))
1672                 return -EINVAL;
1673         if (val > ETM_CNTR_MAX_VAL)
1674                 return -EINVAL;
1675
1676         spin_lock(&drvdata->spinlock);
1677         idx = drvdata->cntr_idx;
1678         drvdata->cntr_val[idx] = val;
1679         spin_unlock(&drvdata->spinlock);
1680         return size;
1681 }
1682 static DEVICE_ATTR_RW(cntr_val);
1683
1684 static ssize_t cntr_ctrl_show(struct device *dev,
1685                               struct device_attribute *attr,
1686                               char *buf)
1687 {
1688         u8 idx;
1689         unsigned long val;
1690         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1691
1692         spin_lock(&drvdata->spinlock);
1693         idx = drvdata->cntr_idx;
1694         val = drvdata->cntr_ctrl[idx];
1695         spin_unlock(&drvdata->spinlock);
1696         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1697 }
1698
1699 static ssize_t cntr_ctrl_store(struct device *dev,
1700                                struct device_attribute *attr,
1701                                const char *buf, size_t size)
1702 {
1703         u8 idx;
1704         unsigned long val;
1705         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1706
1707         if (kstrtoul(buf, 16, &val))
1708                 return -EINVAL;
1709
1710         spin_lock(&drvdata->spinlock);
1711         idx = drvdata->cntr_idx;
1712         drvdata->cntr_ctrl[idx] = val;
1713         spin_unlock(&drvdata->spinlock);
1714         return size;
1715 }
1716 static DEVICE_ATTR_RW(cntr_ctrl);
1717
1718 static ssize_t res_idx_show(struct device *dev,
1719                             struct device_attribute *attr,
1720                             char *buf)
1721 {
1722         unsigned long val;
1723         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1724
1725         val = drvdata->res_idx;
1726         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1727 }
1728
1729 static ssize_t res_idx_store(struct device *dev,
1730                              struct device_attribute *attr,
1731                              const char *buf, size_t size)
1732 {
1733         unsigned long val;
1734         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1735
1736         if (kstrtoul(buf, 16, &val))
1737                 return -EINVAL;
1738         /* Resource selector pair 0 is always implemented and reserved */
1739         if (val < 2 || val >= drvdata->nr_resource * 2)
1740                 return -EINVAL;
1741
1742         /*
1743          * Use spinlock to ensure index doesn't change while it gets
1744          * dereferenced multiple times within a spinlock block elsewhere.
1745          */
1746         spin_lock(&drvdata->spinlock);
1747         drvdata->res_idx = val;
1748         spin_unlock(&drvdata->spinlock);
1749         return size;
1750 }
1751 static DEVICE_ATTR_RW(res_idx);
1752
1753 static ssize_t res_ctrl_show(struct device *dev,
1754                              struct device_attribute *attr,
1755                              char *buf)
1756 {
1757         u8 idx;
1758         unsigned long val;
1759         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1760
1761         spin_lock(&drvdata->spinlock);
1762         idx = drvdata->res_idx;
1763         val = drvdata->res_ctrl[idx];
1764         spin_unlock(&drvdata->spinlock);
1765         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1766 }
1767
1768 static ssize_t res_ctrl_store(struct device *dev,
1769                               struct device_attribute *attr,
1770                               const char *buf, size_t size)
1771 {
1772         u8 idx;
1773         unsigned long val;
1774         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1775
1776         if (kstrtoul(buf, 16, &val))
1777                 return -EINVAL;
1778
1779         spin_lock(&drvdata->spinlock);
1780         idx = drvdata->res_idx;
1781         /* For odd idx pair inversal bit is RES0 */
1782         if (idx % 2 != 0)
1783                 /* PAIRINV, bit[21] */
1784                 val &= ~BIT(21);
1785         drvdata->res_ctrl[idx] = val;
1786         spin_unlock(&drvdata->spinlock);
1787         return size;
1788 }
1789 static DEVICE_ATTR_RW(res_ctrl);
1790
1791 static ssize_t ctxid_idx_show(struct device *dev,
1792                               struct device_attribute *attr,
1793                               char *buf)
1794 {
1795         unsigned long val;
1796         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1797
1798         val = drvdata->ctxid_idx;
1799         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1800 }
1801
1802 static ssize_t ctxid_idx_store(struct device *dev,
1803                                struct device_attribute *attr,
1804                                const char *buf, size_t size)
1805 {
1806         unsigned long val;
1807         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1808
1809         if (kstrtoul(buf, 16, &val))
1810                 return -EINVAL;
1811         if (val >= drvdata->numcidc)
1812                 return -EINVAL;
1813
1814         /*
1815          * Use spinlock to ensure index doesn't change while it gets
1816          * dereferenced multiple times within a spinlock block elsewhere.
1817          */
1818         spin_lock(&drvdata->spinlock);
1819         drvdata->ctxid_idx = val;
1820         spin_unlock(&drvdata->spinlock);
1821         return size;
1822 }
1823 static DEVICE_ATTR_RW(ctxid_idx);
1824
1825 static ssize_t ctxid_pid_show(struct device *dev,
1826                               struct device_attribute *attr,
1827                               char *buf)
1828 {
1829         u8 idx;
1830         unsigned long val;
1831         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1832
1833         spin_lock(&drvdata->spinlock);
1834         idx = drvdata->ctxid_idx;
1835         val = (unsigned long)drvdata->ctxid_vpid[idx];
1836         spin_unlock(&drvdata->spinlock);
1837         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1838 }
1839
1840 static ssize_t ctxid_pid_store(struct device *dev,
1841                                struct device_attribute *attr,
1842                                const char *buf, size_t size)
1843 {
1844         u8 idx;
1845         unsigned long vpid, pid;
1846         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1847
1848         /*
1849          * only implemented when ctxid tracing is enabled, i.e. at least one
1850          * ctxid comparator is implemented and ctxid is greater than 0 bits
1851          * in length
1852          */
1853         if (!drvdata->ctxid_size || !drvdata->numcidc)
1854                 return -EINVAL;
1855         if (kstrtoul(buf, 16, &vpid))
1856                 return -EINVAL;
1857
1858         pid = coresight_vpid_to_pid(vpid);
1859
1860         spin_lock(&drvdata->spinlock);
1861         idx = drvdata->ctxid_idx;
1862         drvdata->ctxid_pid[idx] = (u64)pid;
1863         drvdata->ctxid_vpid[idx] = (u64)vpid;
1864         spin_unlock(&drvdata->spinlock);
1865         return size;
1866 }
1867 static DEVICE_ATTR_RW(ctxid_pid);
1868
1869 static ssize_t ctxid_masks_show(struct device *dev,
1870                                 struct device_attribute *attr,
1871                                 char *buf)
1872 {
1873         unsigned long val1, val2;
1874         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1875
1876         spin_lock(&drvdata->spinlock);
1877         val1 = drvdata->ctxid_mask0;
1878         val2 = drvdata->ctxid_mask1;
1879         spin_unlock(&drvdata->spinlock);
1880         return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
1881 }
1882
1883 static ssize_t ctxid_masks_store(struct device *dev,
1884                                 struct device_attribute *attr,
1885                                 const char *buf, size_t size)
1886 {
1887         u8 i, j, maskbyte;
1888         unsigned long val1, val2, mask;
1889         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1890
1891         /*
1892          * only implemented when ctxid tracing is enabled, i.e. at least one
1893          * ctxid comparator is implemented and ctxid is greater than 0 bits
1894          * in length
1895          */
1896         if (!drvdata->ctxid_size || !drvdata->numcidc)
1897                 return -EINVAL;
1898         if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
1899                 return -EINVAL;
1900
1901         spin_lock(&drvdata->spinlock);
1902         /*
1903          * each byte[0..3] controls mask value applied to ctxid
1904          * comparator[0..3]
1905          */
1906         switch (drvdata->numcidc) {
1907         case 0x1:
1908                 /* COMP0, bits[7:0] */
1909                 drvdata->ctxid_mask0 = val1 & 0xFF;
1910                 break;
1911         case 0x2:
1912                 /* COMP1, bits[15:8] */
1913                 drvdata->ctxid_mask0 = val1 & 0xFFFF;
1914                 break;
1915         case 0x3:
1916                 /* COMP2, bits[23:16] */
1917                 drvdata->ctxid_mask0 = val1 & 0xFFFFFF;
1918                 break;
1919         case 0x4:
1920                  /* COMP3, bits[31:24] */
1921                 drvdata->ctxid_mask0 = val1;
1922                 break;
1923         case 0x5:
1924                 /* COMP4, bits[7:0] */
1925                 drvdata->ctxid_mask0 = val1;
1926                 drvdata->ctxid_mask1 = val2 & 0xFF;
1927                 break;
1928         case 0x6:
1929                 /* COMP5, bits[15:8] */
1930                 drvdata->ctxid_mask0 = val1;
1931                 drvdata->ctxid_mask1 = val2 & 0xFFFF;
1932                 break;
1933         case 0x7:
1934                 /* COMP6, bits[23:16] */
1935                 drvdata->ctxid_mask0 = val1;
1936                 drvdata->ctxid_mask1 = val2 & 0xFFFFFF;
1937                 break;
1938         case 0x8:
1939                 /* COMP7, bits[31:24] */
1940                 drvdata->ctxid_mask0 = val1;
1941                 drvdata->ctxid_mask1 = val2;
1942                 break;
1943         default:
1944                 break;
1945         }
1946         /*
1947          * If software sets a mask bit to 1, it must program relevant byte
1948          * of ctxid comparator value 0x0, otherwise behavior is unpredictable.
1949          * For example, if bit[3] of ctxid_mask0 is 1, we must clear bits[31:24]
1950          * of ctxid comparator0 value (corresponding to byte 0) register.
1951          */
1952         mask = drvdata->ctxid_mask0;
1953         for (i = 0; i < drvdata->numcidc; i++) {
1954                 /* mask value of corresponding ctxid comparator */
1955                 maskbyte = mask & ETMv4_EVENT_MASK;
1956                 /*
1957                  * each bit corresponds to a byte of respective ctxid comparator
1958                  * value register
1959                  */
1960                 for (j = 0; j < 8; j++) {
1961                         if (maskbyte & 1)
1962                                 drvdata->ctxid_pid[i] &= ~(0xFF << (j * 8));
1963                         maskbyte >>= 1;
1964                 }
1965                 /* Select the next ctxid comparator mask value */
1966                 if (i == 3)
1967                         /* ctxid comparators[4-7] */
1968                         mask = drvdata->ctxid_mask1;
1969                 else
1970                         mask >>= 0x8;
1971         }
1972
1973         spin_unlock(&drvdata->spinlock);
1974         return size;
1975 }
1976 static DEVICE_ATTR_RW(ctxid_masks);
1977
1978 static ssize_t vmid_idx_show(struct device *dev,
1979                              struct device_attribute *attr,
1980                              char *buf)
1981 {
1982         unsigned long val;
1983         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1984
1985         val = drvdata->vmid_idx;
1986         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1987 }
1988
1989 static ssize_t vmid_idx_store(struct device *dev,
1990                               struct device_attribute *attr,
1991                               const char *buf, size_t size)
1992 {
1993         unsigned long val;
1994         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1995
1996         if (kstrtoul(buf, 16, &val))
1997                 return -EINVAL;
1998         if (val >= drvdata->numvmidc)
1999                 return -EINVAL;
2000
2001         /*
2002          * Use spinlock to ensure index doesn't change while it gets
2003          * dereferenced multiple times within a spinlock block elsewhere.
2004          */
2005         spin_lock(&drvdata->spinlock);
2006         drvdata->vmid_idx = val;
2007         spin_unlock(&drvdata->spinlock);
2008         return size;
2009 }
2010 static DEVICE_ATTR_RW(vmid_idx);
2011
2012 static ssize_t vmid_val_show(struct device *dev,
2013                              struct device_attribute *attr,
2014                              char *buf)
2015 {
2016         unsigned long val;
2017         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2018
2019         val = (unsigned long)drvdata->vmid_val[drvdata->vmid_idx];
2020         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
2021 }
2022
2023 static ssize_t vmid_val_store(struct device *dev,
2024                               struct device_attribute *attr,
2025                               const char *buf, size_t size)
2026 {
2027         unsigned long val;
2028         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2029
2030         /*
2031          * only implemented when vmid tracing is enabled, i.e. at least one
2032          * vmid comparator is implemented and at least 8 bit vmid size
2033          */
2034         if (!drvdata->vmid_size || !drvdata->numvmidc)
2035                 return -EINVAL;
2036         if (kstrtoul(buf, 16, &val))
2037                 return -EINVAL;
2038
2039         spin_lock(&drvdata->spinlock);
2040         drvdata->vmid_val[drvdata->vmid_idx] = (u64)val;
2041         spin_unlock(&drvdata->spinlock);
2042         return size;
2043 }
2044 static DEVICE_ATTR_RW(vmid_val);
2045
2046 static ssize_t vmid_masks_show(struct device *dev,
2047                                struct device_attribute *attr, char *buf)
2048 {
2049         unsigned long val1, val2;
2050         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2051
2052         spin_lock(&drvdata->spinlock);
2053         val1 = drvdata->vmid_mask0;
2054         val2 = drvdata->vmid_mask1;
2055         spin_unlock(&drvdata->spinlock);
2056         return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
2057 }
2058
2059 static ssize_t vmid_masks_store(struct device *dev,
2060                                 struct device_attribute *attr,
2061                                 const char *buf, size_t size)
2062 {
2063         u8 i, j, maskbyte;
2064         unsigned long val1, val2, mask;
2065         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2066         /*
2067          * only implemented when vmid tracing is enabled, i.e. at least one
2068          * vmid comparator is implemented and at least 8 bit vmid size
2069          */
2070         if (!drvdata->vmid_size || !drvdata->numvmidc)
2071                 return -EINVAL;
2072         if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
2073                 return -EINVAL;
2074
2075         spin_lock(&drvdata->spinlock);
2076
2077         /*
2078          * each byte[0..3] controls mask value applied to vmid
2079          * comparator[0..3]
2080          */
2081         switch (drvdata->numvmidc) {
2082         case 0x1:
2083                 /* COMP0, bits[7:0] */
2084                 drvdata->vmid_mask0 = val1 & 0xFF;
2085                 break;
2086         case 0x2:
2087                 /* COMP1, bits[15:8] */
2088                 drvdata->vmid_mask0 = val1 & 0xFFFF;
2089                 break;
2090         case 0x3:
2091                 /* COMP2, bits[23:16] */
2092                 drvdata->vmid_mask0 = val1 & 0xFFFFFF;
2093                 break;
2094         case 0x4:
2095                 /* COMP3, bits[31:24] */
2096                 drvdata->vmid_mask0 = val1;
2097                 break;
2098         case 0x5:
2099                 /* COMP4, bits[7:0] */
2100                 drvdata->vmid_mask0 = val1;
2101                 drvdata->vmid_mask1 = val2 & 0xFF;
2102                 break;
2103         case 0x6:
2104                 /* COMP5, bits[15:8] */
2105                 drvdata->vmid_mask0 = val1;
2106                 drvdata->vmid_mask1 = val2 & 0xFFFF;
2107                 break;
2108         case 0x7:
2109                 /* COMP6, bits[23:16] */
2110                 drvdata->vmid_mask0 = val1;
2111                 drvdata->vmid_mask1 = val2 & 0xFFFFFF;
2112                 break;
2113         case 0x8:
2114                 /* COMP7, bits[31:24] */
2115                 drvdata->vmid_mask0 = val1;
2116                 drvdata->vmid_mask1 = val2;
2117                 break;
2118         default:
2119                 break;
2120         }
2121
2122         /*
2123          * If software sets a mask bit to 1, it must program relevant byte
2124          * of vmid comparator value 0x0, otherwise behavior is unpredictable.
2125          * For example, if bit[3] of vmid_mask0 is 1, we must clear bits[31:24]
2126          * of vmid comparator0 value (corresponding to byte 0) register.
2127          */
2128         mask = drvdata->vmid_mask0;
2129         for (i = 0; i < drvdata->numvmidc; i++) {
2130                 /* mask value of corresponding vmid comparator */
2131                 maskbyte = mask & ETMv4_EVENT_MASK;
2132                 /*
2133                  * each bit corresponds to a byte of respective vmid comparator
2134                  * value register
2135                  */
2136                 for (j = 0; j < 8; j++) {
2137                         if (maskbyte & 1)
2138                                 drvdata->vmid_val[i] &= ~(0xFF << (j * 8));
2139                         maskbyte >>= 1;
2140                 }
2141                 /* Select the next vmid comparator mask value */
2142                 if (i == 3)
2143                         /* vmid comparators[4-7] */
2144                         mask = drvdata->vmid_mask1;
2145                 else
2146                         mask >>= 0x8;
2147         }
2148         spin_unlock(&drvdata->spinlock);
2149         return size;
2150 }
2151 static DEVICE_ATTR_RW(vmid_masks);
2152
2153 static ssize_t cpu_show(struct device *dev,
2154                         struct device_attribute *attr, char *buf)
2155 {
2156         int val;
2157         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2158
2159         val = drvdata->cpu;
2160         return scnprintf(buf, PAGE_SIZE, "%d\n", val);
2161
2162 }
2163 static DEVICE_ATTR_RO(cpu);
2164
2165 static struct attribute *coresight_etmv4_attrs[] = {
2166         &dev_attr_nr_pe_cmp.attr,
2167         &dev_attr_nr_addr_cmp.attr,
2168         &dev_attr_nr_cntr.attr,
2169         &dev_attr_nr_ext_inp.attr,
2170         &dev_attr_numcidc.attr,
2171         &dev_attr_numvmidc.attr,
2172         &dev_attr_nrseqstate.attr,
2173         &dev_attr_nr_resource.attr,
2174         &dev_attr_nr_ss_cmp.attr,
2175         &dev_attr_reset.attr,
2176         &dev_attr_mode.attr,
2177         &dev_attr_pe.attr,
2178         &dev_attr_event.attr,
2179         &dev_attr_event_instren.attr,
2180         &dev_attr_event_ts.attr,
2181         &dev_attr_syncfreq.attr,
2182         &dev_attr_cyc_threshold.attr,
2183         &dev_attr_bb_ctrl.attr,
2184         &dev_attr_event_vinst.attr,
2185         &dev_attr_s_exlevel_vinst.attr,
2186         &dev_attr_ns_exlevel_vinst.attr,
2187         &dev_attr_addr_idx.attr,
2188         &dev_attr_addr_instdatatype.attr,
2189         &dev_attr_addr_single.attr,
2190         &dev_attr_addr_range.attr,
2191         &dev_attr_addr_start.attr,
2192         &dev_attr_addr_stop.attr,
2193         &dev_attr_addr_ctxtype.attr,
2194         &dev_attr_addr_context.attr,
2195         &dev_attr_seq_idx.attr,
2196         &dev_attr_seq_state.attr,
2197         &dev_attr_seq_event.attr,
2198         &dev_attr_seq_reset_event.attr,
2199         &dev_attr_cntr_idx.attr,
2200         &dev_attr_cntrldvr.attr,
2201         &dev_attr_cntr_val.attr,
2202         &dev_attr_cntr_ctrl.attr,
2203         &dev_attr_res_idx.attr,
2204         &dev_attr_res_ctrl.attr,
2205         &dev_attr_ctxid_idx.attr,
2206         &dev_attr_ctxid_pid.attr,
2207         &dev_attr_ctxid_masks.attr,
2208         &dev_attr_vmid_idx.attr,
2209         &dev_attr_vmid_val.attr,
2210         &dev_attr_vmid_masks.attr,
2211         &dev_attr_cpu.attr,
2212         NULL,
2213 };
2214
2215 #define coresight_simple_func(name, offset)                             \
2216 static ssize_t name##_show(struct device *_dev,                         \
2217                            struct device_attribute *attr, char *buf)    \
2218 {                                                                       \
2219         struct etmv4_drvdata *drvdata = dev_get_drvdata(_dev->parent);  \
2220         return scnprintf(buf, PAGE_SIZE, "0x%x\n",                      \
2221                          readl_relaxed(drvdata->base + offset));        \
2222 }                                                                       \
2223 static DEVICE_ATTR_RO(name)
2224
2225 coresight_simple_func(trcoslsr, TRCOSLSR);
2226 coresight_simple_func(trcpdcr, TRCPDCR);
2227 coresight_simple_func(trcpdsr, TRCPDSR);
2228 coresight_simple_func(trclsr, TRCLSR);
2229 coresight_simple_func(trcauthstatus, TRCAUTHSTATUS);
2230 coresight_simple_func(trcdevid, TRCDEVID);
2231 coresight_simple_func(trcdevtype, TRCDEVTYPE);
2232 coresight_simple_func(trcpidr0, TRCPIDR0);
2233 coresight_simple_func(trcpidr1, TRCPIDR1);
2234 coresight_simple_func(trcpidr2, TRCPIDR2);
2235 coresight_simple_func(trcpidr3, TRCPIDR3);
2236
2237 static struct attribute *coresight_etmv4_mgmt_attrs[] = {
2238         &dev_attr_trcoslsr.attr,
2239         &dev_attr_trcpdcr.attr,
2240         &dev_attr_trcpdsr.attr,
2241         &dev_attr_trclsr.attr,
2242         &dev_attr_trcauthstatus.attr,
2243         &dev_attr_trcdevid.attr,
2244         &dev_attr_trcdevtype.attr,
2245         &dev_attr_trcpidr0.attr,
2246         &dev_attr_trcpidr1.attr,
2247         &dev_attr_trcpidr2.attr,
2248         &dev_attr_trcpidr3.attr,
2249         NULL,
2250 };
2251
2252 coresight_simple_func(trcidr0, TRCIDR0);
2253 coresight_simple_func(trcidr1, TRCIDR1);
2254 coresight_simple_func(trcidr2, TRCIDR2);
2255 coresight_simple_func(trcidr3, TRCIDR3);
2256 coresight_simple_func(trcidr4, TRCIDR4);
2257 coresight_simple_func(trcidr5, TRCIDR5);
2258 /* trcidr[6,7] are reserved */
2259 coresight_simple_func(trcidr8, TRCIDR8);
2260 coresight_simple_func(trcidr9, TRCIDR9);
2261 coresight_simple_func(trcidr10, TRCIDR10);
2262 coresight_simple_func(trcidr11, TRCIDR11);
2263 coresight_simple_func(trcidr12, TRCIDR12);
2264 coresight_simple_func(trcidr13, TRCIDR13);
2265
2266 static struct attribute *coresight_etmv4_trcidr_attrs[] = {
2267         &dev_attr_trcidr0.attr,
2268         &dev_attr_trcidr1.attr,
2269         &dev_attr_trcidr2.attr,
2270         &dev_attr_trcidr3.attr,
2271         &dev_attr_trcidr4.attr,
2272         &dev_attr_trcidr5.attr,
2273         /* trcidr[6,7] are reserved */
2274         &dev_attr_trcidr8.attr,
2275         &dev_attr_trcidr9.attr,
2276         &dev_attr_trcidr10.attr,
2277         &dev_attr_trcidr11.attr,
2278         &dev_attr_trcidr12.attr,
2279         &dev_attr_trcidr13.attr,
2280         NULL,
2281 };
2282
2283 static const struct attribute_group coresight_etmv4_group = {
2284         .attrs = coresight_etmv4_attrs,
2285 };
2286
2287 static const struct attribute_group coresight_etmv4_mgmt_group = {
2288         .attrs = coresight_etmv4_mgmt_attrs,
2289         .name = "mgmt",
2290 };
2291
2292 static const struct attribute_group coresight_etmv4_trcidr_group = {
2293         .attrs = coresight_etmv4_trcidr_attrs,
2294         .name = "trcidr",
2295 };
2296
2297 static const struct attribute_group *coresight_etmv4_groups[] = {
2298         &coresight_etmv4_group,
2299         &coresight_etmv4_mgmt_group,
2300         &coresight_etmv4_trcidr_group,
2301         NULL,
2302 };
2303
2304 static void etm4_init_arch_data(void *info)
2305 {
2306         u32 etmidr0;
2307         u32 etmidr1;
2308         u32 etmidr2;
2309         u32 etmidr3;
2310         u32 etmidr4;
2311         u32 etmidr5;
2312         struct etmv4_drvdata *drvdata = info;
2313
2314         CS_UNLOCK(drvdata->base);
2315
2316         /* find all capabilities of the tracing unit */
2317         etmidr0 = readl_relaxed(drvdata->base + TRCIDR0);
2318
2319         /* INSTP0, bits[2:1] P0 tracing support field */
2320         if (BMVAL(etmidr0, 1, 1) && BMVAL(etmidr0, 2, 2))
2321                 drvdata->instrp0 = true;
2322         else
2323                 drvdata->instrp0 = false;
2324
2325         /* TRCBB, bit[5] Branch broadcast tracing support bit */
2326         if (BMVAL(etmidr0, 5, 5))
2327                 drvdata->trcbb = true;
2328         else
2329                 drvdata->trcbb = false;
2330
2331         /* TRCCOND, bit[6] Conditional instruction tracing support bit */
2332         if (BMVAL(etmidr0, 6, 6))
2333                 drvdata->trccond = true;
2334         else
2335                 drvdata->trccond = false;
2336
2337         /* TRCCCI, bit[7] Cycle counting instruction bit */
2338         if (BMVAL(etmidr0, 7, 7))
2339                 drvdata->trccci = true;
2340         else
2341                 drvdata->trccci = false;
2342
2343         /* RETSTACK, bit[9] Return stack bit */
2344         if (BMVAL(etmidr0, 9, 9))
2345                 drvdata->retstack = true;
2346         else
2347                 drvdata->retstack = false;
2348
2349         /* NUMEVENT, bits[11:10] Number of events field */
2350         drvdata->nr_event = BMVAL(etmidr0, 10, 11);
2351         /* QSUPP, bits[16:15] Q element support field */
2352         drvdata->q_support = BMVAL(etmidr0, 15, 16);
2353         /* TSSIZE, bits[28:24] Global timestamp size field */
2354         drvdata->ts_size = BMVAL(etmidr0, 24, 28);
2355
2356         /* base architecture of trace unit */
2357         etmidr1 = readl_relaxed(drvdata->base + TRCIDR1);
2358         /*
2359          * TRCARCHMIN, bits[7:4] architecture the minor version number
2360          * TRCARCHMAJ, bits[11:8] architecture major versin number
2361          */
2362         drvdata->arch = BMVAL(etmidr1, 4, 11);
2363
2364         /* maximum size of resources */
2365         etmidr2 = readl_relaxed(drvdata->base + TRCIDR2);
2366         /* CIDSIZE, bits[9:5] Indicates the Context ID size */
2367         drvdata->ctxid_size = BMVAL(etmidr2, 5, 9);
2368         /* VMIDSIZE, bits[14:10] Indicates the VMID size */
2369         drvdata->vmid_size = BMVAL(etmidr2, 10, 14);
2370         /* CCSIZE, bits[28:25] size of the cycle counter in bits minus 12 */
2371         drvdata->ccsize = BMVAL(etmidr2, 25, 28);
2372
2373         etmidr3 = readl_relaxed(drvdata->base + TRCIDR3);
2374         /* CCITMIN, bits[11:0] minimum threshold value that can be programmed */
2375         drvdata->ccitmin = BMVAL(etmidr3, 0, 11);
2376         /* EXLEVEL_S, bits[19:16] Secure state instruction tracing */
2377         drvdata->s_ex_level = BMVAL(etmidr3, 16, 19);
2378         /* EXLEVEL_NS, bits[23:20] Non-secure state instruction tracing */
2379         drvdata->ns_ex_level = BMVAL(etmidr3, 20, 23);
2380
2381         /*
2382          * TRCERR, bit[24] whether a trace unit can trace a
2383          * system error exception.
2384          */
2385         if (BMVAL(etmidr3, 24, 24))
2386                 drvdata->trc_error = true;
2387         else
2388                 drvdata->trc_error = false;
2389
2390         /* SYNCPR, bit[25] implementation has a fixed synchronization period? */
2391         if (BMVAL(etmidr3, 25, 25))
2392                 drvdata->syncpr = true;
2393         else
2394                 drvdata->syncpr = false;
2395
2396         /* STALLCTL, bit[26] is stall control implemented? */
2397         if (BMVAL(etmidr3, 26, 26))
2398                 drvdata->stallctl = true;
2399         else
2400                 drvdata->stallctl = false;
2401
2402         /* SYSSTALL, bit[27] implementation can support stall control? */
2403         if (BMVAL(etmidr3, 27, 27))
2404                 drvdata->sysstall = true;
2405         else
2406                 drvdata->sysstall = false;
2407
2408         /* NUMPROC, bits[30:28] the number of PEs available for tracing */
2409         drvdata->nr_pe = BMVAL(etmidr3, 28, 30);
2410
2411         /* NOOVERFLOW, bit[31] is trace overflow prevention supported */
2412         if (BMVAL(etmidr3, 31, 31))
2413                 drvdata->nooverflow = true;
2414         else
2415                 drvdata->nooverflow = false;
2416
2417         /* number of resources trace unit supports */
2418         etmidr4 = readl_relaxed(drvdata->base + TRCIDR4);
2419         /* NUMACPAIRS, bits[0:3] number of addr comparator pairs for tracing */
2420         drvdata->nr_addr_cmp = BMVAL(etmidr4, 0, 3);
2421         /* NUMPC, bits[15:12] number of PE comparator inputs for tracing */
2422         drvdata->nr_pe_cmp = BMVAL(etmidr4, 12, 15);
2423         /*
2424          * NUMRSPAIR, bits[19:16]
2425          * The number of resource pairs conveyed by the HW starts at 0, i.e a
2426          * value of 0x0 indicate 1 resource pair, 0x1 indicate two and so on.
2427          * As such add 1 to the value of NUMRSPAIR for a better representation.
2428          */
2429         drvdata->nr_resource = BMVAL(etmidr4, 16, 19) + 1;
2430         /*
2431          * NUMSSCC, bits[23:20] the number of single-shot
2432          * comparator control for tracing
2433          */
2434         drvdata->nr_ss_cmp = BMVAL(etmidr4, 20, 23);
2435         /* NUMCIDC, bits[27:24] number of Context ID comparators for tracing */
2436         drvdata->numcidc = BMVAL(etmidr4, 24, 27);
2437         /* NUMVMIDC, bits[31:28] number of VMID comparators for tracing */
2438         drvdata->numvmidc = BMVAL(etmidr4, 28, 31);
2439
2440         etmidr5 = readl_relaxed(drvdata->base + TRCIDR5);
2441         /* NUMEXTIN, bits[8:0] number of external inputs implemented */
2442         drvdata->nr_ext_inp = BMVAL(etmidr5, 0, 8);
2443         /* TRACEIDSIZE, bits[21:16] indicates the trace ID width */
2444         drvdata->trcid_size = BMVAL(etmidr5, 16, 21);
2445         /* ATBTRIG, bit[22] implementation can support ATB triggers? */
2446         if (BMVAL(etmidr5, 22, 22))
2447                 drvdata->atbtrig = true;
2448         else
2449                 drvdata->atbtrig = false;
2450         /*
2451          * LPOVERRIDE, bit[23] implementation supports
2452          * low-power state override
2453          */
2454         if (BMVAL(etmidr5, 23, 23))
2455                 drvdata->lpoverride = true;
2456         else
2457                 drvdata->lpoverride = false;
2458         /* NUMSEQSTATE, bits[27:25] number of sequencer states implemented */
2459         drvdata->nrseqstate = BMVAL(etmidr5, 25, 27);
2460         /* NUMCNTR, bits[30:28] number of counters available for tracing */
2461         drvdata->nr_cntr = BMVAL(etmidr5, 28, 30);
2462         CS_LOCK(drvdata->base);
2463 }
2464
2465 static void etm4_init_default_data(struct etmv4_drvdata *drvdata)
2466 {
2467         int i;
2468
2469         drvdata->pe_sel = 0x0;
2470         drvdata->cfg = (ETMv4_MODE_CTXID | ETM_MODE_VMID |
2471                         ETMv4_MODE_TIMESTAMP | ETM_MODE_RETURNSTACK);
2472
2473         /* disable all events tracing */
2474         drvdata->eventctrl0 = 0x0;
2475         drvdata->eventctrl1 = 0x0;
2476
2477         /* disable stalling */
2478         drvdata->stall_ctrl = 0x0;
2479
2480         /* disable timestamp event */
2481         drvdata->ts_ctrl = 0x0;
2482
2483         /* enable trace synchronization every 4096 bytes for trace */
2484         if (drvdata->syncpr == false)
2485                 drvdata->syncfreq = 0xC;
2486
2487         /*
2488          *  enable viewInst to trace everything with start-stop logic in
2489          *  started state
2490          */
2491         drvdata->vinst_ctrl |= BIT(0);
2492         /* set initial state of start-stop logic */
2493         if (drvdata->nr_addr_cmp)
2494                 drvdata->vinst_ctrl |= BIT(9);
2495
2496         /* no address range filtering for ViewInst */
2497         drvdata->viiectlr = 0x0;
2498         /* no start-stop filtering for ViewInst */
2499         drvdata->vissctlr = 0x0;
2500
2501         /* disable seq events */
2502         for (i = 0; i < drvdata->nrseqstate-1; i++)
2503                 drvdata->seq_ctrl[i] = 0x0;
2504         drvdata->seq_rst = 0x0;
2505         drvdata->seq_state = 0x0;
2506
2507         /* disable external input events */
2508         drvdata->ext_inp = 0x0;
2509
2510         for (i = 0; i < drvdata->nr_cntr; i++) {
2511                 drvdata->cntrldvr[i] = 0x0;
2512                 drvdata->cntr_ctrl[i] = 0x0;
2513                 drvdata->cntr_val[i] = 0x0;
2514         }
2515
2516         /* Resource selector pair 0 is always implemented and reserved */
2517         drvdata->res_idx = 0x2;
2518         for (i = 2; i < drvdata->nr_resource * 2; i++)
2519                 drvdata->res_ctrl[i] = 0x0;
2520
2521         for (i = 0; i < drvdata->nr_ss_cmp; i++) {
2522                 drvdata->ss_ctrl[i] = 0x0;
2523                 drvdata->ss_pe_cmp[i] = 0x0;
2524         }
2525
2526         if (drvdata->nr_addr_cmp >= 1) {
2527                 drvdata->addr_val[0] = (unsigned long)_stext;
2528                 drvdata->addr_val[1] = (unsigned long)_etext;
2529                 drvdata->addr_type[0] = ETM_ADDR_TYPE_RANGE;
2530                 drvdata->addr_type[1] = ETM_ADDR_TYPE_RANGE;
2531         }
2532
2533         for (i = 0; i < drvdata->numcidc; i++) {
2534                 drvdata->ctxid_pid[i] = 0x0;
2535                 drvdata->ctxid_vpid[i] = 0x0;
2536         }
2537
2538         drvdata->ctxid_mask0 = 0x0;
2539         drvdata->ctxid_mask1 = 0x0;
2540
2541         for (i = 0; i < drvdata->numvmidc; i++)
2542                 drvdata->vmid_val[i] = 0x0;
2543         drvdata->vmid_mask0 = 0x0;
2544         drvdata->vmid_mask1 = 0x0;
2545
2546         /*
2547          * A trace ID value of 0 is invalid, so let's start at some
2548          * random value that fits in 7 bits.  ETMv3.x has 0x10 so let's
2549          * start at 0x20.
2550          */
2551         drvdata->trcid = 0x20 + drvdata->cpu;
2552 }
2553
2554 static int etm4_cpu_callback(struct notifier_block *nfb, unsigned long action,
2555                             void *hcpu)
2556 {
2557         unsigned int cpu = (unsigned long)hcpu;
2558
2559         if (!etmdrvdata[cpu])
2560                 goto out;
2561
2562         switch (action & (~CPU_TASKS_FROZEN)) {
2563         case CPU_STARTING:
2564                 spin_lock(&etmdrvdata[cpu]->spinlock);
2565                 if (!etmdrvdata[cpu]->os_unlock) {
2566                         etm4_os_unlock(etmdrvdata[cpu]);
2567                         etmdrvdata[cpu]->os_unlock = true;
2568                 }
2569
2570                 if (etmdrvdata[cpu]->enable)
2571                         etm4_enable_hw(etmdrvdata[cpu]);
2572                 spin_unlock(&etmdrvdata[cpu]->spinlock);
2573                 break;
2574
2575         case CPU_ONLINE:
2576                 if (etmdrvdata[cpu]->boot_enable &&
2577                         !etmdrvdata[cpu]->sticky_enable)
2578                         coresight_enable(etmdrvdata[cpu]->csdev);
2579                 break;
2580
2581         case CPU_DYING:
2582                 spin_lock(&etmdrvdata[cpu]->spinlock);
2583                 if (etmdrvdata[cpu]->enable)
2584                         etm4_disable_hw(etmdrvdata[cpu]);
2585                 spin_unlock(&etmdrvdata[cpu]->spinlock);
2586                 break;
2587         }
2588 out:
2589         return NOTIFY_OK;
2590 }
2591
2592 static struct notifier_block etm4_cpu_notifier = {
2593         .notifier_call = etm4_cpu_callback,
2594 };
2595
2596 static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
2597 {
2598         int ret;
2599         void __iomem *base;
2600         struct device *dev = &adev->dev;
2601         struct coresight_platform_data *pdata = NULL;
2602         struct etmv4_drvdata *drvdata;
2603         struct resource *res = &adev->res;
2604         struct coresight_desc *desc;
2605         struct device_node *np = adev->dev.of_node;
2606
2607         desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
2608         if (!desc)
2609                 return -ENOMEM;
2610
2611         drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
2612         if (!drvdata)
2613                 return -ENOMEM;
2614
2615         if (np) {
2616                 pdata = of_get_coresight_platform_data(dev, np);
2617                 if (IS_ERR(pdata))
2618                         return PTR_ERR(pdata);
2619                 adev->dev.platform_data = pdata;
2620         }
2621
2622         drvdata->dev = &adev->dev;
2623         dev_set_drvdata(dev, drvdata);
2624
2625         /* Validity for the resource is already checked by the AMBA core */
2626         base = devm_ioremap_resource(dev, res);
2627         if (IS_ERR(base))
2628                 return PTR_ERR(base);
2629
2630         drvdata->base = base;
2631
2632         spin_lock_init(&drvdata->spinlock);
2633
2634         drvdata->cpu = pdata ? pdata->cpu : 0;
2635
2636         get_online_cpus();
2637         etmdrvdata[drvdata->cpu] = drvdata;
2638
2639         if (!smp_call_function_single(drvdata->cpu, etm4_os_unlock, drvdata, 1))
2640                 drvdata->os_unlock = true;
2641
2642         if (smp_call_function_single(drvdata->cpu,
2643                                 etm4_init_arch_data,  drvdata, 1))
2644                 dev_err(dev, "ETM arch init failed\n");
2645
2646         if (!etm4_count++)
2647                 register_hotcpu_notifier(&etm4_cpu_notifier);
2648
2649         put_online_cpus();
2650
2651         if (etm4_arch_supported(drvdata->arch) == false) {
2652                 ret = -EINVAL;
2653                 goto err_arch_supported;
2654         }
2655         etm4_init_default_data(drvdata);
2656
2657         pm_runtime_put(&adev->dev);
2658
2659         desc->type = CORESIGHT_DEV_TYPE_SOURCE;
2660         desc->subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_PROC;
2661         desc->ops = &etm4_cs_ops;
2662         desc->pdata = pdata;
2663         desc->dev = dev;
2664         desc->groups = coresight_etmv4_groups;
2665         drvdata->csdev = coresight_register(desc);
2666         if (IS_ERR(drvdata->csdev)) {
2667                 ret = PTR_ERR(drvdata->csdev);
2668                 goto err_coresight_register;
2669         }
2670
2671         dev_info(dev, "%s initialized\n", (char *)id->data);
2672
2673         if (boot_enable) {
2674                 coresight_enable(drvdata->csdev);
2675                 drvdata->boot_enable = true;
2676         }
2677
2678         return 0;
2679
2680 err_arch_supported:
2681         pm_runtime_put(&adev->dev);
2682 err_coresight_register:
2683         if (--etm4_count == 0)
2684                 unregister_hotcpu_notifier(&etm4_cpu_notifier);
2685         return ret;
2686 }
2687
2688 static struct amba_id etm4_ids[] = {
2689         {       /* ETM 4.0 - Qualcomm */
2690                 .id     = 0x0003b95d,
2691                 .mask   = 0x0003ffff,
2692                 .data   = "ETM 4.0",
2693         },
2694         {       /* ETM 4.0 - Juno board */
2695                 .id     = 0x000bb95e,
2696                 .mask   = 0x000fffff,
2697                 .data   = "ETM 4.0",
2698         },
2699         { 0, 0},
2700 };
2701
2702 static struct amba_driver etm4x_driver = {
2703         .drv = {
2704                 .name   = "coresight-etm4x",
2705                 .suppress_bind_attrs = true,
2706         },
2707         .probe          = etm4_probe,
2708         .id_table       = etm4_ids,
2709 };
2710
2711 module_amba_driver(etm4x_driver);