GNU Linux-libre 4.14.290-gnu1
[releases.git] / drivers / i2c / algos / i2c-algo-pca.c
1 /*
2  *  i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
3  *    Copyright (C) 2004 Arcom Control Systems
4  *    Copyright (C) 2008 Pengutronix
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  */
16
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/moduleparam.h>
20 #include <linux/delay.h>
21 #include <linux/jiffies.h>
22 #include <linux/errno.h>
23 #include <linux/i2c.h>
24 #include <linux/i2c-algo-pca.h>
25
26 #define DEB1(fmt, args...) do { if (i2c_debug >= 1)                     \
27                                  printk(KERN_DEBUG fmt, ## args); } while (0)
28 #define DEB2(fmt, args...) do { if (i2c_debug >= 2)                     \
29                                  printk(KERN_DEBUG fmt, ## args); } while (0)
30 #define DEB3(fmt, args...) do { if (i2c_debug >= 3)                     \
31                                  printk(KERN_DEBUG fmt, ## args); } while (0)
32
33 static int i2c_debug;
34
35 #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
36 #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
37
38 #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
39 #define pca_clock(adap) adap->i2c_clock
40 #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
41 #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
42 #define pca_wait(adap) adap->wait_for_completion(adap->data)
43
44 static void pca_reset(struct i2c_algo_pca_data *adap)
45 {
46         if (adap->chip == I2C_PCA_CHIP_9665) {
47                 /* Ignore the reset function from the module,
48                  * we can use the parallel bus reset.
49                  */
50                 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
51                 pca_outw(adap, I2C_PCA_IND, 0xA5);
52                 pca_outw(adap, I2C_PCA_IND, 0x5A);
53
54                 /*
55                  * After a reset we need to re-apply any configuration
56                  * (calculated in pca_init) to get the bus in a working state.
57                  */
58                 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IMODE);
59                 pca_outw(adap, I2C_PCA_IND, adap->bus_settings.mode);
60                 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
61                 pca_outw(adap, I2C_PCA_IND, adap->bus_settings.tlow);
62                 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
63                 pca_outw(adap, I2C_PCA_IND, adap->bus_settings.thi);
64
65                 pca_set_con(adap, I2C_PCA_CON_ENSIO);
66         } else {
67                 adap->reset_chip(adap->data);
68                 pca_set_con(adap, I2C_PCA_CON_ENSIO | adap->bus_settings.clock_freq);
69         }
70 }
71
72 /*
73  * Generate a start condition on the i2c bus.
74  *
75  * returns after the start condition has occurred
76  */
77 static int pca_start(struct i2c_algo_pca_data *adap)
78 {
79         int sta = pca_get_con(adap);
80         DEB2("=== START\n");
81         sta |= I2C_PCA_CON_STA;
82         sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
83         pca_set_con(adap, sta);
84         return pca_wait(adap);
85 }
86
87 /*
88  * Generate a repeated start condition on the i2c bus
89  *
90  * return after the repeated start condition has occurred
91  */
92 static int pca_repeated_start(struct i2c_algo_pca_data *adap)
93 {
94         int sta = pca_get_con(adap);
95         DEB2("=== REPEATED START\n");
96         sta |= I2C_PCA_CON_STA;
97         sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
98         pca_set_con(adap, sta);
99         return pca_wait(adap);
100 }
101
102 /*
103  * Generate a stop condition on the i2c bus
104  *
105  * returns after the stop condition has been generated
106  *
107  * STOPs do not generate an interrupt or set the SI flag, since the
108  * part returns the idle state (0xf8). Hence we don't need to
109  * pca_wait here.
110  */
111 static void pca_stop(struct i2c_algo_pca_data *adap)
112 {
113         int sta = pca_get_con(adap);
114         DEB2("=== STOP\n");
115         sta |= I2C_PCA_CON_STO;
116         sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
117         pca_set_con(adap, sta);
118 }
119
120 /*
121  * Send the slave address and R/W bit
122  *
123  * returns after the address has been sent
124  */
125 static int pca_address(struct i2c_algo_pca_data *adap,
126                        struct i2c_msg *msg)
127 {
128         int sta = pca_get_con(adap);
129         int addr;
130
131         addr = ((0x7f & msg->addr) << 1);
132         if (msg->flags & I2C_M_RD)
133                 addr |= 1;
134         DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
135              msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
136
137         pca_outw(adap, I2C_PCA_DAT, addr);
138
139         sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
140         pca_set_con(adap, sta);
141
142         return pca_wait(adap);
143 }
144
145 /*
146  * Transmit a byte.
147  *
148  * Returns after the byte has been transmitted
149  */
150 static int pca_tx_byte(struct i2c_algo_pca_data *adap,
151                        __u8 b)
152 {
153         int sta = pca_get_con(adap);
154         DEB2("=== WRITE %#04x\n", b);
155         pca_outw(adap, I2C_PCA_DAT, b);
156
157         sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
158         pca_set_con(adap, sta);
159
160         return pca_wait(adap);
161 }
162
163 /*
164  * Receive a byte
165  *
166  * returns immediately.
167  */
168 static void pca_rx_byte(struct i2c_algo_pca_data *adap,
169                         __u8 *b, int ack)
170 {
171         *b = pca_inw(adap, I2C_PCA_DAT);
172         DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
173 }
174
175 /*
176  * Setup ACK or NACK for next received byte and wait for it to arrive.
177  *
178  * Returns after next byte has arrived.
179  */
180 static int pca_rx_ack(struct i2c_algo_pca_data *adap,
181                       int ack)
182 {
183         int sta = pca_get_con(adap);
184
185         sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
186
187         if (ack)
188                 sta |= I2C_PCA_CON_AA;
189
190         pca_set_con(adap, sta);
191         return pca_wait(adap);
192 }
193
194 static int pca_xfer(struct i2c_adapter *i2c_adap,
195                     struct i2c_msg *msgs,
196                     int num)
197 {
198         struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
199         struct i2c_msg *msg = NULL;
200         int curmsg;
201         int numbytes = 0;
202         int state;
203         int ret;
204         int completed = 1;
205         unsigned long timeout = jiffies + i2c_adap->timeout;
206
207         while ((state = pca_status(adap)) != 0xf8) {
208                 if (time_before(jiffies, timeout)) {
209                         msleep(10);
210                 } else {
211                         dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
212                                 "%#04x\n", state);
213                         return -EBUSY;
214                 }
215         }
216
217         DEB1("{{{ XFER %d messages\n", num);
218
219         if (i2c_debug >= 2) {
220                 for (curmsg = 0; curmsg < num; curmsg++) {
221                         int addr, i;
222                         msg = &msgs[curmsg];
223
224                         addr = (0x7f & msg->addr) ;
225
226                         if (msg->flags & I2C_M_RD)
227                                 printk(KERN_INFO "    [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
228                                        curmsg, msg->len, addr, (addr << 1) | 1);
229                         else {
230                                 printk(KERN_INFO "    [%02d] WR %d bytes to %#02x [%#02x%s",
231                                        curmsg, msg->len, addr, addr << 1,
232                                        msg->len == 0 ? "" : ", ");
233                                 for (i = 0; i < msg->len; i++)
234                                         printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
235                                 printk("]\n");
236                         }
237                 }
238         }
239
240         curmsg = 0;
241         ret = -EIO;
242         while (curmsg < num) {
243                 state = pca_status(adap);
244
245                 DEB3("STATE is 0x%02x\n", state);
246                 msg = &msgs[curmsg];
247
248                 switch (state) {
249                 case 0xf8: /* On reset or stop the bus is idle */
250                         completed = pca_start(adap);
251                         break;
252
253                 case 0x08: /* A START condition has been transmitted */
254                 case 0x10: /* A repeated start condition has been transmitted */
255                         completed = pca_address(adap, msg);
256                         break;
257
258                 case 0x18: /* SLA+W has been transmitted; ACK has been received */
259                 case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
260                         if (numbytes < msg->len) {
261                                 completed = pca_tx_byte(adap,
262                                                         msg->buf[numbytes]);
263                                 numbytes++;
264                                 break;
265                         }
266                         curmsg++; numbytes = 0;
267                         if (curmsg == num)
268                                 pca_stop(adap);
269                         else
270                                 completed = pca_repeated_start(adap);
271                         break;
272
273                 case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
274                         DEB2("NOT ACK received after SLA+W\n");
275                         pca_stop(adap);
276                         ret = -ENXIO;
277                         goto out;
278
279                 case 0x40: /* SLA+R has been transmitted; ACK has been received */
280                         completed = pca_rx_ack(adap, msg->len > 1);
281                         break;
282
283                 case 0x50: /* Data bytes has been received; ACK has been returned */
284                         if (numbytes < msg->len) {
285                                 pca_rx_byte(adap, &msg->buf[numbytes], 1);
286                                 numbytes++;
287                                 completed = pca_rx_ack(adap,
288                                                        numbytes < msg->len - 1);
289                                 break;
290                         }
291                         curmsg++; numbytes = 0;
292                         if (curmsg == num)
293                                 pca_stop(adap);
294                         else
295                                 completed = pca_repeated_start(adap);
296                         break;
297
298                 case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
299                         DEB2("NOT ACK received after SLA+R\n");
300                         pca_stop(adap);
301                         ret = -ENXIO;
302                         goto out;
303
304                 case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
305                         DEB2("NOT ACK received after data byte\n");
306                         pca_stop(adap);
307                         goto out;
308
309                 case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
310                         DEB2("Arbitration lost\n");
311                         /*
312                          * The PCA9564 data sheet (2006-09-01) says "A
313                          * START condition will be transmitted when the
314                          * bus becomes free (STOP or SCL and SDA high)"
315                          * when the STA bit is set (p. 11).
316                          *
317                          * In case this won't work, try pca_reset()
318                          * instead.
319                          */
320                         pca_start(adap);
321                         goto out;
322
323                 case 0x58: /* Data byte has been received; NOT ACK has been returned */
324                         if (numbytes == msg->len - 1) {
325                                 pca_rx_byte(adap, &msg->buf[numbytes], 0);
326                                 curmsg++; numbytes = 0;
327                                 if (curmsg == num)
328                                         pca_stop(adap);
329                                 else
330                                         completed = pca_repeated_start(adap);
331                         } else {
332                                 DEB2("NOT ACK sent after data byte received. "
333                                      "Not final byte. numbytes %d. len %d\n",
334                                      numbytes, msg->len);
335                                 pca_stop(adap);
336                                 goto out;
337                         }
338                         break;
339                 case 0x70: /* Bus error - SDA stuck low */
340                         DEB2("BUS ERROR - SDA Stuck low\n");
341                         pca_reset(adap);
342                         goto out;
343                 case 0x78: /* Bus error - SCL stuck low (PCA9665) */
344                 case 0x90: /* Bus error - SCL stuck low (PCA9564) */
345                         DEB2("BUS ERROR - SCL Stuck low\n");
346                         pca_reset(adap);
347                         goto out;
348                 case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
349                         DEB2("BUS ERROR - Illegal START or STOP\n");
350                         pca_reset(adap);
351                         goto out;
352                 default:
353                         dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
354                         break;
355                 }
356
357                 if (!completed)
358                         goto out;
359         }
360
361         ret = curmsg;
362  out:
363         DEB1("}}} transferred %d/%d messages. "
364              "status is %#04x. control is %#04x\n",
365              curmsg, num, pca_status(adap),
366              pca_get_con(adap));
367         return ret;
368 }
369
370 static u32 pca_func(struct i2c_adapter *adap)
371 {
372         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
373 }
374
375 static const struct i2c_algorithm pca_algo = {
376         .master_xfer    = pca_xfer,
377         .functionality  = pca_func,
378 };
379
380 static unsigned int pca_probe_chip(struct i2c_adapter *adap)
381 {
382         struct i2c_algo_pca_data *pca_data = adap->algo_data;
383         /* The trick here is to check if there is an indirect register
384          * available. If there is one, we will read the value we first
385          * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
386          * we wrote on I2C_PCA_ADR
387          */
388         pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
389         pca_outw(pca_data, I2C_PCA_IND, 0xAA);
390         pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
391         pca_outw(pca_data, I2C_PCA_IND, 0x00);
392         pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
393         if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
394                 printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
395                 pca_data->chip = I2C_PCA_CHIP_9665;
396         } else {
397                 printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
398                 pca_data->chip = I2C_PCA_CHIP_9564;
399         }
400         return pca_data->chip;
401 }
402
403 static int pca_init(struct i2c_adapter *adap)
404 {
405         struct i2c_algo_pca_data *pca_data = adap->algo_data;
406
407         adap->algo = &pca_algo;
408
409         if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
410                 static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
411                 int clock;
412
413                 if (pca_data->i2c_clock > 7) {
414                         switch (pca_data->i2c_clock) {
415                         case 330000:
416                                 pca_data->i2c_clock = I2C_PCA_CON_330kHz;
417                                 break;
418                         case 288000:
419                                 pca_data->i2c_clock = I2C_PCA_CON_288kHz;
420                                 break;
421                         case 217000:
422                                 pca_data->i2c_clock = I2C_PCA_CON_217kHz;
423                                 break;
424                         case 146000:
425                                 pca_data->i2c_clock = I2C_PCA_CON_146kHz;
426                                 break;
427                         case 88000:
428                                 pca_data->i2c_clock = I2C_PCA_CON_88kHz;
429                                 break;
430                         case 59000:
431                                 pca_data->i2c_clock = I2C_PCA_CON_59kHz;
432                                 break;
433                         case 44000:
434                                 pca_data->i2c_clock = I2C_PCA_CON_44kHz;
435                                 break;
436                         case 36000:
437                                 pca_data->i2c_clock = I2C_PCA_CON_36kHz;
438                                 break;
439                         default:
440                                 printk(KERN_WARNING
441                                         "%s: Invalid I2C clock speed selected."
442                                         " Using default 59kHz.\n", adap->name);
443                         pca_data->i2c_clock = I2C_PCA_CON_59kHz;
444                         }
445                 } else {
446                         printk(KERN_WARNING "%s: "
447                                 "Choosing the clock frequency based on "
448                                 "index is deprecated."
449                                 " Use the nominal frequency.\n", adap->name);
450                 }
451
452                 clock = pca_clock(pca_data);
453                 printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
454                      adap->name, freqs[clock]);
455
456                 /* Store settings as these will be needed when the PCA chip is reset */
457                 pca_data->bus_settings.clock_freq = clock;
458
459                 pca_reset(pca_data);
460         } else {
461                 int clock;
462                 int mode;
463                 int tlow, thi;
464                 /* Values can be found on PCA9665 datasheet section 7.3.2.6 */
465                 int min_tlow, min_thi;
466                 /* These values are the maximum raise and fall values allowed
467                  * by the I2C operation mode (Standard, Fast or Fast+)
468                  * They are used (added) below to calculate the clock dividers
469                  * of PCA9665. Note that they are slightly different of the
470                  * real maximum, to allow the change on mode exactly on the
471                  * maximum clock rate for each mode
472                  */
473                 int raise_fall_time;
474
475                 if (pca_data->i2c_clock > 1265800) {
476                         printk(KERN_WARNING "%s: I2C clock speed too high."
477                                 " Using 1265.8kHz.\n", adap->name);
478                         pca_data->i2c_clock = 1265800;
479                 }
480
481                 if (pca_data->i2c_clock < 60300) {
482                         printk(KERN_WARNING "%s: I2C clock speed too low."
483                                 " Using 60.3kHz.\n", adap->name);
484                         pca_data->i2c_clock = 60300;
485                 }
486
487                 /* To avoid integer overflow, use clock/100 for calculations */
488                 clock = pca_clock(pca_data) / 100;
489
490                 if (pca_data->i2c_clock > 1000000) {
491                         mode = I2C_PCA_MODE_TURBO;
492                         min_tlow = 14;
493                         min_thi  = 5;
494                         raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
495                 } else if (pca_data->i2c_clock > 400000) {
496                         mode = I2C_PCA_MODE_FASTP;
497                         min_tlow = 17;
498                         min_thi  = 9;
499                         raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
500                 } else if (pca_data->i2c_clock > 100000) {
501                         mode = I2C_PCA_MODE_FAST;
502                         min_tlow = 44;
503                         min_thi  = 20;
504                         raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
505                 } else {
506                         mode = I2C_PCA_MODE_STD;
507                         min_tlow = 157;
508                         min_thi  = 134;
509                         raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
510                 }
511
512                 /* The minimum clock that respects the thi/tlow = 134/157 is
513                  * 64800 Hz. Below that, we have to fix the tlow to 255 and
514                  * calculate the thi factor.
515                  */
516                 if (clock < 648) {
517                         tlow = 255;
518                         thi = 1000000 - clock * raise_fall_time;
519                         thi /= (I2C_PCA_OSC_PER * clock) - tlow;
520                 } else {
521                         tlow = (1000000 - clock * raise_fall_time) * min_tlow;
522                         tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
523                         thi = tlow * min_thi / min_tlow;
524                 }
525
526                 /* Store settings as these will be needed when the PCA chip is reset */
527                 pca_data->bus_settings.mode = mode;
528                 pca_data->bus_settings.tlow = tlow;
529                 pca_data->bus_settings.thi = thi;
530
531                 pca_reset(pca_data);
532
533                 printk(KERN_INFO
534                      "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
535         }
536         udelay(500); /* 500 us for oscillator to stabilise */
537
538         return 0;
539 }
540
541 /*
542  * registering functions to load algorithms at runtime
543  */
544 int i2c_pca_add_bus(struct i2c_adapter *adap)
545 {
546         int rval;
547
548         rval = pca_init(adap);
549         if (rval)
550                 return rval;
551
552         return i2c_add_adapter(adap);
553 }
554 EXPORT_SYMBOL(i2c_pca_add_bus);
555
556 int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
557 {
558         int rval;
559
560         rval = pca_init(adap);
561         if (rval)
562                 return rval;
563
564         return i2c_add_numbered_adapter(adap);
565 }
566 EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
567
568 MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
569         "Wolfram Sang <w.sang@pengutronix.de>");
570 MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
571 MODULE_LICENSE("GPL");
572
573 module_param(i2c_debug, int, 0);