2 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
3 Philip Edelbrock <phil@netroedge.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
19 Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
20 ATI IXP200, IXP300, IXP400, SB600, SB700/SP5100, SB800
24 Note: we assume there can only be one device, with one or more
26 The device can register multiple i2c_adapters (up to PIIX4_MAX_ADAPTERS).
27 For devices supporting multiple ports the i2c_adapter should provide
28 an i2c_algorithm to access them.
31 #include <linux/module.h>
32 #include <linux/moduleparam.h>
33 #include <linux/pci.h>
34 #include <linux/kernel.h>
35 #include <linux/delay.h>
36 #include <linux/stddef.h>
37 #include <linux/ioport.h>
38 #include <linux/i2c.h>
39 #include <linux/slab.h>
40 #include <linux/dmi.h>
41 #include <linux/acpi.h>
43 #include <linux/mutex.h>
46 /* PIIX4 SMBus address offsets */
47 #define SMBHSTSTS (0 + piix4_smba)
48 #define SMBHSLVSTS (1 + piix4_smba)
49 #define SMBHSTCNT (2 + piix4_smba)
50 #define SMBHSTCMD (3 + piix4_smba)
51 #define SMBHSTADD (4 + piix4_smba)
52 #define SMBHSTDAT0 (5 + piix4_smba)
53 #define SMBHSTDAT1 (6 + piix4_smba)
54 #define SMBBLKDAT (7 + piix4_smba)
55 #define SMBSLVCNT (8 + piix4_smba)
56 #define SMBSHDWCMD (9 + piix4_smba)
57 #define SMBSLVEVT (0xA + piix4_smba)
58 #define SMBSLVDAT (0xC + piix4_smba)
60 /* count for request_region */
63 /* PCI Address Constants */
65 #define SMBHSTCFG 0x0D2
67 #define SMBSHDW1 0x0D4
68 #define SMBSHDW2 0x0D5
72 #define MAX_TIMEOUT 500
76 #define PIIX4_QUICK 0x00
77 #define PIIX4_BYTE 0x04
78 #define PIIX4_BYTE_DATA 0x08
79 #define PIIX4_WORD_DATA 0x0C
80 #define PIIX4_BLOCK_DATA 0x14
82 /* Multi-port constants */
83 #define PIIX4_MAX_ADAPTERS 4
86 #define SB800_PIIX4_SMB_IDX 0xcd6
89 * SB800 port is selected by bits 2:1 of the smb_en register (0x2c)
90 * or the smb_sel register (0x2e), depending on bit 0 of register 0x2f.
91 * Hudson-2/Bolton port is always selected by bits 2:1 of register 0x2f.
93 #define SB800_PIIX4_PORT_IDX 0x2c
94 #define SB800_PIIX4_PORT_IDX_ALT 0x2e
95 #define SB800_PIIX4_PORT_IDX_SEL 0x2f
96 #define SB800_PIIX4_PORT_IDX_MASK 0x06
97 #define SB800_PIIX4_PORT_IDX_SHIFT 1
99 /* On kerncz and Hudson2, SmBus0Sel is at bit 20:19 of PMx00 DecodeEn */
100 #define SB800_PIIX4_PORT_IDX_KERNCZ 0x02
101 #define SB800_PIIX4_PORT_IDX_MASK_KERNCZ 0x18
102 #define SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ 3
104 /* insmod parameters */
106 /* If force is set to anything different from 0, we forcibly enable the
109 module_param (force, int, 0);
110 MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
112 /* If force_addr is set to anything different from 0, we forcibly enable
113 the PIIX4 at the given address. VERY DANGEROUS! */
114 static int force_addr;
115 module_param (force_addr, int, 0);
116 MODULE_PARM_DESC(force_addr,
117 "Forcibly enable the PIIX4 at the given address. "
118 "EXTREMELY DANGEROUS!");
120 static int srvrworks_csb5_delay;
121 static struct pci_driver piix4_driver;
123 static const struct dmi_system_id piix4_dmi_blacklist[] = {
125 .ident = "Sapphire AM2RD790",
127 DMI_MATCH(DMI_BOARD_VENDOR, "SAPPHIRE Inc."),
128 DMI_MATCH(DMI_BOARD_NAME, "PC-AM2RD790"),
132 .ident = "DFI Lanparty UT 790FX",
134 DMI_MATCH(DMI_BOARD_VENDOR, "DFI Inc."),
135 DMI_MATCH(DMI_BOARD_NAME, "LP UT 790FX"),
141 /* The IBM entry is in a separate table because we only check it
142 on Intel-based systems */
143 static const struct dmi_system_id piix4_dmi_ibm[] = {
146 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
153 * piix4_mutex_sb800 protects piix4_port_sel_sb800 and the pair
154 * of I/O ports at SB800_PIIX4_SMB_IDX.
156 static DEFINE_MUTEX(piix4_mutex_sb800);
157 static u8 piix4_port_sel_sb800;
158 static u8 piix4_port_mask_sb800;
159 static u8 piix4_port_shift_sb800;
160 static const char *piix4_main_port_names_sb800[PIIX4_MAX_ADAPTERS] = {
161 " port 0", " port 2", " port 3", " port 4"
163 static const char *piix4_aux_port_name_sb800 = " port 1";
165 struct i2c_piix4_adapdata {
170 u8 port; /* Port number, shifted */
173 static int piix4_setup(struct pci_dev *PIIX4_dev,
174 const struct pci_device_id *id)
177 unsigned short piix4_smba;
179 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
180 (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5))
181 srvrworks_csb5_delay = 1;
183 /* On some motherboards, it was reported that accessing the SMBus
184 caused severe hardware problems */
185 if (dmi_check_system(piix4_dmi_blacklist)) {
186 dev_err(&PIIX4_dev->dev,
187 "Accessing the SMBus on this system is unsafe!\n");
191 /* Don't access SMBus on IBM systems which get corrupted eeproms */
192 if (dmi_check_system(piix4_dmi_ibm) &&
193 PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
194 dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
195 "may corrupt your serial eeprom! Refusing to load "
200 /* Determine the address of the SMBus areas */
202 piix4_smba = force_addr & 0xfff0;
205 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
206 piix4_smba &= 0xfff0;
207 if(piix4_smba == 0) {
208 dev_err(&PIIX4_dev->dev, "SMBus base address "
209 "uninitialized - upgrade BIOS or use "
210 "force_addr=0xaddr\n");
215 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
218 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
219 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
224 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
226 /* If force_addr is set, we program the new address here. Just to make
227 sure, we disable the PIIX4 first. */
229 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
230 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
231 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
232 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
233 "new address %04x!\n", piix4_smba);
234 } else if ((temp & 1) == 0) {
236 /* This should never need to be done, but has been
237 * noted that many Dell machines have the SMBus
238 * interface on the PIIX4 disabled!? NOTE: This assumes
239 * I/O space and other allocations WERE done by the
240 * Bios! Don't complain if your hardware does weird
241 * things after enabling this. :') Check for Bios
242 * updates before resorting to this.
244 pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
246 dev_notice(&PIIX4_dev->dev,
247 "WARNING: SMBus interface has been FORCEFULLY ENABLED!\n");
249 dev_err(&PIIX4_dev->dev,
250 "SMBus Host Controller not enabled!\n");
251 release_region(piix4_smba, SMBIOSIZE);
256 if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
257 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n");
258 else if ((temp & 0x0E) == 0)
259 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n");
261 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
262 "(or code out of date)!\n");
264 pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
265 dev_info(&PIIX4_dev->dev,
266 "SMBus Host Controller at 0x%x, revision %d\n",
272 static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
273 const struct pci_device_id *id, u8 aux)
275 unsigned short piix4_smba;
276 u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status, port_sel;
277 u8 i2ccfg, i2ccfg_offset = 0x10;
279 /* SB800 and later SMBus does not support forcing address */
280 if (force || force_addr) {
281 dev_err(&PIIX4_dev->dev, "SMBus does not support "
282 "forcing address!\n");
286 /* Determine the address of the SMBus areas */
287 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
288 PIIX4_dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS &&
289 PIIX4_dev->revision >= 0x41) ||
290 (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
291 PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS &&
292 PIIX4_dev->revision >= 0x49))
295 smb_en = (aux) ? 0x28 : 0x2c;
297 mutex_lock(&piix4_mutex_sb800);
298 outb_p(smb_en, SB800_PIIX4_SMB_IDX);
299 smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
300 outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX);
301 smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1);
302 mutex_unlock(&piix4_mutex_sb800);
305 smb_en_status = smba_en_lo & 0x10;
306 piix4_smba = smba_en_hi << 8;
310 smb_en_status = smba_en_lo & 0x01;
311 piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0;
314 if (!smb_en_status) {
315 dev_err(&PIIX4_dev->dev,
316 "SMBus Host Controller not enabled!\n");
320 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
323 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
324 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
329 /* Aux SMBus does not support IRQ information */
331 dev_info(&PIIX4_dev->dev,
332 "Auxiliary SMBus Host Controller at 0x%x\n",
337 /* Request the SMBus I2C bus config region */
338 if (!request_region(piix4_smba + i2ccfg_offset, 1, "i2ccfg")) {
339 dev_err(&PIIX4_dev->dev, "SMBus I2C bus config region "
340 "0x%x already in use!\n", piix4_smba + i2ccfg_offset);
341 release_region(piix4_smba, SMBIOSIZE);
344 i2ccfg = inb_p(piix4_smba + i2ccfg_offset);
345 release_region(piix4_smba + i2ccfg_offset, 1);
348 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n");
350 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n");
352 dev_info(&PIIX4_dev->dev,
353 "SMBus Host Controller at 0x%x, revision %d\n",
354 piix4_smba, i2ccfg >> 4);
356 /* Find which register is used for port selection */
357 if (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD) {
358 if (PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS ||
359 (PIIX4_dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS &&
360 PIIX4_dev->revision >= 0x1F)) {
361 piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_KERNCZ;
362 piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK_KERNCZ;
363 piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ;
365 piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_ALT;
366 piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK;
367 piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT;
370 mutex_lock(&piix4_mutex_sb800);
371 outb_p(SB800_PIIX4_PORT_IDX_SEL, SB800_PIIX4_SMB_IDX);
372 port_sel = inb_p(SB800_PIIX4_SMB_IDX + 1);
373 piix4_port_sel_sb800 = (port_sel & 0x01) ?
374 SB800_PIIX4_PORT_IDX_ALT :
375 SB800_PIIX4_PORT_IDX;
376 piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK;
377 piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT;
378 mutex_unlock(&piix4_mutex_sb800);
381 dev_info(&PIIX4_dev->dev,
382 "Using register 0x%02x for SMBus port selection\n",
383 (unsigned int)piix4_port_sel_sb800);
388 static int piix4_setup_aux(struct pci_dev *PIIX4_dev,
389 const struct pci_device_id *id,
390 unsigned short base_reg_addr)
392 /* Set up auxiliary SMBus controllers found on some
393 * AMD chipsets e.g. SP5100 (SB700 derivative) */
395 unsigned short piix4_smba;
397 /* Read address of auxiliary SMBus controller */
398 pci_read_config_word(PIIX4_dev, base_reg_addr, &piix4_smba);
399 if ((piix4_smba & 1) == 0) {
400 dev_dbg(&PIIX4_dev->dev,
401 "Auxiliary SMBus controller not enabled\n");
405 piix4_smba &= 0xfff0;
406 if (piix4_smba == 0) {
407 dev_dbg(&PIIX4_dev->dev,
408 "Auxiliary SMBus base address uninitialized\n");
412 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
415 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
416 dev_err(&PIIX4_dev->dev, "Auxiliary SMBus region 0x%x "
417 "already in use!\n", piix4_smba);
421 dev_info(&PIIX4_dev->dev,
422 "Auxiliary SMBus Host Controller at 0x%x\n",
428 static int piix4_transaction(struct i2c_adapter *piix4_adapter)
430 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(piix4_adapter);
431 unsigned short piix4_smba = adapdata->smba;
436 dev_dbg(&piix4_adapter->dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
437 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
438 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
441 /* Make sure the SMBus host is ready to start transmitting */
442 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
443 dev_dbg(&piix4_adapter->dev, "SMBus busy (%02x). "
444 "Resetting...\n", temp);
445 outb_p(temp, SMBHSTSTS);
446 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
447 dev_err(&piix4_adapter->dev, "Failed! (%02x)\n", temp);
450 dev_dbg(&piix4_adapter->dev, "Successful!\n");
454 /* start the transaction by setting bit 6 */
455 outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
457 /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
458 if (srvrworks_csb5_delay) /* Extra delay for SERVERWORKS_CSB5 */
463 while ((++timeout < MAX_TIMEOUT) &&
464 ((temp = inb_p(SMBHSTSTS)) & 0x01))
467 /* If the SMBus is still busy, we give up */
468 if (timeout == MAX_TIMEOUT) {
469 dev_err(&piix4_adapter->dev, "SMBus Timeout!\n");
475 dev_err(&piix4_adapter->dev, "Error: Failed bus transaction\n");
480 dev_dbg(&piix4_adapter->dev, "Bus collision! SMBus may be "
481 "locked until next hard reset. (sorry!)\n");
482 /* Clock stops and slave is stuck in mid-transmission */
487 dev_dbg(&piix4_adapter->dev, "Error: no response!\n");
490 if (inb_p(SMBHSTSTS) != 0x00)
491 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
493 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
494 dev_err(&piix4_adapter->dev, "Failed reset at end of "
495 "transaction (%02x)\n", temp);
497 dev_dbg(&piix4_adapter->dev, "Transaction (post): CNT=%02x, CMD=%02x, "
498 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
499 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
504 /* Return negative errno on error. */
505 static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
506 unsigned short flags, char read_write,
507 u8 command, int size, union i2c_smbus_data * data)
509 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
510 unsigned short piix4_smba = adapdata->smba;
515 case I2C_SMBUS_QUICK:
516 outb_p((addr << 1) | read_write,
521 outb_p((addr << 1) | read_write,
523 if (read_write == I2C_SMBUS_WRITE)
524 outb_p(command, SMBHSTCMD);
527 case I2C_SMBUS_BYTE_DATA:
528 outb_p((addr << 1) | read_write,
530 outb_p(command, SMBHSTCMD);
531 if (read_write == I2C_SMBUS_WRITE)
532 outb_p(data->byte, SMBHSTDAT0);
533 size = PIIX4_BYTE_DATA;
535 case I2C_SMBUS_WORD_DATA:
536 outb_p((addr << 1) | read_write,
538 outb_p(command, SMBHSTCMD);
539 if (read_write == I2C_SMBUS_WRITE) {
540 outb_p(data->word & 0xff, SMBHSTDAT0);
541 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
543 size = PIIX4_WORD_DATA;
545 case I2C_SMBUS_BLOCK_DATA:
546 outb_p((addr << 1) | read_write,
548 outb_p(command, SMBHSTCMD);
549 if (read_write == I2C_SMBUS_WRITE) {
550 len = data->block[0];
551 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
553 outb_p(len, SMBHSTDAT0);
554 inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
555 for (i = 1; i <= len; i++)
556 outb_p(data->block[i], SMBBLKDAT);
558 size = PIIX4_BLOCK_DATA;
561 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
565 outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
567 status = piix4_transaction(adap);
571 if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
577 case PIIX4_BYTE_DATA:
578 data->byte = inb_p(SMBHSTDAT0);
580 case PIIX4_WORD_DATA:
581 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
583 case PIIX4_BLOCK_DATA:
584 data->block[0] = inb_p(SMBHSTDAT0);
585 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
587 inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
588 for (i = 1; i <= data->block[0]; i++)
589 data->block[i] = inb_p(SMBBLKDAT);
596 * Handles access to multiple SMBus ports on the SB800.
597 * The port is selected by bits 2:1 of the smb_en register (0x2c).
598 * Returns negative errno on error.
600 * Note: The selected port must be returned to the initial selection to avoid
601 * problems on certain systems.
603 static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr,
604 unsigned short flags, char read_write,
605 u8 command, int size, union i2c_smbus_data *data)
607 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
608 unsigned short piix4_smba = adapdata->smba;
609 int retries = MAX_TIMEOUT;
615 mutex_lock(&piix4_mutex_sb800);
617 /* Request the SMBUS semaphore, avoid conflicts with the IMC */
618 smbslvcnt = inb_p(SMBSLVCNT);
620 outb_p(smbslvcnt | 0x10, SMBSLVCNT);
622 /* Check the semaphore status */
623 smbslvcnt = inb_p(SMBSLVCNT);
624 if (smbslvcnt & 0x10)
627 usleep_range(1000, 2000);
629 /* SMBus is still owned by the IMC, we give up */
631 mutex_unlock(&piix4_mutex_sb800);
635 outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX);
636 smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1);
638 port = adapdata->port;
639 if ((smba_en_lo & piix4_port_mask_sb800) != port)
640 outb_p((smba_en_lo & ~piix4_port_mask_sb800) | port,
641 SB800_PIIX4_SMB_IDX + 1);
643 retval = piix4_access(adap, addr, flags, read_write,
644 command, size, data);
646 outb_p(smba_en_lo, SB800_PIIX4_SMB_IDX + 1);
648 /* Release the semaphore */
649 outb_p(smbslvcnt | 0x20, SMBSLVCNT);
651 mutex_unlock(&piix4_mutex_sb800);
656 static u32 piix4_func(struct i2c_adapter *adapter)
658 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
659 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
660 I2C_FUNC_SMBUS_BLOCK_DATA;
663 static const struct i2c_algorithm smbus_algorithm = {
664 .smbus_xfer = piix4_access,
665 .functionality = piix4_func,
668 static const struct i2c_algorithm piix4_smbus_algorithm_sb800 = {
669 .smbus_xfer = piix4_access_sb800,
670 .functionality = piix4_func,
673 static const struct pci_device_id piix4_ids[] = {
674 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
675 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
676 { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
677 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) },
678 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
679 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
680 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
681 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
682 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS) },
683 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
684 PCI_DEVICE_ID_SERVERWORKS_OSB4) },
685 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
686 PCI_DEVICE_ID_SERVERWORKS_CSB5) },
687 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
688 PCI_DEVICE_ID_SERVERWORKS_CSB6) },
689 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
690 PCI_DEVICE_ID_SERVERWORKS_HT1000SB) },
691 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
692 PCI_DEVICE_ID_SERVERWORKS_HT1100LD) },
696 MODULE_DEVICE_TABLE (pci, piix4_ids);
698 static struct i2c_adapter *piix4_main_adapters[PIIX4_MAX_ADAPTERS];
699 static struct i2c_adapter *piix4_aux_adapter;
701 static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
702 bool sb800_main, u8 port,
703 const char *name, struct i2c_adapter **padap)
705 struct i2c_adapter *adap;
706 struct i2c_piix4_adapdata *adapdata;
709 adap = kzalloc(sizeof(*adap), GFP_KERNEL);
711 release_region(smba, SMBIOSIZE);
715 adap->owner = THIS_MODULE;
716 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
717 adap->algo = sb800_main ? &piix4_smbus_algorithm_sb800
720 adapdata = kzalloc(sizeof(*adapdata), GFP_KERNEL);
721 if (adapdata == NULL) {
723 release_region(smba, SMBIOSIZE);
727 adapdata->smba = smba;
728 adapdata->sb800_main = sb800_main;
729 adapdata->port = port << piix4_port_shift_sb800;
731 /* set up the sysfs linkage to our parent device */
732 adap->dev.parent = &dev->dev;
734 snprintf(adap->name, sizeof(adap->name),
735 "SMBus PIIX4 adapter%s at %04x", name, smba);
737 i2c_set_adapdata(adap, adapdata);
739 retval = i2c_add_adapter(adap);
743 release_region(smba, SMBIOSIZE);
751 static int piix4_add_adapters_sb800(struct pci_dev *dev, unsigned short smba)
753 struct i2c_piix4_adapdata *adapdata;
757 for (port = 0; port < PIIX4_MAX_ADAPTERS; port++) {
758 retval = piix4_add_adapter(dev, smba, true, port,
759 piix4_main_port_names_sb800[port],
760 &piix4_main_adapters[port]);
769 "Error setting up SB800 adapters. Unregistering!\n");
770 while (--port >= 0) {
771 adapdata = i2c_get_adapdata(piix4_main_adapters[port]);
772 if (adapdata->smba) {
773 i2c_del_adapter(piix4_main_adapters[port]);
775 kfree(piix4_main_adapters[port]);
776 piix4_main_adapters[port] = NULL;
783 static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
786 bool is_sb800 = false;
788 if ((dev->vendor == PCI_VENDOR_ID_ATI &&
789 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
790 dev->revision >= 0x40) ||
791 dev->vendor == PCI_VENDOR_ID_AMD) {
794 if (!request_region(SB800_PIIX4_SMB_IDX, 2, "smba_idx")) {
796 "SMBus base address index region 0x%x already in use!\n",
797 SB800_PIIX4_SMB_IDX);
801 /* base address location etc changed in SB800 */
802 retval = piix4_setup_sb800(dev, id, 0);
804 release_region(SB800_PIIX4_SMB_IDX, 2);
809 * Try to register multiplexed main SMBus adapter,
810 * give up if we can't
812 retval = piix4_add_adapters_sb800(dev, retval);
814 release_region(SB800_PIIX4_SMB_IDX, 2);
818 retval = piix4_setup(dev, id);
822 /* Try to register main SMBus adapter, give up if we can't */
823 retval = piix4_add_adapter(dev, retval, false, 0, "",
824 &piix4_main_adapters[0]);
829 /* Check for auxiliary SMBus on some AMD chipsets */
832 if (dev->vendor == PCI_VENDOR_ID_ATI &&
833 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS) {
834 if (dev->revision < 0x40) {
835 retval = piix4_setup_aux(dev, id, 0x58);
837 /* SB800 added aux bus too */
838 retval = piix4_setup_sb800(dev, id, 1);
842 if (dev->vendor == PCI_VENDOR_ID_AMD &&
843 (dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS ||
844 dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS)) {
845 retval = piix4_setup_sb800(dev, id, 1);
849 /* Try to add the aux adapter if it exists,
850 * piix4_add_adapter will clean up if this fails */
851 piix4_add_adapter(dev, retval, false, 0,
852 is_sb800 ? piix4_aux_port_name_sb800 : "",
859 static void piix4_adap_remove(struct i2c_adapter *adap)
861 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
863 if (adapdata->smba) {
864 i2c_del_adapter(adap);
865 if (adapdata->port == (0 << 1)) {
866 release_region(adapdata->smba, SMBIOSIZE);
867 if (adapdata->sb800_main)
868 release_region(SB800_PIIX4_SMB_IDX, 2);
875 static void piix4_remove(struct pci_dev *dev)
877 int port = PIIX4_MAX_ADAPTERS;
879 while (--port >= 0) {
880 if (piix4_main_adapters[port]) {
881 piix4_adap_remove(piix4_main_adapters[port]);
882 piix4_main_adapters[port] = NULL;
886 if (piix4_aux_adapter) {
887 piix4_adap_remove(piix4_aux_adapter);
888 piix4_aux_adapter = NULL;
892 static struct pci_driver piix4_driver = {
893 .name = "piix4_smbus",
894 .id_table = piix4_ids,
895 .probe = piix4_probe,
896 .remove = piix4_remove,
899 module_pci_driver(piix4_driver);
901 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
902 "Philip Edelbrock <phil@netroedge.com>");
903 MODULE_DESCRIPTION("PIIX4 SMBus driver");
904 MODULE_LICENSE("GPL");