drivers/iio/adc/ti-ads1015.c

   1 /*
   2  * ADS1015 - Texas Instruments Analog-to-Digital Converter
   3  *
   4  * Copyright (c) 2016, Intel Corporation.
   5  *
   6  * This file is subject to the terms and conditions of version 2 of
   7  * the GNU General Public License.  See the file COPYING in the main
   8  * directory of this archive for more details.
   9  *
  10  * IIO driver for ADS1015 ADC 7-bit I2C slave address:
  11  *      * 0x48 - ADDR connected to Ground
  12  *      * 0x49 - ADDR connected to Vdd
  13  *      * 0x4A - ADDR connected to SDA
  14  *      * 0x4B - ADDR connected to SCL
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/of_device.h>
  19 #include <linux/init.h>
  20 #include <linux/irq.h>
  21 #include <linux/i2c.h>
  22 #include <linux/regmap.h>
  23 #include <linux/pm_runtime.h>
  24 #include <linux/mutex.h>
  25 #include <linux/delay.h>
  26
  27 #include <linux/platform_data/ads1015.h>
  28
  29 #include <linux/iio/iio.h>
  30 #include <linux/iio/types.h>
  31 #include <linux/iio/sysfs.h>
  32 #include <linux/iio/events.h>
  33 #include <linux/iio/buffer.h>
  34 #include <linux/iio/triggered_buffer.h>
  35 #include <linux/iio/trigger_consumer.h>
  36
  37 #define ADS1015_DRV_NAME "ads1015"
  38
  39 #define ADS1015_CONV_REG        0x00
  40 #define ADS1015_CFG_REG         0x01
  41 #define ADS1015_LO_THRESH_REG   0x02
  42 #define ADS1015_HI_THRESH_REG   0x03
  43
  44 #define ADS1015_CFG_COMP_QUE_SHIFT      0
  45 #define ADS1015_CFG_COMP_LAT_SHIFT      2
  46 #define ADS1015_CFG_COMP_POL_SHIFT      3
  47 #define ADS1015_CFG_COMP_MODE_SHIFT     4
  48 #define ADS1015_CFG_DR_SHIFT    5
  49 #define ADS1015_CFG_MOD_SHIFT   8
  50 #define ADS1015_CFG_PGA_SHIFT   9
  51 #define ADS1015_CFG_MUX_SHIFT   12
  52
  53 #define ADS1015_CFG_COMP_QUE_MASK       GENMASK(1, 0)
  54 #define ADS1015_CFG_COMP_LAT_MASK       BIT(2)
  55 #define ADS1015_CFG_COMP_POL_MASK       BIT(3)
  56 #define ADS1015_CFG_COMP_MODE_MASK      BIT(4)
  57 #define ADS1015_CFG_DR_MASK     GENMASK(7, 5)
  58 #define ADS1015_CFG_MOD_MASK    BIT(8)
  59 #define ADS1015_CFG_PGA_MASK    GENMASK(11, 9)
  60 #define ADS1015_CFG_MUX_MASK    GENMASK(14, 12)
  61
  62 /* Comparator queue and disable field */
  63 #define ADS1015_CFG_COMP_DISABLE        3
  64
  65 /* Comparator polarity field */
  66 #define ADS1015_CFG_COMP_POL_LOW        0
  67 #define ADS1015_CFG_COMP_POL_HIGH       1
  68
  69 /* Comparator mode field */
  70 #define ADS1015_CFG_COMP_MODE_TRAD      0
  71 #define ADS1015_CFG_COMP_MODE_WINDOW    1
  72
  73 /* device operating modes */
  74 #define ADS1015_CONTINUOUS      0
  75 #define ADS1015_SINGLESHOT      1
  76
  77 #define ADS1015_SLEEP_DELAY_MS          2000
  78 #define ADS1015_DEFAULT_PGA             2
  79 #define ADS1015_DEFAULT_DATA_RATE       4
  80 #define ADS1015_DEFAULT_CHAN            0
  81
  82 enum chip_ids {
  83         ADS1015,
  84         ADS1115,
  85 };
  86
  87 enum ads1015_channels {
  88         ADS1015_AIN0_AIN1 = 0,
  89         ADS1015_AIN0_AIN3,
  90         ADS1015_AIN1_AIN3,
  91         ADS1015_AIN2_AIN3,
  92         ADS1015_AIN0,
  93         ADS1015_AIN1,
  94         ADS1015_AIN2,
  95         ADS1015_AIN3,
  96         ADS1015_TIMESTAMP,
  97 };
  98
  99 static const unsigned int ads1015_data_rate[] = {
 100         128, 250, 490, 920, 1600, 2400, 3300, 3300
 101 };
 102
 103 static const unsigned int ads1115_data_rate[] = {
 104         8, 16, 32, 64, 128, 250, 475, 860
 105 };
 106
 107 /*
 108  * Translation from PGA bits to full-scale positive and negative input voltage
 109  * range in mV
 110  */
 111 static int ads1015_fullscale_range[] = {
 112         6144, 4096, 2048, 1024, 512, 256, 256, 256
 113 };
 114
 115 /*
 116  * Translation from COMP_QUE field value to the number of successive readings
 117  * exceed the threshold values before an interrupt is generated
 118  */
 119 static const int ads1015_comp_queue[] = { 1, 2, 4 };
 120
 121 static const struct iio_event_spec ads1015_events[] = {
 122         {
 123                 .type = IIO_EV_TYPE_THRESH,
 124                 .dir = IIO_EV_DIR_RISING,
 125                 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
 126                                 BIT(IIO_EV_INFO_ENABLE),
 127         }, {
 128                 .type = IIO_EV_TYPE_THRESH,
 129                 .dir = IIO_EV_DIR_FALLING,
 130                 .mask_separate = BIT(IIO_EV_INFO_VALUE),
 131         }, {
 132                 .type = IIO_EV_TYPE_THRESH,
 133                 .dir = IIO_EV_DIR_EITHER,
 134                 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
 135                                 BIT(IIO_EV_INFO_PERIOD),
 136         },
 137 };
 138
 139 #define ADS1015_V_CHAN(_chan, _addr) {                          \
 140         .type = IIO_VOLTAGE,                                    \
 141         .indexed = 1,                                           \
 142         .address = _addr,                                       \
 143         .channel = _chan,                                       \
 144         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 145                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 146                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 147         .scan_index = _addr,                                    \
 148         .scan_type = {                                          \
 149                 .sign = 's',                                    \
 150                 .realbits = 12,                                 \
 151                 .storagebits = 16,                              \
 152                 .shift = 4,                                     \
 153                 .endianness = IIO_CPU,                          \
 154         },                                                      \
 155         .event_spec = ads1015_events,                           \
 156         .num_event_specs = ARRAY_SIZE(ads1015_events),          \
 157         .datasheet_name = "AIN"#_chan,                          \
 158 }
 159
 160 #define ADS1015_V_DIFF_CHAN(_chan, _chan2, _addr) {             \
 161         .type = IIO_VOLTAGE,                                    \
 162         .differential = 1,                                      \
 163         .indexed = 1,                                           \
 164         .address = _addr,                                       \
 165         .channel = _chan,                                       \
 166         .channel2 = _chan2,                                     \
 167         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 168                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 169                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 170         .scan_index = _addr,                                    \
 171         .scan_type = {                                          \
 172                 .sign = 's',                                    \
 173                 .realbits = 12,                                 \
 174                 .storagebits = 16,                              \
 175                 .shift = 4,                                     \
 176                 .endianness = IIO_CPU,                          \
 177         },                                                      \
 178         .event_spec = ads1015_events,                           \
 179         .num_event_specs = ARRAY_SIZE(ads1015_events),          \
 180         .datasheet_name = "AIN"#_chan"-AIN"#_chan2,             \
 181 }
 182
 183 #define ADS1115_V_CHAN(_chan, _addr) {                          \
 184         .type = IIO_VOLTAGE,                                    \
 185         .indexed = 1,                                           \
 186         .address = _addr,                                       \
 187         .channel = _chan,                                       \
 188         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 189                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 190                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 191         .scan_index = _addr,                                    \
 192         .scan_type = {                                          \
 193                 .sign = 's',                                    \
 194                 .realbits = 16,                                 \
 195                 .storagebits = 16,                              \
 196                 .endianness = IIO_CPU,                          \
 197         },                                                      \
 198         .event_spec = ads1015_events,                           \
 199         .num_event_specs = ARRAY_SIZE(ads1015_events),          \
 200         .datasheet_name = "AIN"#_chan,                          \
 201 }
 202
 203 #define ADS1115_V_DIFF_CHAN(_chan, _chan2, _addr) {             \
 204         .type = IIO_VOLTAGE,                                    \
 205         .differential = 1,                                      \
 206         .indexed = 1,                                           \
 207         .address = _addr,                                       \
 208         .channel = _chan,                                       \
 209         .channel2 = _chan2,                                     \
 210         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 211                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 212                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 213         .scan_index = _addr,                                    \
 214         .scan_type = {                                          \
 215                 .sign = 's',                                    \
 216                 .realbits = 16,                                 \
 217                 .storagebits = 16,                              \
 218                 .endianness = IIO_CPU,                          \
 219         },                                                      \
 220         .event_spec = ads1015_events,                           \
 221         .num_event_specs = ARRAY_SIZE(ads1015_events),          \
 222         .datasheet_name = "AIN"#_chan"-AIN"#_chan2,             \
 223 }
 224
 225 struct ads1015_thresh_data {
 226         unsigned int comp_queue;
 227         int high_thresh;
 228         int low_thresh;
 229 };
 230
 231 struct ads1015_data {
 232         struct regmap *regmap;
 233         /*
 234          * Protects ADC ops, e.g: concurrent sysfs/buffered
 235          * data reads, configuration updates
 236          */
 237         struct mutex lock;
 238         struct ads1015_channel_data channel_data[ADS1015_CHANNELS];
 239
 240         unsigned int event_channel;
 241         unsigned int comp_mode;
 242         struct ads1015_thresh_data thresh_data[ADS1015_CHANNELS];
 243
 244         unsigned int *data_rate;
 245         /*
 246          * Set to true when the ADC is switched to the continuous-conversion
 247          * mode and exits from a power-down state.  This flag is used to avoid
 248          * getting the stale result from the conversion register.
 249          */
 250         bool conv_invalid;
 251 };
 252
 253 static bool ads1015_event_channel_enabled(struct ads1015_data *data)
 254 {
 255         return (data->event_channel != ADS1015_CHANNELS);
 256 }
 257
 258 static void ads1015_event_channel_enable(struct ads1015_data *data, int chan,
 259                                          int comp_mode)
 260 {
 261         WARN_ON(ads1015_event_channel_enabled(data));
 262
 263         data->event_channel = chan;
 264         data->comp_mode = comp_mode;
 265 }
 266
 267 static void ads1015_event_channel_disable(struct ads1015_data *data, int chan)
 268 {
 269         data->event_channel = ADS1015_CHANNELS;
 270 }
 271
 272 static bool ads1015_is_writeable_reg(struct device *dev, unsigned int reg)
 273 {
 274         switch (reg) {
 275         case ADS1015_CFG_REG:
 276         case ADS1015_LO_THRESH_REG:
 277         case ADS1015_HI_THRESH_REG:
 278                 return true;
 279         default:
 280                 return false;
 281         }
 282 }
 283
 284 static const struct regmap_config ads1015_regmap_config = {
 285         .reg_bits = 8,
 286         .val_bits = 16,
 287         .max_register = ADS1015_HI_THRESH_REG,
 288         .writeable_reg = ads1015_is_writeable_reg,
 289 };
 290
 291 static const struct iio_chan_spec ads1015_channels[] = {
 292         ADS1015_V_DIFF_CHAN(0, 1, ADS1015_AIN0_AIN1),
 293         ADS1015_V_DIFF_CHAN(0, 3, ADS1015_AIN0_AIN3),
 294         ADS1015_V_DIFF_CHAN(1, 3, ADS1015_AIN1_AIN3),
 295         ADS1015_V_DIFF_CHAN(2, 3, ADS1015_AIN2_AIN3),
 296         ADS1015_V_CHAN(0, ADS1015_AIN0),
 297         ADS1015_V_CHAN(1, ADS1015_AIN1),
 298         ADS1015_V_CHAN(2, ADS1015_AIN2),
 299         ADS1015_V_CHAN(3, ADS1015_AIN3),
 300         IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
 301 };
 302
 303 static const struct iio_chan_spec ads1115_channels[] = {
 304         ADS1115_V_DIFF_CHAN(0, 1, ADS1015_AIN0_AIN1),
 305         ADS1115_V_DIFF_CHAN(0, 3, ADS1015_AIN0_AIN3),
 306         ADS1115_V_DIFF_CHAN(1, 3, ADS1015_AIN1_AIN3),
 307         ADS1115_V_DIFF_CHAN(2, 3, ADS1015_AIN2_AIN3),
 308         ADS1115_V_CHAN(0, ADS1015_AIN0),
 309         ADS1115_V_CHAN(1, ADS1015_AIN1),
 310         ADS1115_V_CHAN(2, ADS1015_AIN2),
 311         ADS1115_V_CHAN(3, ADS1015_AIN3),
 312         IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
 313 };
 314
 315 #ifdef CONFIG_PM
 316 static int ads1015_set_power_state(struct ads1015_data *data, bool on)
 317 {
 318         int ret;
 319         struct device *dev = regmap_get_device(data->regmap);
 320
 321         if (on) {
 322                 ret = pm_runtime_get_sync(dev);
 323                 if (ret < 0)
 324                         pm_runtime_put_noidle(dev);
 325         } else {
 326                 pm_runtime_mark_last_busy(dev);
 327                 ret = pm_runtime_put_autosuspend(dev);
 328         }
 329
 330         return ret < 0 ? ret : 0;
 331 }
 332
 333 #else /* !CONFIG_PM */
 334
 335 static int ads1015_set_power_state(struct ads1015_data *data, bool on)
 336 {
 337         return 0;
 338 }
 339
 340 #endif /* !CONFIG_PM */
 341
 342 static
 343 int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
 344 {
 345         int ret, pga, dr, conv_time;
 346         unsigned int old, mask, cfg;
 347
 348         if (chan < 0 || chan >= ADS1015_CHANNELS)
 349                 return -EINVAL;
 350
 351         ret = regmap_read(data->regmap, ADS1015_CFG_REG, &old);
 352         if (ret)
 353                 return ret;
 354
 355         pga = data->channel_data[chan].pga;
 356         dr = data->channel_data[chan].data_rate;
 357         mask = ADS1015_CFG_MUX_MASK | ADS1015_CFG_PGA_MASK |
 358                 ADS1015_CFG_DR_MASK;
 359         cfg = chan << ADS1015_CFG_MUX_SHIFT | pga << ADS1015_CFG_PGA_SHIFT |
 360                 dr << ADS1015_CFG_DR_SHIFT;
 361
 362         if (ads1015_event_channel_enabled(data)) {
 363                 mask |= ADS1015_CFG_COMP_QUE_MASK | ADS1015_CFG_COMP_MODE_MASK;
 364                 cfg |= data->thresh_data[chan].comp_queue <<
 365                                 ADS1015_CFG_COMP_QUE_SHIFT |
 366                         data->comp_mode <<
 367                                 ADS1015_CFG_COMP_MODE_SHIFT;
 368         }
 369
 370         cfg = (old & ~mask) | (cfg & mask);
 371
 372         ret = regmap_write(data->regmap, ADS1015_CFG_REG, cfg);
 373         if (ret)
 374                 return ret;
 375
 376         if (old != cfg || data->conv_invalid) {
 377                 int dr_old = (old & ADS1015_CFG_DR_MASK) >>
 378                                 ADS1015_CFG_DR_SHIFT;
 379
 380                 conv_time = DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr_old]);
 381                 conv_time += DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr]);
 382                 conv_time += conv_time / 10; /* 10% internal clock inaccuracy */
 383                 usleep_range(conv_time, conv_time + 1);
 384                 data->conv_invalid = false;
 385         }
 386
 387         return regmap_read(data->regmap, ADS1015_CONV_REG, val);
 388 }
 389
 390 static irqreturn_t ads1015_trigger_handler(int irq, void *p)
 391 {
 392         struct iio_poll_func *pf = p;
 393         struct iio_dev *indio_dev = pf->indio_dev;
 394         struct ads1015_data *data = iio_priv(indio_dev);
 395         /* Ensure natural alignment of timestamp */
 396         struct {
 397                 s16 chan;
 398                 s64 timestamp __aligned(8);
 399         } scan;
 400         int chan, ret, res;
 401
 402         memset(&scan, 0, sizeof(scan));
 403
 404         mutex_lock(&data->lock);
 405         chan = find_first_bit(indio_dev->active_scan_mask,
 406                               indio_dev->masklength);
 407         ret = ads1015_get_adc_result(data, chan, &res);
 408         if (ret < 0) {
 409                 mutex_unlock(&data->lock);
 410                 goto err;
 411         }
 412
 413         scan.chan = res;
 414         mutex_unlock(&data->lock);
 415
 416         iio_push_to_buffers_with_timestamp(indio_dev, &scan,
 417                                            iio_get_time_ns(indio_dev));
 418
 419 err:
 420         iio_trigger_notify_done(indio_dev->trig);
 421
 422         return IRQ_HANDLED;
 423 }
 424
 425 static int ads1015_set_scale(struct ads1015_data *data,
 426                              struct iio_chan_spec const *chan,
 427                              int scale, int uscale)
 428 {
 429         int i;
 430         int fullscale = div_s64((scale * 1000000LL + uscale) <<
 431                                 (chan->scan_type.realbits - 1), 1000000);
 432
 433         for (i = 0; i < ARRAY_SIZE(ads1015_fullscale_range); i++) {
 434                 if (ads1015_fullscale_range[i] == fullscale) {
 435                         data->channel_data[chan->address].pga = i;
 436                         return 0;
 437                 }
 438         }
 439
 440         return -EINVAL;
 441 }
 442
 443 static int ads1015_set_data_rate(struct ads1015_data *data, int chan, int rate)
 444 {
 445         int i;
 446
 447         for (i = 0; i < ARRAY_SIZE(ads1015_data_rate); i++) {
 448                 if (data->data_rate[i] == rate) {
 449                         data->channel_data[chan].data_rate = i;
 450                         return 0;
 451                 }
 452         }
 453
 454         return -EINVAL;
 455 }
 456
 457 static int ads1015_read_raw(struct iio_dev *indio_dev,
 458                             struct iio_chan_spec const *chan, int *val,
 459                             int *val2, long mask)
 460 {
 461         int ret, idx;
 462         struct ads1015_data *data = iio_priv(indio_dev);
 463
 464         mutex_lock(&data->lock);
 465         switch (mask) {
 466         case IIO_CHAN_INFO_RAW: {
 467                 int shift = chan->scan_type.shift;
 468
 469                 ret = iio_device_claim_direct_mode(indio_dev);
 470                 if (ret)
 471                         break;
 472
 473                 if (ads1015_event_channel_enabled(data) &&
 474                                 data->event_channel != chan->address) {
 475                         ret = -EBUSY;
 476                         goto release_direct;
 477                 }
 478
 479                 ret = ads1015_set_power_state(data, true);
 480                 if (ret < 0)
 481                         goto release_direct;
 482
 483                 ret = ads1015_get_adc_result(data, chan->address, val);
 484                 if (ret < 0) {
 485                         ads1015_set_power_state(data, false);
 486                         goto release_direct;
 487                 }
 488
 489                 *val = sign_extend32(*val >> shift, 15 - shift);
 490
 491                 ret = ads1015_set_power_state(data, false);
 492                 if (ret < 0)
 493                         goto release_direct;
 494
 495                 ret = IIO_VAL_INT;
 496 release_direct:
 497                 iio_device_release_direct_mode(indio_dev);
 498                 break;
 499         }
 500         case IIO_CHAN_INFO_SCALE:
 501                 idx = data->channel_data[chan->address].pga;
 502                 *val = ads1015_fullscale_range[idx];
 503                 *val2 = chan->scan_type.realbits - 1;
 504                 ret = IIO_VAL_FRACTIONAL_LOG2;
 505                 break;
 506         case IIO_CHAN_INFO_SAMP_FREQ:
 507                 idx = data->channel_data[chan->address].data_rate;
 508                 *val = data->data_rate[idx];
 509                 ret = IIO_VAL_INT;
 510                 break;
 511         default:
 512                 ret = -EINVAL;
 513                 break;
 514         }
 515         mutex_unlock(&data->lock);
 516
 517         return ret;
 518 }
 519
 520 static int ads1015_write_raw(struct iio_dev *indio_dev,
 521                              struct iio_chan_spec const *chan, int val,
 522                              int val2, long mask)
 523 {
 524         struct ads1015_data *data = iio_priv(indio_dev);
 525         int ret;
 526
 527         mutex_lock(&data->lock);
 528         switch (mask) {
 529         case IIO_CHAN_INFO_SCALE:
 530                 ret = ads1015_set_scale(data, chan, val, val2);
 531                 break;
 532         case IIO_CHAN_INFO_SAMP_FREQ:
 533                 ret = ads1015_set_data_rate(data, chan->address, val);
 534                 break;
 535         default:
 536                 ret = -EINVAL;
 537                 break;
 538         }
 539         mutex_unlock(&data->lock);
 540
 541         return ret;
 542 }
 543
 544 static int ads1015_read_event(struct iio_dev *indio_dev,
 545         const struct iio_chan_spec *chan, enum iio_event_type type,
 546         enum iio_event_direction dir, enum iio_event_info info, int *val,
 547         int *val2)
 548 {
 549         struct ads1015_data *data = iio_priv(indio_dev);
 550         int ret;
 551         unsigned int comp_queue;
 552         int period;
 553         int dr;
 554
 555         mutex_lock(&data->lock);
 556
 557         switch (info) {
 558         case IIO_EV_INFO_VALUE:
 559                 *val = (dir == IIO_EV_DIR_RISING) ?
 560                         data->thresh_data[chan->address].high_thresh :
 561                         data->thresh_data[chan->address].low_thresh;
 562                 ret = IIO_VAL_INT;
 563                 break;
 564         case IIO_EV_INFO_PERIOD:
 565                 dr = data->channel_data[chan->address].data_rate;
 566                 comp_queue = data->thresh_data[chan->address].comp_queue;
 567                 period = ads1015_comp_queue[comp_queue] *
 568                         USEC_PER_SEC / data->data_rate[dr];
 569
 570                 *val = period / USEC_PER_SEC;
 571                 *val2 = period % USEC_PER_SEC;
 572                 ret = IIO_VAL_INT_PLUS_MICRO;
 573                 break;
 574         default:
 575                 ret = -EINVAL;
 576                 break;
 577         }
 578
 579         mutex_unlock(&data->lock);
 580
 581         return ret;
 582 }
 583
 584 static int ads1015_write_event(struct iio_dev *indio_dev,
 585         const struct iio_chan_spec *chan, enum iio_event_type type,
 586         enum iio_event_direction dir, enum iio_event_info info, int val,
 587         int val2)
 588 {
 589         struct ads1015_data *data = iio_priv(indio_dev);
 590         int realbits = chan->scan_type.realbits;
 591         int ret = 0;
 592         long long period;
 593         int i;
 594         int dr;
 595
 596         mutex_lock(&data->lock);
 597
 598         switch (info) {
 599         case IIO_EV_INFO_VALUE:
 600                 if (val >= 1 << (realbits - 1) || val < -1 << (realbits - 1)) {
 601                         ret = -EINVAL;
 602                         break;
 603                 }
 604                 if (dir == IIO_EV_DIR_RISING)
 605                         data->thresh_data[chan->address].high_thresh = val;
 606                 else
 607                         data->thresh_data[chan->address].low_thresh = val;
 608                 break;
 609         case IIO_EV_INFO_PERIOD:
 610                 dr = data->channel_data[chan->address].data_rate;
 611                 period = val * USEC_PER_SEC + val2;
 612
 613                 for (i = 0; i < ARRAY_SIZE(ads1015_comp_queue) - 1; i++) {
 614                         if (period <= ads1015_comp_queue[i] *
 615                                         USEC_PER_SEC / data->data_rate[dr])
 616                                 break;
 617                 }
 618                 data->thresh_data[chan->address].comp_queue = i;
 619                 break;
 620         default:
 621                 ret = -EINVAL;
 622                 break;
 623         }
 624
 625         mutex_unlock(&data->lock);
 626
 627         return ret;
 628 }
 629
 630 static int ads1015_read_event_config(struct iio_dev *indio_dev,
 631         const struct iio_chan_spec *chan, enum iio_event_type type,
 632         enum iio_event_direction dir)
 633 {
 634         struct ads1015_data *data = iio_priv(indio_dev);
 635         int ret = 0;
 636
 637         mutex_lock(&data->lock);
 638         if (data->event_channel == chan->address) {
 639                 switch (dir) {
 640                 case IIO_EV_DIR_RISING:
 641                         ret = 1;
 642                         break;
 643                 case IIO_EV_DIR_EITHER:
 644                         ret = (data->comp_mode == ADS1015_CFG_COMP_MODE_WINDOW);
 645                         break;
 646                 default:
 647                         ret = -EINVAL;
 648                         break;
 649                 }
 650         }
 651         mutex_unlock(&data->lock);
 652
 653         return ret;
 654 }
 655
 656 static int ads1015_enable_event_config(struct ads1015_data *data,
 657         const struct iio_chan_spec *chan, int comp_mode)
 658 {
 659         int low_thresh = data->thresh_data[chan->address].low_thresh;
 660         int high_thresh = data->thresh_data[chan->address].high_thresh;
 661         int ret;
 662         unsigned int val;
 663
 664         if (ads1015_event_channel_enabled(data)) {
 665                 if (data->event_channel != chan->address ||
 666                         (data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD &&
 667                                 comp_mode == ADS1015_CFG_COMP_MODE_WINDOW))
 668                         return -EBUSY;
 669
 670                 return 0;
 671         }
 672
 673         if (comp_mode == ADS1015_CFG_COMP_MODE_TRAD) {
 674                 low_thresh = max(-1 << (chan->scan_type.realbits - 1),
 675                                 high_thresh - 1);
 676         }
 677         ret = regmap_write(data->regmap, ADS1015_LO_THRESH_REG,
 678                         low_thresh << chan->scan_type.shift);
 679         if (ret)
 680                 return ret;
 681
 682         ret = regmap_write(data->regmap, ADS1015_HI_THRESH_REG,
 683                         high_thresh << chan->scan_type.shift);
 684         if (ret)
 685                 return ret;
 686
 687         ret = ads1015_set_power_state(data, true);
 688         if (ret < 0)
 689                 return ret;
 690
 691         ads1015_event_channel_enable(data, chan->address, comp_mode);
 692
 693         ret = ads1015_get_adc_result(data, chan->address, &val);
 694         if (ret) {
 695                 ads1015_event_channel_disable(data, chan->address);
 696                 ads1015_set_power_state(data, false);
 697         }
 698
 699         return ret;
 700 }
 701
 702 static int ads1015_disable_event_config(struct ads1015_data *data,
 703         const struct iio_chan_spec *chan, int comp_mode)
 704 {
 705         int ret;
 706
 707         if (!ads1015_event_channel_enabled(data))
 708                 return 0;
 709
 710         if (data->event_channel != chan->address)
 711                 return 0;
 712
 713         if (data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD &&
 714                         comp_mode == ADS1015_CFG_COMP_MODE_WINDOW)
 715                 return 0;
 716
 717         ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 718                                 ADS1015_CFG_COMP_QUE_MASK,
 719                                 ADS1015_CFG_COMP_DISABLE <<
 720                                         ADS1015_CFG_COMP_QUE_SHIFT);
 721         if (ret)
 722                 return ret;
 723
 724         ads1015_event_channel_disable(data, chan->address);
 725
 726         return ads1015_set_power_state(data, false);
 727 }
 728
 729 static int ads1015_write_event_config(struct iio_dev *indio_dev,
 730         const struct iio_chan_spec *chan, enum iio_event_type type,
 731         enum iio_event_direction dir, int state)
 732 {
 733         struct ads1015_data *data = iio_priv(indio_dev);
 734         int ret;
 735         int comp_mode = (dir == IIO_EV_DIR_EITHER) ?
 736                 ADS1015_CFG_COMP_MODE_WINDOW : ADS1015_CFG_COMP_MODE_TRAD;
 737
 738         mutex_lock(&data->lock);
 739
 740         /* Prevent from enabling both buffer and event at a time */
 741         ret = iio_device_claim_direct_mode(indio_dev);
 742         if (ret) {
 743                 mutex_unlock(&data->lock);
 744                 return ret;
 745         }
 746
 747         if (state)
 748                 ret = ads1015_enable_event_config(data, chan, comp_mode);
 749         else
 750                 ret = ads1015_disable_event_config(data, chan, comp_mode);
 751
 752         iio_device_release_direct_mode(indio_dev);
 753         mutex_unlock(&data->lock);
 754
 755         return ret;
 756 }
 757
 758 static irqreturn_t ads1015_event_handler(int irq, void *priv)
 759 {
 760         struct iio_dev *indio_dev = priv;
 761         struct ads1015_data *data = iio_priv(indio_dev);
 762         int val;
 763         int ret;
 764
 765         /* Clear the latched ALERT/RDY pin */
 766         ret = regmap_read(data->regmap, ADS1015_CONV_REG, &val);
 767         if (ret)
 768                 return IRQ_HANDLED;
 769
 770         if (ads1015_event_channel_enabled(data)) {
 771                 enum iio_event_direction dir;
 772                 u64 code;
 773
 774                 dir = data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD ?
 775                                         IIO_EV_DIR_RISING : IIO_EV_DIR_EITHER;
 776                 code = IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, data->event_channel,
 777                                         IIO_EV_TYPE_THRESH, dir);
 778                 iio_push_event(indio_dev, code, iio_get_time_ns(indio_dev));
 779         }
 780
 781         return IRQ_HANDLED;
 782 }
 783
 784 static int ads1015_buffer_preenable(struct iio_dev *indio_dev)
 785 {
 786         struct ads1015_data *data = iio_priv(indio_dev);
 787
 788         /* Prevent from enabling both buffer and event at a time */
 789         if (ads1015_event_channel_enabled(data))
 790                 return -EBUSY;
 791
 792         return ads1015_set_power_state(iio_priv(indio_dev), true);
 793 }
 794
 795 static int ads1015_buffer_postdisable(struct iio_dev *indio_dev)
 796 {
 797         return ads1015_set_power_state(iio_priv(indio_dev), false);
 798 }
 799
 800 static const struct iio_buffer_setup_ops ads1015_buffer_setup_ops = {
 801         .preenable      = ads1015_buffer_preenable,
 802         .postenable     = iio_triggered_buffer_postenable,
 803         .predisable     = iio_triggered_buffer_predisable,
 804         .postdisable    = ads1015_buffer_postdisable,
 805         .validate_scan_mask = &iio_validate_scan_mask_onehot,
 806 };
 807
 808 static IIO_CONST_ATTR_NAMED(ads1015_scale_available, scale_available,
 809         "3 2 1 0.5 0.25 0.125");
 810 static IIO_CONST_ATTR_NAMED(ads1115_scale_available, scale_available,
 811         "0.1875 0.125 0.0625 0.03125 0.015625 0.007813");
 812
 813 static IIO_CONST_ATTR_NAMED(ads1015_sampling_frequency_available,
 814         sampling_frequency_available, "128 250 490 920 1600 2400 3300");
 815 static IIO_CONST_ATTR_NAMED(ads1115_sampling_frequency_available,
 816         sampling_frequency_available, "8 16 32 64 128 250 475 860");
 817
 818 static struct attribute *ads1015_attributes[] = {
 819         &iio_const_attr_ads1015_scale_available.dev_attr.attr,
 820         &iio_const_attr_ads1015_sampling_frequency_available.dev_attr.attr,
 821         NULL,
 822 };
 823
 824 static const struct attribute_group ads1015_attribute_group = {
 825         .attrs = ads1015_attributes,
 826 };
 827
 828 static struct attribute *ads1115_attributes[] = {
 829         &iio_const_attr_ads1115_scale_available.dev_attr.attr,
 830         &iio_const_attr_ads1115_sampling_frequency_available.dev_attr.attr,
 831         NULL,
 832 };
 833
 834 static const struct attribute_group ads1115_attribute_group = {
 835         .attrs = ads1115_attributes,
 836 };
 837
 838 static const struct iio_info ads1015_info = {
 839         .driver_module  = THIS_MODULE,
 840         .read_raw       = ads1015_read_raw,
 841         .write_raw      = ads1015_write_raw,
 842         .read_event_value = ads1015_read_event,
 843         .write_event_value = ads1015_write_event,
 844         .read_event_config = ads1015_read_event_config,
 845         .write_event_config = ads1015_write_event_config,
 846         .attrs          = &ads1015_attribute_group,
 847 };
 848
 849 static const struct iio_info ads1115_info = {
 850         .driver_module  = THIS_MODULE,
 851         .read_raw       = ads1015_read_raw,
 852         .write_raw      = ads1015_write_raw,
 853         .read_event_value = ads1015_read_event,
 854         .write_event_value = ads1015_write_event,
 855         .read_event_config = ads1015_read_event_config,
 856         .write_event_config = ads1015_write_event_config,
 857         .attrs          = &ads1115_attribute_group,
 858 };
 859
 860 #ifdef CONFIG_OF
 861 static int ads1015_get_channels_config_of(struct i2c_client *client)
 862 {
 863         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 864         struct ads1015_data *data = iio_priv(indio_dev);
 865         struct device_node *node;
 866
 867         if (!client->dev.of_node ||
 868             !of_get_next_child(client->dev.of_node, NULL))
 869                 return -EINVAL;
 870
 871         for_each_child_of_node(client->dev.of_node, node) {
 872                 u32 pval;
 873                 unsigned int channel;
 874                 unsigned int pga = ADS1015_DEFAULT_PGA;
 875                 unsigned int data_rate = ADS1015_DEFAULT_DATA_RATE;
 876
 877                 if (of_property_read_u32(node, "reg", &pval)) {
 878                         dev_err(&client->dev, "invalid reg on %pOF\n",
 879                                 node);
 880                         continue;
 881                 }
 882
 883                 channel = pval;
 884                 if (channel >= ADS1015_CHANNELS) {
 885                         dev_err(&client->dev,
 886                                 "invalid channel index %d on %pOF\n",
 887                                 channel, node);
 888                         continue;
 889                 }
 890
 891                 if (!of_property_read_u32(node, "ti,gain", &pval)) {
 892                         pga = pval;
 893                         if (pga > 6) {
 894                                 dev_err(&client->dev, "invalid gain on %pOF\n",
 895                                         node);
 896                                 of_node_put(node);
 897                                 return -EINVAL;
 898                         }
 899                 }
 900
 901                 if (!of_property_read_u32(node, "ti,datarate", &pval)) {
 902                         data_rate = pval;
 903                         if (data_rate > 7) {
 904                                 dev_err(&client->dev,
 905                                         "invalid data_rate on %pOF\n",
 906                                         node);
 907                                 of_node_put(node);
 908                                 return -EINVAL;
 909                         }
 910                 }
 911
 912                 data->channel_data[channel].pga = pga;
 913                 data->channel_data[channel].data_rate = data_rate;
 914         }
 915
 916         return 0;
 917 }
 918 #endif
 919
 920 static void ads1015_get_channels_config(struct i2c_client *client)
 921 {
 922         unsigned int k;
 923
 924         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 925         struct ads1015_data *data = iio_priv(indio_dev);
 926         struct ads1015_platform_data *pdata = dev_get_platdata(&client->dev);
 927
 928         /* prefer platform data */
 929         if (pdata) {
 930                 memcpy(data->channel_data, pdata->channel_data,
 931                        sizeof(data->channel_data));
 932                 return;
 933         }
 934
 935 #ifdef CONFIG_OF
 936         if (!ads1015_get_channels_config_of(client))
 937                 return;
 938 #endif
 939         /* fallback on default configuration */
 940         for (k = 0; k < ADS1015_CHANNELS; ++k) {
 941                 data->channel_data[k].pga = ADS1015_DEFAULT_PGA;
 942                 data->channel_data[k].data_rate = ADS1015_DEFAULT_DATA_RATE;
 943         }
 944 }
 945
 946 static int ads1015_set_conv_mode(struct ads1015_data *data, int mode)
 947 {
 948         return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 949                                   ADS1015_CFG_MOD_MASK,
 950                                   mode << ADS1015_CFG_MOD_SHIFT);
 951 }
 952
 953 static int ads1015_probe(struct i2c_client *client,
 954                          const struct i2c_device_id *id)
 955 {
 956         struct iio_dev *indio_dev;
 957         struct ads1015_data *data;
 958         int ret;
 959         enum chip_ids chip;
 960         int i;
 961
 962         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
 963         if (!indio_dev)
 964                 return -ENOMEM;
 965
 966         data = iio_priv(indio_dev);
 967         i2c_set_clientdata(client, indio_dev);
 968
 969         mutex_init(&data->lock);
 970
 971         indio_dev->dev.parent = &client->dev;
 972         indio_dev->dev.of_node = client->dev.of_node;
 973         indio_dev->name = ADS1015_DRV_NAME;
 974         indio_dev->modes = INDIO_DIRECT_MODE;
 975
 976         if (client->dev.of_node)
 977                 chip = (enum chip_ids)of_device_get_match_data(&client->dev);
 978         else
 979                 chip = id->driver_data;
 980         switch (chip) {
 981         case ADS1015:
 982                 indio_dev->channels = ads1015_channels;
 983                 indio_dev->num_channels = ARRAY_SIZE(ads1015_channels);
 984                 indio_dev->info = &ads1015_info;
 985                 data->data_rate = (unsigned int *) &ads1015_data_rate;
 986                 break;
 987         case ADS1115:
 988                 indio_dev->channels = ads1115_channels;
 989                 indio_dev->num_channels = ARRAY_SIZE(ads1115_channels);
 990                 indio_dev->info = &ads1115_info;
 991                 data->data_rate = (unsigned int *) &ads1115_data_rate;
 992                 break;
 993         }
 994
 995         data->event_channel = ADS1015_CHANNELS;
 996         /*
 997          * Set default lower and upper threshold to min and max value
 998          * respectively.
 999          */
1000         for (i = 0; i < ADS1015_CHANNELS; i++) {
1001                 int realbits = indio_dev->channels[i].scan_type.realbits;
1002
1003                 data->thresh_data[i].low_thresh = -1 << (realbits - 1);
1004                 data->thresh_data[i].high_thresh = (1 << (realbits - 1)) - 1;
1005         }
1006
1007         /* we need to keep this ABI the same as used by hwmon ADS1015 driver */
1008         ads1015_get_channels_config(client);
1009
1010         data->regmap = devm_regmap_init_i2c(client, &ads1015_regmap_config);
1011         if (IS_ERR(data->regmap)) {
1012                 dev_err(&client->dev, "Failed to allocate register map\n");
1013                 return PTR_ERR(data->regmap);
1014         }
1015
1016         ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev, NULL,
1017                                               ads1015_trigger_handler,
1018                                               &ads1015_buffer_setup_ops);
1019         if (ret < 0) {
1020                 dev_err(&client->dev, "iio triggered buffer setup failed\n");
1021                 return ret;
1022         }
1023
1024         if (client->irq) {
1025                 unsigned long irq_trig =
1026                         irqd_get_trigger_type(irq_get_irq_data(client->irq));
1027                 unsigned int cfg_comp_mask = ADS1015_CFG_COMP_QUE_MASK |
1028                         ADS1015_CFG_COMP_LAT_MASK | ADS1015_CFG_COMP_POL_MASK;
1029                 unsigned int cfg_comp =
1030                         ADS1015_CFG_COMP_DISABLE << ADS1015_CFG_COMP_QUE_SHIFT |
1031                         1 << ADS1015_CFG_COMP_LAT_SHIFT;
1032
1033                 switch (irq_trig) {
1034                 case IRQF_TRIGGER_LOW:
1035                         cfg_comp |= ADS1015_CFG_COMP_POL_LOW <<
1036                                         ADS1015_CFG_COMP_POL_SHIFT;
1037                         break;
1038                 case IRQF_TRIGGER_HIGH:
1039                         cfg_comp |= ADS1015_CFG_COMP_POL_HIGH <<
1040                                         ADS1015_CFG_COMP_POL_SHIFT;
1041                         break;
1042                 default:
1043                         return -EINVAL;
1044                 }
1045
1046                 ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
1047                                         cfg_comp_mask, cfg_comp);
1048                 if (ret)
1049                         return ret;
1050
1051                 ret = devm_request_threaded_irq(&client->dev, client->irq,
1052                                                 NULL, ads1015_event_handler,
1053                                                 irq_trig | IRQF_ONESHOT,
1054                                                 client->name, indio_dev);
1055                 if (ret)
1056                         return ret;
1057         }
1058
1059         ret = ads1015_set_conv_mode(data, ADS1015_CONTINUOUS);
1060         if (ret)
1061                 return ret;
1062
1063         data->conv_invalid = true;
1064
1065         ret = pm_runtime_set_active(&client->dev);
1066         if (ret)
1067                 return ret;
1068         pm_runtime_set_autosuspend_delay(&client->dev, ADS1015_SLEEP_DELAY_MS);
1069         pm_runtime_use_autosuspend(&client->dev);
1070         pm_runtime_enable(&client->dev);
1071
1072         ret = iio_device_register(indio_dev);
1073         if (ret < 0) {
1074                 dev_err(&client->dev, "Failed to register IIO device\n");
1075                 return ret;
1076         }
1077
1078         return 0;
1079 }
1080
1081 static int ads1015_remove(struct i2c_client *client)
1082 {
1083         struct iio_dev *indio_dev = i2c_get_clientdata(client);
1084         struct ads1015_data *data = iio_priv(indio_dev);
1085
1086         iio_device_unregister(indio_dev);
1087
1088         pm_runtime_disable(&client->dev);
1089         pm_runtime_set_suspended(&client->dev);
1090         pm_runtime_put_noidle(&client->dev);
1091
1092         /* power down single shot mode */
1093         return ads1015_set_conv_mode(data, ADS1015_SINGLESHOT);
1094 }
1095
1096 #ifdef CONFIG_PM
1097 static int ads1015_runtime_suspend(struct device *dev)
1098 {
1099         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1100         struct ads1015_data *data = iio_priv(indio_dev);
1101
1102         return ads1015_set_conv_mode(data, ADS1015_SINGLESHOT);
1103 }
1104
1105 static int ads1015_runtime_resume(struct device *dev)
1106 {
1107         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1108         struct ads1015_data *data = iio_priv(indio_dev);
1109         int ret;
1110
1111         ret = ads1015_set_conv_mode(data, ADS1015_CONTINUOUS);
1112         if (!ret)
1113                 data->conv_invalid = true;
1114
1115         return ret;
1116 }
1117 #endif
1118
1119 static const struct dev_pm_ops ads1015_pm_ops = {
1120         SET_RUNTIME_PM_OPS(ads1015_runtime_suspend,
1121                            ads1015_runtime_resume, NULL)
1122 };
1123
1124 static const struct i2c_device_id ads1015_id[] = {
1125         {"ads1015", ADS1015},
1126         {"ads1115", ADS1115},
1127         {}
1128 };
1129 MODULE_DEVICE_TABLE(i2c, ads1015_id);
1130
1131 static const struct of_device_id ads1015_of_match[] = {
1132         {
1133                 .compatible = "ti,ads1015",
1134                 .data = (void *)ADS1015
1135         },
1136         {
1137                 .compatible = "ti,ads1115",
1138                 .data = (void *)ADS1115
1139         },
1140         {}
1141 };
1142 MODULE_DEVICE_TABLE(of, ads1015_of_match);
1143
1144 static struct i2c_driver ads1015_driver = {
1145         .driver = {
1146                 .name = ADS1015_DRV_NAME,
1147                 .of_match_table = ads1015_of_match,
1148                 .pm = &ads1015_pm_ops,
1149         },
1150         .probe          = ads1015_probe,
1151         .remove         = ads1015_remove,
1152         .id_table       = ads1015_id,
1153 };
1154
1155 module_i2c_driver(ads1015_driver);
1156
1157 MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
1158 MODULE_DESCRIPTION("Texas Instruments ADS1015 ADC driver");
1159 MODULE_LICENSE("GPL v2");