2 * Copyright(c) 2015 - 2018 Intel Corporation.
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
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15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
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47 #include <linux/topology.h>
48 #include <linux/cpumask.h>
49 #include <linux/module.h>
50 #include <linux/interrupt.h>
57 struct hfi1_affinity_node_list node_affinity = {
58 .list = LIST_HEAD_INIT(node_affinity.list),
59 .lock = __MUTEX_INITIALIZER(node_affinity.lock)
62 /* Name of IRQ types, indexed by enum irq_type */
63 static const char * const irq_type_names[] = {
70 /* Per NUMA node count of HFI devices */
71 static unsigned int *hfi1_per_node_cntr;
73 static inline void init_cpu_mask_set(struct cpu_mask_set *set)
75 cpumask_clear(&set->mask);
76 cpumask_clear(&set->used);
80 /* Increment generation of CPU set if needed */
81 static void _cpu_mask_set_gen_inc(struct cpu_mask_set *set)
83 if (cpumask_equal(&set->mask, &set->used)) {
85 * We've used up all the CPUs, bump up the generation
86 * and reset the 'used' map
89 cpumask_clear(&set->used);
93 static void _cpu_mask_set_gen_dec(struct cpu_mask_set *set)
95 if (cpumask_empty(&set->used) && set->gen) {
97 cpumask_copy(&set->used, &set->mask);
101 /* Get the first CPU from the list of unused CPUs in a CPU set data structure */
102 static int cpu_mask_set_get_first(struct cpu_mask_set *set, cpumask_var_t diff)
109 _cpu_mask_set_gen_inc(set);
111 /* Find out CPUs left in CPU mask */
112 cpumask_andnot(diff, &set->mask, &set->used);
114 cpu = cpumask_first(diff);
115 if (cpu >= nr_cpu_ids) /* empty */
118 cpumask_set_cpu(cpu, &set->used);
123 static void cpu_mask_set_put(struct cpu_mask_set *set, int cpu)
128 cpumask_clear_cpu(cpu, &set->used);
129 _cpu_mask_set_gen_dec(set);
132 /* Initialize non-HT cpu cores mask */
133 void init_real_cpu_mask(void)
135 int possible, curr_cpu, i, ht;
137 cpumask_clear(&node_affinity.real_cpu_mask);
139 /* Start with cpu online mask as the real cpu mask */
140 cpumask_copy(&node_affinity.real_cpu_mask, cpu_online_mask);
143 * Remove HT cores from the real cpu mask. Do this in two steps below.
145 possible = cpumask_weight(&node_affinity.real_cpu_mask);
146 ht = cpumask_weight(topology_sibling_cpumask(
147 cpumask_first(&node_affinity.real_cpu_mask)));
149 * Step 1. Skip over the first N HT siblings and use them as the
150 * "real" cores. Assumes that HT cores are not enumerated in
151 * succession (except in the single core case).
153 curr_cpu = cpumask_first(&node_affinity.real_cpu_mask);
154 for (i = 0; i < possible / ht; i++)
155 curr_cpu = cpumask_next(curr_cpu, &node_affinity.real_cpu_mask);
157 * Step 2. Remove the remaining HT siblings. Use cpumask_next() to
160 for (; i < possible; i++) {
161 cpumask_clear_cpu(curr_cpu, &node_affinity.real_cpu_mask);
162 curr_cpu = cpumask_next(curr_cpu, &node_affinity.real_cpu_mask);
166 int node_affinity_init(void)
169 struct pci_dev *dev = NULL;
170 const struct pci_device_id *ids = hfi1_pci_tbl;
172 cpumask_clear(&node_affinity.proc.used);
173 cpumask_copy(&node_affinity.proc.mask, cpu_online_mask);
175 node_affinity.proc.gen = 0;
176 node_affinity.num_core_siblings =
177 cpumask_weight(topology_sibling_cpumask(
178 cpumask_first(&node_affinity.proc.mask)
180 node_affinity.num_possible_nodes = num_possible_nodes();
181 node_affinity.num_online_nodes = num_online_nodes();
182 node_affinity.num_online_cpus = num_online_cpus();
185 * The real cpu mask is part of the affinity struct but it has to be
186 * initialized early. It is needed to calculate the number of user
187 * contexts in set_up_context_variables().
189 init_real_cpu_mask();
191 hfi1_per_node_cntr = kcalloc(node_affinity.num_possible_nodes,
192 sizeof(*hfi1_per_node_cntr), GFP_KERNEL);
193 if (!hfi1_per_node_cntr)
196 while (ids->vendor) {
198 while ((dev = pci_get_device(ids->vendor, ids->device, dev))) {
199 node = pcibus_to_node(dev->bus);
203 hfi1_per_node_cntr[node]++;
212 * Invalid PCI NUMA node information found, note it, and populate
215 pr_err("HFI: Invalid PCI NUMA node. Performance may be affected\n");
216 pr_err("HFI: System BIOS may need to be upgraded\n");
217 for (node = 0; node < node_affinity.num_possible_nodes; node++)
218 hfi1_per_node_cntr[node] = 1;
225 static void node_affinity_destroy(struct hfi1_affinity_node *entry)
227 free_percpu(entry->comp_vect_affinity);
231 void node_affinity_destroy_all(void)
233 struct list_head *pos, *q;
234 struct hfi1_affinity_node *entry;
236 mutex_lock(&node_affinity.lock);
237 list_for_each_safe(pos, q, &node_affinity.list) {
238 entry = list_entry(pos, struct hfi1_affinity_node,
241 node_affinity_destroy(entry);
243 mutex_unlock(&node_affinity.lock);
244 kfree(hfi1_per_node_cntr);
247 static struct hfi1_affinity_node *node_affinity_allocate(int node)
249 struct hfi1_affinity_node *entry;
251 entry = kzalloc(sizeof(*entry), GFP_KERNEL);
255 entry->comp_vect_affinity = alloc_percpu(u16);
256 INIT_LIST_HEAD(&entry->list);
262 * It appends an entry to the list.
263 * It *must* be called with node_affinity.lock held.
265 static void node_affinity_add_tail(struct hfi1_affinity_node *entry)
267 list_add_tail(&entry->list, &node_affinity.list);
270 /* It must be called with node_affinity.lock held */
271 static struct hfi1_affinity_node *node_affinity_lookup(int node)
273 struct list_head *pos;
274 struct hfi1_affinity_node *entry;
276 list_for_each(pos, &node_affinity.list) {
277 entry = list_entry(pos, struct hfi1_affinity_node, list);
278 if (entry->node == node)
285 static int per_cpu_affinity_get(cpumask_var_t possible_cpumask,
286 u16 __percpu *comp_vect_affinity)
293 if (!possible_cpumask) {
298 if (!comp_vect_affinity) {
303 ret_cpu = cpumask_first(possible_cpumask);
304 if (ret_cpu >= nr_cpu_ids) {
309 prev_cntr = *per_cpu_ptr(comp_vect_affinity, ret_cpu);
310 for_each_cpu(curr_cpu, possible_cpumask) {
311 cntr = *per_cpu_ptr(comp_vect_affinity, curr_cpu);
313 if (cntr < prev_cntr) {
319 *per_cpu_ptr(comp_vect_affinity, ret_cpu) += 1;
325 static int per_cpu_affinity_put_max(cpumask_var_t possible_cpumask,
326 u16 __percpu *comp_vect_affinity)
333 if (!possible_cpumask)
336 if (!comp_vect_affinity)
339 max_cpu = cpumask_first(possible_cpumask);
340 if (max_cpu >= nr_cpu_ids)
343 prev_cntr = *per_cpu_ptr(comp_vect_affinity, max_cpu);
344 for_each_cpu(curr_cpu, possible_cpumask) {
345 cntr = *per_cpu_ptr(comp_vect_affinity, curr_cpu);
347 if (cntr > prev_cntr) {
353 *per_cpu_ptr(comp_vect_affinity, max_cpu) -= 1;
359 * Non-interrupt CPUs are used first, then interrupt CPUs.
360 * Two already allocated cpu masks must be passed.
362 static int _dev_comp_vect_cpu_get(struct hfi1_devdata *dd,
363 struct hfi1_affinity_node *entry,
364 cpumask_var_t non_intr_cpus,
365 cpumask_var_t available_cpus)
366 __must_hold(&node_affinity.lock)
369 struct cpu_mask_set *set = dd->comp_vect;
371 lockdep_assert_held(&node_affinity.lock);
372 if (!non_intr_cpus) {
377 if (!available_cpus) {
382 /* Available CPUs for pinning completion vectors */
383 _cpu_mask_set_gen_inc(set);
384 cpumask_andnot(available_cpus, &set->mask, &set->used);
386 /* Available CPUs without SDMA engine interrupts */
387 cpumask_andnot(non_intr_cpus, available_cpus,
388 &entry->def_intr.used);
390 /* If there are non-interrupt CPUs available, use them first */
391 if (!cpumask_empty(non_intr_cpus))
392 cpu = cpumask_first(non_intr_cpus);
393 else /* Otherwise, use interrupt CPUs */
394 cpu = cpumask_first(available_cpus);
396 if (cpu >= nr_cpu_ids) { /* empty */
400 cpumask_set_cpu(cpu, &set->used);
406 static void _dev_comp_vect_cpu_put(struct hfi1_devdata *dd, int cpu)
408 struct cpu_mask_set *set = dd->comp_vect;
413 cpu_mask_set_put(set, cpu);
416 /* _dev_comp_vect_mappings_destroy() is reentrant */
417 static void _dev_comp_vect_mappings_destroy(struct hfi1_devdata *dd)
421 if (!dd->comp_vect_mappings)
424 for (i = 0; i < dd->comp_vect_possible_cpus; i++) {
425 cpu = dd->comp_vect_mappings[i];
426 _dev_comp_vect_cpu_put(dd, cpu);
427 dd->comp_vect_mappings[i] = -1;
429 "[%s] Release CPU %d from completion vector %d",
430 rvt_get_ibdev_name(&(dd)->verbs_dev.rdi), cpu, i);
433 kfree(dd->comp_vect_mappings);
434 dd->comp_vect_mappings = NULL;
438 * This function creates the table for looking up CPUs for completion vectors.
439 * num_comp_vectors needs to have been initilized before calling this function.
441 static int _dev_comp_vect_mappings_create(struct hfi1_devdata *dd,
442 struct hfi1_affinity_node *entry)
443 __must_hold(&node_affinity.lock)
446 cpumask_var_t non_intr_cpus;
447 cpumask_var_t available_cpus;
449 lockdep_assert_held(&node_affinity.lock);
451 if (!zalloc_cpumask_var(&non_intr_cpus, GFP_KERNEL))
454 if (!zalloc_cpumask_var(&available_cpus, GFP_KERNEL)) {
455 free_cpumask_var(non_intr_cpus);
459 dd->comp_vect_mappings = kcalloc(dd->comp_vect_possible_cpus,
460 sizeof(*dd->comp_vect_mappings),
462 if (!dd->comp_vect_mappings) {
466 for (i = 0; i < dd->comp_vect_possible_cpus; i++)
467 dd->comp_vect_mappings[i] = -1;
469 for (i = 0; i < dd->comp_vect_possible_cpus; i++) {
470 cpu = _dev_comp_vect_cpu_get(dd, entry, non_intr_cpus,
477 dd->comp_vect_mappings[i] = cpu;
479 "[%s] Completion Vector %d -> CPU %d",
480 rvt_get_ibdev_name(&(dd)->verbs_dev.rdi), i, cpu);
483 free_cpumask_var(available_cpus);
484 free_cpumask_var(non_intr_cpus);
488 free_cpumask_var(available_cpus);
489 free_cpumask_var(non_intr_cpus);
490 _dev_comp_vect_mappings_destroy(dd);
495 int hfi1_comp_vectors_set_up(struct hfi1_devdata *dd)
498 struct hfi1_affinity_node *entry;
500 mutex_lock(&node_affinity.lock);
501 entry = node_affinity_lookup(dd->node);
506 ret = _dev_comp_vect_mappings_create(dd, entry);
508 mutex_unlock(&node_affinity.lock);
513 void hfi1_comp_vectors_clean_up(struct hfi1_devdata *dd)
515 _dev_comp_vect_mappings_destroy(dd);
518 int hfi1_comp_vect_mappings_lookup(struct rvt_dev_info *rdi, int comp_vect)
520 struct hfi1_ibdev *verbs_dev = dev_from_rdi(rdi);
521 struct hfi1_devdata *dd = dd_from_dev(verbs_dev);
523 if (!dd->comp_vect_mappings)
525 if (comp_vect >= dd->comp_vect_possible_cpus)
528 return dd->comp_vect_mappings[comp_vect];
532 * It assumes dd->comp_vect_possible_cpus is available.
534 static int _dev_comp_vect_cpu_mask_init(struct hfi1_devdata *dd,
535 struct hfi1_affinity_node *entry,
537 __must_hold(&node_affinity.lock)
540 int possible_cpus_comp_vect = 0;
541 struct cpumask *dev_comp_vect_mask = &dd->comp_vect->mask;
543 lockdep_assert_held(&node_affinity.lock);
545 * If there's only one CPU available for completion vectors, then
546 * there will only be one completion vector available. Othewise,
547 * the number of completion vector available will be the number of
548 * available CPUs divide it by the number of devices in the
551 if (cpumask_weight(&entry->comp_vect_mask) == 1) {
552 possible_cpus_comp_vect = 1;
554 "Number of kernel receive queues is too large for completion vector affinity to be effective\n");
556 possible_cpus_comp_vect +=
557 cpumask_weight(&entry->comp_vect_mask) /
558 hfi1_per_node_cntr[dd->node];
561 * If the completion vector CPUs available doesn't divide
562 * evenly among devices, then the first device device to be
563 * initialized gets an extra CPU.
565 if (first_dev_init &&
566 cpumask_weight(&entry->comp_vect_mask) %
567 hfi1_per_node_cntr[dd->node] != 0)
568 possible_cpus_comp_vect++;
571 dd->comp_vect_possible_cpus = possible_cpus_comp_vect;
573 /* Reserving CPUs for device completion vector */
574 for (i = 0; i < dd->comp_vect_possible_cpus; i++) {
575 curr_cpu = per_cpu_affinity_get(&entry->comp_vect_mask,
576 entry->comp_vect_affinity);
580 cpumask_set_cpu(curr_cpu, dev_comp_vect_mask);
584 "[%s] Completion vector affinity CPU set(s) %*pbl",
585 rvt_get_ibdev_name(&(dd)->verbs_dev.rdi),
586 cpumask_pr_args(dev_comp_vect_mask));
591 for (j = 0; j < i; j++)
592 per_cpu_affinity_put_max(&entry->comp_vect_mask,
593 entry->comp_vect_affinity);
599 * It assumes dd->comp_vect_possible_cpus is available.
601 static void _dev_comp_vect_cpu_mask_clean_up(struct hfi1_devdata *dd,
602 struct hfi1_affinity_node *entry)
603 __must_hold(&node_affinity.lock)
607 lockdep_assert_held(&node_affinity.lock);
608 if (!dd->comp_vect_possible_cpus)
611 for (i = 0; i < dd->comp_vect_possible_cpus; i++) {
612 cpu = per_cpu_affinity_put_max(&dd->comp_vect->mask,
613 entry->comp_vect_affinity);
614 /* Clearing CPU in device completion vector cpu mask */
616 cpumask_clear_cpu(cpu, &dd->comp_vect->mask);
619 dd->comp_vect_possible_cpus = 0;
623 * Interrupt affinity.
625 * non-rcv avail gets a default mask that
626 * starts as possible cpus with threads reset
627 * and each rcv avail reset.
629 * rcv avail gets node relative 1 wrapping back
630 * to the node relative 1 as necessary.
633 int hfi1_dev_affinity_init(struct hfi1_devdata *dd)
635 int node = pcibus_to_node(dd->pcidev->bus);
636 struct hfi1_affinity_node *entry;
637 const struct cpumask *local_mask;
638 int curr_cpu, possible, i, ret;
639 bool new_entry = false;
642 * If the BIOS does not have the NUMA node information set, select
643 * NUMA 0 so we get consistent performance.
646 dd_dev_err(dd, "Invalid PCI NUMA node. Performance may be affected\n");
651 local_mask = cpumask_of_node(dd->node);
652 if (cpumask_first(local_mask) >= nr_cpu_ids)
653 local_mask = topology_core_cpumask(0);
655 mutex_lock(&node_affinity.lock);
656 entry = node_affinity_lookup(dd->node);
659 * If this is the first time this NUMA node's affinity is used,
660 * create an entry in the global affinity structure and initialize it.
663 entry = node_affinity_allocate(node);
666 "Unable to allocate global affinity node\n");
672 init_cpu_mask_set(&entry->def_intr);
673 init_cpu_mask_set(&entry->rcv_intr);
674 cpumask_clear(&entry->comp_vect_mask);
675 cpumask_clear(&entry->general_intr_mask);
676 /* Use the "real" cpu mask of this node as the default */
677 cpumask_and(&entry->def_intr.mask, &node_affinity.real_cpu_mask,
680 /* fill in the receive list */
681 possible = cpumask_weight(&entry->def_intr.mask);
682 curr_cpu = cpumask_first(&entry->def_intr.mask);
685 /* only one CPU, everyone will use it */
686 cpumask_set_cpu(curr_cpu, &entry->rcv_intr.mask);
687 cpumask_set_cpu(curr_cpu, &entry->general_intr_mask);
690 * The general/control context will be the first CPU in
691 * the default list, so it is removed from the default
692 * list and added to the general interrupt list.
694 cpumask_clear_cpu(curr_cpu, &entry->def_intr.mask);
695 cpumask_set_cpu(curr_cpu, &entry->general_intr_mask);
696 curr_cpu = cpumask_next(curr_cpu,
697 &entry->def_intr.mask);
700 * Remove the remaining kernel receive queues from
701 * the default list and add them to the receive list.
704 i < (dd->n_krcv_queues - 1) *
705 hfi1_per_node_cntr[dd->node];
707 cpumask_clear_cpu(curr_cpu,
708 &entry->def_intr.mask);
709 cpumask_set_cpu(curr_cpu,
710 &entry->rcv_intr.mask);
711 curr_cpu = cpumask_next(curr_cpu,
712 &entry->def_intr.mask);
713 if (curr_cpu >= nr_cpu_ids)
718 * If there ends up being 0 CPU cores leftover for SDMA
719 * engines, use the same CPU cores as general/control
722 if (cpumask_weight(&entry->def_intr.mask) == 0)
723 cpumask_copy(&entry->def_intr.mask,
724 &entry->general_intr_mask);
727 /* Determine completion vector CPUs for the entire node */
728 cpumask_and(&entry->comp_vect_mask,
729 &node_affinity.real_cpu_mask, local_mask);
730 cpumask_andnot(&entry->comp_vect_mask,
731 &entry->comp_vect_mask,
732 &entry->rcv_intr.mask);
733 cpumask_andnot(&entry->comp_vect_mask,
734 &entry->comp_vect_mask,
735 &entry->general_intr_mask);
738 * If there ends up being 0 CPU cores leftover for completion
739 * vectors, use the same CPU core as the general/control
742 if (cpumask_weight(&entry->comp_vect_mask) == 0)
743 cpumask_copy(&entry->comp_vect_mask,
744 &entry->general_intr_mask);
747 ret = _dev_comp_vect_cpu_mask_init(dd, entry, new_entry);
752 node_affinity_add_tail(entry);
754 mutex_unlock(&node_affinity.lock);
760 node_affinity_destroy(entry);
761 mutex_unlock(&node_affinity.lock);
765 void hfi1_dev_affinity_clean_up(struct hfi1_devdata *dd)
767 struct hfi1_affinity_node *entry;
772 mutex_lock(&node_affinity.lock);
773 entry = node_affinity_lookup(dd->node);
778 * Free device completion vector CPUs to be used by future
781 _dev_comp_vect_cpu_mask_clean_up(dd, entry);
783 mutex_unlock(&node_affinity.lock);
788 * Function updates the irq affinity hint for msix after it has been changed
789 * by the user using the /proc/irq interface. This function only accepts
790 * one cpu in the mask.
792 static void hfi1_update_sdma_affinity(struct hfi1_msix_entry *msix, int cpu)
794 struct sdma_engine *sde = msix->arg;
795 struct hfi1_devdata *dd = sde->dd;
796 struct hfi1_affinity_node *entry;
797 struct cpu_mask_set *set;
800 if (cpu > num_online_cpus() || cpu == sde->cpu)
803 mutex_lock(&node_affinity.lock);
804 entry = node_affinity_lookup(dd->node);
810 cpumask_clear(&msix->mask);
811 cpumask_set_cpu(cpu, &msix->mask);
812 dd_dev_dbg(dd, "IRQ: %u, type %s engine %u -> cpu: %d\n",
813 msix->irq, irq_type_names[msix->type],
815 irq_set_affinity_hint(msix->irq, &msix->mask);
818 * Set the new cpu in the hfi1_affinity_node and clean
819 * the old cpu if it is not used by any other IRQ
821 set = &entry->def_intr;
822 cpumask_set_cpu(cpu, &set->mask);
823 cpumask_set_cpu(cpu, &set->used);
824 for (i = 0; i < dd->num_msix_entries; i++) {
825 struct hfi1_msix_entry *other_msix;
827 other_msix = &dd->msix_entries[i];
828 if (other_msix->type != IRQ_SDMA || other_msix == msix)
831 if (cpumask_test_cpu(old_cpu, &other_msix->mask))
834 cpumask_clear_cpu(old_cpu, &set->mask);
835 cpumask_clear_cpu(old_cpu, &set->used);
837 mutex_unlock(&node_affinity.lock);
840 static void hfi1_irq_notifier_notify(struct irq_affinity_notify *notify,
841 const cpumask_t *mask)
843 int cpu = cpumask_first(mask);
844 struct hfi1_msix_entry *msix = container_of(notify,
845 struct hfi1_msix_entry,
848 /* Only one CPU configuration supported currently */
849 hfi1_update_sdma_affinity(msix, cpu);
852 static void hfi1_irq_notifier_release(struct kref *ref)
855 * This is required by affinity notifier. We don't have anything to
860 static void hfi1_setup_sdma_notifier(struct hfi1_msix_entry *msix)
862 struct irq_affinity_notify *notify = &msix->notify;
864 notify->irq = msix->irq;
865 notify->notify = hfi1_irq_notifier_notify;
866 notify->release = hfi1_irq_notifier_release;
868 if (irq_set_affinity_notifier(notify->irq, notify))
869 pr_err("Failed to register sdma irq affinity notifier for irq %d\n",
873 static void hfi1_cleanup_sdma_notifier(struct hfi1_msix_entry *msix)
875 struct irq_affinity_notify *notify = &msix->notify;
877 if (irq_set_affinity_notifier(notify->irq, NULL))
878 pr_err("Failed to cleanup sdma irq affinity notifier for irq %d\n",
883 * Function sets the irq affinity for msix.
884 * It *must* be called with node_affinity.lock held.
886 static int get_irq_affinity(struct hfi1_devdata *dd,
887 struct hfi1_msix_entry *msix)
890 struct hfi1_affinity_node *entry;
891 struct cpu_mask_set *set = NULL;
892 struct sdma_engine *sde = NULL;
893 struct hfi1_ctxtdata *rcd = NULL;
898 cpumask_clear(&msix->mask);
900 entry = node_affinity_lookup(dd->node);
902 switch (msix->type) {
904 sde = (struct sdma_engine *)msix->arg;
905 scnprintf(extra, 64, "engine %u", sde->this_idx);
906 set = &entry->def_intr;
909 cpu = cpumask_first(&entry->general_intr_mask);
912 rcd = (struct hfi1_ctxtdata *)msix->arg;
913 if (rcd->ctxt == HFI1_CTRL_CTXT)
914 cpu = cpumask_first(&entry->general_intr_mask);
916 set = &entry->rcv_intr;
917 scnprintf(extra, 64, "ctxt %u", rcd->ctxt);
920 dd_dev_err(dd, "Invalid IRQ type %d\n", msix->type);
925 * The general and control contexts are placed on a particular
926 * CPU, which is set above. Skip accounting for it. Everything else
927 * finds its CPU here.
929 if (cpu == -1 && set) {
930 if (!zalloc_cpumask_var(&diff, GFP_KERNEL))
933 cpu = cpu_mask_set_get_first(set, diff);
935 free_cpumask_var(diff);
936 dd_dev_err(dd, "Failure to obtain CPU for IRQ\n");
940 free_cpumask_var(diff);
943 cpumask_set_cpu(cpu, &msix->mask);
944 dd_dev_info(dd, "IRQ: %u, type %s %s -> cpu: %d\n",
945 msix->irq, irq_type_names[msix->type],
947 irq_set_affinity_hint(msix->irq, &msix->mask);
949 if (msix->type == IRQ_SDMA) {
951 hfi1_setup_sdma_notifier(msix);
957 int hfi1_get_irq_affinity(struct hfi1_devdata *dd, struct hfi1_msix_entry *msix)
961 mutex_lock(&node_affinity.lock);
962 ret = get_irq_affinity(dd, msix);
963 mutex_unlock(&node_affinity.lock);
967 void hfi1_put_irq_affinity(struct hfi1_devdata *dd,
968 struct hfi1_msix_entry *msix)
970 struct cpu_mask_set *set = NULL;
971 struct hfi1_ctxtdata *rcd;
972 struct hfi1_affinity_node *entry;
974 mutex_lock(&node_affinity.lock);
975 entry = node_affinity_lookup(dd->node);
977 switch (msix->type) {
979 set = &entry->def_intr;
980 hfi1_cleanup_sdma_notifier(msix);
983 /* Don't do accounting for general contexts */
986 rcd = (struct hfi1_ctxtdata *)msix->arg;
987 /* Don't do accounting for control contexts */
988 if (rcd->ctxt != HFI1_CTRL_CTXT)
989 set = &entry->rcv_intr;
992 mutex_unlock(&node_affinity.lock);
997 cpumask_andnot(&set->used, &set->used, &msix->mask);
998 _cpu_mask_set_gen_dec(set);
1001 irq_set_affinity_hint(msix->irq, NULL);
1002 cpumask_clear(&msix->mask);
1003 mutex_unlock(&node_affinity.lock);
1006 /* This should be called with node_affinity.lock held */
1007 static void find_hw_thread_mask(uint hw_thread_no, cpumask_var_t hw_thread_mask,
1008 struct hfi1_affinity_node_list *affinity)
1010 int possible, curr_cpu, i;
1011 uint num_cores_per_socket = node_affinity.num_online_cpus /
1012 affinity->num_core_siblings /
1013 node_affinity.num_online_nodes;
1015 cpumask_copy(hw_thread_mask, &affinity->proc.mask);
1016 if (affinity->num_core_siblings > 0) {
1017 /* Removing other siblings not needed for now */
1018 possible = cpumask_weight(hw_thread_mask);
1019 curr_cpu = cpumask_first(hw_thread_mask);
1021 i < num_cores_per_socket * node_affinity.num_online_nodes;
1023 curr_cpu = cpumask_next(curr_cpu, hw_thread_mask);
1025 for (; i < possible; i++) {
1026 cpumask_clear_cpu(curr_cpu, hw_thread_mask);
1027 curr_cpu = cpumask_next(curr_cpu, hw_thread_mask);
1030 /* Identifying correct HW threads within physical cores */
1031 cpumask_shift_left(hw_thread_mask, hw_thread_mask,
1032 num_cores_per_socket *
1033 node_affinity.num_online_nodes *
1038 int hfi1_get_proc_affinity(int node)
1040 int cpu = -1, ret, i;
1041 struct hfi1_affinity_node *entry;
1042 cpumask_var_t diff, hw_thread_mask, available_mask, intrs_mask;
1043 const struct cpumask *node_mask,
1044 *proc_mask = ¤t->cpus_allowed;
1045 struct hfi1_affinity_node_list *affinity = &node_affinity;
1046 struct cpu_mask_set *set = &affinity->proc;
1049 * check whether process/context affinity has already
1052 if (cpumask_weight(proc_mask) == 1) {
1053 hfi1_cdbg(PROC, "PID %u %s affinity set to CPU %*pbl",
1054 current->pid, current->comm,
1055 cpumask_pr_args(proc_mask));
1057 * Mark the pre-set CPU as used. This is atomic so we don't
1060 cpu = cpumask_first(proc_mask);
1061 cpumask_set_cpu(cpu, &set->used);
1063 } else if (cpumask_weight(proc_mask) < cpumask_weight(&set->mask)) {
1064 hfi1_cdbg(PROC, "PID %u %s affinity set to CPU set(s) %*pbl",
1065 current->pid, current->comm,
1066 cpumask_pr_args(proc_mask));
1071 * The process does not have a preset CPU affinity so find one to
1072 * recommend using the following algorithm:
1074 * For each user process that is opening a context on HFI Y:
1075 * a) If all cores are filled, reinitialize the bitmask
1076 * b) Fill real cores first, then HT cores (First set of HT
1077 * cores on all physical cores, then second set of HT core,
1078 * and, so on) in the following order:
1080 * 1. Same NUMA node as HFI Y and not running an IRQ
1082 * 2. Same NUMA node as HFI Y and running an IRQ handler
1083 * 3. Different NUMA node to HFI Y and not running an IRQ
1085 * 4. Different NUMA node to HFI Y and running an IRQ
1087 * c) Mark core as filled in the bitmask. As user processes are
1088 * done, clear cores from the bitmask.
1091 ret = zalloc_cpumask_var(&diff, GFP_KERNEL);
1094 ret = zalloc_cpumask_var(&hw_thread_mask, GFP_KERNEL);
1097 ret = zalloc_cpumask_var(&available_mask, GFP_KERNEL);
1099 goto free_hw_thread_mask;
1100 ret = zalloc_cpumask_var(&intrs_mask, GFP_KERNEL);
1102 goto free_available_mask;
1104 mutex_lock(&affinity->lock);
1106 * If we've used all available HW threads, clear the mask and start
1109 _cpu_mask_set_gen_inc(set);
1112 * If NUMA node has CPUs used by interrupt handlers, include them in the
1113 * interrupt handler mask.
1115 entry = node_affinity_lookup(node);
1117 cpumask_copy(intrs_mask, (entry->def_intr.gen ?
1118 &entry->def_intr.mask :
1119 &entry->def_intr.used));
1120 cpumask_or(intrs_mask, intrs_mask, (entry->rcv_intr.gen ?
1121 &entry->rcv_intr.mask :
1122 &entry->rcv_intr.used));
1123 cpumask_or(intrs_mask, intrs_mask, &entry->general_intr_mask);
1125 hfi1_cdbg(PROC, "CPUs used by interrupts: %*pbl",
1126 cpumask_pr_args(intrs_mask));
1128 cpumask_copy(hw_thread_mask, &set->mask);
1131 * If HT cores are enabled, identify which HW threads within the
1132 * physical cores should be used.
1134 if (affinity->num_core_siblings > 0) {
1135 for (i = 0; i < affinity->num_core_siblings; i++) {
1136 find_hw_thread_mask(i, hw_thread_mask, affinity);
1139 * If there's at least one available core for this HW
1140 * thread number, stop looking for a core.
1142 * diff will always be not empty at least once in this
1143 * loop as the used mask gets reset when
1144 * (set->mask == set->used) before this loop.
1146 cpumask_andnot(diff, hw_thread_mask, &set->used);
1147 if (!cpumask_empty(diff))
1151 hfi1_cdbg(PROC, "Same available HW thread on all physical CPUs: %*pbl",
1152 cpumask_pr_args(hw_thread_mask));
1154 node_mask = cpumask_of_node(node);
1155 hfi1_cdbg(PROC, "Device on NUMA %u, CPUs %*pbl", node,
1156 cpumask_pr_args(node_mask));
1158 /* Get cpumask of available CPUs on preferred NUMA */
1159 cpumask_and(available_mask, hw_thread_mask, node_mask);
1160 cpumask_andnot(available_mask, available_mask, &set->used);
1161 hfi1_cdbg(PROC, "Available CPUs on NUMA %u: %*pbl", node,
1162 cpumask_pr_args(available_mask));
1165 * At first, we don't want to place processes on the same
1166 * CPUs as interrupt handlers. Then, CPUs running interrupt
1167 * handlers are used.
1169 * 1) If diff is not empty, then there are CPUs not running
1170 * non-interrupt handlers available, so diff gets copied
1171 * over to available_mask.
1172 * 2) If diff is empty, then all CPUs not running interrupt
1173 * handlers are taken, so available_mask contains all
1174 * available CPUs running interrupt handlers.
1175 * 3) If available_mask is empty, then all CPUs on the
1176 * preferred NUMA node are taken, so other NUMA nodes are
1177 * used for process assignments using the same method as
1178 * the preferred NUMA node.
1180 cpumask_andnot(diff, available_mask, intrs_mask);
1181 if (!cpumask_empty(diff))
1182 cpumask_copy(available_mask, diff);
1184 /* If we don't have CPUs on the preferred node, use other NUMA nodes */
1185 if (cpumask_empty(available_mask)) {
1186 cpumask_andnot(available_mask, hw_thread_mask, &set->used);
1187 /* Excluding preferred NUMA cores */
1188 cpumask_andnot(available_mask, available_mask, node_mask);
1190 "Preferred NUMA node cores are taken, cores available in other NUMA nodes: %*pbl",
1191 cpumask_pr_args(available_mask));
1194 * At first, we don't want to place processes on the same
1195 * CPUs as interrupt handlers.
1197 cpumask_andnot(diff, available_mask, intrs_mask);
1198 if (!cpumask_empty(diff))
1199 cpumask_copy(available_mask, diff);
1201 hfi1_cdbg(PROC, "Possible CPUs for process: %*pbl",
1202 cpumask_pr_args(available_mask));
1204 cpu = cpumask_first(available_mask);
1205 if (cpu >= nr_cpu_ids) /* empty */
1208 cpumask_set_cpu(cpu, &set->used);
1210 mutex_unlock(&affinity->lock);
1211 hfi1_cdbg(PROC, "Process assigned to CPU %d", cpu);
1213 free_cpumask_var(intrs_mask);
1214 free_available_mask:
1215 free_cpumask_var(available_mask);
1216 free_hw_thread_mask:
1217 free_cpumask_var(hw_thread_mask);
1219 free_cpumask_var(diff);
1224 void hfi1_put_proc_affinity(int cpu)
1226 struct hfi1_affinity_node_list *affinity = &node_affinity;
1227 struct cpu_mask_set *set = &affinity->proc;
1232 mutex_lock(&affinity->lock);
1233 cpu_mask_set_put(set, cpu);
1234 hfi1_cdbg(PROC, "Returning CPU %d for future process assignment", cpu);
1235 mutex_unlock(&affinity->lock);