drivers/infiniband/hw/hns/hns_roce_main.c

   1 /*
   2  * Copyright (c) 2016 Hisilicon Limited.
   3  * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33 #include <linux/acpi.h>
  34 #include <linux/of_platform.h>
  35 #include <linux/module.h>
  36 #include <rdma/ib_addr.h>
  37 #include <rdma/ib_smi.h>
  38 #include <rdma/ib_user_verbs.h>
  39 #include <rdma/ib_cache.h>
  40 #include "hns_roce_common.h"
  41 #include "hns_roce_device.h"
  42 #include <rdma/hns-abi.h>
  43 #include "hns_roce_hem.h"
  44
  45 /**
  46  * hns_get_gid_index - Get gid index.
  47  * @hr_dev: pointer to structure hns_roce_dev.
  48  * @port:  port, value range: 0 ~ MAX
  49  * @gid_index:  gid_index, value range: 0 ~ MAX
  50  * Description:
  51  *    N ports shared gids, allocation method as follow:
  52  *              GID[0][0], GID[1][0],.....GID[N - 1][0],
  53  *              GID[0][0], GID[1][0],.....GID[N - 1][0],
  54  *              And so on
  55  */
  56 int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index)
  57 {
  58         return gid_index * hr_dev->caps.num_ports + port;
  59 }
  60 EXPORT_SYMBOL_GPL(hns_get_gid_index);
  61
  62 static int hns_roce_set_mac(struct hns_roce_dev *hr_dev, u8 port, u8 *addr)
  63 {
  64         u8 phy_port;
  65         u32 i = 0;
  66
  67         if (!memcmp(hr_dev->dev_addr[port], addr, MAC_ADDR_OCTET_NUM))
  68                 return 0;
  69
  70         for (i = 0; i < MAC_ADDR_OCTET_NUM; i++)
  71                 hr_dev->dev_addr[port][i] = addr[i];
  72
  73         phy_port = hr_dev->iboe.phy_port[port];
  74         return hr_dev->hw->set_mac(hr_dev, phy_port, addr);
  75 }
  76
  77 static int hns_roce_add_gid(const struct ib_gid_attr *attr, void **context)
  78 {
  79         struct hns_roce_dev *hr_dev = to_hr_dev(attr->device);
  80         u8 port = attr->port_num - 1;
  81         unsigned long flags;
  82         int ret;
  83
  84         if (port >= hr_dev->caps.num_ports)
  85                 return -EINVAL;
  86
  87         spin_lock_irqsave(&hr_dev->iboe.lock, flags);
  88
  89         ret = hr_dev->hw->set_gid(hr_dev, port, attr->index, &attr->gid, attr);
  90
  91         spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
  92
  93         return ret;
  94 }
  95
  96 static int hns_roce_del_gid(const struct ib_gid_attr *attr, void **context)
  97 {
  98         struct hns_roce_dev *hr_dev = to_hr_dev(attr->device);
  99         struct ib_gid_attr zattr = { };
 100         u8 port = attr->port_num - 1;
 101         unsigned long flags;
 102         int ret;
 103
 104         if (port >= hr_dev->caps.num_ports)
 105                 return -EINVAL;
 106
 107         spin_lock_irqsave(&hr_dev->iboe.lock, flags);
 108
 109         ret = hr_dev->hw->set_gid(hr_dev, port, attr->index, &zgid, &zattr);
 110
 111         spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
 112
 113         return ret;
 114 }
 115
 116 static int handle_en_event(struct hns_roce_dev *hr_dev, u8 port,
 117                            unsigned long event)
 118 {
 119         struct device *dev = hr_dev->dev;
 120         struct net_device *netdev;
 121         int ret = 0;
 122
 123         netdev = hr_dev->iboe.netdevs[port];
 124         if (!netdev) {
 125                 dev_err(dev, "port(%d) can't find netdev\n", port);
 126                 return -ENODEV;
 127         }
 128
 129         switch (event) {
 130         case NETDEV_UP:
 131         case NETDEV_CHANGE:
 132         case NETDEV_REGISTER:
 133         case NETDEV_CHANGEADDR:
 134                 ret = hns_roce_set_mac(hr_dev, port, netdev->dev_addr);
 135                 break;
 136         case NETDEV_DOWN:
 137                 /*
 138                  * In v1 engine, only support all ports closed together.
 139                  */
 140                 break;
 141         default:
 142                 dev_dbg(dev, "NETDEV event = 0x%x!\n", (u32)(event));
 143                 break;
 144         }
 145
 146         return ret;
 147 }
 148
 149 static int hns_roce_netdev_event(struct notifier_block *self,
 150                                  unsigned long event, void *ptr)
 151 {
 152         struct net_device *dev = netdev_notifier_info_to_dev(ptr);
 153         struct hns_roce_ib_iboe *iboe = NULL;
 154         struct hns_roce_dev *hr_dev = NULL;
 155         u8 port = 0;
 156         int ret = 0;
 157
 158         hr_dev = container_of(self, struct hns_roce_dev, iboe.nb);
 159         iboe = &hr_dev->iboe;
 160
 161         for (port = 0; port < hr_dev->caps.num_ports; port++) {
 162                 if (dev == iboe->netdevs[port]) {
 163                         ret = handle_en_event(hr_dev, port, event);
 164                         if (ret)
 165                                 return NOTIFY_DONE;
 166                         break;
 167                 }
 168         }
 169
 170         return NOTIFY_DONE;
 171 }
 172
 173 static int hns_roce_setup_mtu_mac(struct hns_roce_dev *hr_dev)
 174 {
 175         int ret;
 176         u8 i;
 177
 178         for (i = 0; i < hr_dev->caps.num_ports; i++) {
 179                 if (hr_dev->hw->set_mtu)
 180                         hr_dev->hw->set_mtu(hr_dev, hr_dev->iboe.phy_port[i],
 181                                             hr_dev->caps.max_mtu);
 182                 ret = hns_roce_set_mac(hr_dev, i,
 183                                        hr_dev->iboe.netdevs[i]->dev_addr);
 184                 if (ret)
 185                         return ret;
 186         }
 187
 188         return 0;
 189 }
 190
 191 static int hns_roce_query_device(struct ib_device *ib_dev,
 192                                  struct ib_device_attr *props,
 193                                  struct ib_udata *uhw)
 194 {
 195         struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
 196
 197         memset(props, 0, sizeof(*props));
 198
 199         props->sys_image_guid = cpu_to_be64(hr_dev->sys_image_guid);
 200         props->max_mr_size = (u64)(~(0ULL));
 201         props->page_size_cap = hr_dev->caps.page_size_cap;
 202         props->vendor_id = hr_dev->vendor_id;
 203         props->vendor_part_id = hr_dev->vendor_part_id;
 204         props->hw_ver = hr_dev->hw_rev;
 205         props->max_qp = hr_dev->caps.num_qps;
 206         props->max_qp_wr = hr_dev->caps.max_wqes;
 207         props->device_cap_flags = IB_DEVICE_PORT_ACTIVE_EVENT |
 208                                   IB_DEVICE_RC_RNR_NAK_GEN;
 209         props->max_send_sge = hr_dev->caps.max_sq_sg;
 210         props->max_recv_sge = hr_dev->caps.max_rq_sg;
 211         props->max_sge_rd = 1;
 212         props->max_cq = hr_dev->caps.num_cqs;
 213         props->max_cqe = hr_dev->caps.max_cqes;
 214         props->max_mr = hr_dev->caps.num_mtpts;
 215         props->max_pd = hr_dev->caps.num_pds;
 216         props->max_qp_rd_atom = hr_dev->caps.max_qp_dest_rdma;
 217         props->max_qp_init_rd_atom = hr_dev->caps.max_qp_init_rdma;
 218         props->atomic_cap = IB_ATOMIC_NONE;
 219         props->max_pkeys = 1;
 220         props->local_ca_ack_delay = hr_dev->caps.local_ca_ack_delay;
 221
 222         return 0;
 223 }
 224
 225 static struct net_device *hns_roce_get_netdev(struct ib_device *ib_dev,
 226                                               u8 port_num)
 227 {
 228         struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
 229         struct net_device *ndev;
 230
 231         if (port_num < 1 || port_num > hr_dev->caps.num_ports)
 232                 return NULL;
 233
 234         rcu_read_lock();
 235
 236         ndev = hr_dev->iboe.netdevs[port_num - 1];
 237         if (ndev)
 238                 dev_hold(ndev);
 239
 240         rcu_read_unlock();
 241         return ndev;
 242 }
 243
 244 static int hns_roce_query_port(struct ib_device *ib_dev, u8 port_num,
 245                                struct ib_port_attr *props)
 246 {
 247         struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
 248         struct device *dev = hr_dev->dev;
 249         struct net_device *net_dev;
 250         unsigned long flags;
 251         enum ib_mtu mtu;
 252         u8 port;
 253
 254         assert(port_num > 0);
 255         port = port_num - 1;
 256
 257         /* props being zeroed by the caller, avoid zeroing it here */
 258
 259         props->max_mtu = hr_dev->caps.max_mtu;
 260         props->gid_tbl_len = hr_dev->caps.gid_table_len[port];
 261         props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
 262                                 IB_PORT_VENDOR_CLASS_SUP |
 263                                 IB_PORT_BOOT_MGMT_SUP;
 264         props->max_msg_sz = HNS_ROCE_MAX_MSG_LEN;
 265         props->pkey_tbl_len = 1;
 266         props->active_width = IB_WIDTH_4X;
 267         props->active_speed = 1;
 268
 269         spin_lock_irqsave(&hr_dev->iboe.lock, flags);
 270
 271         net_dev = hr_dev->iboe.netdevs[port];
 272         if (!net_dev) {
 273                 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
 274                 dev_err(dev, "find netdev %d failed!\r\n", port);
 275                 return -EINVAL;
 276         }
 277
 278         mtu = iboe_get_mtu(net_dev->mtu);
 279         props->active_mtu = mtu ? min(props->max_mtu, mtu) : IB_MTU_256;
 280         props->state = (netif_running(net_dev) && netif_carrier_ok(net_dev)) ?
 281                         IB_PORT_ACTIVE : IB_PORT_DOWN;
 282         props->phys_state = (props->state == IB_PORT_ACTIVE) ? 5 : 3;
 283
 284         spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
 285
 286         return 0;
 287 }
 288
 289 static enum rdma_link_layer hns_roce_get_link_layer(struct ib_device *device,
 290                                                     u8 port_num)
 291 {
 292         return IB_LINK_LAYER_ETHERNET;
 293 }
 294
 295 static int hns_roce_query_pkey(struct ib_device *ib_dev, u8 port, u16 index,
 296                                u16 *pkey)
 297 {
 298         if (index > 0)
 299                 return -EINVAL;
 300
 301         *pkey = PKEY_ID;
 302
 303         return 0;
 304 }
 305
 306 static int hns_roce_modify_device(struct ib_device *ib_dev, int mask,
 307                                   struct ib_device_modify *props)
 308 {
 309         unsigned long flags;
 310
 311         if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
 312                 return -EOPNOTSUPP;
 313
 314         if (mask & IB_DEVICE_MODIFY_NODE_DESC) {
 315                 spin_lock_irqsave(&to_hr_dev(ib_dev)->sm_lock, flags);
 316                 memcpy(ib_dev->node_desc, props->node_desc, NODE_DESC_SIZE);
 317                 spin_unlock_irqrestore(&to_hr_dev(ib_dev)->sm_lock, flags);
 318         }
 319
 320         return 0;
 321 }
 322
 323 static int hns_roce_modify_port(struct ib_device *ib_dev, u8 port_num, int mask,
 324                                 struct ib_port_modify *props)
 325 {
 326         return 0;
 327 }
 328
 329 static struct ib_ucontext *hns_roce_alloc_ucontext(struct ib_device *ib_dev,
 330                                                    struct ib_udata *udata)
 331 {
 332         int ret = 0;
 333         struct hns_roce_ucontext *context;
 334         struct hns_roce_ib_alloc_ucontext_resp resp = {};
 335         struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
 336
 337         if (!hr_dev->active)
 338                 return ERR_PTR(-EAGAIN);
 339
 340         resp.qp_tab_size = hr_dev->caps.num_qps;
 341
 342         context = kmalloc(sizeof(*context), GFP_KERNEL);
 343         if (!context)
 344                 return ERR_PTR(-ENOMEM);
 345
 346         ret = hns_roce_uar_alloc(hr_dev, &context->uar);
 347         if (ret)
 348                 goto error_fail_uar_alloc;
 349
 350         INIT_LIST_HEAD(&context->vma_list);
 351         mutex_init(&context->vma_list_mutex);
 352         if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB) {
 353                 INIT_LIST_HEAD(&context->page_list);
 354                 mutex_init(&context->page_mutex);
 355         }
 356
 357         ret = ib_copy_to_udata(udata, &resp, sizeof(resp));
 358         if (ret)
 359                 goto error_fail_copy_to_udata;
 360
 361         return &context->ibucontext;
 362
 363 error_fail_copy_to_udata:
 364         hns_roce_uar_free(hr_dev, &context->uar);
 365
 366 error_fail_uar_alloc:
 367         kfree(context);
 368
 369         return ERR_PTR(ret);
 370 }
 371
 372 static int hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext)
 373 {
 374         struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext);
 375
 376         hns_roce_uar_free(to_hr_dev(ibcontext->device), &context->uar);
 377         kfree(context);
 378
 379         return 0;
 380 }
 381
 382 static void hns_roce_vma_open(struct vm_area_struct *vma)
 383 {
 384         vma->vm_ops = NULL;
 385 }
 386
 387 static void hns_roce_vma_close(struct vm_area_struct *vma)
 388 {
 389         struct hns_roce_vma_data *vma_data;
 390
 391         vma_data = (struct hns_roce_vma_data *)vma->vm_private_data;
 392         vma_data->vma = NULL;
 393         mutex_lock(vma_data->vma_list_mutex);
 394         list_del(&vma_data->list);
 395         mutex_unlock(vma_data->vma_list_mutex);
 396         kfree(vma_data);
 397 }
 398
 399 static const struct vm_operations_struct hns_roce_vm_ops = {
 400         .open = hns_roce_vma_open,
 401         .close = hns_roce_vma_close,
 402 };
 403
 404 static int hns_roce_set_vma_data(struct vm_area_struct *vma,
 405                                  struct hns_roce_ucontext *context)
 406 {
 407         struct list_head *vma_head = &context->vma_list;
 408         struct hns_roce_vma_data *vma_data;
 409
 410         vma_data = kzalloc(sizeof(*vma_data), GFP_KERNEL);
 411         if (!vma_data)
 412                 return -ENOMEM;
 413
 414         vma_data->vma = vma;
 415         vma_data->vma_list_mutex = &context->vma_list_mutex;
 416         vma->vm_private_data = vma_data;
 417         vma->vm_ops = &hns_roce_vm_ops;
 418
 419         mutex_lock(&context->vma_list_mutex);
 420         list_add(&vma_data->list, vma_head);
 421         mutex_unlock(&context->vma_list_mutex);
 422
 423         return 0;
 424 }
 425
 426 static int hns_roce_mmap(struct ib_ucontext *context,
 427                          struct vm_area_struct *vma)
 428 {
 429         struct hns_roce_dev *hr_dev = to_hr_dev(context->device);
 430
 431         if (((vma->vm_end - vma->vm_start) % PAGE_SIZE) != 0)
 432                 return -EINVAL;
 433
 434         if (vma->vm_pgoff == 0) {
 435                 vma->vm_page_prot = pgprot_device(vma->vm_page_prot);
 436                 if (io_remap_pfn_range(vma, vma->vm_start,
 437                                        to_hr_ucontext(context)->uar.pfn,
 438                                        PAGE_SIZE, vma->vm_page_prot))
 439                         return -EAGAIN;
 440         } else if (vma->vm_pgoff == 1 && hr_dev->tptr_dma_addr &&
 441                    hr_dev->tptr_size) {
 442                 /* vm_pgoff: 1 -- TPTR */
 443                 if (io_remap_pfn_range(vma, vma->vm_start,
 444                                        hr_dev->tptr_dma_addr >> PAGE_SHIFT,
 445                                        hr_dev->tptr_size,
 446                                        vma->vm_page_prot))
 447                         return -EAGAIN;
 448         } else
 449                 return -EINVAL;
 450
 451         return hns_roce_set_vma_data(vma, to_hr_ucontext(context));
 452 }
 453
 454 static int hns_roce_port_immutable(struct ib_device *ib_dev, u8 port_num,
 455                                    struct ib_port_immutable *immutable)
 456 {
 457         struct ib_port_attr attr;
 458         int ret;
 459
 460         ret = ib_query_port(ib_dev, port_num, &attr);
 461         if (ret)
 462                 return ret;
 463
 464         immutable->pkey_tbl_len = attr.pkey_tbl_len;
 465         immutable->gid_tbl_len = attr.gid_tbl_len;
 466
 467         immutable->max_mad_size = IB_MGMT_MAD_SIZE;
 468         immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
 469         if (to_hr_dev(ib_dev)->caps.flags & HNS_ROCE_CAP_FLAG_ROCE_V1_V2)
 470                 immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
 471
 472         return 0;
 473 }
 474
 475 static void hns_roce_disassociate_ucontext(struct ib_ucontext *ibcontext)
 476 {
 477         struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext);
 478         struct hns_roce_vma_data *vma_data, *n;
 479         struct vm_area_struct *vma;
 480
 481         mutex_lock(&context->vma_list_mutex);
 482         list_for_each_entry_safe(vma_data, n, &context->vma_list, list) {
 483                 vma = vma_data->vma;
 484                 zap_vma_ptes(vma, vma->vm_start, PAGE_SIZE);
 485
 486                 vma->vm_flags &= ~(VM_SHARED | VM_MAYSHARE);
 487                 vma->vm_ops = NULL;
 488                 list_del(&vma_data->list);
 489                 kfree(vma_data);
 490         }
 491         mutex_unlock(&context->vma_list_mutex);
 492 }
 493
 494 static void hns_roce_unregister_device(struct hns_roce_dev *hr_dev)
 495 {
 496         struct hns_roce_ib_iboe *iboe = &hr_dev->iboe;
 497
 498         hr_dev->active = false;
 499         unregister_netdevice_notifier(&iboe->nb);
 500         ib_unregister_device(&hr_dev->ib_dev);
 501 }
 502
 503 static int hns_roce_register_device(struct hns_roce_dev *hr_dev)
 504 {
 505         int ret;
 506         struct hns_roce_ib_iboe *iboe = NULL;
 507         struct ib_device *ib_dev = NULL;
 508         struct device *dev = hr_dev->dev;
 509
 510         iboe = &hr_dev->iboe;
 511         spin_lock_init(&iboe->lock);
 512
 513         ib_dev = &hr_dev->ib_dev;
 514         strlcpy(ib_dev->name, "hns_%d", IB_DEVICE_NAME_MAX);
 515
 516         ib_dev->owner                   = THIS_MODULE;
 517         ib_dev->node_type               = RDMA_NODE_IB_CA;
 518         ib_dev->dev.parent              = dev;
 519
 520         ib_dev->phys_port_cnt           = hr_dev->caps.num_ports;
 521         ib_dev->local_dma_lkey          = hr_dev->caps.reserved_lkey;
 522         ib_dev->num_comp_vectors        = hr_dev->caps.num_comp_vectors;
 523         ib_dev->uverbs_abi_ver          = 1;
 524         ib_dev->uverbs_cmd_mask         =
 525                 (1ULL << IB_USER_VERBS_CMD_GET_CONTEXT) |
 526                 (1ULL << IB_USER_VERBS_CMD_QUERY_DEVICE) |
 527                 (1ULL << IB_USER_VERBS_CMD_QUERY_PORT) |
 528                 (1ULL << IB_USER_VERBS_CMD_ALLOC_PD) |
 529                 (1ULL << IB_USER_VERBS_CMD_DEALLOC_PD) |
 530                 (1ULL << IB_USER_VERBS_CMD_REG_MR) |
 531                 (1ULL << IB_USER_VERBS_CMD_DEREG_MR) |
 532                 (1ULL << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
 533                 (1ULL << IB_USER_VERBS_CMD_CREATE_CQ) |
 534                 (1ULL << IB_USER_VERBS_CMD_DESTROY_CQ) |
 535                 (1ULL << IB_USER_VERBS_CMD_CREATE_QP) |
 536                 (1ULL << IB_USER_VERBS_CMD_MODIFY_QP) |
 537                 (1ULL << IB_USER_VERBS_CMD_QUERY_QP) |
 538                 (1ULL << IB_USER_VERBS_CMD_DESTROY_QP);
 539
 540         ib_dev->uverbs_ex_cmd_mask |=
 541                 (1ULL << IB_USER_VERBS_EX_CMD_MODIFY_CQ);
 542
 543         /* HCA||device||port */
 544         ib_dev->modify_device           = hns_roce_modify_device;
 545         ib_dev->query_device            = hns_roce_query_device;
 546         ib_dev->query_port              = hns_roce_query_port;
 547         ib_dev->modify_port             = hns_roce_modify_port;
 548         ib_dev->get_link_layer          = hns_roce_get_link_layer;
 549         ib_dev->get_netdev              = hns_roce_get_netdev;
 550         ib_dev->add_gid                 = hns_roce_add_gid;
 551         ib_dev->del_gid                 = hns_roce_del_gid;
 552         ib_dev->query_pkey              = hns_roce_query_pkey;
 553         ib_dev->alloc_ucontext          = hns_roce_alloc_ucontext;
 554         ib_dev->dealloc_ucontext        = hns_roce_dealloc_ucontext;
 555         ib_dev->mmap                    = hns_roce_mmap;
 556
 557         /* PD */
 558         ib_dev->alloc_pd                = hns_roce_alloc_pd;
 559         ib_dev->dealloc_pd              = hns_roce_dealloc_pd;
 560
 561         /* AH */
 562         ib_dev->create_ah               = hns_roce_create_ah;
 563         ib_dev->query_ah                = hns_roce_query_ah;
 564         ib_dev->destroy_ah              = hns_roce_destroy_ah;
 565
 566         /* QP */
 567         ib_dev->create_qp               = hns_roce_create_qp;
 568         ib_dev->modify_qp               = hns_roce_modify_qp;
 569         ib_dev->query_qp                = hr_dev->hw->query_qp;
 570         ib_dev->destroy_qp              = hr_dev->hw->destroy_qp;
 571         ib_dev->post_send               = hr_dev->hw->post_send;
 572         ib_dev->post_recv               = hr_dev->hw->post_recv;
 573
 574         /* CQ */
 575         ib_dev->create_cq               = hns_roce_ib_create_cq;
 576         ib_dev->modify_cq               = hr_dev->hw->modify_cq;
 577         ib_dev->destroy_cq              = hns_roce_ib_destroy_cq;
 578         ib_dev->req_notify_cq           = hr_dev->hw->req_notify_cq;
 579         ib_dev->poll_cq                 = hr_dev->hw->poll_cq;
 580
 581         /* MR */
 582         ib_dev->get_dma_mr              = hns_roce_get_dma_mr;
 583         ib_dev->reg_user_mr             = hns_roce_reg_user_mr;
 584         ib_dev->dereg_mr                = hns_roce_dereg_mr;
 585         if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_REREG_MR) {
 586                 ib_dev->rereg_user_mr   = hns_roce_rereg_user_mr;
 587                 ib_dev->uverbs_cmd_mask |= (1ULL << IB_USER_VERBS_CMD_REREG_MR);
 588         }
 589
 590         /* OTHERS */
 591         ib_dev->get_port_immutable      = hns_roce_port_immutable;
 592         ib_dev->disassociate_ucontext   = hns_roce_disassociate_ucontext;
 593
 594         ib_dev->driver_id = RDMA_DRIVER_HNS;
 595         ret = ib_register_device(ib_dev, NULL);
 596         if (ret) {
 597                 dev_err(dev, "ib_register_device failed!\n");
 598                 return ret;
 599         }
 600
 601         ret = hns_roce_setup_mtu_mac(hr_dev);
 602         if (ret) {
 603                 dev_err(dev, "setup_mtu_mac failed!\n");
 604                 goto error_failed_setup_mtu_mac;
 605         }
 606
 607         iboe->nb.notifier_call = hns_roce_netdev_event;
 608         ret = register_netdevice_notifier(&iboe->nb);
 609         if (ret) {
 610                 dev_err(dev, "register_netdevice_notifier failed!\n");
 611                 goto error_failed_setup_mtu_mac;
 612         }
 613
 614         hr_dev->active = true;
 615         return 0;
 616
 617 error_failed_setup_mtu_mac:
 618         ib_unregister_device(ib_dev);
 619
 620         return ret;
 621 }
 622
 623 static int hns_roce_init_hem(struct hns_roce_dev *hr_dev)
 624 {
 625         int ret;
 626         struct device *dev = hr_dev->dev;
 627
 628         ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtt_table,
 629                                       HEM_TYPE_MTT, hr_dev->caps.mtt_entry_sz,
 630                                       hr_dev->caps.num_mtt_segs, 1);
 631         if (ret) {
 632                 dev_err(dev, "Failed to init MTT context memory, aborting.\n");
 633                 return ret;
 634         }
 635
 636         if (hns_roce_check_whether_mhop(hr_dev, HEM_TYPE_CQE)) {
 637                 ret = hns_roce_init_hem_table(hr_dev,
 638                                       &hr_dev->mr_table.mtt_cqe_table,
 639                                       HEM_TYPE_CQE, hr_dev->caps.mtt_entry_sz,
 640                                       hr_dev->caps.num_cqe_segs, 1);
 641                 if (ret) {
 642                         dev_err(dev, "Failed to init MTT CQE context memory, aborting.\n");
 643                         goto err_unmap_cqe;
 644                 }
 645         }
 646
 647         ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table,
 648                                       HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz,
 649                                       hr_dev->caps.num_mtpts, 1);
 650         if (ret) {
 651                 dev_err(dev, "Failed to init MTPT context memory, aborting.\n");
 652                 goto err_unmap_mtt;
 653         }
 654
 655         ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.qp_table,
 656                                       HEM_TYPE_QPC, hr_dev->caps.qpc_entry_sz,
 657                                       hr_dev->caps.num_qps, 1);
 658         if (ret) {
 659                 dev_err(dev, "Failed to init QP context memory, aborting.\n");
 660                 goto err_unmap_dmpt;
 661         }
 662
 663         ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.irrl_table,
 664                                       HEM_TYPE_IRRL,
 665                                       hr_dev->caps.irrl_entry_sz *
 666                                       hr_dev->caps.max_qp_init_rdma,
 667                                       hr_dev->caps.num_qps, 1);
 668         if (ret) {
 669                 dev_err(dev, "Failed to init irrl_table memory, aborting.\n");
 670                 goto err_unmap_qp;
 671         }
 672
 673         if (hr_dev->caps.trrl_entry_sz) {
 674                 ret = hns_roce_init_hem_table(hr_dev,
 675                                               &hr_dev->qp_table.trrl_table,
 676                                               HEM_TYPE_TRRL,
 677                                               hr_dev->caps.trrl_entry_sz *
 678                                               hr_dev->caps.max_qp_dest_rdma,
 679                                               hr_dev->caps.num_qps, 1);
 680                 if (ret) {
 681                         dev_err(dev,
 682                                "Failed to init trrl_table memory, aborting.\n");
 683                         goto err_unmap_irrl;
 684                 }
 685         }
 686
 687         ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cq_table.table,
 688                                       HEM_TYPE_CQC, hr_dev->caps.cqc_entry_sz,
 689                                       hr_dev->caps.num_cqs, 1);
 690         if (ret) {
 691                 dev_err(dev, "Failed to init CQ context memory, aborting.\n");
 692                 goto err_unmap_trrl;
 693         }
 694
 695         return 0;
 696
 697 err_unmap_trrl:
 698         if (hr_dev->caps.trrl_entry_sz)
 699                 hns_roce_cleanup_hem_table(hr_dev,
 700                                            &hr_dev->qp_table.trrl_table);
 701
 702 err_unmap_irrl:
 703         hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table);
 704
 705 err_unmap_qp:
 706         hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table);
 707
 708 err_unmap_dmpt:
 709         hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table);
 710
 711 err_unmap_mtt:
 712         if (hns_roce_check_whether_mhop(hr_dev, HEM_TYPE_CQE))
 713                 hns_roce_cleanup_hem_table(hr_dev,
 714                                            &hr_dev->mr_table.mtt_cqe_table);
 715
 716 err_unmap_cqe:
 717         hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table);
 718
 719         return ret;
 720 }
 721
 722 /**
 723  * hns_roce_setup_hca - setup host channel adapter
 724  * @hr_dev: pointer to hns roce device
 725  * Return : int
 726  */
 727 static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev)
 728 {
 729         int ret;
 730         struct device *dev = hr_dev->dev;
 731
 732         spin_lock_init(&hr_dev->sm_lock);
 733         spin_lock_init(&hr_dev->bt_cmd_lock);
 734
 735         if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB) {
 736                 INIT_LIST_HEAD(&hr_dev->pgdir_list);
 737                 mutex_init(&hr_dev->pgdir_mutex);
 738         }
 739
 740         ret = hns_roce_init_uar_table(hr_dev);
 741         if (ret) {
 742                 dev_err(dev, "Failed to initialize uar table. aborting\n");
 743                 return ret;
 744         }
 745
 746         ret = hns_roce_uar_alloc(hr_dev, &hr_dev->priv_uar);
 747         if (ret) {
 748                 dev_err(dev, "Failed to allocate priv_uar.\n");
 749                 goto err_uar_table_free;
 750         }
 751
 752         ret = hns_roce_init_pd_table(hr_dev);
 753         if (ret) {
 754                 dev_err(dev, "Failed to init protected domain table.\n");
 755                 goto err_uar_alloc_free;
 756         }
 757
 758         ret = hns_roce_init_mr_table(hr_dev);
 759         if (ret) {
 760                 dev_err(dev, "Failed to init memory region table.\n");
 761                 goto err_pd_table_free;
 762         }
 763
 764         ret = hns_roce_init_cq_table(hr_dev);
 765         if (ret) {
 766                 dev_err(dev, "Failed to init completion queue table.\n");
 767                 goto err_mr_table_free;
 768         }
 769
 770         ret = hns_roce_init_qp_table(hr_dev);
 771         if (ret) {
 772                 dev_err(dev, "Failed to init queue pair table.\n");
 773                 goto err_cq_table_free;
 774         }
 775
 776         return 0;
 777
 778 err_cq_table_free:
 779         hns_roce_cleanup_cq_table(hr_dev);
 780
 781 err_mr_table_free:
 782         hns_roce_cleanup_mr_table(hr_dev);
 783
 784 err_pd_table_free:
 785         hns_roce_cleanup_pd_table(hr_dev);
 786
 787 err_uar_alloc_free:
 788         hns_roce_uar_free(hr_dev, &hr_dev->priv_uar);
 789
 790 err_uar_table_free:
 791         hns_roce_cleanup_uar_table(hr_dev);
 792         return ret;
 793 }
 794
 795 int hns_roce_init(struct hns_roce_dev *hr_dev)
 796 {
 797         int ret;
 798         struct device *dev = hr_dev->dev;
 799
 800         if (hr_dev->hw->reset) {
 801                 ret = hr_dev->hw->reset(hr_dev, true);
 802                 if (ret) {
 803                         dev_err(dev, "Reset RoCE engine failed!\n");
 804                         return ret;
 805                 }
 806         }
 807         hr_dev->is_reset = false;
 808
 809         if (hr_dev->hw->cmq_init) {
 810                 ret = hr_dev->hw->cmq_init(hr_dev);
 811                 if (ret) {
 812                         dev_err(dev, "Init RoCE Command Queue failed!\n");
 813                         goto error_failed_cmq_init;
 814                 }
 815         }
 816
 817         ret = hr_dev->hw->hw_profile(hr_dev);
 818         if (ret) {
 819                 dev_err(dev, "Get RoCE engine profile failed!\n");
 820                 goto error_failed_cmd_init;
 821         }
 822
 823         ret = hns_roce_cmd_init(hr_dev);
 824         if (ret) {
 825                 dev_err(dev, "cmd init failed!\n");
 826                 goto error_failed_cmd_init;
 827         }
 828
 829         ret = hr_dev->hw->init_eq(hr_dev);
 830         if (ret) {
 831                 dev_err(dev, "eq init failed!\n");
 832                 goto error_failed_eq_table;
 833         }
 834
 835         if (hr_dev->cmd_mod) {
 836                 ret = hns_roce_cmd_use_events(hr_dev);
 837                 if (ret) {
 838                         dev_err(dev, "Switch to event-driven cmd failed!\n");
 839                         goto error_failed_use_event;
 840                 }
 841         }
 842
 843         ret = hns_roce_init_hem(hr_dev);
 844         if (ret) {
 845                 dev_err(dev, "init HEM(Hardware Entry Memory) failed!\n");
 846                 goto error_failed_init_hem;
 847         }
 848
 849         ret = hns_roce_setup_hca(hr_dev);
 850         if (ret) {
 851                 dev_err(dev, "setup hca failed!\n");
 852                 goto error_failed_setup_hca;
 853         }
 854
 855         if (hr_dev->hw->hw_init) {
 856                 ret = hr_dev->hw->hw_init(hr_dev);
 857                 if (ret) {
 858                         dev_err(dev, "hw_init failed!\n");
 859                         goto error_failed_engine_init;
 860                 }
 861         }
 862
 863         ret = hns_roce_register_device(hr_dev);
 864         if (ret)
 865                 goto error_failed_register_device;
 866
 867         return 0;
 868
 869 error_failed_register_device:
 870         if (hr_dev->hw->hw_exit)
 871                 hr_dev->hw->hw_exit(hr_dev);
 872
 873 error_failed_engine_init:
 874         hns_roce_cleanup_bitmap(hr_dev);
 875
 876 error_failed_setup_hca:
 877         hns_roce_cleanup_hem(hr_dev);
 878
 879 error_failed_init_hem:
 880         if (hr_dev->cmd_mod)
 881                 hns_roce_cmd_use_polling(hr_dev);
 882
 883 error_failed_use_event:
 884         hr_dev->hw->cleanup_eq(hr_dev);
 885
 886 error_failed_eq_table:
 887         hns_roce_cmd_cleanup(hr_dev);
 888
 889 error_failed_cmd_init:
 890         if (hr_dev->hw->cmq_exit)
 891                 hr_dev->hw->cmq_exit(hr_dev);
 892
 893 error_failed_cmq_init:
 894         if (hr_dev->hw->reset) {
 895                 if (hr_dev->hw->reset(hr_dev, false))
 896                         dev_err(dev, "Dereset RoCE engine failed!\n");
 897         }
 898
 899         return ret;
 900 }
 901 EXPORT_SYMBOL_GPL(hns_roce_init);
 902
 903 void hns_roce_exit(struct hns_roce_dev *hr_dev)
 904 {
 905         hns_roce_unregister_device(hr_dev);
 906
 907         if (hr_dev->hw->hw_exit)
 908                 hr_dev->hw->hw_exit(hr_dev);
 909         hns_roce_cleanup_bitmap(hr_dev);
 910         hns_roce_cleanup_hem(hr_dev);
 911
 912         if (hr_dev->cmd_mod)
 913                 hns_roce_cmd_use_polling(hr_dev);
 914
 915         hr_dev->hw->cleanup_eq(hr_dev);
 916         hns_roce_cmd_cleanup(hr_dev);
 917         if (hr_dev->hw->cmq_exit)
 918                 hr_dev->hw->cmq_exit(hr_dev);
 919         if (hr_dev->hw->reset)
 920                 hr_dev->hw->reset(hr_dev, false);
 921 }
 922 EXPORT_SYMBOL_GPL(hns_roce_exit);
 923
 924 MODULE_LICENSE("Dual BSD/GPL");
 925 MODULE_AUTHOR("Wei Hu <xavier.huwei@huawei.com>");
 926 MODULE_AUTHOR("Nenglong Zhao <zhaonenglong@hisilicon.com>");
 927 MODULE_AUTHOR("Lijun Ou <oulijun@huawei.com>");
 928 MODULE_DESCRIPTION("HNS RoCE Driver");