drivers/infiniband/hw/i40iw/i40iw_verbs.c

   1 /*******************************************************************************
   2 *
   3 * Copyright (c) 2015-2016 Intel Corporation.  All rights reserved.
   4 *
   5 * This software is available to you under a choice of one of two
   6 * licenses.  You may choose to be licensed under the terms of the GNU
   7 * General Public License (GPL) Version 2, available from the file
   8 * COPYING in the main directory of this source tree, or the
   9 * OpenFabrics.org BSD license below:
  10 *
  11 *   Redistribution and use in source and binary forms, with or
  12 *   without modification, are permitted provided that the following
  13 *   conditions are met:
  14 *
  15 *    - Redistributions of source code must retain the above
  16 *       copyright notice, this list of conditions and the following
  17 *       disclaimer.
  18 *
  19 *    - Redistributions in binary form must reproduce the above
  20 *       copyright notice, this list of conditions and the following
  21 *       disclaimer in the documentation and/or other materials
  22 *       provided with the distribution.
  23 *
  24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31 * SOFTWARE.
  32 *
  33 *******************************************************************************/
  34
  35 #include <linux/module.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/random.h>
  38 #include <linux/highmem.h>
  39 #include <linux/time.h>
  40 #include <linux/hugetlb.h>
  41 #include <linux/irq.h>
  42 #include <asm/byteorder.h>
  43 #include <net/ip.h>
  44 #include <rdma/ib_verbs.h>
  45 #include <rdma/iw_cm.h>
  46 #include <rdma/ib_user_verbs.h>
  47 #include <rdma/ib_umem.h>
  48 #include "i40iw.h"
  49
  50 /**
  51  * i40iw_query_device - get device attributes
  52  * @ibdev: device pointer from stack
  53  * @props: returning device attributes
  54  * @udata: user data
  55  */
  56 static int i40iw_query_device(struct ib_device *ibdev,
  57                               struct ib_device_attr *props,
  58                               struct ib_udata *udata)
  59 {
  60         struct i40iw_device *iwdev = to_iwdev(ibdev);
  61
  62         if (udata->inlen || udata->outlen)
  63                 return -EINVAL;
  64         memset(props, 0, sizeof(*props));
  65         ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
  66         props->fw_ver = I40IW_FW_VERSION;
  67         props->device_cap_flags = iwdev->device_cap_flags;
  68         props->vendor_id = iwdev->ldev->pcidev->vendor;
  69         props->vendor_part_id = iwdev->ldev->pcidev->device;
  70         props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
  71         props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
  72         props->max_qp = iwdev->max_qp - iwdev->used_qps;
  73         props->max_qp_wr = I40IW_MAX_QP_WRS;
  74         props->max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  75         props->max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  76         props->max_cq = iwdev->max_cq - iwdev->used_cqs;
  77         props->max_cqe = iwdev->max_cqe;
  78         props->max_mr = iwdev->max_mr - iwdev->used_mrs;
  79         props->max_pd = iwdev->max_pd - iwdev->used_pds;
  80         props->max_sge_rd = I40IW_MAX_SGE_RD;
  81         props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
  82         props->max_qp_init_rd_atom = props->max_qp_rd_atom;
  83         props->atomic_cap = IB_ATOMIC_NONE;
  84         props->max_map_per_fmr = 1;
  85         props->max_fast_reg_page_list_len = I40IW_MAX_PAGES_PER_FMR;
  86         return 0;
  87 }
  88
  89 /**
  90  * i40iw_query_port - get port attrubutes
  91  * @ibdev: device pointer from stack
  92  * @port: port number for query
  93  * @props: returning device attributes
  94  */
  95 static int i40iw_query_port(struct ib_device *ibdev,
  96                             u8 port,
  97                             struct ib_port_attr *props)
  98 {
  99         struct i40iw_device *iwdev = to_iwdev(ibdev);
 100         struct net_device *netdev = iwdev->netdev;
 101
 102         /* props being zeroed by the caller, avoid zeroing it here */
 103         props->max_mtu = IB_MTU_4096;
 104         props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
 105
 106         props->lid = 1;
 107         if (netif_carrier_ok(iwdev->netdev))
 108                 props->state = IB_PORT_ACTIVE;
 109         else
 110                 props->state = IB_PORT_DOWN;
 111         props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
 112                 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
 113         props->gid_tbl_len = 1;
 114         props->pkey_tbl_len = 1;
 115         props->active_width = IB_WIDTH_4X;
 116         props->active_speed = 1;
 117         props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
 118         return 0;
 119 }
 120
 121 /**
 122  * i40iw_alloc_ucontext - Allocate the user context data structure
 123  * @ibdev: device pointer from stack
 124  * @udata: user data
 125  *
 126  * This keeps track of all objects associated with a particular
 127  * user-mode client.
 128  */
 129 static struct ib_ucontext *i40iw_alloc_ucontext(struct ib_device *ibdev,
 130                                                 struct ib_udata *udata)
 131 {
 132         struct i40iw_device *iwdev = to_iwdev(ibdev);
 133         struct i40iw_alloc_ucontext_req req;
 134         struct i40iw_alloc_ucontext_resp uresp;
 135         struct i40iw_ucontext *ucontext;
 136
 137         if (ib_copy_from_udata(&req, udata, sizeof(req)))
 138                 return ERR_PTR(-EINVAL);
 139
 140         if (req.userspace_ver < 4 || req.userspace_ver > I40IW_ABI_VER) {
 141                 i40iw_pr_err("Unsupported provider library version %u.\n", req.userspace_ver);
 142                 return ERR_PTR(-EINVAL);
 143         }
 144
 145         memset(&uresp, 0, sizeof(uresp));
 146         uresp.max_qps = iwdev->max_qp;
 147         uresp.max_pds = iwdev->max_pd;
 148         uresp.wq_size = iwdev->max_qp_wr * 2;
 149         uresp.kernel_ver = req.userspace_ver;
 150
 151         ucontext = kzalloc(sizeof(*ucontext), GFP_KERNEL);
 152         if (!ucontext)
 153                 return ERR_PTR(-ENOMEM);
 154
 155         ucontext->iwdev = iwdev;
 156         ucontext->abi_ver = req.userspace_ver;
 157
 158         if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 159                 kfree(ucontext);
 160                 return ERR_PTR(-EFAULT);
 161         }
 162
 163         INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
 164         spin_lock_init(&ucontext->cq_reg_mem_list_lock);
 165         INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
 166         spin_lock_init(&ucontext->qp_reg_mem_list_lock);
 167
 168         return &ucontext->ibucontext;
 169 }
 170
 171 /**
 172  * i40iw_dealloc_ucontext - deallocate the user context data structure
 173  * @context: user context created during alloc
 174  */
 175 static int i40iw_dealloc_ucontext(struct ib_ucontext *context)
 176 {
 177         struct i40iw_ucontext *ucontext = to_ucontext(context);
 178         unsigned long flags;
 179
 180         spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
 181         if (!list_empty(&ucontext->cq_reg_mem_list)) {
 182                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 183                 return -EBUSY;
 184         }
 185         spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 186         spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
 187         if (!list_empty(&ucontext->qp_reg_mem_list)) {
 188                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 189                 return -EBUSY;
 190         }
 191         spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 192
 193         kfree(ucontext);
 194         return 0;
 195 }
 196
 197 /**
 198  * i40iw_mmap - user memory map
 199  * @context: context created during alloc
 200  * @vma: kernel info for user memory map
 201  */
 202 static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
 203 {
 204         struct i40iw_ucontext *ucontext = to_ucontext(context);
 205         u64 dbaddr;
 206
 207         if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
 208                 return -EINVAL;
 209
 210         dbaddr = I40IW_DB_ADDR_OFFSET + pci_resource_start(ucontext->iwdev->ldev->pcidev, 0);
 211
 212         if (io_remap_pfn_range(vma, vma->vm_start, dbaddr >> PAGE_SHIFT, PAGE_SIZE,
 213                                pgprot_noncached(vma->vm_page_prot)))
 214                 return -EAGAIN;
 215
 216         return 0;
 217 }
 218
 219 /**
 220  * i40iw_alloc_push_page - allocate a push page for qp
 221  * @iwdev: iwarp device
 222  * @qp: hardware control qp
 223  */
 224 static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 225 {
 226         struct i40iw_cqp_request *cqp_request;
 227         struct cqp_commands_info *cqp_info;
 228         enum i40iw_status_code status;
 229
 230         if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
 231                 return;
 232
 233         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
 234         if (!cqp_request)
 235                 return;
 236
 237         atomic_inc(&cqp_request->refcount);
 238
 239         cqp_info = &cqp_request->info;
 240         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 241         cqp_info->post_sq = 1;
 242
 243         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 244         cqp_info->in.u.manage_push_page.info.free_page = 0;
 245         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 246         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 247
 248         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 249         if (!status)
 250                 qp->push_idx = cqp_request->compl_info.op_ret_val;
 251         else
 252                 i40iw_pr_err("CQP-OP Push page fail");
 253         i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
 254 }
 255
 256 /**
 257  * i40iw_dealloc_push_page - free a push page for qp
 258  * @iwdev: iwarp device
 259  * @qp: hardware control qp
 260  */
 261 static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 262 {
 263         struct i40iw_cqp_request *cqp_request;
 264         struct cqp_commands_info *cqp_info;
 265         enum i40iw_status_code status;
 266
 267         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
 268                 return;
 269
 270         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
 271         if (!cqp_request)
 272                 return;
 273
 274         cqp_info = &cqp_request->info;
 275         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 276         cqp_info->post_sq = 1;
 277
 278         cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
 279         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 280         cqp_info->in.u.manage_push_page.info.free_page = 1;
 281         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 282         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 283
 284         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 285         if (!status)
 286                 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 287         else
 288                 i40iw_pr_err("CQP-OP Push page fail");
 289 }
 290
 291 /**
 292  * i40iw_alloc_pd - allocate protection domain
 293  * @ibdev: device pointer from stack
 294  * @context: user context created during alloc
 295  * @udata: user data
 296  */
 297 static struct ib_pd *i40iw_alloc_pd(struct ib_device *ibdev,
 298                                     struct ib_ucontext *context,
 299                                     struct ib_udata *udata)
 300 {
 301         struct i40iw_pd *iwpd;
 302         struct i40iw_device *iwdev = to_iwdev(ibdev);
 303         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 304         struct i40iw_alloc_pd_resp uresp;
 305         struct i40iw_sc_pd *sc_pd;
 306         struct i40iw_ucontext *ucontext;
 307         u32 pd_id = 0;
 308         int err;
 309
 310         if (iwdev->closing)
 311                 return ERR_PTR(-ENODEV);
 312
 313         err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
 314                                    iwdev->max_pd, &pd_id, &iwdev->next_pd);
 315         if (err) {
 316                 i40iw_pr_err("alloc resource failed\n");
 317                 return ERR_PTR(err);
 318         }
 319
 320         iwpd = kzalloc(sizeof(*iwpd), GFP_KERNEL);
 321         if (!iwpd) {
 322                 err = -ENOMEM;
 323                 goto free_res;
 324         }
 325
 326         sc_pd = &iwpd->sc_pd;
 327
 328         if (context) {
 329                 ucontext = to_ucontext(context);
 330                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
 331                 memset(&uresp, 0, sizeof(uresp));
 332                 uresp.pd_id = pd_id;
 333                 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 334                         err = -EFAULT;
 335                         goto error;
 336                 }
 337         } else {
 338                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, -1);
 339         }
 340
 341         i40iw_add_pdusecount(iwpd);
 342         return &iwpd->ibpd;
 343 error:
 344         kfree(iwpd);
 345 free_res:
 346         i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
 347         return ERR_PTR(err);
 348 }
 349
 350 /**
 351  * i40iw_dealloc_pd - deallocate pd
 352  * @ibpd: ptr of pd to be deallocated
 353  */
 354 static int i40iw_dealloc_pd(struct ib_pd *ibpd)
 355 {
 356         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 357         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 358
 359         i40iw_rem_pdusecount(iwpd, iwdev);
 360         return 0;
 361 }
 362
 363 /**
 364  * i40iw_get_pbl - Retrieve pbl from a list given a virtual
 365  * address
 366  * @va: user virtual address
 367  * @pbl_list: pbl list to search in (QP's or CQ's)
 368  */
 369 static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
 370                                        struct list_head *pbl_list)
 371 {
 372         struct i40iw_pbl *iwpbl;
 373
 374         list_for_each_entry(iwpbl, pbl_list, list) {
 375                 if (iwpbl->user_base == va) {
 376                         iwpbl->on_list = false;
 377                         list_del(&iwpbl->list);
 378                         return iwpbl;
 379                 }
 380         }
 381         return NULL;
 382 }
 383
 384 /**
 385  * i40iw_free_qp_resources - free up memory resources for qp
 386  * @iwdev: iwarp device
 387  * @iwqp: qp ptr (user or kernel)
 388  * @qp_num: qp number assigned
 389  */
 390 void i40iw_free_qp_resources(struct i40iw_device *iwdev,
 391                              struct i40iw_qp *iwqp,
 392                              u32 qp_num)
 393 {
 394         struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
 395
 396         i40iw_ieq_cleanup_qp(iwdev->vsi.ieq, &iwqp->sc_qp);
 397         i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
 398         if (qp_num)
 399                 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
 400         if (iwpbl->pbl_allocated)
 401                 i40iw_free_pble(iwdev->pble_rsrc, &iwpbl->pble_alloc);
 402         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
 403         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
 404         kfree(iwqp->kqp.wrid_mem);
 405         iwqp->kqp.wrid_mem = NULL;
 406         kfree(iwqp->allocated_buffer);
 407 }
 408
 409 /**
 410  * i40iw_clean_cqes - clean cq entries for qp
 411  * @iwqp: qp ptr (user or kernel)
 412  * @iwcq: cq ptr
 413  */
 414 static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
 415 {
 416         struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
 417
 418         ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
 419 }
 420
 421 /**
 422  * i40iw_destroy_qp - destroy qp
 423  * @ibqp: qp's ib pointer also to get to device's qp address
 424  */
 425 static int i40iw_destroy_qp(struct ib_qp *ibqp)
 426 {
 427         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 428
 429         iwqp->destroyed = 1;
 430
 431         if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
 432                 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
 433
 434         if (!iwqp->user_mode) {
 435                 if (iwqp->iwscq) {
 436                         i40iw_clean_cqes(iwqp, iwqp->iwscq);
 437                         if (iwqp->iwrcq != iwqp->iwscq)
 438                                 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
 439                 }
 440         }
 441
 442         i40iw_rem_ref(&iwqp->ibqp);
 443         return 0;
 444 }
 445
 446 /**
 447  * i40iw_setup_virt_qp - setup for allocation of virtual qp
 448  * @dev: iwarp device
 449  * @qp: qp ptr
 450  * @init_info: initialize info to return
 451  */
 452 static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
 453                                struct i40iw_qp *iwqp,
 454                                struct i40iw_qp_init_info *init_info)
 455 {
 456         struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
 457         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
 458
 459         iwqp->page = qpmr->sq_page;
 460         init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
 461         if (iwpbl->pbl_allocated) {
 462                 init_info->virtual_map = true;
 463                 init_info->sq_pa = qpmr->sq_pbl.idx;
 464                 init_info->rq_pa = qpmr->rq_pbl.idx;
 465         } else {
 466                 init_info->sq_pa = qpmr->sq_pbl.addr;
 467                 init_info->rq_pa = qpmr->rq_pbl.addr;
 468         }
 469         return 0;
 470 }
 471
 472 /**
 473  * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
 474  * @iwdev: iwarp device
 475  * @iwqp: qp ptr (user or kernel)
 476  * @info: initialize info to return
 477  */
 478 static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
 479                                 struct i40iw_qp *iwqp,
 480                                 struct i40iw_qp_init_info *info)
 481 {
 482         struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
 483         u32 sqdepth, rqdepth;
 484         u8 sqshift;
 485         u32 size;
 486         enum i40iw_status_code status;
 487         struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
 488
 489         i40iw_get_wqe_shift(ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
 490         status = i40iw_get_sqdepth(ukinfo->sq_size, sqshift, &sqdepth);
 491         if (status)
 492                 return -ENOMEM;
 493
 494         status = i40iw_get_rqdepth(ukinfo->rq_size, I40IW_MAX_RQ_WQE_SHIFT, &rqdepth);
 495         if (status)
 496                 return -ENOMEM;
 497
 498         size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
 499         iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
 500
 501         ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
 502         if (!ukinfo->sq_wrtrk_array)
 503                 return -ENOMEM;
 504
 505         ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
 506
 507         size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
 508         size += (I40IW_SHADOW_AREA_SIZE << 3);
 509
 510         status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
 511         if (status) {
 512                 kfree(ukinfo->sq_wrtrk_array);
 513                 ukinfo->sq_wrtrk_array = NULL;
 514                 return -ENOMEM;
 515         }
 516
 517         ukinfo->sq = mem->va;
 518         info->sq_pa = mem->pa;
 519
 520         ukinfo->rq = &ukinfo->sq[sqdepth];
 521         info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
 522
 523         ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
 524         info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
 525
 526         ukinfo->sq_size = sqdepth >> sqshift;
 527         ukinfo->rq_size = rqdepth >> I40IW_MAX_RQ_WQE_SHIFT;
 528         ukinfo->qp_id = iwqp->ibqp.qp_num;
 529         return 0;
 530 }
 531
 532 /**
 533  * i40iw_create_qp - create qp
 534  * @ibpd: ptr of pd
 535  * @init_attr: attributes for qp
 536  * @udata: user data for create qp
 537  */
 538 static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
 539                                      struct ib_qp_init_attr *init_attr,
 540                                      struct ib_udata *udata)
 541 {
 542         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 543         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 544         struct i40iw_cqp *iwcqp = &iwdev->cqp;
 545         struct i40iw_qp *iwqp;
 546         struct i40iw_ucontext *ucontext;
 547         struct i40iw_create_qp_req req;
 548         struct i40iw_create_qp_resp uresp;
 549         u32 qp_num = 0;
 550         void *mem;
 551         enum i40iw_status_code ret;
 552         int err_code;
 553         int sq_size;
 554         int rq_size;
 555         struct i40iw_sc_qp *qp;
 556         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 557         struct i40iw_qp_init_info init_info;
 558         struct i40iw_create_qp_info *qp_info;
 559         struct i40iw_cqp_request *cqp_request;
 560         struct cqp_commands_info *cqp_info;
 561
 562         struct i40iw_qp_host_ctx_info *ctx_info;
 563         struct i40iwarp_offload_info *iwarp_info;
 564         unsigned long flags;
 565
 566         if (iwdev->closing)
 567                 return ERR_PTR(-ENODEV);
 568
 569         if (init_attr->create_flags)
 570                 return ERR_PTR(-EINVAL);
 571         if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
 572                 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 573
 574         if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 575                 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 576
 577         if (init_attr->cap.max_recv_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 578                 init_attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 579
 580         memset(&init_info, 0, sizeof(init_info));
 581
 582         sq_size = init_attr->cap.max_send_wr;
 583         rq_size = init_attr->cap.max_recv_wr;
 584
 585         init_info.vsi = &iwdev->vsi;
 586         init_info.qp_uk_init_info.sq_size = sq_size;
 587         init_info.qp_uk_init_info.rq_size = rq_size;
 588         init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
 589         init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
 590         init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
 591
 592         mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
 593         if (!mem)
 594                 return ERR_PTR(-ENOMEM);
 595
 596         iwqp = (struct i40iw_qp *)mem;
 597         iwqp->allocated_buffer = mem;
 598         qp = &iwqp->sc_qp;
 599         qp->back_qp = (void *)iwqp;
 600         qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 601
 602         iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
 603
 604         if (i40iw_allocate_dma_mem(dev->hw,
 605                                    &iwqp->q2_ctx_mem,
 606                                    I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
 607                                    256)) {
 608                 i40iw_pr_err("dma_mem failed\n");
 609                 err_code = -ENOMEM;
 610                 goto error;
 611         }
 612
 613         init_info.q2 = iwqp->q2_ctx_mem.va;
 614         init_info.q2_pa = iwqp->q2_ctx_mem.pa;
 615
 616         init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
 617         init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
 618
 619         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
 620                                         &qp_num, &iwdev->next_qp);
 621         if (err_code) {
 622                 i40iw_pr_err("qp resource\n");
 623                 goto error;
 624         }
 625
 626         iwqp->iwdev = iwdev;
 627         iwqp->iwpd = iwpd;
 628         iwqp->ibqp.qp_num = qp_num;
 629         qp = &iwqp->sc_qp;
 630         iwqp->iwscq = to_iwcq(init_attr->send_cq);
 631         iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
 632
 633         iwqp->host_ctx.va = init_info.host_ctx;
 634         iwqp->host_ctx.pa = init_info.host_ctx_pa;
 635         iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
 636
 637         init_info.pd = &iwpd->sc_pd;
 638         init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
 639         iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
 640
 641         if (init_attr->qp_type != IB_QPT_RC) {
 642                 err_code = -EINVAL;
 643                 goto error;
 644         }
 645         if (iwdev->push_mode)
 646                 i40iw_alloc_push_page(iwdev, qp);
 647         if (udata) {
 648                 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
 649                 if (err_code) {
 650                         i40iw_pr_err("ib_copy_from_data\n");
 651                         goto error;
 652                 }
 653                 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
 654                 if (ibpd->uobject && ibpd->uobject->context) {
 655                         iwqp->user_mode = 1;
 656                         ucontext = to_ucontext(ibpd->uobject->context);
 657
 658                         if (req.user_wqe_buffers) {
 659                                 struct i40iw_pbl *iwpbl;
 660
 661                                 spin_lock_irqsave(
 662                                     &ucontext->qp_reg_mem_list_lock, flags);
 663                                 iwpbl = i40iw_get_pbl(
 664                                     (unsigned long)req.user_wqe_buffers,
 665                                     &ucontext->qp_reg_mem_list);
 666                                 spin_unlock_irqrestore(
 667                                     &ucontext->qp_reg_mem_list_lock, flags);
 668
 669                                 if (!iwpbl) {
 670                                         err_code = -ENODATA;
 671                                         i40iw_pr_err("no pbl info\n");
 672                                         goto error;
 673                                 }
 674                                 memcpy(&iwqp->iwpbl, iwpbl, sizeof(iwqp->iwpbl));
 675                         }
 676                 }
 677                 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
 678         } else {
 679                 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
 680         }
 681
 682         if (err_code) {
 683                 i40iw_pr_err("setup qp failed\n");
 684                 goto error;
 685         }
 686
 687         init_info.type = I40IW_QP_TYPE_IWARP;
 688         ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
 689         if (ret) {
 690                 err_code = -EPROTO;
 691                 i40iw_pr_err("qp_init fail\n");
 692                 goto error;
 693         }
 694         ctx_info = &iwqp->ctx_info;
 695         iwarp_info = &iwqp->iwarp_info;
 696         iwarp_info->rd_enable = true;
 697         iwarp_info->wr_rdresp_en = true;
 698         if (!iwqp->user_mode) {
 699                 iwarp_info->fast_reg_en = true;
 700                 iwarp_info->priv_mode_en = true;
 701         }
 702         iwarp_info->ddp_ver = 1;
 703         iwarp_info->rdmap_ver = 1;
 704
 705         ctx_info->iwarp_info_valid = true;
 706         ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 707         ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 708         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
 709                 ctx_info->push_mode_en = false;
 710         } else {
 711                 ctx_info->push_mode_en = true;
 712                 ctx_info->push_idx = qp->push_idx;
 713         }
 714
 715         ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 716                                              (u64 *)iwqp->host_ctx.va,
 717                                              ctx_info);
 718         ctx_info->iwarp_info_valid = false;
 719         cqp_request = i40iw_get_cqp_request(iwcqp, true);
 720         if (!cqp_request) {
 721                 err_code = -ENOMEM;
 722                 goto error;
 723         }
 724         cqp_info = &cqp_request->info;
 725         qp_info = &cqp_request->info.in.u.qp_create.info;
 726
 727         memset(qp_info, 0, sizeof(*qp_info));
 728
 729         qp_info->cq_num_valid = true;
 730         qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
 731
 732         cqp_info->cqp_cmd = OP_QP_CREATE;
 733         cqp_info->post_sq = 1;
 734         cqp_info->in.u.qp_create.qp = qp;
 735         cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
 736         ret = i40iw_handle_cqp_op(iwdev, cqp_request);
 737         if (ret) {
 738                 i40iw_pr_err("CQP-OP QP create fail");
 739                 err_code = -EACCES;
 740                 goto error;
 741         }
 742
 743         i40iw_add_ref(&iwqp->ibqp);
 744         spin_lock_init(&iwqp->lock);
 745         iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
 746         iwdev->qp_table[qp_num] = iwqp;
 747         i40iw_add_pdusecount(iwqp->iwpd);
 748         i40iw_add_devusecount(iwdev);
 749         if (ibpd->uobject && udata) {
 750                 memset(&uresp, 0, sizeof(uresp));
 751                 uresp.actual_sq_size = sq_size;
 752                 uresp.actual_rq_size = rq_size;
 753                 uresp.qp_id = qp_num;
 754                 uresp.push_idx = qp->push_idx;
 755                 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
 756                 if (err_code) {
 757                         i40iw_pr_err("copy_to_udata failed\n");
 758                         i40iw_destroy_qp(&iwqp->ibqp);
 759                            /* let the completion of the qp destroy free the qp */
 760                         return ERR_PTR(err_code);
 761                 }
 762         }
 763         init_completion(&iwqp->sq_drained);
 764         init_completion(&iwqp->rq_drained);
 765
 766         return &iwqp->ibqp;
 767 error:
 768         i40iw_free_qp_resources(iwdev, iwqp, qp_num);
 769         return ERR_PTR(err_code);
 770 }
 771
 772 /**
 773  * i40iw_query - query qp attributes
 774  * @ibqp: qp pointer
 775  * @attr: attributes pointer
 776  * @attr_mask: Not used
 777  * @init_attr: qp attributes to return
 778  */
 779 static int i40iw_query_qp(struct ib_qp *ibqp,
 780                           struct ib_qp_attr *attr,
 781                           int attr_mask,
 782                           struct ib_qp_init_attr *init_attr)
 783 {
 784         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 785         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
 786
 787         attr->qp_state = iwqp->ibqp_state;
 788         attr->cur_qp_state = attr->qp_state;
 789         attr->qp_access_flags = 0;
 790         attr->cap.max_send_wr = qp->qp_uk.sq_size;
 791         attr->cap.max_recv_wr = qp->qp_uk.rq_size;
 792         attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 793         attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 794         attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 795         attr->port_num = 1;
 796         init_attr->event_handler = iwqp->ibqp.event_handler;
 797         init_attr->qp_context = iwqp->ibqp.qp_context;
 798         init_attr->send_cq = iwqp->ibqp.send_cq;
 799         init_attr->recv_cq = iwqp->ibqp.recv_cq;
 800         init_attr->srq = iwqp->ibqp.srq;
 801         init_attr->cap = attr->cap;
 802         init_attr->port_num = 1;
 803         return 0;
 804 }
 805
 806 /**
 807  * i40iw_hw_modify_qp - setup cqp for modify qp
 808  * @iwdev: iwarp device
 809  * @iwqp: qp ptr (user or kernel)
 810  * @info: info for modify qp
 811  * @wait: flag to wait or not for modify qp completion
 812  */
 813 void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
 814                         struct i40iw_modify_qp_info *info, bool wait)
 815 {
 816         struct i40iw_cqp_request *cqp_request;
 817         struct cqp_commands_info *cqp_info;
 818         struct i40iw_modify_qp_info *m_info;
 819         struct i40iw_gen_ae_info ae_info;
 820
 821         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
 822         if (!cqp_request)
 823                 return;
 824
 825         cqp_info = &cqp_request->info;
 826         m_info = &cqp_info->in.u.qp_modify.info;
 827         memcpy(m_info, info, sizeof(*m_info));
 828         cqp_info->cqp_cmd = OP_QP_MODIFY;
 829         cqp_info->post_sq = 1;
 830         cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
 831         cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
 832         if (!i40iw_handle_cqp_op(iwdev, cqp_request))
 833                 return;
 834
 835         switch (m_info->next_iwarp_state) {
 836         case I40IW_QP_STATE_RTS:
 837                 if (iwqp->iwarp_state == I40IW_QP_STATE_IDLE)
 838                         i40iw_send_reset(iwqp->cm_node);
 839                 /* fall through */
 840         case I40IW_QP_STATE_IDLE:
 841         case I40IW_QP_STATE_TERMINATE:
 842         case I40IW_QP_STATE_CLOSING:
 843                 ae_info.ae_code = I40IW_AE_BAD_CLOSE;
 844                 ae_info.ae_source = 0;
 845                 i40iw_gen_ae(iwdev, &iwqp->sc_qp, &ae_info, false);
 846                 break;
 847         case I40IW_QP_STATE_ERROR:
 848         default:
 849                 break;
 850         }
 851 }
 852
 853 /**
 854  * i40iw_modify_qp - modify qp request
 855  * @ibqp: qp's pointer for modify
 856  * @attr: access attributes
 857  * @attr_mask: state mask
 858  * @udata: user data
 859  */
 860 int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
 861                     int attr_mask, struct ib_udata *udata)
 862 {
 863         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 864         struct i40iw_device *iwdev = iwqp->iwdev;
 865         struct i40iw_qp_host_ctx_info *ctx_info;
 866         struct i40iwarp_offload_info *iwarp_info;
 867         struct i40iw_modify_qp_info info;
 868         u8 issue_modify_qp = 0;
 869         u8 dont_wait = 0;
 870         u32 err;
 871         unsigned long flags;
 872
 873         memset(&info, 0, sizeof(info));
 874         ctx_info = &iwqp->ctx_info;
 875         iwarp_info = &iwqp->iwarp_info;
 876
 877         spin_lock_irqsave(&iwqp->lock, flags);
 878
 879         if (attr_mask & IB_QP_STATE) {
 880                 if (iwdev->closing && attr->qp_state != IB_QPS_ERR) {
 881                         err = -EINVAL;
 882                         goto exit;
 883                 }
 884
 885                 switch (attr->qp_state) {
 886                 case IB_QPS_INIT:
 887                 case IB_QPS_RTR:
 888                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
 889                                 err = -EINVAL;
 890                                 goto exit;
 891                         }
 892                         if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
 893                                 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
 894                                 issue_modify_qp = 1;
 895                         }
 896                         break;
 897                 case IB_QPS_RTS:
 898                         if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
 899                             (!iwqp->cm_id)) {
 900                                 err = -EINVAL;
 901                                 goto exit;
 902                         }
 903
 904                         issue_modify_qp = 1;
 905                         iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
 906                         iwqp->hte_added = 1;
 907                         info.next_iwarp_state = I40IW_QP_STATE_RTS;
 908                         info.tcp_ctx_valid = true;
 909                         info.ord_valid = true;
 910                         info.arp_cache_idx_valid = true;
 911                         info.cq_num_valid = true;
 912                         break;
 913                 case IB_QPS_SQD:
 914                         if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
 915                                 err = 0;
 916                                 goto exit;
 917                         }
 918                         if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
 919                             (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
 920                                 err = 0;
 921                                 goto exit;
 922                         }
 923                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
 924                                 err = -EINVAL;
 925                                 goto exit;
 926                         }
 927                         info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
 928                         issue_modify_qp = 1;
 929                         break;
 930                 case IB_QPS_SQE:
 931                         if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
 932                                 err = -EINVAL;
 933                                 goto exit;
 934                         }
 935                         info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
 936                         issue_modify_qp = 1;
 937                         break;
 938                 case IB_QPS_ERR:
 939                 case IB_QPS_RESET:
 940                         if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
 941                                 err = -EINVAL;
 942                                 goto exit;
 943                         }
 944                         if (iwqp->sc_qp.term_flags)
 945                                 i40iw_terminate_del_timer(&iwqp->sc_qp);
 946                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 947                         if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
 948                             iwdev->iw_status &&
 949                             (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
 950                                 info.reset_tcp_conn = true;
 951                         else
 952                                 dont_wait = 1;
 953                         issue_modify_qp = 1;
 954                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 955                         break;
 956                 default:
 957                         err = -EINVAL;
 958                         goto exit;
 959                 }
 960
 961                 iwqp->ibqp_state = attr->qp_state;
 962
 963         }
 964         if (attr_mask & IB_QP_ACCESS_FLAGS) {
 965                 ctx_info->iwarp_info_valid = true;
 966                 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
 967                         iwarp_info->wr_rdresp_en = true;
 968                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
 969                         iwarp_info->wr_rdresp_en = true;
 970                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
 971                         iwarp_info->rd_enable = true;
 972                 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
 973                         iwarp_info->bind_en = true;
 974
 975                 if (iwqp->user_mode) {
 976                         iwarp_info->rd_enable = true;
 977                         iwarp_info->wr_rdresp_en = true;
 978                         iwarp_info->priv_mode_en = false;
 979                 }
 980         }
 981
 982         if (ctx_info->iwarp_info_valid) {
 983                 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 984                 int ret;
 985
 986                 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 987                 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 988                 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 989                                                      (u64 *)iwqp->host_ctx.va,
 990                                                      ctx_info);
 991                 if (ret) {
 992                         i40iw_pr_err("setting QP context\n");
 993                         err = -EINVAL;
 994                         goto exit;
 995                 }
 996         }
 997
 998         spin_unlock_irqrestore(&iwqp->lock, flags);
 999
1000         if (issue_modify_qp) {
1001                 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
1002
1003                 spin_lock_irqsave(&iwqp->lock, flags);
1004                 iwqp->iwarp_state = info.next_iwarp_state;
1005                 spin_unlock_irqrestore(&iwqp->lock, flags);
1006         }
1007
1008         if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
1009                 if (dont_wait) {
1010                         if (iwqp->cm_id && iwqp->hw_tcp_state) {
1011                                 spin_lock_irqsave(&iwqp->lock, flags);
1012                                 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
1013                                 iwqp->last_aeq = I40IW_AE_RESET_SENT;
1014                                 spin_unlock_irqrestore(&iwqp->lock, flags);
1015                                 i40iw_cm_disconn(iwqp);
1016                         }
1017                 } else {
1018                         spin_lock_irqsave(&iwqp->lock, flags);
1019                         if (iwqp->cm_id) {
1020                                 if (atomic_inc_return(&iwqp->close_timer_started) == 1) {
1021                                         iwqp->cm_id->add_ref(iwqp->cm_id);
1022                                         i40iw_schedule_cm_timer(iwqp->cm_node,
1023                                                                 (struct i40iw_puda_buf *)iwqp,
1024                                                                  I40IW_TIMER_TYPE_CLOSE, 1, 0);
1025                                 }
1026                         }
1027                         spin_unlock_irqrestore(&iwqp->lock, flags);
1028                 }
1029         }
1030         return 0;
1031 exit:
1032         spin_unlock_irqrestore(&iwqp->lock, flags);
1033         return err;
1034 }
1035
1036 /**
1037  * cq_free_resources - free up recources for cq
1038  * @iwdev: iwarp device
1039  * @iwcq: cq ptr
1040  */
1041 static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1042 {
1043         struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1044
1045         if (!iwcq->user_mode)
1046                 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1047         i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1048 }
1049
1050 /**
1051  * i40iw_cq_wq_destroy - send cq destroy cqp
1052  * @iwdev: iwarp device
1053  * @cq: hardware control cq
1054  */
1055 void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1056 {
1057         enum i40iw_status_code status;
1058         struct i40iw_cqp_request *cqp_request;
1059         struct cqp_commands_info *cqp_info;
1060
1061         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1062         if (!cqp_request)
1063                 return;
1064
1065         cqp_info = &cqp_request->info;
1066
1067         cqp_info->cqp_cmd = OP_CQ_DESTROY;
1068         cqp_info->post_sq = 1;
1069         cqp_info->in.u.cq_destroy.cq = cq;
1070         cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1071         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1072         if (status)
1073                 i40iw_pr_err("CQP-OP Destroy QP fail");
1074 }
1075
1076 /**
1077  * i40iw_destroy_cq - destroy cq
1078  * @ib_cq: cq pointer
1079  */
1080 static int i40iw_destroy_cq(struct ib_cq *ib_cq)
1081 {
1082         struct i40iw_cq *iwcq;
1083         struct i40iw_device *iwdev;
1084         struct i40iw_sc_cq *cq;
1085
1086         if (!ib_cq) {
1087                 i40iw_pr_err("ib_cq == NULL\n");
1088                 return 0;
1089         }
1090
1091         iwcq = to_iwcq(ib_cq);
1092         iwdev = to_iwdev(ib_cq->device);
1093         cq = &iwcq->sc_cq;
1094         i40iw_cq_wq_destroy(iwdev, cq);
1095         cq_free_resources(iwdev, iwcq);
1096         kfree(iwcq);
1097         i40iw_rem_devusecount(iwdev);
1098         return 0;
1099 }
1100
1101 /**
1102  * i40iw_create_cq - create cq
1103  * @ibdev: device pointer from stack
1104  * @attr: attributes for cq
1105  * @context: user context created during alloc
1106  * @udata: user data
1107  */
1108 static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev,
1109                                      const struct ib_cq_init_attr *attr,
1110                                      struct ib_ucontext *context,
1111                                      struct ib_udata *udata)
1112 {
1113         struct i40iw_device *iwdev = to_iwdev(ibdev);
1114         struct i40iw_cq *iwcq;
1115         struct i40iw_pbl *iwpbl;
1116         u32 cq_num = 0;
1117         struct i40iw_sc_cq *cq;
1118         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1119         struct i40iw_cq_init_info info;
1120         enum i40iw_status_code status;
1121         struct i40iw_cqp_request *cqp_request;
1122         struct cqp_commands_info *cqp_info;
1123         struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1124         unsigned long flags;
1125         int err_code;
1126         int entries = attr->cqe;
1127
1128         if (iwdev->closing)
1129                 return ERR_PTR(-ENODEV);
1130
1131         if (entries > iwdev->max_cqe)
1132                 return ERR_PTR(-EINVAL);
1133
1134         iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL);
1135         if (!iwcq)
1136                 return ERR_PTR(-ENOMEM);
1137
1138         memset(&info, 0, sizeof(info));
1139
1140         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1141                                         iwdev->max_cq, &cq_num,
1142                                         &iwdev->next_cq);
1143         if (err_code)
1144                 goto error;
1145
1146         cq = &iwcq->sc_cq;
1147         cq->back_cq = (void *)iwcq;
1148         spin_lock_init(&iwcq->lock);
1149
1150         info.dev = dev;
1151         ukinfo->cq_size = max(entries, 4);
1152         ukinfo->cq_id = cq_num;
1153         iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1154         info.ceqe_mask = 0;
1155         if (attr->comp_vector < iwdev->ceqs_count)
1156                 info.ceq_id = attr->comp_vector;
1157         info.ceq_id_valid = true;
1158         info.ceqe_mask = 1;
1159         info.type = I40IW_CQ_TYPE_IWARP;
1160         if (context) {
1161                 struct i40iw_ucontext *ucontext;
1162                 struct i40iw_create_cq_req req;
1163                 struct i40iw_cq_mr *cqmr;
1164
1165                 memset(&req, 0, sizeof(req));
1166                 iwcq->user_mode = true;
1167                 ucontext = to_ucontext(context);
1168                 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req))) {
1169                         err_code = -EFAULT;
1170                         goto cq_free_resources;
1171                 }
1172
1173                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1174                 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1175                                       &ucontext->cq_reg_mem_list);
1176                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1177                 if (!iwpbl) {
1178                         err_code = -EPROTO;
1179                         goto cq_free_resources;
1180                 }
1181
1182                 iwcq->iwpbl = iwpbl;
1183                 iwcq->cq_mem_size = 0;
1184                 cqmr = &iwpbl->cq_mr;
1185                 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1186                 if (iwpbl->pbl_allocated) {
1187                         info.virtual_map = true;
1188                         info.pbl_chunk_size = 1;
1189                         info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1190                 } else {
1191                         info.cq_base_pa = cqmr->cq_pbl.addr;
1192                 }
1193         } else {
1194                 /* Kmode allocations */
1195                 int rsize;
1196                 int shadow;
1197
1198                 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1199                 rsize = round_up(rsize, 256);
1200                 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1201                 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1202                                                 rsize + shadow, 256);
1203                 if (status) {
1204                         err_code = -ENOMEM;
1205                         goto cq_free_resources;
1206                 }
1207                 ukinfo->cq_base = iwcq->kmem.va;
1208                 info.cq_base_pa = iwcq->kmem.pa;
1209                 info.shadow_area_pa = info.cq_base_pa + rsize;
1210                 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1211         }
1212
1213         if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1214                 i40iw_pr_err("init cq fail\n");
1215                 err_code = -EPROTO;
1216                 goto cq_free_resources;
1217         }
1218
1219         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1220         if (!cqp_request) {
1221                 err_code = -ENOMEM;
1222                 goto cq_free_resources;
1223         }
1224
1225         cqp_info = &cqp_request->info;
1226         cqp_info->cqp_cmd = OP_CQ_CREATE;
1227         cqp_info->post_sq = 1;
1228         cqp_info->in.u.cq_create.cq = cq;
1229         cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1230         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1231         if (status) {
1232                 i40iw_pr_err("CQP-OP Create QP fail");
1233                 err_code = -EPROTO;
1234                 goto cq_free_resources;
1235         }
1236
1237         if (context) {
1238                 struct i40iw_create_cq_resp resp;
1239
1240                 memset(&resp, 0, sizeof(resp));
1241                 resp.cq_id = info.cq_uk_init_info.cq_id;
1242                 resp.cq_size = info.cq_uk_init_info.cq_size;
1243                 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1244                         i40iw_pr_err("copy to user data\n");
1245                         err_code = -EPROTO;
1246                         goto cq_destroy;
1247                 }
1248         }
1249
1250         i40iw_add_devusecount(iwdev);
1251         return (struct ib_cq *)iwcq;
1252
1253 cq_destroy:
1254         i40iw_cq_wq_destroy(iwdev, cq);
1255 cq_free_resources:
1256         cq_free_resources(iwdev, iwcq);
1257 error:
1258         kfree(iwcq);
1259         return ERR_PTR(err_code);
1260 }
1261
1262 /**
1263  * i40iw_get_user_access - get hw access from IB access
1264  * @acc: IB access to return hw access
1265  */
1266 static inline u16 i40iw_get_user_access(int acc)
1267 {
1268         u16 access = 0;
1269
1270         access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1271         access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1272         access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1273         access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1274         return access;
1275 }
1276
1277 /**
1278  * i40iw_free_stag - free stag resource
1279  * @iwdev: iwarp device
1280  * @stag: stag to free
1281  */
1282 static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1283 {
1284         u32 stag_idx;
1285
1286         stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1287         i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1288         i40iw_rem_devusecount(iwdev);
1289 }
1290
1291 /**
1292  * i40iw_create_stag - create random stag
1293  * @iwdev: iwarp device
1294  */
1295 static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1296 {
1297         u32 stag = 0;
1298         u32 stag_index = 0;
1299         u32 next_stag_index;
1300         u32 driver_key;
1301         u32 random;
1302         u8 consumer_key;
1303         int ret;
1304
1305         get_random_bytes(&random, sizeof(random));
1306         consumer_key = (u8)random;
1307
1308         driver_key = random & ~iwdev->mr_stagmask;
1309         next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1310         next_stag_index %= iwdev->max_mr;
1311
1312         ret = i40iw_alloc_resource(iwdev,
1313                                    iwdev->allocated_mrs, iwdev->max_mr,
1314                                    &stag_index, &next_stag_index);
1315         if (!ret) {
1316                 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1317                 stag |= driver_key;
1318                 stag += (u32)consumer_key;
1319                 i40iw_add_devusecount(iwdev);
1320         }
1321         return stag;
1322 }
1323
1324 /**
1325  * i40iw_next_pbl_addr - Get next pbl address
1326  * @pbl: pointer to a pble
1327  * @pinfo: info pointer
1328  * @idx: index
1329  */
1330 static inline u64 *i40iw_next_pbl_addr(u64 *pbl,
1331                                        struct i40iw_pble_info **pinfo,
1332                                        u32 *idx)
1333 {
1334         *idx += 1;
1335         if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1336                 return ++pbl;
1337         *idx = 0;
1338         (*pinfo)++;
1339         return (u64 *)(*pinfo)->addr;
1340 }
1341
1342 /**
1343  * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1344  * @iwmr: iwmr for IB's user page addresses
1345  * @pbl: ple pointer to save 1 level or 0 level pble
1346  * @level: indicated level 0, 1 or 2
1347  */
1348 static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1349                                     u64 *pbl,
1350                                     enum i40iw_pble_level level)
1351 {
1352         struct ib_umem *region = iwmr->region;
1353         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1354         int chunk_pages, entry, i;
1355         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1356         struct i40iw_pble_info *pinfo;
1357         struct scatterlist *sg;
1358         u64 pg_addr = 0;
1359         u32 idx = 0;
1360
1361         pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1362
1363         for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
1364                 chunk_pages = sg_dma_len(sg) >> region->page_shift;
1365                 if ((iwmr->type == IW_MEMREG_TYPE_QP) &&
1366                     !iwpbl->qp_mr.sq_page)
1367                         iwpbl->qp_mr.sq_page = sg_page(sg);
1368                 for (i = 0; i < chunk_pages; i++) {
1369                         pg_addr = sg_dma_address(sg) +
1370                                 (i << region->page_shift);
1371
1372                         if ((entry + i) == 0)
1373                                 *pbl = cpu_to_le64(pg_addr & iwmr->page_msk);
1374                         else if (!(pg_addr & ~iwmr->page_msk))
1375                                 *pbl = cpu_to_le64(pg_addr);
1376                         else
1377                                 continue;
1378                         pbl = i40iw_next_pbl_addr(pbl, &pinfo, &idx);
1379                 }
1380         }
1381 }
1382
1383 /**
1384  * i40iw_set_hugetlb_params - set MR pg size and mask to huge pg values.
1385  * @addr: virtual address
1386  * @iwmr: mr pointer for this memory registration
1387  */
1388 static void i40iw_set_hugetlb_values(u64 addr, struct i40iw_mr *iwmr)
1389 {
1390         struct vm_area_struct *vma;
1391         struct hstate *h;
1392
1393         down_read(&current->mm->mmap_sem);
1394         vma = find_vma(current->mm, addr);
1395         if (vma && is_vm_hugetlb_page(vma)) {
1396                 h = hstate_vma(vma);
1397                 if (huge_page_size(h) == 0x200000) {
1398                         iwmr->page_size = huge_page_size(h);
1399                         iwmr->page_msk = huge_page_mask(h);
1400                 }
1401         }
1402         up_read(&current->mm->mmap_sem);
1403 }
1404
1405 /**
1406  * i40iw_check_mem_contiguous - check if pbls stored in arr are contiguous
1407  * @arr: lvl1 pbl array
1408  * @npages: page count
1409  * pg_size: page size
1410  *
1411  */
1412 static bool i40iw_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
1413 {
1414         u32 pg_idx;
1415
1416         for (pg_idx = 0; pg_idx < npages; pg_idx++) {
1417                 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
1418                         return false;
1419         }
1420         return true;
1421 }
1422
1423 /**
1424  * i40iw_check_mr_contiguous - check if MR is physically contiguous
1425  * @palloc: pbl allocation struct
1426  * pg_size: page size
1427  */
1428 static bool i40iw_check_mr_contiguous(struct i40iw_pble_alloc *palloc, u32 pg_size)
1429 {
1430         struct i40iw_pble_level2 *lvl2 = &palloc->level2;
1431         struct i40iw_pble_info *leaf = lvl2->leaf;
1432         u64 *arr = NULL;
1433         u64 *start_addr = NULL;
1434         int i;
1435         bool ret;
1436
1437         if (palloc->level == I40IW_LEVEL_1) {
1438                 arr = (u64 *)palloc->level1.addr;
1439                 ret = i40iw_check_mem_contiguous(arr, palloc->total_cnt, pg_size);
1440                 return ret;
1441         }
1442
1443         start_addr = (u64 *)leaf->addr;
1444
1445         for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
1446                 arr = (u64 *)leaf->addr;
1447                 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
1448                         return false;
1449                 ret = i40iw_check_mem_contiguous(arr, leaf->cnt, pg_size);
1450                 if (!ret)
1451                         return false;
1452         }
1453
1454         return true;
1455 }
1456
1457 /**
1458  * i40iw_setup_pbles - copy user pg address to pble's
1459  * @iwdev: iwarp device
1460  * @iwmr: mr pointer for this memory registration
1461  * @use_pbles: flag if to use pble's
1462  */
1463 static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1464                              struct i40iw_mr *iwmr,
1465                              bool use_pbles)
1466 {
1467         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1468         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1469         struct i40iw_pble_info *pinfo;
1470         u64 *pbl;
1471         enum i40iw_status_code status;
1472         enum i40iw_pble_level level = I40IW_LEVEL_1;
1473
1474         if (use_pbles) {
1475                 mutex_lock(&iwdev->pbl_mutex);
1476                 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1477                 mutex_unlock(&iwdev->pbl_mutex);
1478                 if (status)
1479                         return -ENOMEM;
1480
1481                 iwpbl->pbl_allocated = true;
1482                 level = palloc->level;
1483                 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1484                 pbl = (u64 *)pinfo->addr;
1485         } else {
1486                 pbl = iwmr->pgaddrmem;
1487         }
1488
1489         i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1490
1491         if (use_pbles)
1492                 iwmr->pgaddrmem[0] = *pbl;
1493
1494         return 0;
1495 }
1496
1497 /**
1498  * i40iw_handle_q_mem - handle memory for qp and cq
1499  * @iwdev: iwarp device
1500  * @req: information for q memory management
1501  * @iwpbl: pble struct
1502  * @use_pbles: flag to use pble
1503  */
1504 static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1505                               struct i40iw_mem_reg_req *req,
1506                               struct i40iw_pbl *iwpbl,
1507                               bool use_pbles)
1508 {
1509         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1510         struct i40iw_mr *iwmr = iwpbl->iwmr;
1511         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1512         struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1513         struct i40iw_hmc_pble *hmc_p;
1514         u64 *arr = iwmr->pgaddrmem;
1515         u32 pg_size;
1516         int err;
1517         int total;
1518         bool ret = true;
1519
1520         total = req->sq_pages + req->rq_pages + req->cq_pages;
1521         pg_size = iwmr->page_size;
1522
1523         err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1524         if (err)
1525                 return err;
1526
1527         if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1528                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1529                 iwpbl->pbl_allocated = false;
1530                 return -ENOMEM;
1531         }
1532
1533         if (use_pbles)
1534                 arr = (u64 *)palloc->level1.addr;
1535
1536         if (iwmr->type == IW_MEMREG_TYPE_QP) {
1537                 hmc_p = &qpmr->sq_pbl;
1538                 qpmr->shadow = (dma_addr_t)arr[total];
1539
1540                 if (use_pbles) {
1541                         ret = i40iw_check_mem_contiguous(arr, req->sq_pages, pg_size);
1542                         if (ret)
1543                                 ret = i40iw_check_mem_contiguous(&arr[req->sq_pages], req->rq_pages, pg_size);
1544                 }
1545
1546                 if (!ret) {
1547                         hmc_p->idx = palloc->level1.idx;
1548                         hmc_p = &qpmr->rq_pbl;
1549                         hmc_p->idx = palloc->level1.idx + req->sq_pages;
1550                 } else {
1551                         hmc_p->addr = arr[0];
1552                         hmc_p = &qpmr->rq_pbl;
1553                         hmc_p->addr = arr[req->sq_pages];
1554                 }
1555         } else {                /* CQ */
1556                 hmc_p = &cqmr->cq_pbl;
1557                 cqmr->shadow = (dma_addr_t)arr[total];
1558
1559                 if (use_pbles)
1560                         ret = i40iw_check_mem_contiguous(arr, req->cq_pages, pg_size);
1561
1562                 if (!ret)
1563                         hmc_p->idx = palloc->level1.idx;
1564                 else
1565                         hmc_p->addr = arr[0];
1566         }
1567
1568         if (use_pbles && ret) {
1569                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1570                 iwpbl->pbl_allocated = false;
1571         }
1572
1573         return err;
1574 }
1575
1576 /**
1577  * i40iw_hw_alloc_stag - cqp command to allocate stag
1578  * @iwdev: iwarp device
1579  * @iwmr: iwarp mr pointer
1580  */
1581 static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1582 {
1583         struct i40iw_allocate_stag_info *info;
1584         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1585         enum i40iw_status_code status;
1586         int err = 0;
1587         struct i40iw_cqp_request *cqp_request;
1588         struct cqp_commands_info *cqp_info;
1589
1590         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1591         if (!cqp_request)
1592                 return -ENOMEM;
1593
1594         cqp_info = &cqp_request->info;
1595         info = &cqp_info->in.u.alloc_stag.info;
1596         memset(info, 0, sizeof(*info));
1597         info->page_size = PAGE_SIZE;
1598         info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1599         info->pd_id = iwpd->sc_pd.pd_id;
1600         info->total_len = iwmr->length;
1601         info->remote_access = true;
1602         cqp_info->cqp_cmd = OP_ALLOC_STAG;
1603         cqp_info->post_sq = 1;
1604         cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1605         cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1606
1607         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1608         if (status) {
1609                 err = -ENOMEM;
1610                 i40iw_pr_err("CQP-OP MR Reg fail");
1611         }
1612         return err;
1613 }
1614
1615 /**
1616  * i40iw_alloc_mr - register stag for fast memory registration
1617  * @pd: ibpd pointer
1618  * @mr_type: memory for stag registrion
1619  * @max_num_sg: man number of pages
1620  */
1621 static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd,
1622                                     enum ib_mr_type mr_type,
1623                                     u32 max_num_sg)
1624 {
1625         struct i40iw_pd *iwpd = to_iwpd(pd);
1626         struct i40iw_device *iwdev = to_iwdev(pd->device);
1627         struct i40iw_pble_alloc *palloc;
1628         struct i40iw_pbl *iwpbl;
1629         struct i40iw_mr *iwmr;
1630         enum i40iw_status_code status;
1631         u32 stag;
1632         int err_code = -ENOMEM;
1633
1634         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1635         if (!iwmr)
1636                 return ERR_PTR(-ENOMEM);
1637
1638         stag = i40iw_create_stag(iwdev);
1639         if (!stag) {
1640                 err_code = -EOVERFLOW;
1641                 goto err;
1642         }
1643         stag &= ~I40IW_CQPSQ_STAG_KEY_MASK;
1644         iwmr->stag = stag;
1645         iwmr->ibmr.rkey = stag;
1646         iwmr->ibmr.lkey = stag;
1647         iwmr->ibmr.pd = pd;
1648         iwmr->ibmr.device = pd->device;
1649         iwpbl = &iwmr->iwpbl;
1650         iwpbl->iwmr = iwmr;
1651         iwmr->type = IW_MEMREG_TYPE_MEM;
1652         palloc = &iwpbl->pble_alloc;
1653         iwmr->page_cnt = max_num_sg;
1654         mutex_lock(&iwdev->pbl_mutex);
1655         status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1656         mutex_unlock(&iwdev->pbl_mutex);
1657         if (status)
1658                 goto err1;
1659
1660         if (palloc->level != I40IW_LEVEL_1)
1661                 goto err2;
1662         err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1663         if (err_code)
1664                 goto err2;
1665         iwpbl->pbl_allocated = true;
1666         i40iw_add_pdusecount(iwpd);
1667         return &iwmr->ibmr;
1668 err2:
1669         i40iw_free_pble(iwdev->pble_rsrc, palloc);
1670 err1:
1671         i40iw_free_stag(iwdev, stag);
1672 err:
1673         kfree(iwmr);
1674         return ERR_PTR(err_code);
1675 }
1676
1677 /**
1678  * i40iw_set_page - populate pbl list for fmr
1679  * @ibmr: ib mem to access iwarp mr pointer
1680  * @addr: page dma address fro pbl list
1681  */
1682 static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1683 {
1684         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1685         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1686         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1687         u64 *pbl;
1688
1689         if (unlikely(iwmr->npages == iwmr->page_cnt))
1690                 return -ENOMEM;
1691
1692         pbl = (u64 *)palloc->level1.addr;
1693         pbl[iwmr->npages++] = cpu_to_le64(addr);
1694         return 0;
1695 }
1696
1697 /**
1698  * i40iw_map_mr_sg - map of sg list for fmr
1699  * @ibmr: ib mem to access iwarp mr pointer
1700  * @sg: scatter gather list for fmr
1701  * @sg_nents: number of sg pages
1702  */
1703 static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
1704                            int sg_nents, unsigned int *sg_offset)
1705 {
1706         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1707
1708         iwmr->npages = 0;
1709         return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
1710 }
1711
1712 /**
1713  * i40iw_drain_sq - drain the send queue
1714  * @ibqp: ib qp pointer
1715  */
1716 static void i40iw_drain_sq(struct ib_qp *ibqp)
1717 {
1718         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1719         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1720
1721         if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1722                 wait_for_completion(&iwqp->sq_drained);
1723 }
1724
1725 /**
1726  * i40iw_drain_rq - drain the receive queue
1727  * @ibqp: ib qp pointer
1728  */
1729 static void i40iw_drain_rq(struct ib_qp *ibqp)
1730 {
1731         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1732         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1733
1734         if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1735                 wait_for_completion(&iwqp->rq_drained);
1736 }
1737
1738 /**
1739  * i40iw_hwreg_mr - send cqp command for memory registration
1740  * @iwdev: iwarp device
1741  * @iwmr: iwarp mr pointer
1742  * @access: access for MR
1743  */
1744 static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1745                           struct i40iw_mr *iwmr,
1746                           u16 access)
1747 {
1748         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1749         struct i40iw_reg_ns_stag_info *stag_info;
1750         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1751         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1752         enum i40iw_status_code status;
1753         int err = 0;
1754         struct i40iw_cqp_request *cqp_request;
1755         struct cqp_commands_info *cqp_info;
1756
1757         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1758         if (!cqp_request)
1759                 return -ENOMEM;
1760
1761         cqp_info = &cqp_request->info;
1762         stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1763         memset(stag_info, 0, sizeof(*stag_info));
1764         stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1765         stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1766         stag_info->stag_key = (u8)iwmr->stag;
1767         stag_info->total_len = iwmr->length;
1768         stag_info->access_rights = access;
1769         stag_info->pd_id = iwpd->sc_pd.pd_id;
1770         stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1771         stag_info->page_size = iwmr->page_size;
1772
1773         if (iwpbl->pbl_allocated) {
1774                 if (palloc->level == I40IW_LEVEL_1) {
1775                         stag_info->first_pm_pbl_index = palloc->level1.idx;
1776                         stag_info->chunk_size = 1;
1777                 } else {
1778                         stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1779                         stag_info->chunk_size = 3;
1780                 }
1781         } else {
1782                 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1783         }
1784
1785         cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1786         cqp_info->post_sq = 1;
1787         cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1788         cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1789
1790         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1791         if (status) {
1792                 err = -ENOMEM;
1793                 i40iw_pr_err("CQP-OP MR Reg fail");
1794         }
1795         return err;
1796 }
1797
1798 /**
1799  * i40iw_reg_user_mr - Register a user memory region
1800  * @pd: ptr of pd
1801  * @start: virtual start address
1802  * @length: length of mr
1803  * @virt: virtual address
1804  * @acc: access of mr
1805  * @udata: user data
1806  */
1807 static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1808                                        u64 start,
1809                                        u64 length,
1810                                        u64 virt,
1811                                        int acc,
1812                                        struct ib_udata *udata)
1813 {
1814         struct i40iw_pd *iwpd = to_iwpd(pd);
1815         struct i40iw_device *iwdev = to_iwdev(pd->device);
1816         struct i40iw_ucontext *ucontext;
1817         struct i40iw_pble_alloc *palloc;
1818         struct i40iw_pbl *iwpbl;
1819         struct i40iw_mr *iwmr;
1820         struct ib_umem *region;
1821         struct i40iw_mem_reg_req req;
1822         u64 pbl_depth = 0;
1823         u32 stag = 0;
1824         u16 access;
1825         u64 region_length;
1826         bool use_pbles = false;
1827         unsigned long flags;
1828         int err = -ENOSYS;
1829         int ret;
1830         int pg_shift;
1831
1832         if (iwdev->closing)
1833                 return ERR_PTR(-ENODEV);
1834
1835         if (length > I40IW_MAX_MR_SIZE)
1836                 return ERR_PTR(-EINVAL);
1837         region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
1838         if (IS_ERR(region))
1839                 return (struct ib_mr *)region;
1840
1841         if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1842                 ib_umem_release(region);
1843                 return ERR_PTR(-EFAULT);
1844         }
1845
1846         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1847         if (!iwmr) {
1848                 ib_umem_release(region);
1849                 return ERR_PTR(-ENOMEM);
1850         }
1851
1852         iwpbl = &iwmr->iwpbl;
1853         iwpbl->iwmr = iwmr;
1854         iwmr->region = region;
1855         iwmr->ibmr.pd = pd;
1856         iwmr->ibmr.device = pd->device;
1857         ucontext = to_ucontext(pd->uobject->context);
1858
1859         iwmr->page_size = PAGE_SIZE;
1860         iwmr->page_msk = PAGE_MASK;
1861
1862         if (region->hugetlb && (req.reg_type == IW_MEMREG_TYPE_MEM))
1863                 i40iw_set_hugetlb_values(start, iwmr);
1864
1865         region_length = region->length + (start & (iwmr->page_size - 1));
1866         pg_shift = ffs(iwmr->page_size) - 1;
1867         pbl_depth = region_length >> pg_shift;
1868         pbl_depth += (region_length & (iwmr->page_size - 1)) ? 1 : 0;
1869         iwmr->length = region->length;
1870
1871         iwpbl->user_base = virt;
1872         palloc = &iwpbl->pble_alloc;
1873
1874         iwmr->type = req.reg_type;
1875         iwmr->page_cnt = (u32)pbl_depth;
1876
1877         switch (req.reg_type) {
1878         case IW_MEMREG_TYPE_QP:
1879                 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1880                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1881                 if (err)
1882                         goto error;
1883                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1884                 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1885                 iwpbl->on_list = true;
1886                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1887                 break;
1888         case IW_MEMREG_TYPE_CQ:
1889                 use_pbles = (req.cq_pages > 1);
1890                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1891                 if (err)
1892                         goto error;
1893
1894                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1895                 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1896                 iwpbl->on_list = true;
1897                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1898                 break;
1899         case IW_MEMREG_TYPE_MEM:
1900                 use_pbles = (iwmr->page_cnt != 1);
1901                 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1902
1903                 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1904                 if (err)
1905                         goto error;
1906
1907                 if (use_pbles) {
1908                         ret = i40iw_check_mr_contiguous(palloc, iwmr->page_size);
1909                         if (ret) {
1910                                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1911                                 iwpbl->pbl_allocated = false;
1912                         }
1913                 }
1914
1915                 access |= i40iw_get_user_access(acc);
1916                 stag = i40iw_create_stag(iwdev);
1917                 if (!stag) {
1918                         err = -ENOMEM;
1919                         goto error;
1920                 }
1921
1922                 iwmr->stag = stag;
1923                 iwmr->ibmr.rkey = stag;
1924                 iwmr->ibmr.lkey = stag;
1925
1926                 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1927                 if (err) {
1928                         i40iw_free_stag(iwdev, stag);
1929                         goto error;
1930                 }
1931
1932                 break;
1933         default:
1934                 goto error;
1935         }
1936
1937         iwmr->type = req.reg_type;
1938         if (req.reg_type == IW_MEMREG_TYPE_MEM)
1939                 i40iw_add_pdusecount(iwpd);
1940         return &iwmr->ibmr;
1941
1942 error:
1943         if (palloc->level != I40IW_LEVEL_0 && iwpbl->pbl_allocated)
1944                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1945         ib_umem_release(region);
1946         kfree(iwmr);
1947         return ERR_PTR(err);
1948 }
1949
1950 /**
1951  * i40iw_reg_phys_mr - register kernel physical memory
1952  * @pd: ibpd pointer
1953  * @addr: physical address of memory to register
1954  * @size: size of memory to register
1955  * @acc: Access rights
1956  * @iova_start: start of virtual address for physical buffers
1957  */
1958 struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1959                                 u64 addr,
1960                                 u64 size,
1961                                 int acc,
1962                                 u64 *iova_start)
1963 {
1964         struct i40iw_pd *iwpd = to_iwpd(pd);
1965         struct i40iw_device *iwdev = to_iwdev(pd->device);
1966         struct i40iw_pbl *iwpbl;
1967         struct i40iw_mr *iwmr;
1968         enum i40iw_status_code status;
1969         u32 stag;
1970         u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1971         int ret;
1972
1973         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1974         if (!iwmr)
1975                 return ERR_PTR(-ENOMEM);
1976         iwmr->ibmr.pd = pd;
1977         iwmr->ibmr.device = pd->device;
1978         iwpbl = &iwmr->iwpbl;
1979         iwpbl->iwmr = iwmr;
1980         iwmr->type = IW_MEMREG_TYPE_MEM;
1981         iwpbl->user_base = *iova_start;
1982         stag = i40iw_create_stag(iwdev);
1983         if (!stag) {
1984                 ret = -EOVERFLOW;
1985                 goto err;
1986         }
1987         access |= i40iw_get_user_access(acc);
1988         iwmr->stag = stag;
1989         iwmr->ibmr.rkey = stag;
1990         iwmr->ibmr.lkey = stag;
1991         iwmr->page_cnt = 1;
1992         iwmr->pgaddrmem[0]  = addr;
1993         iwmr->length = size;
1994         status = i40iw_hwreg_mr(iwdev, iwmr, access);
1995         if (status) {
1996                 i40iw_free_stag(iwdev, stag);
1997                 ret = -ENOMEM;
1998                 goto err;
1999         }
2000
2001         i40iw_add_pdusecount(iwpd);
2002         return &iwmr->ibmr;
2003  err:
2004         kfree(iwmr);
2005         return ERR_PTR(ret);
2006 }
2007
2008 /**
2009  * i40iw_get_dma_mr - register physical mem
2010  * @pd: ptr of pd
2011  * @acc: access for memory
2012  */
2013 static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
2014 {
2015         u64 kva = 0;
2016
2017         return i40iw_reg_phys_mr(pd, 0, 0, acc, &kva);
2018 }
2019
2020 /**
2021  * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
2022  * @iwmr: iwmr for IB's user page addresses
2023  * @ucontext: ptr to user context
2024  */
2025 static void i40iw_del_memlist(struct i40iw_mr *iwmr,
2026                               struct i40iw_ucontext *ucontext)
2027 {
2028         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2029         unsigned long flags;
2030
2031         switch (iwmr->type) {
2032         case IW_MEMREG_TYPE_CQ:
2033                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2034                 if (iwpbl->on_list) {
2035                         iwpbl->on_list = false;
2036                         list_del(&iwpbl->list);
2037                 }
2038                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2039                 break;
2040         case IW_MEMREG_TYPE_QP:
2041                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2042                 if (iwpbl->on_list) {
2043                         iwpbl->on_list = false;
2044                         list_del(&iwpbl->list);
2045                 }
2046                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2047                 break;
2048         default:
2049                 break;
2050         }
2051 }
2052
2053 /**
2054  * i40iw_dereg_mr - deregister mr
2055  * @ib_mr: mr ptr for dereg
2056  */
2057 static int i40iw_dereg_mr(struct ib_mr *ib_mr)
2058 {
2059         struct ib_pd *ibpd = ib_mr->pd;
2060         struct i40iw_pd *iwpd = to_iwpd(ibpd);
2061         struct i40iw_mr *iwmr = to_iwmr(ib_mr);
2062         struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
2063         enum i40iw_status_code status;
2064         struct i40iw_dealloc_stag_info *info;
2065         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2066         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
2067         struct i40iw_cqp_request *cqp_request;
2068         struct cqp_commands_info *cqp_info;
2069         u32 stag_idx;
2070
2071         if (iwmr->region)
2072                 ib_umem_release(iwmr->region);
2073
2074         if (iwmr->type != IW_MEMREG_TYPE_MEM) {
2075                 if (ibpd->uobject) {
2076                         struct i40iw_ucontext *ucontext;
2077
2078                         ucontext = to_ucontext(ibpd->uobject->context);
2079                         i40iw_del_memlist(iwmr, ucontext);
2080                 }
2081                 if (iwpbl->pbl_allocated && iwmr->type != IW_MEMREG_TYPE_QP)
2082                         i40iw_free_pble(iwdev->pble_rsrc, palloc);
2083                 kfree(iwmr);
2084                 return 0;
2085         }
2086
2087         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
2088         if (!cqp_request)
2089                 return -ENOMEM;
2090
2091         cqp_info = &cqp_request->info;
2092         info = &cqp_info->in.u.dealloc_stag.info;
2093         memset(info, 0, sizeof(*info));
2094
2095         info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
2096         info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
2097         stag_idx = info->stag_idx;
2098         info->mr = true;
2099         if (iwpbl->pbl_allocated)
2100                 info->dealloc_pbl = true;
2101
2102         cqp_info->cqp_cmd = OP_DEALLOC_STAG;
2103         cqp_info->post_sq = 1;
2104         cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
2105         cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2106         status = i40iw_handle_cqp_op(iwdev, cqp_request);
2107         if (status)
2108                 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
2109         i40iw_rem_pdusecount(iwpd, iwdev);
2110         i40iw_free_stag(iwdev, iwmr->stag);
2111         if (iwpbl->pbl_allocated)
2112                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
2113         kfree(iwmr);
2114         return 0;
2115 }
2116
2117 /**
2118  * i40iw_show_rev
2119  */
2120 static ssize_t i40iw_show_rev(struct device *dev,
2121                               struct device_attribute *attr, char *buf)
2122 {
2123         struct i40iw_ib_device *iwibdev = container_of(dev,
2124                                                        struct i40iw_ib_device,
2125                                                        ibdev.dev);
2126         u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
2127
2128         return sprintf(buf, "%x\n", hw_rev);
2129 }
2130
2131 /**
2132  * i40iw_show_hca
2133  */
2134 static ssize_t i40iw_show_hca(struct device *dev,
2135                               struct device_attribute *attr, char *buf)
2136 {
2137         return sprintf(buf, "I40IW\n");
2138 }
2139
2140 /**
2141  * i40iw_show_board
2142  */
2143 static ssize_t i40iw_show_board(struct device *dev,
2144                                 struct device_attribute *attr,
2145                                 char *buf)
2146 {
2147         return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
2148 }
2149
2150 static DEVICE_ATTR(hw_rev, S_IRUGO, i40iw_show_rev, NULL);
2151 static DEVICE_ATTR(hca_type, S_IRUGO, i40iw_show_hca, NULL);
2152 static DEVICE_ATTR(board_id, S_IRUGO, i40iw_show_board, NULL);
2153
2154 static struct device_attribute *i40iw_dev_attributes[] = {
2155         &dev_attr_hw_rev,
2156         &dev_attr_hca_type,
2157         &dev_attr_board_id
2158 };
2159
2160 /**
2161  * i40iw_copy_sg_list - copy sg list for qp
2162  * @sg_list: copied into sg_list
2163  * @sgl: copy from sgl
2164  * @num_sges: count of sg entries
2165  */
2166 static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2167 {
2168         unsigned int i;
2169
2170         for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2171                 sg_list[i].tag_off = sgl[i].addr;
2172                 sg_list[i].len = sgl[i].length;
2173                 sg_list[i].stag = sgl[i].lkey;
2174         }
2175 }
2176
2177 /**
2178  * i40iw_post_send -  kernel application wr
2179  * @ibqp: qp ptr for wr
2180  * @ib_wr: work request ptr
2181  * @bad_wr: return of bad wr if err
2182  */
2183 static int i40iw_post_send(struct ib_qp *ibqp,
2184                            const struct ib_send_wr *ib_wr,
2185                            const struct ib_send_wr **bad_wr)
2186 {
2187         struct i40iw_qp *iwqp;
2188         struct i40iw_qp_uk *ukqp;
2189         struct i40iw_post_sq_info info;
2190         enum i40iw_status_code ret;
2191         int err = 0;
2192         unsigned long flags;
2193         bool inv_stag;
2194
2195         iwqp = (struct i40iw_qp *)ibqp;
2196         ukqp = &iwqp->sc_qp.qp_uk;
2197
2198         spin_lock_irqsave(&iwqp->lock, flags);
2199
2200         if (iwqp->flush_issued) {
2201                 err = -EINVAL;
2202                 goto out;
2203         }
2204
2205         while (ib_wr) {
2206                 inv_stag = false;
2207                 memset(&info, 0, sizeof(info));
2208                 info.wr_id = (u64)(ib_wr->wr_id);
2209                 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2210                         info.signaled = true;
2211                 if (ib_wr->send_flags & IB_SEND_FENCE)
2212                         info.read_fence = true;
2213
2214                 switch (ib_wr->opcode) {
2215                 case IB_WR_SEND:
2216                         /* fall-through */
2217                 case IB_WR_SEND_WITH_INV:
2218                         if (ib_wr->opcode == IB_WR_SEND) {
2219                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2220                                         info.op_type = I40IW_OP_TYPE_SEND_SOL;
2221                                 else
2222                                         info.op_type = I40IW_OP_TYPE_SEND;
2223                         } else {
2224                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2225                                         info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2226                                 else
2227                                         info.op_type = I40IW_OP_TYPE_SEND_INV;
2228                         }
2229
2230                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2231                                 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2232                                 info.op.inline_send.len = ib_wr->sg_list[0].length;
2233                                 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2234                         } else {
2235                                 info.op.send.num_sges = ib_wr->num_sge;
2236                                 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2237                                 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2238                         }
2239
2240                         if (ret) {
2241                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2242                                         err = -ENOMEM;
2243                                 else
2244                                         err = -EINVAL;
2245                         }
2246                         break;
2247                 case IB_WR_RDMA_WRITE:
2248                         info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2249
2250                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2251                                 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2252                                 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2253                                 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2254                                 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2255                                 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2256                         } else {
2257                                 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2258                                 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2259                                 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2260                                 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2261                                 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2262                         }
2263
2264                         if (ret) {
2265                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2266                                         err = -ENOMEM;
2267                                 else
2268                                         err = -EINVAL;
2269                         }
2270                         break;
2271                 case IB_WR_RDMA_READ_WITH_INV:
2272                         inv_stag = true;
2273                         /* fall-through*/
2274                 case IB_WR_RDMA_READ:
2275                         if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2276                                 err = -EINVAL;
2277                                 break;
2278                         }
2279                         info.op_type = I40IW_OP_TYPE_RDMA_READ;
2280                         info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2281                         info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2282                         info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2283                         info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2284                         info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2285                         ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2286                         if (ret) {
2287                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2288                                         err = -ENOMEM;
2289                                 else
2290                                         err = -EINVAL;
2291                         }
2292                         break;
2293                 case IB_WR_LOCAL_INV:
2294                         info.op_type = I40IW_OP_TYPE_INV_STAG;
2295                         info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2296                         ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2297                         if (ret)
2298                                 err = -ENOMEM;
2299                         break;
2300                 case IB_WR_REG_MR:
2301                 {
2302                         struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2303                         int flags = reg_wr(ib_wr)->access;
2304                         struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2305                         struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2306                         struct i40iw_fast_reg_stag_info info;
2307
2308                         memset(&info, 0, sizeof(info));
2309                         info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2310                         info.access_rights |= i40iw_get_user_access(flags);
2311                         info.stag_key = reg_wr(ib_wr)->key & 0xff;
2312                         info.stag_idx = reg_wr(ib_wr)->key >> 8;
2313                         info.page_size = reg_wr(ib_wr)->mr->page_size;
2314                         info.wr_id = ib_wr->wr_id;
2315
2316                         info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2317                         info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2318                         info.total_len = iwmr->ibmr.length;
2319                         info.reg_addr_pa = *(u64 *)palloc->level1.addr;
2320                         info.first_pm_pbl_index = palloc->level1.idx;
2321                         info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2322                         info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2323
2324                         if (iwmr->npages > I40IW_MIN_PAGES_PER_FMR)
2325                                 info.chunk_size = 1;
2326
2327                         ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2328                         if (ret)
2329                                 err = -ENOMEM;
2330                         break;
2331                 }
2332                 default:
2333                         err = -EINVAL;
2334                         i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2335                                      ib_wr->opcode);
2336                         break;
2337                 }
2338
2339                 if (err)
2340                         break;
2341                 ib_wr = ib_wr->next;
2342         }
2343
2344 out:
2345         if (err)
2346                 *bad_wr = ib_wr;
2347         else
2348                 ukqp->ops.iw_qp_post_wr(ukqp);
2349         spin_unlock_irqrestore(&iwqp->lock, flags);
2350
2351         return err;
2352 }
2353
2354 /**
2355  * i40iw_post_recv - post receive wr for kernel application
2356  * @ibqp: ib qp pointer
2357  * @ib_wr: work request for receive
2358  * @bad_wr: bad wr caused an error
2359  */
2360 static int i40iw_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *ib_wr,
2361                            const struct ib_recv_wr **bad_wr)
2362 {
2363         struct i40iw_qp *iwqp;
2364         struct i40iw_qp_uk *ukqp;
2365         struct i40iw_post_rq_info post_recv;
2366         struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2367         enum i40iw_status_code ret = 0;
2368         unsigned long flags;
2369         int err = 0;
2370
2371         iwqp = (struct i40iw_qp *)ibqp;
2372         ukqp = &iwqp->sc_qp.qp_uk;
2373
2374         memset(&post_recv, 0, sizeof(post_recv));
2375         spin_lock_irqsave(&iwqp->lock, flags);
2376
2377         if (iwqp->flush_issued) {
2378                 err = -EINVAL;
2379                 goto out;
2380         }
2381
2382         while (ib_wr) {
2383                 post_recv.num_sges = ib_wr->num_sge;
2384                 post_recv.wr_id = ib_wr->wr_id;
2385                 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2386                 post_recv.sg_list = sg_list;
2387                 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2388                 if (ret) {
2389                         i40iw_pr_err(" post_recv err %d\n", ret);
2390                         if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2391                                 err = -ENOMEM;
2392                         else
2393                                 err = -EINVAL;
2394                         *bad_wr = ib_wr;
2395                         goto out;
2396                 }
2397                 ib_wr = ib_wr->next;
2398         }
2399  out:
2400         spin_unlock_irqrestore(&iwqp->lock, flags);
2401         return err;
2402 }
2403
2404 /**
2405  * i40iw_poll_cq - poll cq for completion (kernel apps)
2406  * @ibcq: cq to poll
2407  * @num_entries: number of entries to poll
2408  * @entry: wr of entry completed
2409  */
2410 static int i40iw_poll_cq(struct ib_cq *ibcq,
2411                          int num_entries,
2412                          struct ib_wc *entry)
2413 {
2414         struct i40iw_cq *iwcq;
2415         int cqe_count = 0;
2416         struct i40iw_cq_poll_info cq_poll_info;
2417         enum i40iw_status_code ret;
2418         struct i40iw_cq_uk *ukcq;
2419         struct i40iw_sc_qp *qp;
2420         struct i40iw_qp *iwqp;
2421         unsigned long flags;
2422
2423         iwcq = (struct i40iw_cq *)ibcq;
2424         ukcq = &iwcq->sc_cq.cq_uk;
2425
2426         spin_lock_irqsave(&iwcq->lock, flags);
2427         while (cqe_count < num_entries) {
2428                 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info);
2429                 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2430                         break;
2431                 } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2432                         continue;
2433                 } else if (ret) {
2434                         if (!cqe_count)
2435                                 cqe_count = -1;
2436                         break;
2437                 }
2438                 entry->wc_flags = 0;
2439                 entry->wr_id = cq_poll_info.wr_id;
2440                 if (cq_poll_info.error) {
2441                         entry->status = IB_WC_WR_FLUSH_ERR;
2442                         entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2443                 } else {
2444                         entry->status = IB_WC_SUCCESS;
2445                 }
2446
2447                 switch (cq_poll_info.op_type) {
2448                 case I40IW_OP_TYPE_RDMA_WRITE:
2449                         entry->opcode = IB_WC_RDMA_WRITE;
2450                         break;
2451                 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2452                 case I40IW_OP_TYPE_RDMA_READ:
2453                         entry->opcode = IB_WC_RDMA_READ;
2454                         break;
2455                 case I40IW_OP_TYPE_SEND_SOL:
2456                 case I40IW_OP_TYPE_SEND_SOL_INV:
2457                 case I40IW_OP_TYPE_SEND_INV:
2458                 case I40IW_OP_TYPE_SEND:
2459                         entry->opcode = IB_WC_SEND;
2460                         break;
2461                 case I40IW_OP_TYPE_REC:
2462                         entry->opcode = IB_WC_RECV;
2463                         break;
2464                 default:
2465                         entry->opcode = IB_WC_RECV;
2466                         break;
2467                 }
2468
2469                 entry->ex.imm_data = 0;
2470                 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2471                 entry->qp = (struct ib_qp *)qp->back_qp;
2472                 entry->src_qp = cq_poll_info.qp_id;
2473                 iwqp = (struct i40iw_qp *)qp->back_qp;
2474                 if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2475                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2476                                 complete(&iwqp->sq_drained);
2477                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2478                                 complete(&iwqp->rq_drained);
2479                 }
2480                 entry->byte_len = cq_poll_info.bytes_xfered;
2481                 entry++;
2482                 cqe_count++;
2483         }
2484         spin_unlock_irqrestore(&iwcq->lock, flags);
2485         return cqe_count;
2486 }
2487
2488 /**
2489  * i40iw_req_notify_cq - arm cq kernel application
2490  * @ibcq: cq to arm
2491  * @notify_flags: notofication flags
2492  */
2493 static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2494                                enum ib_cq_notify_flags notify_flags)
2495 {
2496         struct i40iw_cq *iwcq;
2497         struct i40iw_cq_uk *ukcq;
2498         unsigned long flags;
2499         enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_EVENT;
2500
2501         iwcq = (struct i40iw_cq *)ibcq;
2502         ukcq = &iwcq->sc_cq.cq_uk;
2503         if (notify_flags == IB_CQ_SOLICITED)
2504                 cq_notify = IW_CQ_COMPL_SOLICITED;
2505         spin_lock_irqsave(&iwcq->lock, flags);
2506         ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2507         spin_unlock_irqrestore(&iwcq->lock, flags);
2508         return 0;
2509 }
2510
2511 /**
2512  * i40iw_port_immutable - return port's immutable data
2513  * @ibdev: ib dev struct
2514  * @port_num: port number
2515  * @immutable: immutable data for the port return
2516  */
2517 static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2518                                 struct ib_port_immutable *immutable)
2519 {
2520         struct ib_port_attr attr;
2521         int err;
2522
2523         immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2524
2525         err = ib_query_port(ibdev, port_num, &attr);
2526
2527         if (err)
2528                 return err;
2529
2530         immutable->pkey_tbl_len = attr.pkey_tbl_len;
2531         immutable->gid_tbl_len = attr.gid_tbl_len;
2532
2533         return 0;
2534 }
2535
2536 static const char * const i40iw_hw_stat_names[] = {
2537         // 32bit names
2538         [I40IW_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
2539         [I40IW_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
2540         [I40IW_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
2541         [I40IW_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
2542         [I40IW_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
2543         [I40IW_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
2544         [I40IW_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
2545         [I40IW_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
2546         [I40IW_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
2547         // 64bit names
2548         [I40IW_HW_STAT_INDEX_IP4RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2549                 "ip4InOctets",
2550         [I40IW_HW_STAT_INDEX_IP4RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2551                 "ip4InPkts",
2552         [I40IW_HW_STAT_INDEX_IP4RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2553                 "ip4InReasmRqd",
2554         [I40IW_HW_STAT_INDEX_IP4RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2555                 "ip4InMcastPkts",
2556         [I40IW_HW_STAT_INDEX_IP4TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2557                 "ip4OutOctets",
2558         [I40IW_HW_STAT_INDEX_IP4TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2559                 "ip4OutPkts",
2560         [I40IW_HW_STAT_INDEX_IP4TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2561                 "ip4OutSegRqd",
2562         [I40IW_HW_STAT_INDEX_IP4TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2563                 "ip4OutMcastPkts",
2564         [I40IW_HW_STAT_INDEX_IP6RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2565                 "ip6InOctets",
2566         [I40IW_HW_STAT_INDEX_IP6RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2567                 "ip6InPkts",
2568         [I40IW_HW_STAT_INDEX_IP6RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2569                 "ip6InReasmRqd",
2570         [I40IW_HW_STAT_INDEX_IP6RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2571                 "ip6InMcastPkts",
2572         [I40IW_HW_STAT_INDEX_IP6TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2573                 "ip6OutOctets",
2574         [I40IW_HW_STAT_INDEX_IP6TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2575                 "ip6OutPkts",
2576         [I40IW_HW_STAT_INDEX_IP6TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2577                 "ip6OutSegRqd",
2578         [I40IW_HW_STAT_INDEX_IP6TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2579                 "ip6OutMcastPkts",
2580         [I40IW_HW_STAT_INDEX_TCPRXSEGS + I40IW_HW_STAT_INDEX_MAX_32] =
2581                 "tcpInSegs",
2582         [I40IW_HW_STAT_INDEX_TCPTXSEG + I40IW_HW_STAT_INDEX_MAX_32] =
2583                 "tcpOutSegs",
2584         [I40IW_HW_STAT_INDEX_RDMARXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2585                 "iwInRdmaReads",
2586         [I40IW_HW_STAT_INDEX_RDMARXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2587                 "iwInRdmaSends",
2588         [I40IW_HW_STAT_INDEX_RDMARXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2589                 "iwInRdmaWrites",
2590         [I40IW_HW_STAT_INDEX_RDMATXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2591                 "iwOutRdmaReads",
2592         [I40IW_HW_STAT_INDEX_RDMATXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2593                 "iwOutRdmaSends",
2594         [I40IW_HW_STAT_INDEX_RDMATXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2595                 "iwOutRdmaWrites",
2596         [I40IW_HW_STAT_INDEX_RDMAVBND + I40IW_HW_STAT_INDEX_MAX_32] =
2597                 "iwRdmaBnd",
2598         [I40IW_HW_STAT_INDEX_RDMAVINV + I40IW_HW_STAT_INDEX_MAX_32] =
2599                 "iwRdmaInv"
2600 };
2601
2602 static void i40iw_get_dev_fw_str(struct ib_device *dev, char *str)
2603 {
2604         u32 firmware_version = I40IW_FW_VERSION;
2605
2606         snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u", firmware_version,
2607                  (firmware_version & 0x000000ff));
2608 }
2609
2610 /**
2611  * i40iw_alloc_hw_stats - Allocate a hw stats structure
2612  * @ibdev: device pointer from stack
2613  * @port_num: port number
2614  */
2615 static struct rdma_hw_stats *i40iw_alloc_hw_stats(struct ib_device *ibdev,
2616                                                   u8 port_num)
2617 {
2618         struct i40iw_device *iwdev = to_iwdev(ibdev);
2619         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2620         int num_counters = I40IW_HW_STAT_INDEX_MAX_32 +
2621                 I40IW_HW_STAT_INDEX_MAX_64;
2622         unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
2623
2624         BUILD_BUG_ON(ARRAY_SIZE(i40iw_hw_stat_names) !=
2625                      (I40IW_HW_STAT_INDEX_MAX_32 +
2626                       I40IW_HW_STAT_INDEX_MAX_64));
2627
2628         /*
2629          * PFs get the default update lifespan, but VFs only update once
2630          * per second
2631          */
2632         if (!dev->is_pf)
2633                 lifespan = 1000;
2634         return rdma_alloc_hw_stats_struct(i40iw_hw_stat_names, num_counters,
2635                                           lifespan);
2636 }
2637
2638 /**
2639  * i40iw_get_hw_stats - Populates the rdma_hw_stats structure
2640  * @ibdev: device pointer from stack
2641  * @stats: stats pointer from stack
2642  * @port_num: port number
2643  * @index: which hw counter the stack is requesting we update
2644  */
2645 static int i40iw_get_hw_stats(struct ib_device *ibdev,
2646                               struct rdma_hw_stats *stats,
2647                               u8 port_num, int index)
2648 {
2649         struct i40iw_device *iwdev = to_iwdev(ibdev);
2650         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2651         struct i40iw_vsi_pestat *devstat = iwdev->vsi.pestat;
2652         struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2653
2654         if (dev->is_pf) {
2655                 i40iw_hw_stats_read_all(devstat, &devstat->hw_stats);
2656         } else {
2657                 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2658                         return -ENOSYS;
2659         }
2660
2661         memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
2662
2663         return stats->num_counters;
2664 }
2665
2666 /**
2667  * i40iw_query_gid - Query port GID
2668  * @ibdev: device pointer from stack
2669  * @port: port number
2670  * @index: Entry index
2671  * @gid: Global ID
2672  */
2673 static int i40iw_query_gid(struct ib_device *ibdev,
2674                            u8 port,
2675                            int index,
2676                            union ib_gid *gid)
2677 {
2678         struct i40iw_device *iwdev = to_iwdev(ibdev);
2679
2680         memset(gid->raw, 0, sizeof(gid->raw));
2681         ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2682         return 0;
2683 }
2684
2685 /**
2686  * i40iw_query_pkey - Query partition key
2687  * @ibdev: device pointer from stack
2688  * @port: port number
2689  * @index: index of pkey
2690  * @pkey: pointer to store the pkey
2691  */
2692 static int i40iw_query_pkey(struct ib_device *ibdev,
2693                             u8 port,
2694                             u16 index,
2695                             u16 *pkey)
2696 {
2697         *pkey = 0;
2698         return 0;
2699 }
2700
2701 /**
2702  * i40iw_get_vector_affinity - report IRQ affinity mask
2703  * @ibdev: IB device
2704  * @comp_vector: completion vector index
2705  */
2706 static const struct cpumask *i40iw_get_vector_affinity(struct ib_device *ibdev,
2707                                                        int comp_vector)
2708 {
2709         struct i40iw_device *iwdev = to_iwdev(ibdev);
2710         struct i40iw_msix_vector *msix_vec;
2711
2712         if (iwdev->msix_shared)
2713                 msix_vec = &iwdev->iw_msixtbl[comp_vector];
2714         else
2715                 msix_vec = &iwdev->iw_msixtbl[comp_vector + 1];
2716
2717         return irq_get_affinity_mask(msix_vec->irq);
2718 }
2719
2720 /**
2721  * i40iw_init_rdma_device - initialization of iwarp device
2722  * @iwdev: iwarp device
2723  */
2724 static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2725 {
2726         struct i40iw_ib_device *iwibdev;
2727         struct net_device *netdev = iwdev->netdev;
2728         struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2729
2730         iwibdev = (struct i40iw_ib_device *)ib_alloc_device(sizeof(*iwibdev));
2731         if (!iwibdev) {
2732                 i40iw_pr_err("iwdev == NULL\n");
2733                 return NULL;
2734         }
2735         strlcpy(iwibdev->ibdev.name, "i40iw%d", IB_DEVICE_NAME_MAX);
2736         iwibdev->ibdev.owner = THIS_MODULE;
2737         iwdev->iwibdev = iwibdev;
2738         iwibdev->iwdev = iwdev;
2739
2740         iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2741         ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2742
2743         iwibdev->ibdev.uverbs_cmd_mask =
2744             (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2745             (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2746             (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2747             (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2748             (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2749             (1ull << IB_USER_VERBS_CMD_REG_MR) |
2750             (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2751             (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2752             (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2753             (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2754             (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2755             (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2756             (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2757             (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2758             (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2759             (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2760             (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2761             (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2762             (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2763             (1ull << IB_USER_VERBS_CMD_POST_SEND);
2764         iwibdev->ibdev.phys_port_cnt = 1;
2765         iwibdev->ibdev.num_comp_vectors = iwdev->ceqs_count;
2766         iwibdev->ibdev.dev.parent = &pcidev->dev;
2767         iwibdev->ibdev.query_port = i40iw_query_port;
2768         iwibdev->ibdev.query_pkey = i40iw_query_pkey;
2769         iwibdev->ibdev.query_gid = i40iw_query_gid;
2770         iwibdev->ibdev.alloc_ucontext = i40iw_alloc_ucontext;
2771         iwibdev->ibdev.dealloc_ucontext = i40iw_dealloc_ucontext;
2772         iwibdev->ibdev.mmap = i40iw_mmap;
2773         iwibdev->ibdev.alloc_pd = i40iw_alloc_pd;
2774         iwibdev->ibdev.dealloc_pd = i40iw_dealloc_pd;
2775         iwibdev->ibdev.create_qp = i40iw_create_qp;
2776         iwibdev->ibdev.modify_qp = i40iw_modify_qp;
2777         iwibdev->ibdev.query_qp = i40iw_query_qp;
2778         iwibdev->ibdev.destroy_qp = i40iw_destroy_qp;
2779         iwibdev->ibdev.create_cq = i40iw_create_cq;
2780         iwibdev->ibdev.destroy_cq = i40iw_destroy_cq;
2781         iwibdev->ibdev.get_dma_mr = i40iw_get_dma_mr;
2782         iwibdev->ibdev.reg_user_mr = i40iw_reg_user_mr;
2783         iwibdev->ibdev.dereg_mr = i40iw_dereg_mr;
2784         iwibdev->ibdev.alloc_hw_stats = i40iw_alloc_hw_stats;
2785         iwibdev->ibdev.get_hw_stats = i40iw_get_hw_stats;
2786         iwibdev->ibdev.query_device = i40iw_query_device;
2787         iwibdev->ibdev.drain_sq = i40iw_drain_sq;
2788         iwibdev->ibdev.drain_rq = i40iw_drain_rq;
2789         iwibdev->ibdev.alloc_mr = i40iw_alloc_mr;
2790         iwibdev->ibdev.map_mr_sg = i40iw_map_mr_sg;
2791         iwibdev->ibdev.iwcm = kzalloc(sizeof(*iwibdev->ibdev.iwcm), GFP_KERNEL);
2792         if (!iwibdev->ibdev.iwcm) {
2793                 ib_dealloc_device(&iwibdev->ibdev);
2794                 return NULL;
2795         }
2796
2797         iwibdev->ibdev.iwcm->add_ref = i40iw_add_ref;
2798         iwibdev->ibdev.iwcm->rem_ref = i40iw_rem_ref;
2799         iwibdev->ibdev.iwcm->get_qp = i40iw_get_qp;
2800         iwibdev->ibdev.iwcm->connect = i40iw_connect;
2801         iwibdev->ibdev.iwcm->accept = i40iw_accept;
2802         iwibdev->ibdev.iwcm->reject = i40iw_reject;
2803         iwibdev->ibdev.iwcm->create_listen = i40iw_create_listen;
2804         iwibdev->ibdev.iwcm->destroy_listen = i40iw_destroy_listen;
2805         memcpy(iwibdev->ibdev.iwcm->ifname, netdev->name,
2806                sizeof(iwibdev->ibdev.iwcm->ifname));
2807         iwibdev->ibdev.get_port_immutable   = i40iw_port_immutable;
2808         iwibdev->ibdev.get_dev_fw_str       = i40iw_get_dev_fw_str;
2809         iwibdev->ibdev.poll_cq = i40iw_poll_cq;
2810         iwibdev->ibdev.req_notify_cq = i40iw_req_notify_cq;
2811         iwibdev->ibdev.post_send = i40iw_post_send;
2812         iwibdev->ibdev.post_recv = i40iw_post_recv;
2813         iwibdev->ibdev.get_vector_affinity = i40iw_get_vector_affinity;
2814
2815         return iwibdev;
2816 }
2817
2818 /**
2819  * i40iw_port_ibevent - indicate port event
2820  * @iwdev: iwarp device
2821  */
2822 void i40iw_port_ibevent(struct i40iw_device *iwdev)
2823 {
2824         struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2825         struct ib_event event;
2826
2827         event.device = &iwibdev->ibdev;
2828         event.element.port_num = 1;
2829         event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2830         ib_dispatch_event(&event);
2831 }
2832
2833 /**
2834  * i40iw_unregister_rdma_device - unregister of iwarp from IB
2835  * @iwibdev: rdma device ptr
2836  */
2837 static void i40iw_unregister_rdma_device(struct i40iw_ib_device *iwibdev)
2838 {
2839         int i;
2840
2841         for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i)
2842                 device_remove_file(&iwibdev->ibdev.dev,
2843                                    i40iw_dev_attributes[i]);
2844         ib_unregister_device(&iwibdev->ibdev);
2845 }
2846
2847 /**
2848  * i40iw_destroy_rdma_device - destroy rdma device and free resources
2849  * @iwibdev: IB device ptr
2850  */
2851 void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2852 {
2853         if (!iwibdev)
2854                 return;
2855
2856         i40iw_unregister_rdma_device(iwibdev);
2857         kfree(iwibdev->ibdev.iwcm);
2858         iwibdev->ibdev.iwcm = NULL;
2859         wait_event_timeout(iwibdev->iwdev->close_wq,
2860                            !atomic64_read(&iwibdev->iwdev->use_count),
2861                            I40IW_EVENT_TIMEOUT);
2862         ib_dealloc_device(&iwibdev->ibdev);
2863 }
2864
2865 /**
2866  * i40iw_register_rdma_device - register iwarp device to IB
2867  * @iwdev: iwarp device
2868  */
2869 int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2870 {
2871         int i, ret;
2872         struct i40iw_ib_device *iwibdev;
2873
2874         iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2875         if (!iwdev->iwibdev)
2876                 return -ENOMEM;
2877         iwibdev = iwdev->iwibdev;
2878
2879         iwibdev->ibdev.driver_id = RDMA_DRIVER_I40IW;
2880         ret = ib_register_device(&iwibdev->ibdev, NULL);
2881         if (ret)
2882                 goto error;
2883
2884         for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) {
2885                 ret =
2886                     device_create_file(&iwibdev->ibdev.dev,
2887                                        i40iw_dev_attributes[i]);
2888                 if (ret) {
2889                         while (i > 0) {
2890                                 i--;
2891                                 device_remove_file(&iwibdev->ibdev.dev, i40iw_dev_attributes[i]);
2892                         }
2893                         ib_unregister_device(&iwibdev->ibdev);
2894                         goto error;
2895                 }
2896         }
2897         return 0;
2898 error:
2899         kfree(iwdev->iwibdev->ibdev.iwcm);
2900         iwdev->iwibdev->ibdev.iwcm = NULL;
2901         ib_dealloc_device(&iwdev->iwibdev->ibdev);
2902         return ret;
2903 }