2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
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11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
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21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/mlx5/cmd.h>
34 #include <linux/mlx5/vport.h>
35 #include <rdma/ib_mad.h>
36 #include <rdma/ib_smi.h>
37 #include <rdma/ib_pma.h>
41 MLX5_IB_VENDOR_CLASS1 = 0x9,
42 MLX5_IB_VENDOR_CLASS2 = 0xa
45 static bool can_do_mad_ifc(struct mlx5_ib_dev *dev, u8 port_num,
46 struct ib_mad *in_mad)
48 if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED &&
49 in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
51 return dev->mdev->port_caps[port_num - 1].has_smi;
54 int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey,
55 u8 port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
56 const void *in_mad, void *response_mad)
60 if (!can_do_mad_ifc(dev, port, (struct ib_mad *)in_mad))
63 /* Key check traps can't be generated unless we have in_wc to
64 * tell us where to send the trap.
66 if (ignore_mkey || !in_wc)
68 if (ignore_bkey || !in_wc)
71 return mlx5_core_mad_ifc(dev->mdev, in_mad, response_mad, op_modifier, port);
74 static int process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
75 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
76 const struct ib_mad *in_mad, struct ib_mad *out_mad)
81 slid = in_wc ? ib_lid_cpu16(in_wc->slid) : be16_to_cpu(IB_LID_PERMISSIVE);
83 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0)
84 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
86 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
87 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
88 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
89 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
90 in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
91 return IB_MAD_RESULT_SUCCESS;
93 /* Don't process SMInfo queries -- the SMA can't handle them.
95 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
96 return IB_MAD_RESULT_SUCCESS;
97 } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
98 in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS1 ||
99 in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS2 ||
100 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
101 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
102 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
103 return IB_MAD_RESULT_SUCCESS;
105 return IB_MAD_RESULT_SUCCESS;
108 err = mlx5_MAD_IFC(to_mdev(ibdev),
109 mad_flags & IB_MAD_IGNORE_MKEY,
110 mad_flags & IB_MAD_IGNORE_BKEY,
111 port_num, in_wc, in_grh, in_mad, out_mad);
113 return IB_MAD_RESULT_FAILURE;
115 /* set return bit in status of directed route responses */
116 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
117 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
119 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
120 /* no response for trap repress */
121 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
123 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
126 static void pma_cnt_ext_assign(struct ib_pma_portcounters_ext *pma_cnt_ext,
129 #define MLX5_SUM_CNT(p, cntr1, cntr2) \
130 (MLX5_GET64(query_vport_counter_out, p, cntr1) + \
131 MLX5_GET64(query_vport_counter_out, p, cntr2))
133 pma_cnt_ext->port_xmit_data =
134 cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.octets,
135 transmitted_ib_multicast.octets) >> 2);
136 pma_cnt_ext->port_rcv_data =
137 cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.octets,
138 received_ib_multicast.octets) >> 2);
139 pma_cnt_ext->port_xmit_packets =
140 cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.packets,
141 transmitted_ib_multicast.packets));
142 pma_cnt_ext->port_rcv_packets =
143 cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.packets,
144 received_ib_multicast.packets));
145 pma_cnt_ext->port_unicast_xmit_packets =
146 MLX5_GET64_BE(query_vport_counter_out,
147 out, transmitted_ib_unicast.packets);
148 pma_cnt_ext->port_unicast_rcv_packets =
149 MLX5_GET64_BE(query_vport_counter_out,
150 out, received_ib_unicast.packets);
151 pma_cnt_ext->port_multicast_xmit_packets =
152 MLX5_GET64_BE(query_vport_counter_out,
153 out, transmitted_ib_multicast.packets);
154 pma_cnt_ext->port_multicast_rcv_packets =
155 MLX5_GET64_BE(query_vport_counter_out,
156 out, received_ib_multicast.packets);
159 static void pma_cnt_assign(struct ib_pma_portcounters *pma_cnt,
162 /* Traffic counters will be reported in
163 * their 64bit form via ib_pma_portcounters_ext by default.
165 void *out_pma = MLX5_ADDR_OF(ppcnt_reg, out,
168 #define MLX5_ASSIGN_PMA_CNTR(counter_var, counter_name) { \
169 counter_var = MLX5_GET_BE(typeof(counter_var), \
170 ib_port_cntrs_grp_data_layout, \
171 out_pma, counter_name); \
174 MLX5_ASSIGN_PMA_CNTR(pma_cnt->symbol_error_counter,
175 symbol_error_counter);
176 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_error_recovery_counter,
177 link_error_recovery_counter);
178 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_downed_counter,
179 link_downed_counter);
180 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_errors,
182 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_remphys_errors,
183 port_rcv_remote_physical_errors);
184 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_switch_relay_errors,
185 port_rcv_switch_relay_errors);
186 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_discards,
188 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_constraint_errors,
189 port_xmit_constraint_errors);
190 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_wait,
192 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_constraint_errors,
193 port_rcv_constraint_errors);
194 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_overrun_errors,
195 link_overrun_errors);
196 MLX5_ASSIGN_PMA_CNTR(pma_cnt->vl15_dropped,
200 static int process_pma_cmd(struct mlx5_ib_dev *dev, u8 port_num,
201 const struct ib_mad *in_mad, struct ib_mad *out_mad)
203 struct mlx5_core_dev *mdev;
204 bool native_port = true;
209 mdev = mlx5_ib_get_native_port_mdev(dev, port_num, &mdev_port_num);
211 /* Fail to get the native port, likely due to 2nd port is still
212 * unaffiliated. In such case default to 1st port and attached
219 if (MLX5_CAP_GEN(dev->mdev, num_ports) == 1) {
220 /* set local port to one for Function-Per-Port HCA. */
225 /* Declaring support of extended counters */
226 if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO) {
227 struct ib_class_port_info cpi = {};
229 cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
230 memcpy((out_mad->data + 40), &cpi, sizeof(cpi));
231 err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
235 if (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT) {
236 struct ib_pma_portcounters_ext *pma_cnt_ext =
237 (struct ib_pma_portcounters_ext *)(out_mad->data + 40);
238 int sz = MLX5_ST_SZ_BYTES(query_vport_counter_out);
240 out_cnt = kvzalloc(sz, GFP_KERNEL);
242 err = IB_MAD_RESULT_FAILURE;
246 err = mlx5_core_query_vport_counter(mdev, 0, 0,
247 mdev_port_num, out_cnt, sz);
249 pma_cnt_ext_assign(pma_cnt_ext, out_cnt);
251 struct ib_pma_portcounters *pma_cnt =
252 (struct ib_pma_portcounters *)(out_mad->data + 40);
253 int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
255 out_cnt = kvzalloc(sz, GFP_KERNEL);
257 err = IB_MAD_RESULT_FAILURE;
261 err = mlx5_core_query_ib_ppcnt(mdev, mdev_port_num,
264 pma_cnt_assign(pma_cnt, out_cnt);
267 err = err ? IB_MAD_RESULT_FAILURE :
268 IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
271 mlx5_ib_put_native_port_mdev(dev, port_num);
275 int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
276 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
277 const struct ib_mad_hdr *in, size_t in_mad_size,
278 struct ib_mad_hdr *out, size_t *out_mad_size,
279 u16 *out_mad_pkey_index)
281 struct mlx5_ib_dev *dev = to_mdev(ibdev);
282 const struct ib_mad *in_mad = (const struct ib_mad *)in;
283 struct ib_mad *out_mad = (struct ib_mad *)out;
286 if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
287 *out_mad_size != sizeof(*out_mad)))
288 return IB_MAD_RESULT_FAILURE;
290 memset(out_mad->data, 0, sizeof(out_mad->data));
292 if (MLX5_CAP_GEN(dev->mdev, vport_counters) &&
293 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
294 in_mad->mad_hdr.method == IB_MGMT_METHOD_GET) {
295 ret = process_pma_cmd(dev, port_num, in_mad, out_mad);
297 ret = process_mad(ibdev, mad_flags, port_num, in_wc, in_grh,
303 int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port)
305 struct ib_smp *in_mad = NULL;
306 struct ib_smp *out_mad = NULL;
310 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
311 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
312 if (!in_mad || !out_mad)
315 init_query_mad(in_mad);
316 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
317 in_mad->attr_mod = cpu_to_be32(port);
319 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
321 packet_error = be16_to_cpu(out_mad->status);
323 dev->mdev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
324 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
332 int mlx5_query_mad_ifc_smp_attr_node_info(struct ib_device *ibdev,
333 struct ib_smp *out_mad)
335 struct ib_smp *in_mad = NULL;
338 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
342 init_query_mad(in_mad);
343 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
345 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad,
352 int mlx5_query_mad_ifc_system_image_guid(struct ib_device *ibdev,
353 __be64 *sys_image_guid)
355 struct ib_smp *out_mad = NULL;
358 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
362 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
366 memcpy(sys_image_guid, out_mad->data + 4, 8);
374 int mlx5_query_mad_ifc_max_pkeys(struct ib_device *ibdev,
377 struct ib_smp *out_mad = NULL;
380 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
384 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
388 *max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
396 int mlx5_query_mad_ifc_vendor_id(struct ib_device *ibdev,
399 struct ib_smp *out_mad = NULL;
402 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
406 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
410 *vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 0xffff;
418 int mlx5_query_mad_ifc_node_desc(struct mlx5_ib_dev *dev, char *node_desc)
420 struct ib_smp *in_mad = NULL;
421 struct ib_smp *out_mad = NULL;
424 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
425 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
426 if (!in_mad || !out_mad)
429 init_query_mad(in_mad);
430 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
432 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
436 memcpy(node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
443 int mlx5_query_mad_ifc_node_guid(struct mlx5_ib_dev *dev, __be64 *node_guid)
445 struct ib_smp *in_mad = NULL;
446 struct ib_smp *out_mad = NULL;
449 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
450 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
451 if (!in_mad || !out_mad)
454 init_query_mad(in_mad);
455 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
457 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
461 memcpy(node_guid, out_mad->data + 12, 8);
468 int mlx5_query_mad_ifc_pkey(struct ib_device *ibdev, u8 port, u16 index,
471 struct ib_smp *in_mad = NULL;
472 struct ib_smp *out_mad = NULL;
475 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
476 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
477 if (!in_mad || !out_mad)
480 init_query_mad(in_mad);
481 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
482 in_mad->attr_mod = cpu_to_be32(index / 32);
484 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
489 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
497 int mlx5_query_mad_ifc_gids(struct ib_device *ibdev, u8 port, int index,
500 struct ib_smp *in_mad = NULL;
501 struct ib_smp *out_mad = NULL;
504 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
505 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
506 if (!in_mad || !out_mad)
509 init_query_mad(in_mad);
510 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
511 in_mad->attr_mod = cpu_to_be32(port);
513 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
518 memcpy(gid->raw, out_mad->data + 8, 8);
520 init_query_mad(in_mad);
521 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
522 in_mad->attr_mod = cpu_to_be32(index / 8);
524 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
529 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
537 int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
538 struct ib_port_attr *props)
540 struct mlx5_ib_dev *dev = to_mdev(ibdev);
541 struct mlx5_core_dev *mdev = dev->mdev;
542 struct ib_smp *in_mad = NULL;
543 struct ib_smp *out_mad = NULL;
544 int ext_active_speed;
547 if (port < 1 || port > dev->num_ports) {
548 mlx5_ib_warn(dev, "invalid port number %d\n", port);
552 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
553 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
554 if (!in_mad || !out_mad)
557 /* props being zeroed by the caller, avoid zeroing it here */
559 init_query_mad(in_mad);
560 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
561 in_mad->attr_mod = cpu_to_be32(port);
563 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
565 mlx5_ib_warn(dev, "err %d\n", err);
569 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
570 props->lmc = out_mad->data[34] & 0x7;
571 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
572 props->sm_sl = out_mad->data[36] & 0xf;
573 props->state = out_mad->data[32] & 0xf;
574 props->phys_state = out_mad->data[33] >> 4;
575 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
576 props->gid_tbl_len = out_mad->data[50];
577 props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
578 props->pkey_tbl_len = mdev->port_caps[port - 1].pkey_table_len;
579 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
580 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
581 props->active_width = out_mad->data[31] & 0xf;
582 props->active_speed = out_mad->data[35] >> 4;
583 props->max_mtu = out_mad->data[41] & 0xf;
584 props->active_mtu = out_mad->data[36] >> 4;
585 props->subnet_timeout = out_mad->data[51] & 0x1f;
586 props->max_vl_num = out_mad->data[37] >> 4;
587 props->init_type_reply = out_mad->data[41] >> 4;
589 /* Check if extended speeds (EDR/FDR/...) are supported */
590 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
591 ext_active_speed = out_mad->data[62] >> 4;
593 switch (ext_active_speed) {
595 props->active_speed = 16; /* FDR */
598 props->active_speed = 32; /* EDR */
603 /* If reported active speed is QDR, check if is FDR-10 */
604 if (props->active_speed == 4) {
605 if (mdev->port_caps[port - 1].ext_port_cap &
606 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
607 init_query_mad(in_mad);
608 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
609 in_mad->attr_mod = cpu_to_be32(port);
611 err = mlx5_MAD_IFC(dev, 1, 1, port,
612 NULL, NULL, in_mad, out_mad);
616 /* Checking LinkSpeedActive for FDR-10 */
617 if (out_mad->data[15] & 0x1)
618 props->active_speed = 8;