drivers/infiniband/hw/usnic/usnic_uiom.c

   1 /*
   2  * Copyright (c) 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
   4  * Copyright (c) 2013 Cisco Systems.  All rights reserved.
   5  *
   6  * This software is available to you under a choice of one of two
   7  * licenses.  You may choose to be licensed under the terms of the GNU
   8  * General Public License (GPL) Version 2, available from the file
   9  * COPYING in the main directory of this source tree, or the
  10  * BSD license below:
  11  *
  12  *     Redistribution and use in source and binary forms, with or
  13  *     without modification, are permitted provided that the following
  14  *     conditions are met:
  15  *
  16  *      - Redistributions of source code must retain the above
  17  *        copyright notice, this list of conditions and the following
  18  *        disclaimer.
  19  *
  20  *      - Redistributions in binary form must reproduce the above
  21  *        copyright notice, this list of conditions and the following
  22  *        disclaimer in the documentation and/or other materials
  23  *        provided with the distribution.
  24  *
  25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32  * SOFTWARE.
  33  */
  34
  35 #include <linux/mm.h>
  36 #include <linux/dma-mapping.h>
  37 #include <linux/sched.h>
  38 #include <linux/hugetlb.h>
  39 #include <linux/dma-attrs.h>
  40 #include <linux/iommu.h>
  41 #include <linux/workqueue.h>
  42 #include <linux/list.h>
  43 #include <linux/pci.h>
  44
  45 #include "usnic_log.h"
  46 #include "usnic_uiom.h"
  47 #include "usnic_uiom_interval_tree.h"
  48
  49 static struct workqueue_struct *usnic_uiom_wq;
  50
  51 #define USNIC_UIOM_PAGE_CHUNK                                           \
  52         ((PAGE_SIZE - offsetof(struct usnic_uiom_chunk, page_list))     /\
  53         ((void *) &((struct usnic_uiom_chunk *) 0)->page_list[1] -      \
  54         (void *) &((struct usnic_uiom_chunk *) 0)->page_list[0]))
  55
  56 static void usnic_uiom_reg_account(struct work_struct *work)
  57 {
  58         struct usnic_uiom_reg *umem = container_of(work,
  59                                                 struct usnic_uiom_reg, work);
  60
  61         down_write(&umem->mm->mmap_sem);
  62         umem->mm->locked_vm -= umem->diff;
  63         up_write(&umem->mm->mmap_sem);
  64         mmput(umem->mm);
  65         kfree(umem);
  66 }
  67
  68 static int usnic_uiom_dma_fault(struct iommu_domain *domain,
  69                                 struct device *dev,
  70                                 unsigned long iova, int flags,
  71                                 void *token)
  72 {
  73         usnic_err("Device %s iommu fault domain 0x%pK va 0x%lx flags 0x%x\n",
  74                 dev_name(dev),
  75                 domain, iova, flags);
  76         return -ENOSYS;
  77 }
  78
  79 static void usnic_uiom_put_pages(struct list_head *chunk_list, int dirty)
  80 {
  81         struct usnic_uiom_chunk *chunk, *tmp;
  82         struct page *page;
  83         struct scatterlist *sg;
  84         int i;
  85         dma_addr_t pa;
  86
  87         list_for_each_entry_safe(chunk, tmp, chunk_list, list) {
  88                 for_each_sg(chunk->page_list, sg, chunk->nents, i) {
  89                         page = sg_page(sg);
  90                         pa = sg_phys(sg);
  91                         if (dirty)
  92                                 set_page_dirty_lock(page);
  93                         put_page(page);
  94                         usnic_dbg("pa: %pa\n", &pa);
  95                 }
  96                 kfree(chunk);
  97         }
  98 }
  99
 100 static int usnic_uiom_get_pages(unsigned long addr, size_t size, int writable,
 101                                 int dmasync, struct list_head *chunk_list)
 102 {
 103         struct page **page_list;
 104         struct scatterlist *sg;
 105         struct usnic_uiom_chunk *chunk;
 106         unsigned long locked;
 107         unsigned long lock_limit;
 108         unsigned long cur_base;
 109         unsigned long npages;
 110         int ret;
 111         int off;
 112         int i;
 113         int flags;
 114         dma_addr_t pa;
 115         DEFINE_DMA_ATTRS(attrs);
 116         unsigned int gup_flags;
 117
 118         if (dmasync)
 119                 dma_set_attr(DMA_ATTR_WRITE_BARRIER, &attrs);
 120
 121         if (!can_do_mlock())
 122                 return -EPERM;
 123
 124         INIT_LIST_HEAD(chunk_list);
 125
 126         page_list = (struct page **) __get_free_page(GFP_KERNEL);
 127         if (!page_list)
 128                 return -ENOMEM;
 129
 130         npages = PAGE_ALIGN(size + (addr & ~PAGE_MASK)) >> PAGE_SHIFT;
 131
 132         down_write(&current->mm->mmap_sem);
 133
 134         locked = npages + current->mm->locked_vm;
 135         lock_limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT;
 136
 137         if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) {
 138                 ret = -ENOMEM;
 139                 goto out;
 140         }
 141
 142         flags = IOMMU_READ | IOMMU_CACHE;
 143         flags |= (writable) ? IOMMU_WRITE : 0;
 144         gup_flags = FOLL_WRITE;
 145         gup_flags |= (writable) ? 0 : FOLL_FORCE;
 146         cur_base = addr & PAGE_MASK;
 147         ret = 0;
 148
 149         while (npages) {
 150                 ret = get_user_pages(current, current->mm, cur_base,
 151                                         min_t(unsigned long, npages,
 152                                         PAGE_SIZE / sizeof(struct page *)),
 153                                         gup_flags, page_list, NULL);
 154
 155                 if (ret < 0)
 156                         goto out;
 157
 158                 npages -= ret;
 159                 off = 0;
 160
 161                 while (ret) {
 162                         chunk = kmalloc(sizeof(*chunk) +
 163                                         sizeof(struct scatterlist) *
 164                                         min_t(int, ret, USNIC_UIOM_PAGE_CHUNK),
 165                                         GFP_KERNEL);
 166                         if (!chunk) {
 167                                 ret = -ENOMEM;
 168                                 goto out;
 169                         }
 170
 171                         chunk->nents = min_t(int, ret, USNIC_UIOM_PAGE_CHUNK);
 172                         sg_init_table(chunk->page_list, chunk->nents);
 173                         for_each_sg(chunk->page_list, sg, chunk->nents, i) {
 174                                 sg_set_page(sg, page_list[i + off],
 175                                                 PAGE_SIZE, 0);
 176                                 pa = sg_phys(sg);
 177                                 usnic_dbg("va: 0x%lx pa: %pa\n",
 178                                                 cur_base + i*PAGE_SIZE, &pa);
 179                         }
 180                         cur_base += chunk->nents * PAGE_SIZE;
 181                         ret -= chunk->nents;
 182                         off += chunk->nents;
 183                         list_add_tail(&chunk->list, chunk_list);
 184                 }
 185
 186                 ret = 0;
 187         }
 188
 189 out:
 190         if (ret < 0)
 191                 usnic_uiom_put_pages(chunk_list, 0);
 192         else
 193                 current->mm->locked_vm = locked;
 194
 195         up_write(&current->mm->mmap_sem);
 196         free_page((unsigned long) page_list);
 197         return ret;
 198 }
 199
 200 static void usnic_uiom_unmap_sorted_intervals(struct list_head *intervals,
 201                                                 struct usnic_uiom_pd *pd)
 202 {
 203         struct usnic_uiom_interval_node *interval, *tmp;
 204         long unsigned va, size;
 205
 206         list_for_each_entry_safe(interval, tmp, intervals, link) {
 207                 va = interval->start << PAGE_SHIFT;
 208                 size = ((interval->last - interval->start) + 1) << PAGE_SHIFT;
 209                 while (size > 0) {
 210                         /* Workaround for RH 970401 */
 211                         usnic_dbg("va 0x%lx size 0x%lx", va, PAGE_SIZE);
 212                         iommu_unmap(pd->domain, va, PAGE_SIZE);
 213                         va += PAGE_SIZE;
 214                         size -= PAGE_SIZE;
 215                 }
 216         }
 217 }
 218
 219 static void __usnic_uiom_reg_release(struct usnic_uiom_pd *pd,
 220                                         struct usnic_uiom_reg *uiomr,
 221                                         int dirty)
 222 {
 223         int npages;
 224         unsigned long vpn_start, vpn_last;
 225         struct usnic_uiom_interval_node *interval, *tmp;
 226         int writable = 0;
 227         LIST_HEAD(rm_intervals);
 228
 229         npages = PAGE_ALIGN(uiomr->length + uiomr->offset) >> PAGE_SHIFT;
 230         vpn_start = (uiomr->va & PAGE_MASK) >> PAGE_SHIFT;
 231         vpn_last = vpn_start + npages - 1;
 232
 233         spin_lock(&pd->lock);
 234         usnic_uiom_remove_interval(&pd->rb_root, vpn_start,
 235                                         vpn_last, &rm_intervals);
 236         usnic_uiom_unmap_sorted_intervals(&rm_intervals, pd);
 237
 238         list_for_each_entry_safe(interval, tmp, &rm_intervals, link) {
 239                 if (interval->flags & IOMMU_WRITE)
 240                         writable = 1;
 241                 list_del(&interval->link);
 242                 kfree(interval);
 243         }
 244
 245         usnic_uiom_put_pages(&uiomr->chunk_list, dirty & writable);
 246         spin_unlock(&pd->lock);
 247 }
 248
 249 static int usnic_uiom_map_sorted_intervals(struct list_head *intervals,
 250                                                 struct usnic_uiom_reg *uiomr)
 251 {
 252         int i, err;
 253         size_t size;
 254         struct usnic_uiom_chunk *chunk;
 255         struct usnic_uiom_interval_node *interval_node;
 256         dma_addr_t pa;
 257         dma_addr_t pa_start = 0;
 258         dma_addr_t pa_end = 0;
 259         long int va_start = -EINVAL;
 260         struct usnic_uiom_pd *pd = uiomr->pd;
 261         long int va = uiomr->va & PAGE_MASK;
 262         int flags = IOMMU_READ | IOMMU_CACHE;
 263
 264         flags |= (uiomr->writable) ? IOMMU_WRITE : 0;
 265         chunk = list_first_entry(&uiomr->chunk_list, struct usnic_uiom_chunk,
 266                                                                         list);
 267         list_for_each_entry(interval_node, intervals, link) {
 268 iter_chunk:
 269                 for (i = 0; i < chunk->nents; i++, va += PAGE_SIZE) {
 270                         pa = sg_phys(&chunk->page_list[i]);
 271                         if ((va >> PAGE_SHIFT) < interval_node->start)
 272                                 continue;
 273
 274                         if ((va >> PAGE_SHIFT) == interval_node->start) {
 275                                 /* First page of the interval */
 276                                 va_start = va;
 277                                 pa_start = pa;
 278                                 pa_end = pa;
 279                         }
 280
 281                         WARN_ON(va_start == -EINVAL);
 282
 283                         if ((pa_end + PAGE_SIZE != pa) &&
 284                                         (pa != pa_start)) {
 285                                 /* PAs are not contiguous */
 286                                 size = pa_end - pa_start + PAGE_SIZE;
 287                                 usnic_dbg("va 0x%lx pa %pa size 0x%zx flags 0x%x",
 288                                         va_start, &pa_start, size, flags);
 289                                 err = iommu_map(pd->domain, va_start, pa_start,
 290                                                         size, flags);
 291                                 if (err) {
 292                                         usnic_err("Failed to map va 0x%lx pa %pa size 0x%zx with err %d\n",
 293                                                 va_start, &pa_start, size, err);
 294                                         goto err_out;
 295                                 }
 296                                 va_start = va;
 297                                 pa_start = pa;
 298                                 pa_end = pa;
 299                         }
 300
 301                         if ((va >> PAGE_SHIFT) == interval_node->last) {
 302                                 /* Last page of the interval */
 303                                 size = pa - pa_start + PAGE_SIZE;
 304                                 usnic_dbg("va 0x%lx pa %pa size 0x%zx flags 0x%x\n",
 305                                         va_start, &pa_start, size, flags);
 306                                 err = iommu_map(pd->domain, va_start, pa_start,
 307                                                 size, flags);
 308                                 if (err) {
 309                                         usnic_err("Failed to map va 0x%lx pa %pa size 0x%zx with err %d\n",
 310                                                 va_start, &pa_start, size, err);
 311                                         goto err_out;
 312                                 }
 313                                 break;
 314                         }
 315
 316                         if (pa != pa_start)
 317                                 pa_end += PAGE_SIZE;
 318                 }
 319
 320                 if (i == chunk->nents) {
 321                         /*
 322                          * Hit last entry of the chunk,
 323                          * hence advance to next chunk
 324                          */
 325                         chunk = list_first_entry(&chunk->list,
 326                                                         struct usnic_uiom_chunk,
 327                                                         list);
 328                         goto iter_chunk;
 329                 }
 330         }
 331
 332         return 0;
 333
 334 err_out:
 335         usnic_uiom_unmap_sorted_intervals(intervals, pd);
 336         return err;
 337 }
 338
 339 struct usnic_uiom_reg *usnic_uiom_reg_get(struct usnic_uiom_pd *pd,
 340                                                 unsigned long addr, size_t size,
 341                                                 int writable, int dmasync)
 342 {
 343         struct usnic_uiom_reg *uiomr;
 344         unsigned long va_base, vpn_start, vpn_last;
 345         unsigned long npages;
 346         int offset, err;
 347         LIST_HEAD(sorted_diff_intervals);
 348
 349         /*
 350          * Intel IOMMU map throws an error if a translation entry is
 351          * changed from read to write.  This module may not unmap
 352          * and then remap the entry after fixing the permission
 353          * b/c this open up a small windows where hw DMA may page fault
 354          * Hence, make all entries to be writable.
 355          */
 356         writable = 1;
 357
 358         va_base = addr & PAGE_MASK;
 359         offset = addr & ~PAGE_MASK;
 360         npages = PAGE_ALIGN(size + offset) >> PAGE_SHIFT;
 361         vpn_start = (addr & PAGE_MASK) >> PAGE_SHIFT;
 362         vpn_last = vpn_start + npages - 1;
 363
 364         uiomr = kmalloc(sizeof(*uiomr), GFP_KERNEL);
 365         if (!uiomr)
 366                 return ERR_PTR(-ENOMEM);
 367
 368         uiomr->va = va_base;
 369         uiomr->offset = offset;
 370         uiomr->length = size;
 371         uiomr->writable = writable;
 372         uiomr->pd = pd;
 373
 374         err = usnic_uiom_get_pages(addr, size, writable, dmasync,
 375                                         &uiomr->chunk_list);
 376         if (err) {
 377                 usnic_err("Failed get_pages vpn [0x%lx,0x%lx] err %d\n",
 378                                 vpn_start, vpn_last, err);
 379                 goto out_free_uiomr;
 380         }
 381
 382         spin_lock(&pd->lock);
 383         err = usnic_uiom_get_intervals_diff(vpn_start, vpn_last,
 384                                                 (writable) ? IOMMU_WRITE : 0,
 385                                                 IOMMU_WRITE,
 386                                                 &pd->rb_root,
 387                                                 &sorted_diff_intervals);
 388         if (err) {
 389                 usnic_err("Failed disjoint interval vpn [0x%lx,0x%lx] err %d\n",
 390                                                 vpn_start, vpn_last, err);
 391                 goto out_put_pages;
 392         }
 393
 394         err = usnic_uiom_map_sorted_intervals(&sorted_diff_intervals, uiomr);
 395         if (err) {
 396                 usnic_err("Failed map interval vpn [0x%lx,0x%lx] err %d\n",
 397                                                 vpn_start, vpn_last, err);
 398                 goto out_put_intervals;
 399
 400         }
 401
 402         err = usnic_uiom_insert_interval(&pd->rb_root, vpn_start, vpn_last,
 403                                         (writable) ? IOMMU_WRITE : 0);
 404         if (err) {
 405                 usnic_err("Failed insert interval vpn [0x%lx,0x%lx] err %d\n",
 406                                                 vpn_start, vpn_last, err);
 407                 goto out_unmap_intervals;
 408         }
 409
 410         usnic_uiom_put_interval_set(&sorted_diff_intervals);
 411         spin_unlock(&pd->lock);
 412
 413         return uiomr;
 414
 415 out_unmap_intervals:
 416         usnic_uiom_unmap_sorted_intervals(&sorted_diff_intervals, pd);
 417 out_put_intervals:
 418         usnic_uiom_put_interval_set(&sorted_diff_intervals);
 419 out_put_pages:
 420         usnic_uiom_put_pages(&uiomr->chunk_list, 0);
 421         spin_unlock(&pd->lock);
 422 out_free_uiomr:
 423         kfree(uiomr);
 424         return ERR_PTR(err);
 425 }
 426
 427 void usnic_uiom_reg_release(struct usnic_uiom_reg *uiomr, int closing)
 428 {
 429         struct mm_struct *mm;
 430         unsigned long diff;
 431
 432         __usnic_uiom_reg_release(uiomr->pd, uiomr, 1);
 433
 434         mm = get_task_mm(current);
 435         if (!mm) {
 436                 kfree(uiomr);
 437                 return;
 438         }
 439
 440         diff = PAGE_ALIGN(uiomr->length + uiomr->offset) >> PAGE_SHIFT;
 441
 442         /*
 443          * We may be called with the mm's mmap_sem already held.  This
 444          * can happen when a userspace munmap() is the call that drops
 445          * the last reference to our file and calls our release
 446          * method.  If there are memory regions to destroy, we'll end
 447          * up here and not be able to take the mmap_sem.  In that case
 448          * we defer the vm_locked accounting to the system workqueue.
 449          */
 450         if (closing) {
 451                 if (!down_write_trylock(&mm->mmap_sem)) {
 452                         INIT_WORK(&uiomr->work, usnic_uiom_reg_account);
 453                         uiomr->mm = mm;
 454                         uiomr->diff = diff;
 455
 456                         queue_work(usnic_uiom_wq, &uiomr->work);
 457                         return;
 458                 }
 459         } else
 460                 down_write(&mm->mmap_sem);
 461
 462         current->mm->locked_vm -= diff;
 463         up_write(&mm->mmap_sem);
 464         mmput(mm);
 465         kfree(uiomr);
 466 }
 467
 468 struct usnic_uiom_pd *usnic_uiom_alloc_pd(void)
 469 {
 470         struct usnic_uiom_pd *pd;
 471         void *domain;
 472
 473         pd = kzalloc(sizeof(*pd), GFP_KERNEL);
 474         if (!pd)
 475                 return ERR_PTR(-ENOMEM);
 476
 477         pd->domain = domain = iommu_domain_alloc(&pci_bus_type);
 478         if (!domain) {
 479                 usnic_err("Failed to allocate IOMMU domain");
 480                 kfree(pd);
 481                 return ERR_PTR(-ENOMEM);
 482         }
 483
 484         iommu_set_fault_handler(pd->domain, usnic_uiom_dma_fault, NULL);
 485
 486         spin_lock_init(&pd->lock);
 487         INIT_LIST_HEAD(&pd->devs);
 488
 489         return pd;
 490 }
 491
 492 void usnic_uiom_dealloc_pd(struct usnic_uiom_pd *pd)
 493 {
 494         iommu_domain_free(pd->domain);
 495         kfree(pd);
 496 }
 497
 498 int usnic_uiom_attach_dev_to_pd(struct usnic_uiom_pd *pd, struct device *dev)
 499 {
 500         struct usnic_uiom_dev *uiom_dev;
 501         int err;
 502
 503         uiom_dev = kzalloc(sizeof(*uiom_dev), GFP_ATOMIC);
 504         if (!uiom_dev)
 505                 return -ENOMEM;
 506         uiom_dev->dev = dev;
 507
 508         err = iommu_attach_device(pd->domain, dev);
 509         if (err)
 510                 goto out_free_dev;
 511
 512         if (!iommu_capable(dev->bus, IOMMU_CAP_CACHE_COHERENCY)) {
 513                 usnic_err("IOMMU of %s does not support cache coherency\n",
 514                                 dev_name(dev));
 515                 err = -EINVAL;
 516                 goto out_detach_device;
 517         }
 518
 519         spin_lock(&pd->lock);
 520         list_add_tail(&uiom_dev->link, &pd->devs);
 521         pd->dev_cnt++;
 522         spin_unlock(&pd->lock);
 523
 524         return 0;
 525
 526 out_detach_device:
 527         iommu_detach_device(pd->domain, dev);
 528 out_free_dev:
 529         kfree(uiom_dev);
 530         return err;
 531 }
 532
 533 void usnic_uiom_detach_dev_from_pd(struct usnic_uiom_pd *pd, struct device *dev)
 534 {
 535         struct usnic_uiom_dev *uiom_dev;
 536         int found = 0;
 537
 538         spin_lock(&pd->lock);
 539         list_for_each_entry(uiom_dev, &pd->devs, link) {
 540                 if (uiom_dev->dev == dev) {
 541                         found = 1;
 542                         break;
 543                 }
 544         }
 545
 546         if (!found) {
 547                 usnic_err("Unable to free dev %s - not found\n",
 548                                 dev_name(dev));
 549                 spin_unlock(&pd->lock);
 550                 return;
 551         }
 552
 553         list_del(&uiom_dev->link);
 554         pd->dev_cnt--;
 555         spin_unlock(&pd->lock);
 556
 557         return iommu_detach_device(pd->domain, dev);
 558 }
 559
 560 struct device **usnic_uiom_get_dev_list(struct usnic_uiom_pd *pd)
 561 {
 562         struct usnic_uiom_dev *uiom_dev;
 563         struct device **devs;
 564         int i = 0;
 565
 566         spin_lock(&pd->lock);
 567         devs = kcalloc(pd->dev_cnt + 1, sizeof(*devs), GFP_ATOMIC);
 568         if (!devs) {
 569                 devs = ERR_PTR(-ENOMEM);
 570                 goto out;
 571         }
 572
 573         list_for_each_entry(uiom_dev, &pd->devs, link) {
 574                 devs[i++] = uiom_dev->dev;
 575         }
 576 out:
 577         spin_unlock(&pd->lock);
 578         return devs;
 579 }
 580
 581 void usnic_uiom_free_dev_list(struct device **devs)
 582 {
 583         kfree(devs);
 584 }
 585
 586 int usnic_uiom_init(char *drv_name)
 587 {
 588         if (!iommu_present(&pci_bus_type)) {
 589                 usnic_err("IOMMU required but not present or enabled.  USNIC QPs will not function w/o enabling IOMMU\n");
 590                 return -EPERM;
 591         }
 592
 593         usnic_uiom_wq = create_workqueue(drv_name);
 594         if (!usnic_uiom_wq) {
 595                 usnic_err("Unable to alloc wq for drv %s\n", drv_name);
 596                 return -ENOMEM;
 597         }
 598
 599         return 0;
 600 }
 601
 602 void usnic_uiom_fini(void)
 603 {
 604         flush_workqueue(usnic_uiom_wq);
 605         destroy_workqueue(usnic_uiom_wq);
 606 }