drivers/media/dvb-frontends/m88ds3103.c

   1 /*
   2  * Montage Technology M88DS3103/M88RS6000 demodulator driver
   3  *
   4  * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; either version 2 of the License, or
   9  *    (at your option) any later version.
  10  *
  11  *    This program is distributed in the hope that it will be useful,
  12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *    GNU General Public License for more details.
  15  */
  16
  17 #include "m88ds3103_priv.h"
  18
  19 static struct dvb_frontend_ops m88ds3103_ops;
  20
  21 /* write single register with mask */
  22 static int m88ds3103_update_bits(struct m88ds3103_dev *dev,
  23                                 u8 reg, u8 mask, u8 val)
  24 {
  25         int ret;
  26         u8 tmp;
  27
  28         /* no need for read if whole reg is written */
  29         if (mask != 0xff) {
  30                 ret = regmap_bulk_read(dev->regmap, reg, &tmp, 1);
  31                 if (ret)
  32                         return ret;
  33
  34                 val &= mask;
  35                 tmp &= ~mask;
  36                 val |= tmp;
  37         }
  38
  39         return regmap_bulk_write(dev->regmap, reg, &val, 1);
  40 }
  41
  42 /* write reg val table using reg addr auto increment */
  43 static int m88ds3103_wr_reg_val_tab(struct m88ds3103_dev *dev,
  44                 const struct m88ds3103_reg_val *tab, int tab_len)
  45 {
  46         struct i2c_client *client = dev->client;
  47         int ret, i, j;
  48         u8 buf[83];
  49
  50         dev_dbg(&client->dev, "tab_len=%d\n", tab_len);
  51
  52         if (tab_len > 86) {
  53                 ret = -EINVAL;
  54                 goto err;
  55         }
  56
  57         for (i = 0, j = 0; i < tab_len; i++, j++) {
  58                 buf[j] = tab[i].val;
  59
  60                 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1 ||
  61                                 !((j + 1) % (dev->cfg->i2c_wr_max - 1))) {
  62                         ret = regmap_bulk_write(dev->regmap, tab[i].reg - j, buf, j + 1);
  63                         if (ret)
  64                                 goto err;
  65
  66                         j = -1;
  67                 }
  68         }
  69
  70         return 0;
  71 err:
  72         dev_dbg(&client->dev, "failed=%d\n", ret);
  73         return ret;
  74 }
  75
  76 /*
  77  * Get the demodulator AGC PWM voltage setting supplied to the tuner.
  78  */
  79 int m88ds3103_get_agc_pwm(struct dvb_frontend *fe, u8 *_agc_pwm)
  80 {
  81         struct m88ds3103_dev *dev = fe->demodulator_priv;
  82         unsigned tmp;
  83         int ret;
  84
  85         ret = regmap_read(dev->regmap, 0x3f, &tmp);
  86         if (ret == 0)
  87                 *_agc_pwm = tmp;
  88         return ret;
  89 }
  90 EXPORT_SYMBOL(m88ds3103_get_agc_pwm);
  91
  92 static int m88ds3103_read_status(struct dvb_frontend *fe,
  93                                  enum fe_status *status)
  94 {
  95         struct m88ds3103_dev *dev = fe->demodulator_priv;
  96         struct i2c_client *client = dev->client;
  97         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  98         int ret, i, itmp;
  99         unsigned int utmp;
 100         u8 buf[3];
 101
 102         *status = 0;
 103
 104         if (!dev->warm) {
 105                 ret = -EAGAIN;
 106                 goto err;
 107         }
 108
 109         switch (c->delivery_system) {
 110         case SYS_DVBS:
 111                 ret = regmap_read(dev->regmap, 0xd1, &utmp);
 112                 if (ret)
 113                         goto err;
 114
 115                 if ((utmp & 0x07) == 0x07)
 116                         *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
 117                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 118                                         FE_HAS_LOCK;
 119                 break;
 120         case SYS_DVBS2:
 121                 ret = regmap_read(dev->regmap, 0x0d, &utmp);
 122                 if (ret)
 123                         goto err;
 124
 125                 if ((utmp & 0x8f) == 0x8f)
 126                         *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
 127                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 128                                         FE_HAS_LOCK;
 129                 break;
 130         default:
 131                 dev_dbg(&client->dev, "invalid delivery_system\n");
 132                 ret = -EINVAL;
 133                 goto err;
 134         }
 135
 136         dev->fe_status = *status;
 137         dev_dbg(&client->dev, "lock=%02x status=%02x\n", utmp, *status);
 138
 139         /* CNR */
 140         if (dev->fe_status & FE_HAS_VITERBI) {
 141                 unsigned int cnr, noise, signal, noise_tot, signal_tot;
 142
 143                 cnr = 0;
 144                 /* more iterations for more accurate estimation */
 145                 #define M88DS3103_SNR_ITERATIONS 3
 146
 147                 switch (c->delivery_system) {
 148                 case SYS_DVBS:
 149                         itmp = 0;
 150
 151                         for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
 152                                 ret = regmap_read(dev->regmap, 0xff, &utmp);
 153                                 if (ret)
 154                                         goto err;
 155
 156                                 itmp += utmp;
 157                         }
 158
 159                         /* use of single register limits max value to 15 dB */
 160                         /* SNR(X) dB = 10 * ln(X) / ln(10) dB */
 161                         itmp = DIV_ROUND_CLOSEST(itmp, 8 * M88DS3103_SNR_ITERATIONS);
 162                         if (itmp)
 163                                 cnr = div_u64((u64) 10000 * intlog2(itmp), intlog2(10));
 164                         break;
 165                 case SYS_DVBS2:
 166                         noise_tot = 0;
 167                         signal_tot = 0;
 168
 169                         for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
 170                                 ret = regmap_bulk_read(dev->regmap, 0x8c, buf, 3);
 171                                 if (ret)
 172                                         goto err;
 173
 174                                 noise = buf[1] << 6;    /* [13:6] */
 175                                 noise |= buf[0] & 0x3f; /*  [5:0] */
 176                                 noise >>= 2;
 177                                 signal = buf[2] * buf[2];
 178                                 signal >>= 1;
 179
 180                                 noise_tot += noise;
 181                                 signal_tot += signal;
 182                         }
 183
 184                         noise = noise_tot / M88DS3103_SNR_ITERATIONS;
 185                         signal = signal_tot / M88DS3103_SNR_ITERATIONS;
 186
 187                         /* SNR(X) dB = 10 * log10(X) dB */
 188                         if (signal > noise) {
 189                                 itmp = signal / noise;
 190                                 cnr = div_u64((u64) 10000 * intlog10(itmp), (1 << 24));
 191                         }
 192                         break;
 193                 default:
 194                         dev_dbg(&client->dev, "invalid delivery_system\n");
 195                         ret = -EINVAL;
 196                         goto err;
 197                 }
 198
 199                 if (cnr) {
 200                         c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
 201                         c->cnr.stat[0].svalue = cnr;
 202                 } else {
 203                         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 204                 }
 205         } else {
 206                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 207         }
 208
 209         /* BER */
 210         if (dev->fe_status & FE_HAS_LOCK) {
 211                 unsigned int utmp, post_bit_error, post_bit_count;
 212
 213                 switch (c->delivery_system) {
 214                 case SYS_DVBS:
 215                         ret = regmap_write(dev->regmap, 0xf9, 0x04);
 216                         if (ret)
 217                                 goto err;
 218
 219                         ret = regmap_read(dev->regmap, 0xf8, &utmp);
 220                         if (ret)
 221                                 goto err;
 222
 223                         /* measurement ready? */
 224                         if (!(utmp & 0x10)) {
 225                                 ret = regmap_bulk_read(dev->regmap, 0xf6, buf, 2);
 226                                 if (ret)
 227                                         goto err;
 228
 229                                 post_bit_error = buf[1] << 8 | buf[0] << 0;
 230                                 post_bit_count = 0x800000;
 231                                 dev->post_bit_error += post_bit_error;
 232                                 dev->post_bit_count += post_bit_count;
 233                                 dev->dvbv3_ber = post_bit_error;
 234
 235                                 /* restart measurement */
 236                                 utmp |= 0x10;
 237                                 ret = regmap_write(dev->regmap, 0xf8, utmp);
 238                                 if (ret)
 239                                         goto err;
 240                         }
 241                         break;
 242                 case SYS_DVBS2:
 243                         ret = regmap_bulk_read(dev->regmap, 0xd5, buf, 3);
 244                         if (ret)
 245                                 goto err;
 246
 247                         utmp = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;
 248
 249                         /* enough data? */
 250                         if (utmp > 4000) {
 251                                 ret = regmap_bulk_read(dev->regmap, 0xf7, buf, 2);
 252                                 if (ret)
 253                                         goto err;
 254
 255                                 post_bit_error = buf[1] << 8 | buf[0] << 0;
 256                                 post_bit_count = 32 * utmp; /* TODO: FEC */
 257                                 dev->post_bit_error += post_bit_error;
 258                                 dev->post_bit_count += post_bit_count;
 259                                 dev->dvbv3_ber = post_bit_error;
 260
 261                                 /* restart measurement */
 262                                 ret = regmap_write(dev->regmap, 0xd1, 0x01);
 263                                 if (ret)
 264                                         goto err;
 265
 266                                 ret = regmap_write(dev->regmap, 0xf9, 0x01);
 267                                 if (ret)
 268                                         goto err;
 269
 270                                 ret = regmap_write(dev->regmap, 0xf9, 0x00);
 271                                 if (ret)
 272                                         goto err;
 273
 274                                 ret = regmap_write(dev->regmap, 0xd1, 0x00);
 275                                 if (ret)
 276                                         goto err;
 277                         }
 278                         break;
 279                 default:
 280                         dev_dbg(&client->dev, "invalid delivery_system\n");
 281                         ret = -EINVAL;
 282                         goto err;
 283                 }
 284
 285                 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
 286                 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
 287                 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
 288                 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
 289         } else {
 290                 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 291                 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 292         }
 293
 294         return 0;
 295 err:
 296         dev_dbg(&client->dev, "failed=%d\n", ret);
 297         return ret;
 298 }
 299
 300 static int m88ds3103_set_frontend(struct dvb_frontend *fe)
 301 {
 302         struct m88ds3103_dev *dev = fe->demodulator_priv;
 303         struct i2c_client *client = dev->client;
 304         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 305         int ret, len;
 306         const struct m88ds3103_reg_val *init;
 307         u8 u8tmp, u8tmp1 = 0, u8tmp2 = 0; /* silence compiler warning */
 308         u8 buf[3];
 309         u16 u16tmp, divide_ratio = 0;
 310         u32 tuner_frequency, target_mclk;
 311         s32 s32tmp;
 312         static const struct reg_sequence reset_buf[] = {
 313                 {0x07, 0x80}, {0x07, 0x00}
 314         };
 315
 316         dev_dbg(&client->dev,
 317                 "delivery_system=%d modulation=%d frequency=%u symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n",
 318                 c->delivery_system, c->modulation, c->frequency, c->symbol_rate,
 319                 c->inversion, c->pilot, c->rolloff);
 320
 321         if (!dev->warm) {
 322                 ret = -EAGAIN;
 323                 goto err;
 324         }
 325
 326         /* reset */
 327         ret = regmap_multi_reg_write(dev->regmap, reset_buf, 2);
 328         if (ret)
 329                 goto err;
 330
 331         /* Disable demod clock path */
 332         if (dev->chip_id == M88RS6000_CHIP_ID) {
 333                 ret = regmap_write(dev->regmap, 0x06, 0xe0);
 334                 if (ret)
 335                         goto err;
 336         }
 337
 338         /* program tuner */
 339         if (fe->ops.tuner_ops.set_params) {
 340                 ret = fe->ops.tuner_ops.set_params(fe);
 341                 if (ret)
 342                         goto err;
 343         }
 344
 345         if (fe->ops.tuner_ops.get_frequency) {
 346                 ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_frequency);
 347                 if (ret)
 348                         goto err;
 349         } else {
 350                 /*
 351                  * Use nominal target frequency as tuner driver does not provide
 352                  * actual frequency used. Carrier offset calculation is not
 353                  * valid.
 354                  */
 355                 tuner_frequency = c->frequency;
 356         }
 357
 358         /* select M88RS6000 demod main mclk and ts mclk from tuner die. */
 359         if (dev->chip_id == M88RS6000_CHIP_ID) {
 360                 if (c->symbol_rate > 45010000)
 361                         dev->mclk_khz = 110250;
 362                 else
 363                         dev->mclk_khz = 96000;
 364
 365                 if (c->delivery_system == SYS_DVBS)
 366                         target_mclk = 96000;
 367                 else
 368                         target_mclk = 144000;
 369
 370                 /* Enable demod clock path */
 371                 ret = regmap_write(dev->regmap, 0x06, 0x00);
 372                 if (ret)
 373                         goto err;
 374                 usleep_range(10000, 20000);
 375         } else {
 376         /* set M88DS3103 mclk and ts mclk. */
 377                 dev->mclk_khz = 96000;
 378
 379                 switch (dev->cfg->ts_mode) {
 380                 case M88DS3103_TS_SERIAL:
 381                 case M88DS3103_TS_SERIAL_D7:
 382                         target_mclk = dev->cfg->ts_clk;
 383                         break;
 384                 case M88DS3103_TS_PARALLEL:
 385                 case M88DS3103_TS_CI:
 386                         if (c->delivery_system == SYS_DVBS)
 387                                 target_mclk = 96000;
 388                         else {
 389                                 if (c->symbol_rate < 18000000)
 390                                         target_mclk = 96000;
 391                                 else if (c->symbol_rate < 28000000)
 392                                         target_mclk = 144000;
 393                                 else
 394                                         target_mclk = 192000;
 395                         }
 396                         break;
 397                 default:
 398                         dev_dbg(&client->dev, "invalid ts_mode\n");
 399                         ret = -EINVAL;
 400                         goto err;
 401                 }
 402
 403                 switch (target_mclk) {
 404                 case 96000:
 405                         u8tmp1 = 0x02; /* 0b10 */
 406                         u8tmp2 = 0x01; /* 0b01 */
 407                         break;
 408                 case 144000:
 409                         u8tmp1 = 0x00; /* 0b00 */
 410                         u8tmp2 = 0x01; /* 0b01 */
 411                         break;
 412                 case 192000:
 413                         u8tmp1 = 0x03; /* 0b11 */
 414                         u8tmp2 = 0x00; /* 0b00 */
 415                         break;
 416                 }
 417                 ret = m88ds3103_update_bits(dev, 0x22, 0xc0, u8tmp1 << 6);
 418                 if (ret)
 419                         goto err;
 420                 ret = m88ds3103_update_bits(dev, 0x24, 0xc0, u8tmp2 << 6);
 421                 if (ret)
 422                         goto err;
 423         }
 424
 425         ret = regmap_write(dev->regmap, 0xb2, 0x01);
 426         if (ret)
 427                 goto err;
 428
 429         ret = regmap_write(dev->regmap, 0x00, 0x01);
 430         if (ret)
 431                 goto err;
 432
 433         switch (c->delivery_system) {
 434         case SYS_DVBS:
 435                 if (dev->chip_id == M88RS6000_CHIP_ID) {
 436                         len = ARRAY_SIZE(m88rs6000_dvbs_init_reg_vals);
 437                         init = m88rs6000_dvbs_init_reg_vals;
 438                 } else {
 439                         len = ARRAY_SIZE(m88ds3103_dvbs_init_reg_vals);
 440                         init = m88ds3103_dvbs_init_reg_vals;
 441                 }
 442                 break;
 443         case SYS_DVBS2:
 444                 if (dev->chip_id == M88RS6000_CHIP_ID) {
 445                         len = ARRAY_SIZE(m88rs6000_dvbs2_init_reg_vals);
 446                         init = m88rs6000_dvbs2_init_reg_vals;
 447                 } else {
 448                         len = ARRAY_SIZE(m88ds3103_dvbs2_init_reg_vals);
 449                         init = m88ds3103_dvbs2_init_reg_vals;
 450                 }
 451                 break;
 452         default:
 453                 dev_dbg(&client->dev, "invalid delivery_system\n");
 454                 ret = -EINVAL;
 455                 goto err;
 456         }
 457
 458         /* program init table */
 459         if (c->delivery_system != dev->delivery_system) {
 460                 ret = m88ds3103_wr_reg_val_tab(dev, init, len);
 461                 if (ret)
 462                         goto err;
 463         }
 464
 465         if (dev->chip_id == M88RS6000_CHIP_ID) {
 466                 if ((c->delivery_system == SYS_DVBS2)
 467                         && ((c->symbol_rate / 1000) <= 5000)) {
 468                         ret = regmap_write(dev->regmap, 0xc0, 0x04);
 469                         if (ret)
 470                                 goto err;
 471                         buf[0] = 0x09;
 472                         buf[1] = 0x22;
 473                         buf[2] = 0x88;
 474                         ret = regmap_bulk_write(dev->regmap, 0x8a, buf, 3);
 475                         if (ret)
 476                                 goto err;
 477                 }
 478                 ret = m88ds3103_update_bits(dev, 0x9d, 0x08, 0x08);
 479                 if (ret)
 480                         goto err;
 481                 ret = regmap_write(dev->regmap, 0xf1, 0x01);
 482                 if (ret)
 483                         goto err;
 484                 ret = m88ds3103_update_bits(dev, 0x30, 0x80, 0x80);
 485                 if (ret)
 486                         goto err;
 487         }
 488
 489         switch (dev->cfg->ts_mode) {
 490         case M88DS3103_TS_SERIAL:
 491                 u8tmp1 = 0x00;
 492                 u8tmp = 0x06;
 493                 break;
 494         case M88DS3103_TS_SERIAL_D7:
 495                 u8tmp1 = 0x20;
 496                 u8tmp = 0x06;
 497                 break;
 498         case M88DS3103_TS_PARALLEL:
 499                 u8tmp = 0x02;
 500                 break;
 501         case M88DS3103_TS_CI:
 502                 u8tmp = 0x03;
 503                 break;
 504         default:
 505                 dev_dbg(&client->dev, "invalid ts_mode\n");
 506                 ret = -EINVAL;
 507                 goto err;
 508         }
 509
 510         if (dev->cfg->ts_clk_pol)
 511                 u8tmp |= 0x40;
 512
 513         /* TS mode */
 514         ret = regmap_write(dev->regmap, 0xfd, u8tmp);
 515         if (ret)
 516                 goto err;
 517
 518         switch (dev->cfg->ts_mode) {
 519         case M88DS3103_TS_SERIAL:
 520         case M88DS3103_TS_SERIAL_D7:
 521                 ret = m88ds3103_update_bits(dev, 0x29, 0x20, u8tmp1);
 522                 if (ret)
 523                         goto err;
 524                 u8tmp1 = 0;
 525                 u8tmp2 = 0;
 526                 break;
 527         default:
 528                 if (dev->cfg->ts_clk) {
 529                         divide_ratio = DIV_ROUND_UP(target_mclk, dev->cfg->ts_clk);
 530                         u8tmp1 = divide_ratio / 2;
 531                         u8tmp2 = DIV_ROUND_UP(divide_ratio, 2);
 532                 }
 533         }
 534
 535         dev_dbg(&client->dev,
 536                 "target_mclk=%d ts_clk=%d divide_ratio=%d\n",
 537                 target_mclk, dev->cfg->ts_clk, divide_ratio);
 538
 539         u8tmp1--;
 540         u8tmp2--;
 541         /* u8tmp1[5:2] => fe[3:0], u8tmp1[1:0] => ea[7:6] */
 542         u8tmp1 &= 0x3f;
 543         /* u8tmp2[5:0] => ea[5:0] */
 544         u8tmp2 &= 0x3f;
 545
 546         ret = regmap_bulk_read(dev->regmap, 0xfe, &u8tmp, 1);
 547         if (ret)
 548                 goto err;
 549
 550         u8tmp = ((u8tmp  & 0xf0) << 0) | u8tmp1 >> 2;
 551         ret = regmap_write(dev->regmap, 0xfe, u8tmp);
 552         if (ret)
 553                 goto err;
 554
 555         u8tmp = ((u8tmp1 & 0x03) << 6) | u8tmp2 >> 0;
 556         ret = regmap_write(dev->regmap, 0xea, u8tmp);
 557         if (ret)
 558                 goto err;
 559
 560         if (c->symbol_rate <= 3000000)
 561                 u8tmp = 0x20;
 562         else if (c->symbol_rate <= 10000000)
 563                 u8tmp = 0x10;
 564         else
 565                 u8tmp = 0x06;
 566
 567         ret = regmap_write(dev->regmap, 0xc3, 0x08);
 568         if (ret)
 569                 goto err;
 570
 571         ret = regmap_write(dev->regmap, 0xc8, u8tmp);
 572         if (ret)
 573                 goto err;
 574
 575         ret = regmap_write(dev->regmap, 0xc4, 0x08);
 576         if (ret)
 577                 goto err;
 578
 579         ret = regmap_write(dev->regmap, 0xc7, 0x00);
 580         if (ret)
 581                 goto err;
 582
 583         u16tmp = DIV_ROUND_CLOSEST((c->symbol_rate / 1000) << 15, dev->mclk_khz / 2);
 584         buf[0] = (u16tmp >> 0) & 0xff;
 585         buf[1] = (u16tmp >> 8) & 0xff;
 586         ret = regmap_bulk_write(dev->regmap, 0x61, buf, 2);
 587         if (ret)
 588                 goto err;
 589
 590         ret = m88ds3103_update_bits(dev, 0x4d, 0x02, dev->cfg->spec_inv << 1);
 591         if (ret)
 592                 goto err;
 593
 594         ret = m88ds3103_update_bits(dev, 0x30, 0x10, dev->cfg->agc_inv << 4);
 595         if (ret)
 596                 goto err;
 597
 598         ret = regmap_write(dev->regmap, 0x33, dev->cfg->agc);
 599         if (ret)
 600                 goto err;
 601
 602         dev_dbg(&client->dev, "carrier offset=%d\n",
 603                 (tuner_frequency - c->frequency));
 604
 605         s32tmp = 0x10000 * (tuner_frequency - c->frequency);
 606         s32tmp = DIV_ROUND_CLOSEST(s32tmp, dev->mclk_khz);
 607         if (s32tmp < 0)
 608                 s32tmp += 0x10000;
 609
 610         buf[0] = (s32tmp >> 0) & 0xff;
 611         buf[1] = (s32tmp >> 8) & 0xff;
 612         ret = regmap_bulk_write(dev->regmap, 0x5e, buf, 2);
 613         if (ret)
 614                 goto err;
 615
 616         ret = regmap_write(dev->regmap, 0x00, 0x00);
 617         if (ret)
 618                 goto err;
 619
 620         ret = regmap_write(dev->regmap, 0xb2, 0x00);
 621         if (ret)
 622                 goto err;
 623
 624         dev->delivery_system = c->delivery_system;
 625
 626         return 0;
 627 err:
 628         dev_dbg(&client->dev, "failed=%d\n", ret);
 629         return ret;
 630 }
 631
 632 static int m88ds3103_init(struct dvb_frontend *fe)
 633 {
 634         struct m88ds3103_dev *dev = fe->demodulator_priv;
 635         struct i2c_client *client = dev->client;
 636         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 637         int ret, len, remaining;
 638         unsigned int utmp;
 639         const struct firmware *fw = NULL;
 640         u8 *fw_file;
 641
 642         dev_dbg(&client->dev, "\n");
 643
 644         /* set cold state by default */
 645         dev->warm = false;
 646
 647         /* wake up device from sleep */
 648         ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x01);
 649         if (ret)
 650                 goto err;
 651         ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x00);
 652         if (ret)
 653                 goto err;
 654         ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x00);
 655         if (ret)
 656                 goto err;
 657
 658         /* firmware status */
 659         ret = regmap_read(dev->regmap, 0xb9, &utmp);
 660         if (ret)
 661                 goto err;
 662
 663         dev_dbg(&client->dev, "firmware=%02x\n", utmp);
 664
 665         if (utmp)
 666                 goto skip_fw_download;
 667
 668         /* global reset, global diseqc reset, golbal fec reset */
 669         ret = regmap_write(dev->regmap, 0x07, 0xe0);
 670         if (ret)
 671                 goto err;
 672         ret = regmap_write(dev->regmap, 0x07, 0x00);
 673         if (ret)
 674                 goto err;
 675
 676         /* cold state - try to download firmware */
 677         dev_info(&client->dev, "found a '%s' in cold state\n",
 678                  m88ds3103_ops.info.name);
 679
 680         if (dev->chip_id == M88RS6000_CHIP_ID)
 681                 fw_file = M88RS6000_FIRMWARE;
 682         else
 683                 fw_file = M88DS3103_FIRMWARE;
 684         /* request the firmware, this will block and timeout */
 685         ret = reject_firmware(&fw, fw_file, &client->dev);
 686         if (ret) {
 687                 dev_err(&client->dev, "firmare file '%s' not found\n", fw_file);
 688                 goto err;
 689         }
 690
 691         dev_info(&client->dev, "downloading firmware from file '%s'\n",
 692                  fw_file);
 693
 694         ret = regmap_write(dev->regmap, 0xb2, 0x01);
 695         if (ret)
 696                 goto error_fw_release;
 697
 698         for (remaining = fw->size; remaining > 0;
 699                         remaining -= (dev->cfg->i2c_wr_max - 1)) {
 700                 len = remaining;
 701                 if (len > (dev->cfg->i2c_wr_max - 1))
 702                         len = (dev->cfg->i2c_wr_max - 1);
 703
 704                 ret = regmap_bulk_write(dev->regmap, 0xb0,
 705                                 &fw->data[fw->size - remaining], len);
 706                 if (ret) {
 707                         dev_err(&client->dev, "firmware download failed=%d\n",
 708                                 ret);
 709                         goto error_fw_release;
 710                 }
 711         }
 712
 713         ret = regmap_write(dev->regmap, 0xb2, 0x00);
 714         if (ret)
 715                 goto error_fw_release;
 716
 717         release_firmware(fw);
 718         fw = NULL;
 719
 720         ret = regmap_read(dev->regmap, 0xb9, &utmp);
 721         if (ret)
 722                 goto err;
 723
 724         if (!utmp) {
 725                 dev_info(&client->dev, "firmware did not run\n");
 726                 ret = -EFAULT;
 727                 goto err;
 728         }
 729
 730         dev_info(&client->dev, "found a '%s' in warm state\n",
 731                  m88ds3103_ops.info.name);
 732         dev_info(&client->dev, "firmware version: %X.%X\n",
 733                  (utmp >> 4) & 0xf, (utmp >> 0 & 0xf));
 734
 735 skip_fw_download:
 736         /* warm state */
 737         dev->warm = true;
 738
 739         /* init stats here in order signal app which stats are supported */
 740         c->cnr.len = 1;
 741         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 742         c->post_bit_error.len = 1;
 743         c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 744         c->post_bit_count.len = 1;
 745         c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 746
 747         return 0;
 748 error_fw_release:
 749         release_firmware(fw);
 750 err:
 751         dev_dbg(&client->dev, "failed=%d\n", ret);
 752         return ret;
 753 }
 754
 755 static int m88ds3103_sleep(struct dvb_frontend *fe)
 756 {
 757         struct m88ds3103_dev *dev = fe->demodulator_priv;
 758         struct i2c_client *client = dev->client;
 759         int ret;
 760         unsigned int utmp;
 761
 762         dev_dbg(&client->dev, "\n");
 763
 764         dev->fe_status = 0;
 765         dev->delivery_system = SYS_UNDEFINED;
 766
 767         /* TS Hi-Z */
 768         if (dev->chip_id == M88RS6000_CHIP_ID)
 769                 utmp = 0x29;
 770         else
 771                 utmp = 0x27;
 772         ret = m88ds3103_update_bits(dev, utmp, 0x01, 0x00);
 773         if (ret)
 774                 goto err;
 775
 776         /* sleep */
 777         ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);
 778         if (ret)
 779                 goto err;
 780         ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);
 781         if (ret)
 782                 goto err;
 783         ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);
 784         if (ret)
 785                 goto err;
 786
 787         return 0;
 788 err:
 789         dev_dbg(&client->dev, "failed=%d\n", ret);
 790         return ret;
 791 }
 792
 793 static int m88ds3103_get_frontend(struct dvb_frontend *fe)
 794 {
 795         struct m88ds3103_dev *dev = fe->demodulator_priv;
 796         struct i2c_client *client = dev->client;
 797         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 798         int ret;
 799         u8 buf[3];
 800
 801         dev_dbg(&client->dev, "\n");
 802
 803         if (!dev->warm || !(dev->fe_status & FE_HAS_LOCK)) {
 804                 ret = 0;
 805                 goto err;
 806         }
 807
 808         switch (c->delivery_system) {
 809         case SYS_DVBS:
 810                 ret = regmap_bulk_read(dev->regmap, 0xe0, &buf[0], 1);
 811                 if (ret)
 812                         goto err;
 813
 814                 ret = regmap_bulk_read(dev->regmap, 0xe6, &buf[1], 1);
 815                 if (ret)
 816                         goto err;
 817
 818                 switch ((buf[0] >> 2) & 0x01) {
 819                 case 0:
 820                         c->inversion = INVERSION_OFF;
 821                         break;
 822                 case 1:
 823                         c->inversion = INVERSION_ON;
 824                         break;
 825                 }
 826
 827                 switch ((buf[1] >> 5) & 0x07) {
 828                 case 0:
 829                         c->fec_inner = FEC_7_8;
 830                         break;
 831                 case 1:
 832                         c->fec_inner = FEC_5_6;
 833                         break;
 834                 case 2:
 835                         c->fec_inner = FEC_3_4;
 836                         break;
 837                 case 3:
 838                         c->fec_inner = FEC_2_3;
 839                         break;
 840                 case 4:
 841                         c->fec_inner = FEC_1_2;
 842                         break;
 843                 default:
 844                         dev_dbg(&client->dev, "invalid fec_inner\n");
 845                 }
 846
 847                 c->modulation = QPSK;
 848
 849                 break;
 850         case SYS_DVBS2:
 851                 ret = regmap_bulk_read(dev->regmap, 0x7e, &buf[0], 1);
 852                 if (ret)
 853                         goto err;
 854
 855                 ret = regmap_bulk_read(dev->regmap, 0x89, &buf[1], 1);
 856                 if (ret)
 857                         goto err;
 858
 859                 ret = regmap_bulk_read(dev->regmap, 0xf2, &buf[2], 1);
 860                 if (ret)
 861                         goto err;
 862
 863                 switch ((buf[0] >> 0) & 0x0f) {
 864                 case 2:
 865                         c->fec_inner = FEC_2_5;
 866                         break;
 867                 case 3:
 868                         c->fec_inner = FEC_1_2;
 869                         break;
 870                 case 4:
 871                         c->fec_inner = FEC_3_5;
 872                         break;
 873                 case 5:
 874                         c->fec_inner = FEC_2_3;
 875                         break;
 876                 case 6:
 877                         c->fec_inner = FEC_3_4;
 878                         break;
 879                 case 7:
 880                         c->fec_inner = FEC_4_5;
 881                         break;
 882                 case 8:
 883                         c->fec_inner = FEC_5_6;
 884                         break;
 885                 case 9:
 886                         c->fec_inner = FEC_8_9;
 887                         break;
 888                 case 10:
 889                         c->fec_inner = FEC_9_10;
 890                         break;
 891                 default:
 892                         dev_dbg(&client->dev, "invalid fec_inner\n");
 893                 }
 894
 895                 switch ((buf[0] >> 5) & 0x01) {
 896                 case 0:
 897                         c->pilot = PILOT_OFF;
 898                         break;
 899                 case 1:
 900                         c->pilot = PILOT_ON;
 901                         break;
 902                 }
 903
 904                 switch ((buf[0] >> 6) & 0x07) {
 905                 case 0:
 906                         c->modulation = QPSK;
 907                         break;
 908                 case 1:
 909                         c->modulation = PSK_8;
 910                         break;
 911                 case 2:
 912                         c->modulation = APSK_16;
 913                         break;
 914                 case 3:
 915                         c->modulation = APSK_32;
 916                         break;
 917                 default:
 918                         dev_dbg(&client->dev, "invalid modulation\n");
 919                 }
 920
 921                 switch ((buf[1] >> 7) & 0x01) {
 922                 case 0:
 923                         c->inversion = INVERSION_OFF;
 924                         break;
 925                 case 1:
 926                         c->inversion = INVERSION_ON;
 927                         break;
 928                 }
 929
 930                 switch ((buf[2] >> 0) & 0x03) {
 931                 case 0:
 932                         c->rolloff = ROLLOFF_35;
 933                         break;
 934                 case 1:
 935                         c->rolloff = ROLLOFF_25;
 936                         break;
 937                 case 2:
 938                         c->rolloff = ROLLOFF_20;
 939                         break;
 940                 default:
 941                         dev_dbg(&client->dev, "invalid rolloff\n");
 942                 }
 943                 break;
 944         default:
 945                 dev_dbg(&client->dev, "invalid delivery_system\n");
 946                 ret = -EINVAL;
 947                 goto err;
 948         }
 949
 950         ret = regmap_bulk_read(dev->regmap, 0x6d, buf, 2);
 951         if (ret)
 952                 goto err;
 953
 954         c->symbol_rate = 1ull * ((buf[1] << 8) | (buf[0] << 0)) *
 955                         dev->mclk_khz * 1000 / 0x10000;
 956
 957         return 0;
 958 err:
 959         dev_dbg(&client->dev, "failed=%d\n", ret);
 960         return ret;
 961 }
 962
 963 static int m88ds3103_read_snr(struct dvb_frontend *fe, u16 *snr)
 964 {
 965         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 966
 967         if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
 968                 *snr = div_s64(c->cnr.stat[0].svalue, 100);
 969         else
 970                 *snr = 0;
 971
 972         return 0;
 973 }
 974
 975 static int m88ds3103_read_ber(struct dvb_frontend *fe, u32 *ber)
 976 {
 977         struct m88ds3103_dev *dev = fe->demodulator_priv;
 978
 979         *ber = dev->dvbv3_ber;
 980
 981         return 0;
 982 }
 983
 984 static int m88ds3103_set_tone(struct dvb_frontend *fe,
 985         enum fe_sec_tone_mode fe_sec_tone_mode)
 986 {
 987         struct m88ds3103_dev *dev = fe->demodulator_priv;
 988         struct i2c_client *client = dev->client;
 989         int ret;
 990         unsigned int utmp, tone, reg_a1_mask;
 991
 992         dev_dbg(&client->dev, "fe_sec_tone_mode=%d\n", fe_sec_tone_mode);
 993
 994         if (!dev->warm) {
 995                 ret = -EAGAIN;
 996                 goto err;
 997         }
 998
 999         switch (fe_sec_tone_mode) {
1000         case SEC_TONE_ON:
1001                 tone = 0;
1002                 reg_a1_mask = 0x47;
1003                 break;
1004         case SEC_TONE_OFF:
1005                 tone = 1;
1006                 reg_a1_mask = 0x00;
1007                 break;
1008         default:
1009                 dev_dbg(&client->dev, "invalid fe_sec_tone_mode\n");
1010                 ret = -EINVAL;
1011                 goto err;
1012         }
1013
1014         utmp = tone << 7 | dev->cfg->envelope_mode << 5;
1015         ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
1016         if (ret)
1017                 goto err;
1018
1019         utmp = 1 << 2;
1020         ret = m88ds3103_update_bits(dev, 0xa1, reg_a1_mask, utmp);
1021         if (ret)
1022                 goto err;
1023
1024         return 0;
1025 err:
1026         dev_dbg(&client->dev, "failed=%d\n", ret);
1027         return ret;
1028 }
1029
1030 static int m88ds3103_set_voltage(struct dvb_frontend *fe,
1031         enum fe_sec_voltage fe_sec_voltage)
1032 {
1033         struct m88ds3103_dev *dev = fe->demodulator_priv;
1034         struct i2c_client *client = dev->client;
1035         int ret;
1036         unsigned int utmp;
1037         bool voltage_sel, voltage_dis;
1038
1039         dev_dbg(&client->dev, "fe_sec_voltage=%d\n", fe_sec_voltage);
1040
1041         if (!dev->warm) {
1042                 ret = -EAGAIN;
1043                 goto err;
1044         }
1045
1046         switch (fe_sec_voltage) {
1047         case SEC_VOLTAGE_18:
1048                 voltage_sel = true;
1049                 voltage_dis = false;
1050                 break;
1051         case SEC_VOLTAGE_13:
1052                 voltage_sel = false;
1053                 voltage_dis = false;
1054                 break;
1055         case SEC_VOLTAGE_OFF:
1056                 voltage_sel = false;
1057                 voltage_dis = true;
1058                 break;
1059         default:
1060                 dev_dbg(&client->dev, "invalid fe_sec_voltage\n");
1061                 ret = -EINVAL;
1062                 goto err;
1063         }
1064
1065         /* output pin polarity */
1066         voltage_sel ^= dev->cfg->lnb_hv_pol;
1067         voltage_dis ^= dev->cfg->lnb_en_pol;
1068
1069         utmp = voltage_dis << 1 | voltage_sel << 0;
1070         ret = m88ds3103_update_bits(dev, 0xa2, 0x03, utmp);
1071         if (ret)
1072                 goto err;
1073
1074         return 0;
1075 err:
1076         dev_dbg(&client->dev, "failed=%d\n", ret);
1077         return ret;
1078 }
1079
1080 static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe,
1081                 struct dvb_diseqc_master_cmd *diseqc_cmd)
1082 {
1083         struct m88ds3103_dev *dev = fe->demodulator_priv;
1084         struct i2c_client *client = dev->client;
1085         int ret;
1086         unsigned int utmp;
1087         unsigned long timeout;
1088
1089         dev_dbg(&client->dev, "msg=%*ph\n",
1090                 diseqc_cmd->msg_len, diseqc_cmd->msg);
1091
1092         if (!dev->warm) {
1093                 ret = -EAGAIN;
1094                 goto err;
1095         }
1096
1097         if (diseqc_cmd->msg_len < 3 || diseqc_cmd->msg_len > 6) {
1098                 ret = -EINVAL;
1099                 goto err;
1100         }
1101
1102         utmp = dev->cfg->envelope_mode << 5;
1103         ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
1104         if (ret)
1105                 goto err;
1106
1107         ret = regmap_bulk_write(dev->regmap, 0xa3, diseqc_cmd->msg,
1108                         diseqc_cmd->msg_len);
1109         if (ret)
1110                 goto err;
1111
1112         ret = regmap_write(dev->regmap, 0xa1,
1113                         (diseqc_cmd->msg_len - 1) << 3 | 0x07);
1114         if (ret)
1115                 goto err;
1116
1117         /* wait DiSEqC TX ready */
1118         #define SEND_MASTER_CMD_TIMEOUT 120
1119         timeout = jiffies + msecs_to_jiffies(SEND_MASTER_CMD_TIMEOUT);
1120
1121         /* DiSEqC message typical period is 54 ms */
1122         usleep_range(50000, 54000);
1123
1124         for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {
1125                 ret = regmap_read(dev->regmap, 0xa1, &utmp);
1126                 if (ret)
1127                         goto err;
1128                 utmp = (utmp >> 6) & 0x1;
1129         }
1130
1131         if (utmp == 0) {
1132                 dev_dbg(&client->dev, "diseqc tx took %u ms\n",
1133                         jiffies_to_msecs(jiffies) -
1134                         (jiffies_to_msecs(timeout) - SEND_MASTER_CMD_TIMEOUT));
1135         } else {
1136                 dev_dbg(&client->dev, "diseqc tx timeout\n");
1137
1138                 ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);
1139                 if (ret)
1140                         goto err;
1141         }
1142
1143         ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);
1144         if (ret)
1145                 goto err;
1146
1147         if (utmp == 1) {
1148                 ret = -ETIMEDOUT;
1149                 goto err;
1150         }
1151
1152         return 0;
1153 err:
1154         dev_dbg(&client->dev, "failed=%d\n", ret);
1155         return ret;
1156 }
1157
1158 static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe,
1159         enum fe_sec_mini_cmd fe_sec_mini_cmd)
1160 {
1161         struct m88ds3103_dev *dev = fe->demodulator_priv;
1162         struct i2c_client *client = dev->client;
1163         int ret;
1164         unsigned int utmp, burst;
1165         unsigned long timeout;
1166
1167         dev_dbg(&client->dev, "fe_sec_mini_cmd=%d\n", fe_sec_mini_cmd);
1168
1169         if (!dev->warm) {
1170                 ret = -EAGAIN;
1171                 goto err;
1172         }
1173
1174         utmp = dev->cfg->envelope_mode << 5;
1175         ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
1176         if (ret)
1177                 goto err;
1178
1179         switch (fe_sec_mini_cmd) {
1180         case SEC_MINI_A:
1181                 burst = 0x02;
1182                 break;
1183         case SEC_MINI_B:
1184                 burst = 0x01;
1185                 break;
1186         default:
1187                 dev_dbg(&client->dev, "invalid fe_sec_mini_cmd\n");
1188                 ret = -EINVAL;
1189                 goto err;
1190         }
1191
1192         ret = regmap_write(dev->regmap, 0xa1, burst);
1193         if (ret)
1194                 goto err;
1195
1196         /* wait DiSEqC TX ready */
1197         #define SEND_BURST_TIMEOUT 40
1198         timeout = jiffies + msecs_to_jiffies(SEND_BURST_TIMEOUT);
1199
1200         /* DiSEqC ToneBurst period is 12.5 ms */
1201         usleep_range(8500, 12500);
1202
1203         for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {
1204                 ret = regmap_read(dev->regmap, 0xa1, &utmp);
1205                 if (ret)
1206                         goto err;
1207                 utmp = (utmp >> 6) & 0x1;
1208         }
1209
1210         if (utmp == 0) {
1211                 dev_dbg(&client->dev, "diseqc tx took %u ms\n",
1212                         jiffies_to_msecs(jiffies) -
1213                         (jiffies_to_msecs(timeout) - SEND_BURST_TIMEOUT));
1214         } else {
1215                 dev_dbg(&client->dev, "diseqc tx timeout\n");
1216
1217                 ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);
1218                 if (ret)
1219                         goto err;
1220         }
1221
1222         ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);
1223         if (ret)
1224                 goto err;
1225
1226         if (utmp == 1) {
1227                 ret = -ETIMEDOUT;
1228                 goto err;
1229         }
1230
1231         return 0;
1232 err:
1233         dev_dbg(&client->dev, "failed=%d\n", ret);
1234         return ret;
1235 }
1236
1237 static int m88ds3103_get_tune_settings(struct dvb_frontend *fe,
1238         struct dvb_frontend_tune_settings *s)
1239 {
1240         s->min_delay_ms = 3000;
1241
1242         return 0;
1243 }
1244
1245 static void m88ds3103_release(struct dvb_frontend *fe)
1246 {
1247         struct m88ds3103_dev *dev = fe->demodulator_priv;
1248         struct i2c_client *client = dev->client;
1249
1250         i2c_unregister_device(client);
1251 }
1252
1253 static int m88ds3103_select(struct i2c_adapter *adap, void *mux_priv, u32 chan)
1254 {
1255         struct m88ds3103_dev *dev = mux_priv;
1256         struct i2c_client *client = dev->client;
1257         int ret;
1258         struct i2c_msg msg = {
1259                 .addr = client->addr,
1260                 .flags = 0,
1261                 .len = 2,
1262                 .buf = "\x03\x11",
1263         };
1264
1265         /* Open tuner I2C repeater for 1 xfer, closes automatically */
1266         ret = __i2c_transfer(client->adapter, &msg, 1);
1267         if (ret != 1) {
1268                 dev_warn(&client->dev, "i2c wr failed=%d\n", ret);
1269                 if (ret >= 0)
1270                         ret = -EREMOTEIO;
1271                 return ret;
1272         }
1273
1274         return 0;
1275 }
1276
1277 /*
1278  * XXX: That is wrapper to m88ds3103_probe() via driver core in order to provide
1279  * proper I2C client for legacy media attach binding.
1280  * New users must use I2C client binding directly!
1281  */
1282 struct dvb_frontend *m88ds3103_attach(const struct m88ds3103_config *cfg,
1283                                       struct i2c_adapter *i2c,
1284                                       struct i2c_adapter **tuner_i2c_adapter)
1285 {
1286         struct i2c_client *client;
1287         struct i2c_board_info board_info;
1288         struct m88ds3103_platform_data pdata = {};
1289
1290         pdata.clk = cfg->clock;
1291         pdata.i2c_wr_max = cfg->i2c_wr_max;
1292         pdata.ts_mode = cfg->ts_mode;
1293         pdata.ts_clk = cfg->ts_clk;
1294         pdata.ts_clk_pol = cfg->ts_clk_pol;
1295         pdata.spec_inv = cfg->spec_inv;
1296         pdata.agc = cfg->agc;
1297         pdata.agc_inv = cfg->agc_inv;
1298         pdata.clk_out = cfg->clock_out;
1299         pdata.envelope_mode = cfg->envelope_mode;
1300         pdata.lnb_hv_pol = cfg->lnb_hv_pol;
1301         pdata.lnb_en_pol = cfg->lnb_en_pol;
1302         pdata.attach_in_use = true;
1303
1304         memset(&board_info, 0, sizeof(board_info));
1305         strlcpy(board_info.type, "m88ds3103", I2C_NAME_SIZE);
1306         board_info.addr = cfg->i2c_addr;
1307         board_info.platform_data = &pdata;
1308         client = i2c_new_device(i2c, &board_info);
1309         if (!client || !client->dev.driver)
1310                 return NULL;
1311
1312         *tuner_i2c_adapter = pdata.get_i2c_adapter(client);
1313         return pdata.get_dvb_frontend(client);
1314 }
1315 EXPORT_SYMBOL(m88ds3103_attach);
1316
1317 static struct dvb_frontend_ops m88ds3103_ops = {
1318         .delsys = {SYS_DVBS, SYS_DVBS2},
1319         .info = {
1320                 .name = "Montage Technology M88DS3103",
1321                 .frequency_min =  950000,
1322                 .frequency_max = 2150000,
1323                 .frequency_tolerance = 5000,
1324                 .symbol_rate_min =  1000000,
1325                 .symbol_rate_max = 45000000,
1326                 .caps = FE_CAN_INVERSION_AUTO |
1327                         FE_CAN_FEC_1_2 |
1328                         FE_CAN_FEC_2_3 |
1329                         FE_CAN_FEC_3_4 |
1330                         FE_CAN_FEC_4_5 |
1331                         FE_CAN_FEC_5_6 |
1332                         FE_CAN_FEC_6_7 |
1333                         FE_CAN_FEC_7_8 |
1334                         FE_CAN_FEC_8_9 |
1335                         FE_CAN_FEC_AUTO |
1336                         FE_CAN_QPSK |
1337                         FE_CAN_RECOVER |
1338                         FE_CAN_2G_MODULATION
1339         },
1340
1341         .release = m88ds3103_release,
1342
1343         .get_tune_settings = m88ds3103_get_tune_settings,
1344
1345         .init = m88ds3103_init,
1346         .sleep = m88ds3103_sleep,
1347
1348         .set_frontend = m88ds3103_set_frontend,
1349         .get_frontend = m88ds3103_get_frontend,
1350
1351         .read_status = m88ds3103_read_status,
1352         .read_snr = m88ds3103_read_snr,
1353         .read_ber = m88ds3103_read_ber,
1354
1355         .diseqc_send_master_cmd = m88ds3103_diseqc_send_master_cmd,
1356         .diseqc_send_burst = m88ds3103_diseqc_send_burst,
1357
1358         .set_tone = m88ds3103_set_tone,
1359         .set_voltage = m88ds3103_set_voltage,
1360 };
1361
1362 static struct dvb_frontend *m88ds3103_get_dvb_frontend(struct i2c_client *client)
1363 {
1364         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1365
1366         dev_dbg(&client->dev, "\n");
1367
1368         return &dev->fe;
1369 }
1370
1371 static struct i2c_adapter *m88ds3103_get_i2c_adapter(struct i2c_client *client)
1372 {
1373         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1374
1375         dev_dbg(&client->dev, "\n");
1376
1377         return dev->i2c_adapter;
1378 }
1379
1380 static int m88ds3103_probe(struct i2c_client *client,
1381                         const struct i2c_device_id *id)
1382 {
1383         struct m88ds3103_dev *dev;
1384         struct m88ds3103_platform_data *pdata = client->dev.platform_data;
1385         int ret;
1386         unsigned int utmp;
1387
1388         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1389         if (!dev) {
1390                 ret = -ENOMEM;
1391                 goto err;
1392         }
1393
1394         dev->client = client;
1395         dev->config.clock = pdata->clk;
1396         dev->config.i2c_wr_max = pdata->i2c_wr_max;
1397         dev->config.ts_mode = pdata->ts_mode;
1398         dev->config.ts_clk = pdata->ts_clk;
1399         dev->config.ts_clk_pol = pdata->ts_clk_pol;
1400         dev->config.spec_inv = pdata->spec_inv;
1401         dev->config.agc_inv = pdata->agc_inv;
1402         dev->config.clock_out = pdata->clk_out;
1403         dev->config.envelope_mode = pdata->envelope_mode;
1404         dev->config.agc = pdata->agc;
1405         dev->config.lnb_hv_pol = pdata->lnb_hv_pol;
1406         dev->config.lnb_en_pol = pdata->lnb_en_pol;
1407         dev->cfg = &dev->config;
1408         /* create regmap */
1409         dev->regmap_config.reg_bits = 8,
1410         dev->regmap_config.val_bits = 8,
1411         dev->regmap_config.lock_arg = dev,
1412         dev->regmap = devm_regmap_init_i2c(client, &dev->regmap_config);
1413         if (IS_ERR(dev->regmap)) {
1414                 ret = PTR_ERR(dev->regmap);
1415                 goto err_kfree;
1416         }
1417
1418         /* 0x00: chip id[6:0], 0x01: chip ver[7:0], 0x02: chip ver[15:8] */
1419         ret = regmap_read(dev->regmap, 0x00, &utmp);
1420         if (ret)
1421                 goto err_kfree;
1422
1423         dev->chip_id = utmp >> 1;
1424         dev_dbg(&client->dev, "chip_id=%02x\n", dev->chip_id);
1425
1426         switch (dev->chip_id) {
1427         case M88RS6000_CHIP_ID:
1428         case M88DS3103_CHIP_ID:
1429                 break;
1430         default:
1431                 ret = -ENODEV;
1432                 dev_err(&client->dev, "Unknown device. Chip_id=%02x\n", dev->chip_id);
1433                 goto err_kfree;
1434         }
1435
1436         switch (dev->cfg->clock_out) {
1437         case M88DS3103_CLOCK_OUT_DISABLED:
1438                 utmp = 0x80;
1439                 break;
1440         case M88DS3103_CLOCK_OUT_ENABLED:
1441                 utmp = 0x00;
1442                 break;
1443         case M88DS3103_CLOCK_OUT_ENABLED_DIV2:
1444                 utmp = 0x10;
1445                 break;
1446         default:
1447                 ret = -EINVAL;
1448                 goto err_kfree;
1449         }
1450
1451         /* 0x29 register is defined differently for m88rs6000. */
1452         /* set internal tuner address to 0x21 */
1453         if (dev->chip_id == M88RS6000_CHIP_ID)
1454                 utmp = 0x00;
1455
1456         ret = regmap_write(dev->regmap, 0x29, utmp);
1457         if (ret)
1458                 goto err_kfree;
1459
1460         /* sleep */
1461         ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);
1462         if (ret)
1463                 goto err_kfree;
1464         ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);
1465         if (ret)
1466                 goto err_kfree;
1467         ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);
1468         if (ret)
1469                 goto err_kfree;
1470
1471         /* create mux i2c adapter for tuner */
1472         dev->i2c_adapter = i2c_add_mux_adapter(client->adapter, &client->dev,
1473                                                dev, 0, 0, 0, m88ds3103_select,
1474                                                NULL);
1475         if (dev->i2c_adapter == NULL) {
1476                 ret = -ENOMEM;
1477                 goto err_kfree;
1478         }
1479
1480         /* create dvb_frontend */
1481         memcpy(&dev->fe.ops, &m88ds3103_ops, sizeof(struct dvb_frontend_ops));
1482         if (dev->chip_id == M88RS6000_CHIP_ID)
1483                 strncpy(dev->fe.ops.info.name, "Montage Technology M88RS6000",
1484                         sizeof(dev->fe.ops.info.name));
1485         if (!pdata->attach_in_use)
1486                 dev->fe.ops.release = NULL;
1487         dev->fe.demodulator_priv = dev;
1488         i2c_set_clientdata(client, dev);
1489
1490         /* setup callbacks */
1491         pdata->get_dvb_frontend = m88ds3103_get_dvb_frontend;
1492         pdata->get_i2c_adapter = m88ds3103_get_i2c_adapter;
1493         return 0;
1494 err_kfree:
1495         kfree(dev);
1496 err:
1497         dev_dbg(&client->dev, "failed=%d\n", ret);
1498         return ret;
1499 }
1500
1501 static int m88ds3103_remove(struct i2c_client *client)
1502 {
1503         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1504
1505         dev_dbg(&client->dev, "\n");
1506
1507         i2c_del_mux_adapter(dev->i2c_adapter);
1508
1509         kfree(dev);
1510         return 0;
1511 }
1512
1513 static const struct i2c_device_id m88ds3103_id_table[] = {
1514         {"m88ds3103", 0},
1515         {}
1516 };
1517 MODULE_DEVICE_TABLE(i2c, m88ds3103_id_table);
1518
1519 static struct i2c_driver m88ds3103_driver = {
1520         .driver = {
1521                 .name   = "m88ds3103",
1522                 .suppress_bind_attrs = true,
1523         },
1524         .probe          = m88ds3103_probe,
1525         .remove         = m88ds3103_remove,
1526         .id_table       = m88ds3103_id_table,
1527 };
1528
1529 module_i2c_driver(m88ds3103_driver);
1530
1531 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1532 MODULE_DESCRIPTION("Montage Technology M88DS3103 DVB-S/S2 demodulator driver");
1533 MODULE_LICENSE("GPL");
1534 /*(DEBLOBBED)*/