drivers/media/dvb-frontends/nxt200x.c

   1 /*
   2  *    Support for NXT2002 and NXT2004 - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
   5  *    Copyright (C) 2006-2014 Michael Krufky <mkrufky@linuxtv.org>
   6  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
   7  *    and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
   8  *
   9  *    This program is free software; you can redistribute it and/or modify
  10  *    it under the terms of the GNU General Public License as published by
  11  *    the Free Software Foundation; either version 2 of the License, or
  12  *    (at your option) any later version.
  13  *
  14  *    This program is distributed in the hope that it will be useful,
  15  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *    GNU General Public License for more details.
  18  *
  19 */
  20
  21 /*(DEBLOBBED)*/
  22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23
  24 /* Max transfer size done by I2C transfer functions */
  25 #define MAX_XFER_SIZE  256
  26
  27 /*(DEBLOBBED)*/
  28 /*(DEBLOBBED)*/
  29 #define CRC_CCIT_MASK 0x1021
  30
  31 #include <linux/kernel.h>
  32 #include <linux/init.h>
  33 #include <linux/module.h>
  34 #include <linux/slab.h>
  35 #include <linux/string.h>
  36
  37 #include "dvb_frontend.h"
  38 #include "nxt200x.h"
  39
  40 struct nxt200x_state {
  41
  42         struct i2c_adapter* i2c;
  43         const struct nxt200x_config* config;
  44         struct dvb_frontend frontend;
  45
  46         /* demodulator private data */
  47         nxt_chip_type demod_chip;
  48         u8 initialised:1;
  49 };
  50
  51 static int debug;
  52 #define dprintk(args...)        do { if (debug) pr_debug(args); } while (0)
  53
  54 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
  55 {
  56         int err;
  57         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
  58
  59         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  60                 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
  61                         __func__, addr, err);
  62                 return -EREMOTEIO;
  63         }
  64         return 0;
  65 }
  66
  67 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
  68 {
  69         int err;
  70         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
  71
  72         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  73                 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
  74                         __func__, addr, err);
  75                 return -EREMOTEIO;
  76         }
  77         return 0;
  78 }
  79
  80 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
  81                                const u8 *buf, u8 len)
  82 {
  83         u8 buf2[MAX_XFER_SIZE];
  84         int err;
  85         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
  86
  87         if (1 + len > sizeof(buf2)) {
  88                 pr_warn("%s: i2c wr reg=%04x: len=%d is too big!\n",
  89                          __func__, reg, len);
  90                 return -EINVAL;
  91         }
  92
  93         buf2[0] = reg;
  94         memcpy(&buf2[1], buf, len);
  95
  96         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  97                 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
  98                         __func__, state->config->demod_address, err);
  99                 return -EREMOTEIO;
 100         }
 101         return 0;
 102 }
 103
 104 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
 105 {
 106         u8 reg2 [] = { reg };
 107
 108         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
 109                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
 110
 111         int err;
 112
 113         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
 114                 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
 115                         __func__, state->config->demod_address, err);
 116                 return -EREMOTEIO;
 117         }
 118         return 0;
 119 }
 120
 121 static u16 nxt200x_crc(u16 crc, u8 c)
 122 {
 123         u8 i;
 124         u16 input = (u16) c & 0xFF;
 125
 126         input<<=8;
 127         for(i=0; i<8; i++) {
 128                 if((crc^input) & 0x8000)
 129                         crc=(crc<<1)^CRC_CCIT_MASK;
 130                 else
 131                         crc<<=1;
 132                 input<<=1;
 133         }
 134         return crc;
 135 }
 136
 137 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 138 {
 139         u8 attr, len2, buf;
 140         dprintk("%s\n", __func__);
 141
 142         /* set mutli register register */
 143         nxt200x_writebytes(state, 0x35, &reg, 1);
 144
 145         /* send the actual data */
 146         nxt200x_writebytes(state, 0x36, data, len);
 147
 148         switch (state->demod_chip) {
 149                 case NXT2002:
 150                         len2 = len;
 151                         buf = 0x02;
 152                         break;
 153                 case NXT2004:
 154                         /* probably not right, but gives correct values */
 155                         attr = 0x02;
 156                         if (reg & 0x80) {
 157                                 attr = attr << 1;
 158                                 if (reg & 0x04)
 159                                         attr = attr >> 1;
 160                         }
 161                         /* set write bit */
 162                         len2 = ((attr << 4) | 0x10) | len;
 163                         buf = 0x80;
 164                         break;
 165                 default:
 166                         return -EINVAL;
 167                         break;
 168         }
 169
 170         /* set multi register length */
 171         nxt200x_writebytes(state, 0x34, &len2, 1);
 172
 173         /* toggle the multireg write bit */
 174         nxt200x_writebytes(state, 0x21, &buf, 1);
 175
 176         nxt200x_readbytes(state, 0x21, &buf, 1);
 177
 178         switch (state->demod_chip) {
 179                 case NXT2002:
 180                         if ((buf & 0x02) == 0)
 181                                 return 0;
 182                         break;
 183                 case NXT2004:
 184                         if (buf == 0)
 185                                 return 0;
 186                         break;
 187                 default:
 188                         return -EINVAL;
 189                         break;
 190         }
 191
 192         pr_warn("Error writing multireg register 0x%02X\n", reg);
 193
 194         return 0;
 195 }
 196
 197 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 198 {
 199         int i;
 200         u8 buf, len2, attr;
 201         dprintk("%s\n", __func__);
 202
 203         /* set mutli register register */
 204         nxt200x_writebytes(state, 0x35, &reg, 1);
 205
 206         switch (state->demod_chip) {
 207                 case NXT2002:
 208                         /* set multi register length */
 209                         len2 = len & 0x80;
 210                         nxt200x_writebytes(state, 0x34, &len2, 1);
 211
 212                         /* read the actual data */
 213                         nxt200x_readbytes(state, reg, data, len);
 214                         return 0;
 215                         break;
 216                 case NXT2004:
 217                         /* probably not right, but gives correct values */
 218                         attr = 0x02;
 219                         if (reg & 0x80) {
 220                                 attr = attr << 1;
 221                                 if (reg & 0x04)
 222                                         attr = attr >> 1;
 223                         }
 224
 225                         /* set multi register length */
 226                         len2 = (attr << 4) | len;
 227                         nxt200x_writebytes(state, 0x34, &len2, 1);
 228
 229                         /* toggle the multireg bit*/
 230                         buf = 0x80;
 231                         nxt200x_writebytes(state, 0x21, &buf, 1);
 232
 233                         /* read the actual data */
 234                         for(i = 0; i < len; i++) {
 235                                 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
 236                         }
 237                         return 0;
 238                         break;
 239                 default:
 240                         return -EINVAL;
 241                         break;
 242         }
 243 }
 244
 245 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
 246 {
 247         u8 buf, stopval, counter = 0;
 248         dprintk("%s\n", __func__);
 249
 250         /* set correct stop value */
 251         switch (state->demod_chip) {
 252                 case NXT2002:
 253                         stopval = 0x40;
 254                         break;
 255                 case NXT2004:
 256                         stopval = 0x10;
 257                         break;
 258                 default:
 259                         stopval = 0;
 260                         break;
 261         }
 262
 263         buf = 0x80;
 264         nxt200x_writebytes(state, 0x22, &buf, 1);
 265
 266         while (counter < 20) {
 267                 nxt200x_readbytes(state, 0x31, &buf, 1);
 268                 if (buf & stopval)
 269                         return;
 270                 msleep(10);
 271                 counter++;
 272         }
 273
 274         pr_warn("Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
 275         return;
 276 }
 277
 278 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
 279 {
 280         u8 buf;
 281         dprintk("%s\n", __func__);
 282
 283         buf = 0x00;
 284         nxt200x_writebytes(state, 0x22, &buf, 1);
 285 }
 286
 287 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
 288 {
 289         u8 buf[9];
 290         u8 counter = 0;
 291         dprintk("%s\n", __func__);
 292
 293         buf[0] = 0x00;
 294         nxt200x_writebytes(state, 0x2b, buf, 1);
 295         buf[0] = 0x70;
 296         nxt200x_writebytes(state, 0x34, buf, 1);
 297         buf[0] = 0x04;
 298         nxt200x_writebytes(state, 0x35, buf, 1);
 299         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
 300         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
 301         nxt200x_writebytes(state, 0x36, buf, 9);
 302         buf[0] = 0x80;
 303         nxt200x_writebytes(state, 0x21, buf, 1);
 304
 305         while (counter < 20) {
 306                 nxt200x_readbytes(state, 0x21, buf, 1);
 307                 if (buf[0] == 0)
 308                         return;
 309                 msleep(10);
 310                 counter++;
 311         }
 312
 313         pr_warn("Timeout waiting for nxt2004 to init.\n");
 314
 315         return;
 316 }
 317
 318 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
 319 {
 320         u8 buf, count = 0;
 321
 322         dprintk("%s\n", __func__);
 323
 324         dprintk("Tuner Bytes: %*ph\n", 4, data + 1);
 325
 326         /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
 327          * direct write is required for Philips TUV1236D and ALPS TDHU2 */
 328         switch (state->demod_chip) {
 329                 case NXT2004:
 330                         if (i2c_writebytes(state, data[0], data+1, 4))
 331                                 pr_warn("error writing to tuner\n");
 332                         /* wait until we have a lock */
 333                         while (count < 20) {
 334                                 i2c_readbytes(state, data[0], &buf, 1);
 335                                 if (buf & 0x40)
 336                                         return 0;
 337                                 msleep(100);
 338                                 count++;
 339                         }
 340                         pr_warn("timeout waiting for tuner lock\n");
 341                         break;
 342                 case NXT2002:
 343                         /* set the i2c transfer speed to the tuner */
 344                         buf = 0x03;
 345                         nxt200x_writebytes(state, 0x20, &buf, 1);
 346
 347                         /* setup to transfer 4 bytes via i2c */
 348                         buf = 0x04;
 349                         nxt200x_writebytes(state, 0x34, &buf, 1);
 350
 351                         /* write actual tuner bytes */
 352                         nxt200x_writebytes(state, 0x36, data+1, 4);
 353
 354                         /* set tuner i2c address */
 355                         buf = data[0] << 1;
 356                         nxt200x_writebytes(state, 0x35, &buf, 1);
 357
 358                         /* write UC Opmode to begin transfer */
 359                         buf = 0x80;
 360                         nxt200x_writebytes(state, 0x21, &buf, 1);
 361
 362                         while (count < 20) {
 363                                 nxt200x_readbytes(state, 0x21, &buf, 1);
 364                                 if ((buf & 0x80)== 0x00)
 365                                         return 0;
 366                                 msleep(100);
 367                                 count++;
 368                         }
 369                         pr_warn("timeout error writing to tuner\n");
 370                         break;
 371                 default:
 372                         return -EINVAL;
 373                         break;
 374         }
 375         return 0;
 376 }
 377
 378 static void nxt200x_agc_reset(struct nxt200x_state* state)
 379 {
 380         u8 buf;
 381         dprintk("%s\n", __func__);
 382
 383         switch (state->demod_chip) {
 384                 case NXT2002:
 385                         buf = 0x08;
 386                         nxt200x_writebytes(state, 0x08, &buf, 1);
 387                         buf = 0x00;
 388                         nxt200x_writebytes(state, 0x08, &buf, 1);
 389                         break;
 390                 case NXT2004:
 391                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
 392                         buf = 0x08;
 393                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 394                         buf = 0x00;
 395                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 396                         break;
 397                 default:
 398                         break;
 399         }
 400         return;
 401 }
 402
 403 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 404 {
 405
 406         struct nxt200x_state* state = fe->demodulator_priv;
 407         u8 buf[3], written = 0, chunkpos = 0;
 408         u16 rambase, position, crc = 0;
 409
 410         dprintk("%s\n", __func__);
 411         dprintk("Firmware is %zu bytes\n", fw->size);
 412
 413         /* Get the RAM base for this nxt2002 */
 414         nxt200x_readbytes(state, 0x10, buf, 1);
 415
 416         if (buf[0] & 0x10)
 417                 rambase = 0x1000;
 418         else
 419                 rambase = 0x0000;
 420
 421         dprintk("rambase on this nxt2002 is %04X\n", rambase);
 422
 423         /* Hold the micro in reset while loading firmware */
 424         buf[0] = 0x80;
 425         nxt200x_writebytes(state, 0x2B, buf, 1);
 426
 427         for (position = 0; position < fw->size; position++) {
 428                 if (written == 0) {
 429                         crc = 0;
 430                         chunkpos = 0x28;
 431                         buf[0] = ((rambase + position) >> 8);
 432                         buf[1] = (rambase + position) & 0xFF;
 433                         buf[2] = 0x81;
 434                         /* write starting address */
 435                         nxt200x_writebytes(state, 0x29, buf, 3);
 436                 }
 437                 written++;
 438                 chunkpos++;
 439
 440                 if ((written % 4) == 0)
 441                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
 442
 443                 crc = nxt200x_crc(crc, fw->data[position]);
 444
 445                 if ((written == 255) || (position+1 == fw->size)) {
 446                         /* write remaining bytes of firmware */
 447                         nxt200x_writebytes(state, chunkpos+4-(written %4),
 448                                 &fw->data[position-(written %4) + 1],
 449                                 written %4);
 450                         buf[0] = crc << 8;
 451                         buf[1] = crc & 0xFF;
 452
 453                         /* write crc */
 454                         nxt200x_writebytes(state, 0x2C, buf, 2);
 455
 456                         /* do a read to stop things */
 457                         nxt200x_readbytes(state, 0x2A, buf, 1);
 458
 459                         /* set transfer mode to complete */
 460                         buf[0] = 0x80;
 461                         nxt200x_writebytes(state, 0x2B, buf, 1);
 462
 463                         written = 0;
 464                 }
 465         }
 466
 467         return 0;
 468 };
 469
 470 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 471 {
 472
 473         struct nxt200x_state* state = fe->demodulator_priv;
 474         u8 buf[3];
 475         u16 rambase, position, crc=0;
 476
 477         dprintk("%s\n", __func__);
 478         dprintk("Firmware is %zu bytes\n", fw->size);
 479
 480         /* set rambase */
 481         rambase = 0x1000;
 482
 483         /* hold the micro in reset while loading firmware */
 484         buf[0] = 0x80;
 485         nxt200x_writebytes(state, 0x2B, buf,1);
 486
 487         /* calculate firmware CRC */
 488         for (position = 0; position < fw->size; position++) {
 489                 crc = nxt200x_crc(crc, fw->data[position]);
 490         }
 491
 492         buf[0] = rambase >> 8;
 493         buf[1] = rambase & 0xFF;
 494         buf[2] = 0x81;
 495         /* write starting address */
 496         nxt200x_writebytes(state,0x29,buf,3);
 497
 498         for (position = 0; position < fw->size;) {
 499                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
 500                         fw->size-position > 255 ? 255 : fw->size-position);
 501                 position += (fw->size-position > 255 ? 255 : fw->size-position);
 502         }
 503         buf[0] = crc >> 8;
 504         buf[1] = crc & 0xFF;
 505
 506         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
 507
 508         /* write crc */
 509         nxt200x_writebytes(state, 0x2C, buf,2);
 510
 511         /* do a read to stop things */
 512         nxt200x_readbytes(state, 0x2C, buf, 1);
 513
 514         /* set transfer mode to complete */
 515         buf[0] = 0x80;
 516         nxt200x_writebytes(state, 0x2B, buf,1);
 517
 518         return 0;
 519 };
 520
 521 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
 522 {
 523         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 524         struct nxt200x_state* state = fe->demodulator_priv;
 525         u8 buf[5];
 526
 527         /* stop the micro first */
 528         nxt200x_microcontroller_stop(state);
 529
 530         if (state->demod_chip == NXT2004) {
 531                 /* make sure demod is set to digital */
 532                 buf[0] = 0x04;
 533                 nxt200x_writebytes(state, 0x14, buf, 1);
 534                 buf[0] = 0x00;
 535                 nxt200x_writebytes(state, 0x17, buf, 1);
 536         }
 537
 538         /* set additional params */
 539         switch (p->modulation) {
 540                 case QAM_64:
 541                 case QAM_256:
 542                         /* Set punctured clock for QAM */
 543                         /* This is just a guess since I am unable to test it */
 544                         if (state->config->set_ts_params)
 545                                 state->config->set_ts_params(fe, 1);
 546                         break;
 547                 case VSB_8:
 548                         /* Set non-punctured clock for VSB */
 549                         if (state->config->set_ts_params)
 550                                 state->config->set_ts_params(fe, 0);
 551                         break;
 552                 default:
 553                         return -EINVAL;
 554                         break;
 555         }
 556
 557         if (fe->ops.tuner_ops.calc_regs) {
 558                 /* get tuning information */
 559                 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
 560
 561                 /* write frequency information */
 562                 nxt200x_writetuner(state, buf);
 563         }
 564
 565         /* reset the agc now that tuning has been completed */
 566         nxt200x_agc_reset(state);
 567
 568         /* set target power level */
 569         switch (p->modulation) {
 570                 case QAM_64:
 571                 case QAM_256:
 572                         buf[0] = 0x74;
 573                         break;
 574                 case VSB_8:
 575                         buf[0] = 0x70;
 576                         break;
 577                 default:
 578                         return -EINVAL;
 579                         break;
 580         }
 581         nxt200x_writebytes(state, 0x42, buf, 1);
 582
 583         /* configure sdm */
 584         switch (state->demod_chip) {
 585                 case NXT2002:
 586                         buf[0] = 0x87;
 587                         break;
 588                 case NXT2004:
 589                         buf[0] = 0x07;
 590                         break;
 591                 default:
 592                         return -EINVAL;
 593                         break;
 594         }
 595         nxt200x_writebytes(state, 0x57, buf, 1);
 596
 597         /* write sdm1 input */
 598         buf[0] = 0x10;
 599         buf[1] = 0x00;
 600         switch (state->demod_chip) {
 601                 case NXT2002:
 602                         nxt200x_writereg_multibyte(state, 0x58, buf, 2);
 603                         break;
 604                 case NXT2004:
 605                         nxt200x_writebytes(state, 0x58, buf, 2);
 606                         break;
 607                 default:
 608                         return -EINVAL;
 609                         break;
 610         }
 611
 612         /* write sdmx input */
 613         switch (p->modulation) {
 614                 case QAM_64:
 615                                 buf[0] = 0x68;
 616                                 break;
 617                 case QAM_256:
 618                                 buf[0] = 0x64;
 619                                 break;
 620                 case VSB_8:
 621                                 buf[0] = 0x60;
 622                                 break;
 623                 default:
 624                                 return -EINVAL;
 625                                 break;
 626         }
 627         buf[1] = 0x00;
 628         switch (state->demod_chip) {
 629                 case NXT2002:
 630                         nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
 631                         break;
 632                 case NXT2004:
 633                         nxt200x_writebytes(state, 0x5C, buf, 2);
 634                         break;
 635                 default:
 636                         return -EINVAL;
 637                         break;
 638         }
 639
 640         /* write adc power lpf fc */
 641         buf[0] = 0x05;
 642         nxt200x_writebytes(state, 0x43, buf, 1);
 643
 644         if (state->demod_chip == NXT2004) {
 645                 /* write ??? */
 646                 buf[0] = 0x00;
 647                 buf[1] = 0x00;
 648                 nxt200x_writebytes(state, 0x46, buf, 2);
 649         }
 650
 651         /* write accumulator2 input */
 652         buf[0] = 0x80;
 653         buf[1] = 0x00;
 654         switch (state->demod_chip) {
 655                 case NXT2002:
 656                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 657                         break;
 658                 case NXT2004:
 659                         nxt200x_writebytes(state, 0x4B, buf, 2);
 660                         break;
 661                 default:
 662                         return -EINVAL;
 663                         break;
 664         }
 665
 666         /* write kg1 */
 667         buf[0] = 0x00;
 668         nxt200x_writebytes(state, 0x4D, buf, 1);
 669
 670         /* write sdm12 lpf fc */
 671         buf[0] = 0x44;
 672         nxt200x_writebytes(state, 0x55, buf, 1);
 673
 674         /* write agc control reg */
 675         buf[0] = 0x04;
 676         nxt200x_writebytes(state, 0x41, buf, 1);
 677
 678         if (state->demod_chip == NXT2004) {
 679                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 680                 buf[0] = 0x24;
 681                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 682
 683                 /* soft reset? */
 684                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 685                 buf[0] = 0x10;
 686                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 687                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 688                 buf[0] = 0x00;
 689                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 690
 691                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 692                 buf[0] = 0x04;
 693                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 694                 buf[0] = 0x00;
 695                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 696                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
 697                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 698                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 699                 buf[0] = 0x11;
 700                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 701                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 702                 buf[0] = 0x44;
 703                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 704         }
 705
 706         /* write agc ucgp0 */
 707         switch (p->modulation) {
 708                 case QAM_64:
 709                                 buf[0] = 0x02;
 710                                 break;
 711                 case QAM_256:
 712                                 buf[0] = 0x03;
 713                                 break;
 714                 case VSB_8:
 715                                 buf[0] = 0x00;
 716                                 break;
 717                 default:
 718                                 return -EINVAL;
 719                                 break;
 720         }
 721         nxt200x_writebytes(state, 0x30, buf, 1);
 722
 723         /* write agc control reg */
 724         buf[0] = 0x00;
 725         nxt200x_writebytes(state, 0x41, buf, 1);
 726
 727         /* write accumulator2 input */
 728         buf[0] = 0x80;
 729         buf[1] = 0x00;
 730         switch (state->demod_chip) {
 731                 case NXT2002:
 732                         nxt200x_writereg_multibyte(state, 0x49, buf, 2);
 733                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 734                         break;
 735                 case NXT2004:
 736                         nxt200x_writebytes(state, 0x49, buf, 2);
 737                         nxt200x_writebytes(state, 0x4B, buf, 2);
 738                         break;
 739                 default:
 740                         return -EINVAL;
 741                         break;
 742         }
 743
 744         /* write agc control reg */
 745         buf[0] = 0x04;
 746         nxt200x_writebytes(state, 0x41, buf, 1);
 747
 748         nxt200x_microcontroller_start(state);
 749
 750         if (state->demod_chip == NXT2004) {
 751                 nxt2004_microcontroller_init(state);
 752
 753                 /* ???? */
 754                 buf[0] = 0xF0;
 755                 buf[1] = 0x00;
 756                 nxt200x_writebytes(state, 0x5C, buf, 2);
 757         }
 758
 759         /* adjacent channel detection should be done here, but I don't
 760         have any stations with this need so I cannot test it */
 761
 762         return 0;
 763 }
 764
 765 static int nxt200x_read_status(struct dvb_frontend *fe, enum fe_status *status)
 766 {
 767         struct nxt200x_state* state = fe->demodulator_priv;
 768         u8 lock;
 769         nxt200x_readbytes(state, 0x31, &lock, 1);
 770
 771         *status = 0;
 772         if (lock & 0x20) {
 773                 *status |= FE_HAS_SIGNAL;
 774                 *status |= FE_HAS_CARRIER;
 775                 *status |= FE_HAS_VITERBI;
 776                 *status |= FE_HAS_SYNC;
 777                 *status |= FE_HAS_LOCK;
 778         }
 779         return 0;
 780 }
 781
 782 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
 783 {
 784         struct nxt200x_state* state = fe->demodulator_priv;
 785         u8 b[3];
 786
 787         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 788
 789         *ber = ((b[0] << 8) + b[1]) * 8;
 790
 791         return 0;
 792 }
 793
 794 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 795 {
 796         struct nxt200x_state* state = fe->demodulator_priv;
 797         u8 b[2];
 798         u16 temp = 0;
 799
 800         /* setup to read cluster variance */
 801         b[0] = 0x00;
 802         nxt200x_writebytes(state, 0xA1, b, 1);
 803
 804         /* get multreg val */
 805         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 806
 807         temp = (b[0] << 8) | b[1];
 808         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
 809
 810         return 0;
 811 }
 812
 813 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
 814 {
 815
 816         struct nxt200x_state* state = fe->demodulator_priv;
 817         u8 b[2];
 818         u16 temp = 0, temp2;
 819         u32 snrdb = 0;
 820
 821         /* setup to read cluster variance */
 822         b[0] = 0x00;
 823         nxt200x_writebytes(state, 0xA1, b, 1);
 824
 825         /* get multreg val from 0xA6 */
 826         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 827
 828         temp = (b[0] << 8) | b[1];
 829         temp2 = 0x7FFF - temp;
 830
 831         /* snr will be in db */
 832         if (temp2 > 0x7F00)
 833                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
 834         else if (temp2 > 0x7EC0)
 835                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
 836         else if (temp2 > 0x7C00)
 837                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
 838         else
 839                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
 840
 841         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
 842         *snr = snrdb * (0xFFFF/32000);
 843
 844         return 0;
 845 }
 846
 847 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 848 {
 849         struct nxt200x_state* state = fe->demodulator_priv;
 850         u8 b[3];
 851
 852         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 853         *ucblocks = b[2];
 854
 855         return 0;
 856 }
 857
 858 static int nxt200x_sleep(struct dvb_frontend* fe)
 859 {
 860         return 0;
 861 }
 862
 863 static int nxt2002_init(struct dvb_frontend* fe)
 864 {
 865         struct nxt200x_state* state = fe->demodulator_priv;
 866         const struct firmware *fw;
 867         int ret;
 868         u8 buf[2];
 869
 870         /* request the firmware, this will block until someone uploads it */
 871         pr_debug("%s: Waiting for firmware upload (%s)...\n",
 872                  __func__, "/*(DEBLOBBED)*/");
 873         ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
 874                                state->i2c->dev.parent);
 875         pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
 876         if (ret) {
 877                 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
 878                        __func__);
 879                 return ret;
 880         }
 881
 882         ret = nxt2002_load_firmware(fe, fw);
 883         release_firmware(fw);
 884         if (ret) {
 885                 pr_err("%s: Writing firmware to device failed\n", __func__);
 886                 return ret;
 887         }
 888         pr_info("%s: Firmware upload complete\n", __func__);
 889
 890         /* Put the micro into reset */
 891         nxt200x_microcontroller_stop(state);
 892
 893         /* ensure transfer is complete */
 894         buf[0]=0x00;
 895         nxt200x_writebytes(state, 0x2B, buf, 1);
 896
 897         /* Put the micro into reset for real this time */
 898         nxt200x_microcontroller_stop(state);
 899
 900         /* soft reset everything (agc,frontend,eq,fec)*/
 901         buf[0] = 0x0F;
 902         nxt200x_writebytes(state, 0x08, buf, 1);
 903         buf[0] = 0x00;
 904         nxt200x_writebytes(state, 0x08, buf, 1);
 905
 906         /* write agc sdm configure */
 907         buf[0] = 0xF1;
 908         nxt200x_writebytes(state, 0x57, buf, 1);
 909
 910         /* write mod output format */
 911         buf[0] = 0x20;
 912         nxt200x_writebytes(state, 0x09, buf, 1);
 913
 914         /* write fec mpeg mode */
 915         buf[0] = 0x7E;
 916         buf[1] = 0x00;
 917         nxt200x_writebytes(state, 0xE9, buf, 2);
 918
 919         /* write mux selection */
 920         buf[0] = 0x00;
 921         nxt200x_writebytes(state, 0xCC, buf, 1);
 922
 923         return 0;
 924 }
 925
 926 static int nxt2004_init(struct dvb_frontend* fe)
 927 {
 928         struct nxt200x_state* state = fe->demodulator_priv;
 929         const struct firmware *fw;
 930         int ret;
 931         u8 buf[3];
 932
 933         /* ??? */
 934         buf[0]=0x00;
 935         nxt200x_writebytes(state, 0x1E, buf, 1);
 936
 937         /* request the firmware, this will block until someone uploads it */
 938         pr_debug("%s: Waiting for firmware upload (%s)...\n",
 939                  __func__, "/*(DEBLOBBED)*/");
 940         ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
 941                                state->i2c->dev.parent);
 942         pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
 943         if (ret) {
 944                 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
 945                        __func__);
 946                 return ret;
 947         }
 948
 949         ret = nxt2004_load_firmware(fe, fw);
 950         release_firmware(fw);
 951         if (ret) {
 952                 pr_err("%s: Writing firmware to device failed\n", __func__);
 953                 return ret;
 954         }
 955         pr_info("%s: Firmware upload complete\n", __func__);
 956
 957         /* ensure transfer is complete */
 958         buf[0] = 0x01;
 959         nxt200x_writebytes(state, 0x19, buf, 1);
 960
 961         nxt2004_microcontroller_init(state);
 962         nxt200x_microcontroller_stop(state);
 963         nxt200x_microcontroller_stop(state);
 964         nxt2004_microcontroller_init(state);
 965         nxt200x_microcontroller_stop(state);
 966
 967         /* soft reset everything (agc,frontend,eq,fec)*/
 968         buf[0] = 0xFF;
 969         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 970         buf[0] = 0x00;
 971         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 972
 973         /* write agc sdm configure */
 974         buf[0] = 0xD7;
 975         nxt200x_writebytes(state, 0x57, buf, 1);
 976
 977         /* ???*/
 978         buf[0] = 0x07;
 979         buf[1] = 0xfe;
 980         nxt200x_writebytes(state, 0x35, buf, 2);
 981         buf[0] = 0x12;
 982         nxt200x_writebytes(state, 0x34, buf, 1);
 983         buf[0] = 0x80;
 984         nxt200x_writebytes(state, 0x21, buf, 1);
 985
 986         /* ???*/
 987         buf[0] = 0x21;
 988         nxt200x_writebytes(state, 0x0A, buf, 1);
 989
 990         /* ???*/
 991         buf[0] = 0x01;
 992         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 993
 994         /* write fec mpeg mode */
 995         buf[0] = 0x7E;
 996         buf[1] = 0x00;
 997         nxt200x_writebytes(state, 0xE9, buf, 2);
 998
 999         /* write mux selection */
1000         buf[0] = 0x00;
1001         nxt200x_writebytes(state, 0xCC, buf, 1);
1002
1003         /* ???*/
1004         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1005         buf[0] = 0x00;
1006         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1007
1008         /* soft reset? */
1009         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1010         buf[0] = 0x10;
1011         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1012         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1013         buf[0] = 0x00;
1014         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1015
1016         /* ???*/
1017         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1018         buf[0] = 0x01;
1019         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1020         buf[0] = 0x70;
1021         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1022         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1023         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1024
1025         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1026         buf[0] = 0x11;
1027         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1028         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1029         buf[0] = 0x40;
1030         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1031
1032         nxt200x_readbytes(state, 0x10, buf, 1);
1033         buf[0] = 0x10;
1034         nxt200x_writebytes(state, 0x10, buf, 1);
1035         nxt200x_readbytes(state, 0x0A, buf, 1);
1036         buf[0] = 0x21;
1037         nxt200x_writebytes(state, 0x0A, buf, 1);
1038
1039         nxt2004_microcontroller_init(state);
1040
1041         buf[0] = 0x21;
1042         nxt200x_writebytes(state, 0x0A, buf, 1);
1043         buf[0] = 0x7E;
1044         nxt200x_writebytes(state, 0xE9, buf, 1);
1045         buf[0] = 0x00;
1046         nxt200x_writebytes(state, 0xEA, buf, 1);
1047
1048         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1049         buf[0] = 0x00;
1050         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1051         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1052         buf[0] = 0x00;
1053         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1054
1055         /* soft reset? */
1056         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1057         buf[0] = 0x10;
1058         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1059         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1060         buf[0] = 0x00;
1061         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1062
1063         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1064         buf[0] = 0x04;
1065         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1066         buf[0] = 0x00;
1067         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1068         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1069         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1070
1071         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1072         buf[0] = 0x11;
1073         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1074
1075         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1076         buf[0] = 0x44;
1077         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1078
1079         /* initialize tuner */
1080         nxt200x_readbytes(state, 0x10, buf, 1);
1081         buf[0] = 0x12;
1082         nxt200x_writebytes(state, 0x10, buf, 1);
1083         buf[0] = 0x04;
1084         nxt200x_writebytes(state, 0x13, buf, 1);
1085         buf[0] = 0x00;
1086         nxt200x_writebytes(state, 0x16, buf, 1);
1087         buf[0] = 0x04;
1088         nxt200x_writebytes(state, 0x14, buf, 1);
1089         buf[0] = 0x00;
1090         nxt200x_writebytes(state, 0x14, buf, 1);
1091         nxt200x_writebytes(state, 0x17, buf, 1);
1092         nxt200x_writebytes(state, 0x14, buf, 1);
1093         nxt200x_writebytes(state, 0x17, buf, 1);
1094
1095         return 0;
1096 }
1097
1098 static int nxt200x_init(struct dvb_frontend* fe)
1099 {
1100         struct nxt200x_state* state = fe->demodulator_priv;
1101         int ret = 0;
1102
1103         if (!state->initialised) {
1104                 switch (state->demod_chip) {
1105                         case NXT2002:
1106                                 ret = nxt2002_init(fe);
1107                                 break;
1108                         case NXT2004:
1109                                 ret = nxt2004_init(fe);
1110                                 break;
1111                         default:
1112                                 return -EINVAL;
1113                                 break;
1114                 }
1115                 state->initialised = 1;
1116         }
1117         return ret;
1118 }
1119
1120 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1121 {
1122         fesettings->min_delay_ms = 500;
1123         fesettings->step_size = 0;
1124         fesettings->max_drift = 0;
1125         return 0;
1126 }
1127
1128 static void nxt200x_release(struct dvb_frontend* fe)
1129 {
1130         struct nxt200x_state* state = fe->demodulator_priv;
1131         kfree(state);
1132 }
1133
1134 static const struct dvb_frontend_ops nxt200x_ops;
1135
1136 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1137                                    struct i2c_adapter* i2c)
1138 {
1139         struct nxt200x_state* state = NULL;
1140         u8 buf [] = {0,0,0,0,0};
1141
1142         /* allocate memory for the internal state */
1143         state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1144         if (state == NULL)
1145                 goto error;
1146
1147         /* setup the state */
1148         state->config = config;
1149         state->i2c = i2c;
1150         state->initialised = 0;
1151
1152         /* read card id */
1153         nxt200x_readbytes(state, 0x00, buf, 5);
1154         dprintk("NXT info: %*ph\n", 5, buf);
1155
1156         /* set demod chip */
1157         switch (buf[0]) {
1158                 case 0x04:
1159                         state->demod_chip = NXT2002;
1160                         pr_info("NXT2002 Detected\n");
1161                         break;
1162                 case 0x05:
1163                         state->demod_chip = NXT2004;
1164                         pr_info("NXT2004 Detected\n");
1165                         break;
1166                 default:
1167                         goto error;
1168         }
1169
1170         /* make sure demod chip is supported */
1171         switch (state->demod_chip) {
1172                 case NXT2002:
1173                         if (buf[0] != 0x04) goto error;         /* device id */
1174                         if (buf[1] != 0x02) goto error;         /* fab id */
1175                         if (buf[2] != 0x11) goto error;         /* month */
1176                         if (buf[3] != 0x20) goto error;         /* year msb */
1177                         if (buf[4] != 0x00) goto error;         /* year lsb */
1178                         break;
1179                 case NXT2004:
1180                         if (buf[0] != 0x05) goto error;         /* device id */
1181                         break;
1182                 default:
1183                         goto error;
1184         }
1185
1186         /* create dvb_frontend */
1187         memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1188         state->frontend.demodulator_priv = state;
1189         return &state->frontend;
1190
1191 error:
1192         kfree(state);
1193         pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf);
1194         return NULL;
1195 }
1196
1197 static const struct dvb_frontend_ops nxt200x_ops = {
1198         .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1199         .info = {
1200                 .name = "Nextwave NXT200X VSB/QAM frontend",
1201                 .frequency_min =  54000000,
1202                 .frequency_max = 860000000,
1203                 .frequency_stepsize = 166666,   /* stepsize is just a guess */
1204                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1205                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1206                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1207         },
1208
1209         .release = nxt200x_release,
1210
1211         .init = nxt200x_init,
1212         .sleep = nxt200x_sleep,
1213
1214         .set_frontend = nxt200x_setup_frontend_parameters,
1215         .get_tune_settings = nxt200x_get_tune_settings,
1216
1217         .read_status = nxt200x_read_status,
1218         .read_ber = nxt200x_read_ber,
1219         .read_signal_strength = nxt200x_read_signal_strength,
1220         .read_snr = nxt200x_read_snr,
1221         .read_ucblocks = nxt200x_read_ucblocks,
1222 };
1223
1224 module_param(debug, int, 0644);
1225 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1226
1227 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1228 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1229 MODULE_LICENSE("GPL");
1230
1231 EXPORT_SYMBOL(nxt200x_attach);
1232