drivers/media/dvb-frontends/nxt200x.c

   1 /*
   2  *    Support for NXT2002 and NXT2004 - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
   5  *    Copyright (C) 2006-2014 Michael Krufky <mkrufky@linuxtv.org>
   6  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
   7  *    and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
   8  *
   9  *    This program is free software; you can redistribute it and/or modify
  10  *    it under the terms of the GNU General Public License as published by
  11  *    the Free Software Foundation; either version 2 of the License, or
  12  *    (at your option) any later version.
  13  *
  14  *    This program is distributed in the hope that it will be useful,
  15  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *    GNU General Public License for more details.
  18  *
  19  *    You should have received a copy of the GNU General Public License
  20  *    along with this program; if not, write to the Free Software
  21  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23 */
  24
  25 /*(DEBLOBBED)*/
  26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  27
  28 /* Max transfer size done by I2C transfer functions */
  29 #define MAX_XFER_SIZE  256
  30
  31 /*(DEBLOBBED)*/
  32 /*(DEBLOBBED)*/
  33 #define CRC_CCIT_MASK 0x1021
  34
  35 #include <linux/kernel.h>
  36 #include <linux/init.h>
  37 #include <linux/module.h>
  38 #include <linux/slab.h>
  39 #include <linux/string.h>
  40
  41 #include "dvb_frontend.h"
  42 #include "nxt200x.h"
  43
  44 struct nxt200x_state {
  45
  46         struct i2c_adapter* i2c;
  47         const struct nxt200x_config* config;
  48         struct dvb_frontend frontend;
  49
  50         /* demodulator private data */
  51         nxt_chip_type demod_chip;
  52         u8 initialised:1;
  53 };
  54
  55 static int debug;
  56 #define dprintk(args...)        do { if (debug) pr_debug(args); } while (0)
  57
  58 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
  59 {
  60         int err;
  61         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
  62
  63         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  64                 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
  65                         __func__, addr, err);
  66                 return -EREMOTEIO;
  67         }
  68         return 0;
  69 }
  70
  71 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
  72 {
  73         int err;
  74         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
  75
  76         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  77                 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
  78                         __func__, addr, err);
  79                 return -EREMOTEIO;
  80         }
  81         return 0;
  82 }
  83
  84 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
  85                                const u8 *buf, u8 len)
  86 {
  87         u8 buf2[MAX_XFER_SIZE];
  88         int err;
  89         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
  90
  91         if (1 + len > sizeof(buf2)) {
  92                 pr_warn("%s: i2c wr reg=%04x: len=%d is too big!\n",
  93                          __func__, reg, len);
  94                 return -EINVAL;
  95         }
  96
  97         buf2[0] = reg;
  98         memcpy(&buf2[1], buf, len);
  99
 100         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
 101                 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
 102                         __func__, state->config->demod_address, err);
 103                 return -EREMOTEIO;
 104         }
 105         return 0;
 106 }
 107
 108 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
 109 {
 110         u8 reg2 [] = { reg };
 111
 112         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
 113                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
 114
 115         int err;
 116
 117         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
 118                 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
 119                         __func__, state->config->demod_address, err);
 120                 return -EREMOTEIO;
 121         }
 122         return 0;
 123 }
 124
 125 static u16 nxt200x_crc(u16 crc, u8 c)
 126 {
 127         u8 i;
 128         u16 input = (u16) c & 0xFF;
 129
 130         input<<=8;
 131         for(i=0; i<8; i++) {
 132                 if((crc^input) & 0x8000)
 133                         crc=(crc<<1)^CRC_CCIT_MASK;
 134                 else
 135                         crc<<=1;
 136                 input<<=1;
 137         }
 138         return crc;
 139 }
 140
 141 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 142 {
 143         u8 attr, len2, buf;
 144         dprintk("%s\n", __func__);
 145
 146         /* set mutli register register */
 147         nxt200x_writebytes(state, 0x35, &reg, 1);
 148
 149         /* send the actual data */
 150         nxt200x_writebytes(state, 0x36, data, len);
 151
 152         switch (state->demod_chip) {
 153                 case NXT2002:
 154                         len2 = len;
 155                         buf = 0x02;
 156                         break;
 157                 case NXT2004:
 158                         /* probably not right, but gives correct values */
 159                         attr = 0x02;
 160                         if (reg & 0x80) {
 161                                 attr = attr << 1;
 162                                 if (reg & 0x04)
 163                                         attr = attr >> 1;
 164                         }
 165                         /* set write bit */
 166                         len2 = ((attr << 4) | 0x10) | len;
 167                         buf = 0x80;
 168                         break;
 169                 default:
 170                         return -EINVAL;
 171                         break;
 172         }
 173
 174         /* set multi register length */
 175         nxt200x_writebytes(state, 0x34, &len2, 1);
 176
 177         /* toggle the multireg write bit */
 178         nxt200x_writebytes(state, 0x21, &buf, 1);
 179
 180         nxt200x_readbytes(state, 0x21, &buf, 1);
 181
 182         switch (state->demod_chip) {
 183                 case NXT2002:
 184                         if ((buf & 0x02) == 0)
 185                                 return 0;
 186                         break;
 187                 case NXT2004:
 188                         if (buf == 0)
 189                                 return 0;
 190                         break;
 191                 default:
 192                         return -EINVAL;
 193                         break;
 194         }
 195
 196         pr_warn("Error writing multireg register 0x%02X\n", reg);
 197
 198         return 0;
 199 }
 200
 201 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 202 {
 203         int i;
 204         u8 buf, len2, attr;
 205         dprintk("%s\n", __func__);
 206
 207         /* set mutli register register */
 208         nxt200x_writebytes(state, 0x35, &reg, 1);
 209
 210         switch (state->demod_chip) {
 211                 case NXT2002:
 212                         /* set multi register length */
 213                         len2 = len & 0x80;
 214                         nxt200x_writebytes(state, 0x34, &len2, 1);
 215
 216                         /* read the actual data */
 217                         nxt200x_readbytes(state, reg, data, len);
 218                         return 0;
 219                         break;
 220                 case NXT2004:
 221                         /* probably not right, but gives correct values */
 222                         attr = 0x02;
 223                         if (reg & 0x80) {
 224                                 attr = attr << 1;
 225                                 if (reg & 0x04)
 226                                         attr = attr >> 1;
 227                         }
 228
 229                         /* set multi register length */
 230                         len2 = (attr << 4) | len;
 231                         nxt200x_writebytes(state, 0x34, &len2, 1);
 232
 233                         /* toggle the multireg bit*/
 234                         buf = 0x80;
 235                         nxt200x_writebytes(state, 0x21, &buf, 1);
 236
 237                         /* read the actual data */
 238                         for(i = 0; i < len; i++) {
 239                                 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
 240                         }
 241                         return 0;
 242                         break;
 243                 default:
 244                         return -EINVAL;
 245                         break;
 246         }
 247 }
 248
 249 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
 250 {
 251         u8 buf, stopval, counter = 0;
 252         dprintk("%s\n", __func__);
 253
 254         /* set correct stop value */
 255         switch (state->demod_chip) {
 256                 case NXT2002:
 257                         stopval = 0x40;
 258                         break;
 259                 case NXT2004:
 260                         stopval = 0x10;
 261                         break;
 262                 default:
 263                         stopval = 0;
 264                         break;
 265         }
 266
 267         buf = 0x80;
 268         nxt200x_writebytes(state, 0x22, &buf, 1);
 269
 270         while (counter < 20) {
 271                 nxt200x_readbytes(state, 0x31, &buf, 1);
 272                 if (buf & stopval)
 273                         return;
 274                 msleep(10);
 275                 counter++;
 276         }
 277
 278         pr_warn("Timeout waiting for nxt200x to stop. This is ok after "
 279                 "firmware upload.\n");
 280         return;
 281 }
 282
 283 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
 284 {
 285         u8 buf;
 286         dprintk("%s\n", __func__);
 287
 288         buf = 0x00;
 289         nxt200x_writebytes(state, 0x22, &buf, 1);
 290 }
 291
 292 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
 293 {
 294         u8 buf[9];
 295         u8 counter = 0;
 296         dprintk("%s\n", __func__);
 297
 298         buf[0] = 0x00;
 299         nxt200x_writebytes(state, 0x2b, buf, 1);
 300         buf[0] = 0x70;
 301         nxt200x_writebytes(state, 0x34, buf, 1);
 302         buf[0] = 0x04;
 303         nxt200x_writebytes(state, 0x35, buf, 1);
 304         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
 305         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
 306         nxt200x_writebytes(state, 0x36, buf, 9);
 307         buf[0] = 0x80;
 308         nxt200x_writebytes(state, 0x21, buf, 1);
 309
 310         while (counter < 20) {
 311                 nxt200x_readbytes(state, 0x21, buf, 1);
 312                 if (buf[0] == 0)
 313                         return;
 314                 msleep(10);
 315                 counter++;
 316         }
 317
 318         pr_warn("Timeout waiting for nxt2004 to init.\n");
 319
 320         return;
 321 }
 322
 323 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
 324 {
 325         u8 buf, count = 0;
 326
 327         dprintk("%s\n", __func__);
 328
 329         dprintk("Tuner Bytes: %*ph\n", 4, data + 1);
 330
 331         /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
 332          * direct write is required for Philips TUV1236D and ALPS TDHU2 */
 333         switch (state->demod_chip) {
 334                 case NXT2004:
 335                         if (i2c_writebytes(state, data[0], data+1, 4))
 336                                 pr_warn("error writing to tuner\n");
 337                         /* wait until we have a lock */
 338                         while (count < 20) {
 339                                 i2c_readbytes(state, data[0], &buf, 1);
 340                                 if (buf & 0x40)
 341                                         return 0;
 342                                 msleep(100);
 343                                 count++;
 344                         }
 345                         pr_warn("timeout waiting for tuner lock\n");
 346                         break;
 347                 case NXT2002:
 348                         /* set the i2c transfer speed to the tuner */
 349                         buf = 0x03;
 350                         nxt200x_writebytes(state, 0x20, &buf, 1);
 351
 352                         /* setup to transfer 4 bytes via i2c */
 353                         buf = 0x04;
 354                         nxt200x_writebytes(state, 0x34, &buf, 1);
 355
 356                         /* write actual tuner bytes */
 357                         nxt200x_writebytes(state, 0x36, data+1, 4);
 358
 359                         /* set tuner i2c address */
 360                         buf = data[0] << 1;
 361                         nxt200x_writebytes(state, 0x35, &buf, 1);
 362
 363                         /* write UC Opmode to begin transfer */
 364                         buf = 0x80;
 365                         nxt200x_writebytes(state, 0x21, &buf, 1);
 366
 367                         while (count < 20) {
 368                                 nxt200x_readbytes(state, 0x21, &buf, 1);
 369                                 if ((buf & 0x80)== 0x00)
 370                                         return 0;
 371                                 msleep(100);
 372                                 count++;
 373                         }
 374                         pr_warn("timeout error writing to tuner\n");
 375                         break;
 376                 default:
 377                         return -EINVAL;
 378                         break;
 379         }
 380         return 0;
 381 }
 382
 383 static void nxt200x_agc_reset(struct nxt200x_state* state)
 384 {
 385         u8 buf;
 386         dprintk("%s\n", __func__);
 387
 388         switch (state->demod_chip) {
 389                 case NXT2002:
 390                         buf = 0x08;
 391                         nxt200x_writebytes(state, 0x08, &buf, 1);
 392                         buf = 0x00;
 393                         nxt200x_writebytes(state, 0x08, &buf, 1);
 394                         break;
 395                 case NXT2004:
 396                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
 397                         buf = 0x08;
 398                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 399                         buf = 0x00;
 400                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 401                         break;
 402                 default:
 403                         break;
 404         }
 405         return;
 406 }
 407
 408 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 409 {
 410
 411         struct nxt200x_state* state = fe->demodulator_priv;
 412         u8 buf[3], written = 0, chunkpos = 0;
 413         u16 rambase, position, crc = 0;
 414
 415         dprintk("%s\n", __func__);
 416         dprintk("Firmware is %zu bytes\n", fw->size);
 417
 418         /* Get the RAM base for this nxt2002 */
 419         nxt200x_readbytes(state, 0x10, buf, 1);
 420
 421         if (buf[0] & 0x10)
 422                 rambase = 0x1000;
 423         else
 424                 rambase = 0x0000;
 425
 426         dprintk("rambase on this nxt2002 is %04X\n", rambase);
 427
 428         /* Hold the micro in reset while loading firmware */
 429         buf[0] = 0x80;
 430         nxt200x_writebytes(state, 0x2B, buf, 1);
 431
 432         for (position = 0; position < fw->size; position++) {
 433                 if (written == 0) {
 434                         crc = 0;
 435                         chunkpos = 0x28;
 436                         buf[0] = ((rambase + position) >> 8);
 437                         buf[1] = (rambase + position) & 0xFF;
 438                         buf[2] = 0x81;
 439                         /* write starting address */
 440                         nxt200x_writebytes(state, 0x29, buf, 3);
 441                 }
 442                 written++;
 443                 chunkpos++;
 444
 445                 if ((written % 4) == 0)
 446                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
 447
 448                 crc = nxt200x_crc(crc, fw->data[position]);
 449
 450                 if ((written == 255) || (position+1 == fw->size)) {
 451                         /* write remaining bytes of firmware */
 452                         nxt200x_writebytes(state, chunkpos+4-(written %4),
 453                                 &fw->data[position-(written %4) + 1],
 454                                 written %4);
 455                         buf[0] = crc << 8;
 456                         buf[1] = crc & 0xFF;
 457
 458                         /* write crc */
 459                         nxt200x_writebytes(state, 0x2C, buf, 2);
 460
 461                         /* do a read to stop things */
 462                         nxt200x_readbytes(state, 0x2A, buf, 1);
 463
 464                         /* set transfer mode to complete */
 465                         buf[0] = 0x80;
 466                         nxt200x_writebytes(state, 0x2B, buf, 1);
 467
 468                         written = 0;
 469                 }
 470         }
 471
 472         return 0;
 473 };
 474
 475 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 476 {
 477
 478         struct nxt200x_state* state = fe->demodulator_priv;
 479         u8 buf[3];
 480         u16 rambase, position, crc=0;
 481
 482         dprintk("%s\n", __func__);
 483         dprintk("Firmware is %zu bytes\n", fw->size);
 484
 485         /* set rambase */
 486         rambase = 0x1000;
 487
 488         /* hold the micro in reset while loading firmware */
 489         buf[0] = 0x80;
 490         nxt200x_writebytes(state, 0x2B, buf,1);
 491
 492         /* calculate firmware CRC */
 493         for (position = 0; position < fw->size; position++) {
 494                 crc = nxt200x_crc(crc, fw->data[position]);
 495         }
 496
 497         buf[0] = rambase >> 8;
 498         buf[1] = rambase & 0xFF;
 499         buf[2] = 0x81;
 500         /* write starting address */
 501         nxt200x_writebytes(state,0x29,buf,3);
 502
 503         for (position = 0; position < fw->size;) {
 504                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
 505                         fw->size-position > 255 ? 255 : fw->size-position);
 506                 position += (fw->size-position > 255 ? 255 : fw->size-position);
 507         }
 508         buf[0] = crc >> 8;
 509         buf[1] = crc & 0xFF;
 510
 511         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
 512
 513         /* write crc */
 514         nxt200x_writebytes(state, 0x2C, buf,2);
 515
 516         /* do a read to stop things */
 517         nxt200x_readbytes(state, 0x2C, buf, 1);
 518
 519         /* set transfer mode to complete */
 520         buf[0] = 0x80;
 521         nxt200x_writebytes(state, 0x2B, buf,1);
 522
 523         return 0;
 524 };
 525
 526 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
 527 {
 528         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 529         struct nxt200x_state* state = fe->demodulator_priv;
 530         u8 buf[5];
 531
 532         /* stop the micro first */
 533         nxt200x_microcontroller_stop(state);
 534
 535         if (state->demod_chip == NXT2004) {
 536                 /* make sure demod is set to digital */
 537                 buf[0] = 0x04;
 538                 nxt200x_writebytes(state, 0x14, buf, 1);
 539                 buf[0] = 0x00;
 540                 nxt200x_writebytes(state, 0x17, buf, 1);
 541         }
 542
 543         /* set additional params */
 544         switch (p->modulation) {
 545                 case QAM_64:
 546                 case QAM_256:
 547                         /* Set punctured clock for QAM */
 548                         /* This is just a guess since I am unable to test it */
 549                         if (state->config->set_ts_params)
 550                                 state->config->set_ts_params(fe, 1);
 551                         break;
 552                 case VSB_8:
 553                         /* Set non-punctured clock for VSB */
 554                         if (state->config->set_ts_params)
 555                                 state->config->set_ts_params(fe, 0);
 556                         break;
 557                 default:
 558                         return -EINVAL;
 559                         break;
 560         }
 561
 562         if (fe->ops.tuner_ops.calc_regs) {
 563                 /* get tuning information */
 564                 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
 565
 566                 /* write frequency information */
 567                 nxt200x_writetuner(state, buf);
 568         }
 569
 570         /* reset the agc now that tuning has been completed */
 571         nxt200x_agc_reset(state);
 572
 573         /* set target power level */
 574         switch (p->modulation) {
 575                 case QAM_64:
 576                 case QAM_256:
 577                         buf[0] = 0x74;
 578                         break;
 579                 case VSB_8:
 580                         buf[0] = 0x70;
 581                         break;
 582                 default:
 583                         return -EINVAL;
 584                         break;
 585         }
 586         nxt200x_writebytes(state, 0x42, buf, 1);
 587
 588         /* configure sdm */
 589         switch (state->demod_chip) {
 590                 case NXT2002:
 591                         buf[0] = 0x87;
 592                         break;
 593                 case NXT2004:
 594                         buf[0] = 0x07;
 595                         break;
 596                 default:
 597                         return -EINVAL;
 598                         break;
 599         }
 600         nxt200x_writebytes(state, 0x57, buf, 1);
 601
 602         /* write sdm1 input */
 603         buf[0] = 0x10;
 604         buf[1] = 0x00;
 605         switch (state->demod_chip) {
 606                 case NXT2002:
 607                         nxt200x_writereg_multibyte(state, 0x58, buf, 2);
 608                         break;
 609                 case NXT2004:
 610                         nxt200x_writebytes(state, 0x58, buf, 2);
 611                         break;
 612                 default:
 613                         return -EINVAL;
 614                         break;
 615         }
 616
 617         /* write sdmx input */
 618         switch (p->modulation) {
 619                 case QAM_64:
 620                                 buf[0] = 0x68;
 621                                 break;
 622                 case QAM_256:
 623                                 buf[0] = 0x64;
 624                                 break;
 625                 case VSB_8:
 626                                 buf[0] = 0x60;
 627                                 break;
 628                 default:
 629                                 return -EINVAL;
 630                                 break;
 631         }
 632         buf[1] = 0x00;
 633         switch (state->demod_chip) {
 634                 case NXT2002:
 635                         nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
 636                         break;
 637                 case NXT2004:
 638                         nxt200x_writebytes(state, 0x5C, buf, 2);
 639                         break;
 640                 default:
 641                         return -EINVAL;
 642                         break;
 643         }
 644
 645         /* write adc power lpf fc */
 646         buf[0] = 0x05;
 647         nxt200x_writebytes(state, 0x43, buf, 1);
 648
 649         if (state->demod_chip == NXT2004) {
 650                 /* write ??? */
 651                 buf[0] = 0x00;
 652                 buf[1] = 0x00;
 653                 nxt200x_writebytes(state, 0x46, buf, 2);
 654         }
 655
 656         /* write accumulator2 input */
 657         buf[0] = 0x80;
 658         buf[1] = 0x00;
 659         switch (state->demod_chip) {
 660                 case NXT2002:
 661                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 662                         break;
 663                 case NXT2004:
 664                         nxt200x_writebytes(state, 0x4B, buf, 2);
 665                         break;
 666                 default:
 667                         return -EINVAL;
 668                         break;
 669         }
 670
 671         /* write kg1 */
 672         buf[0] = 0x00;
 673         nxt200x_writebytes(state, 0x4D, buf, 1);
 674
 675         /* write sdm12 lpf fc */
 676         buf[0] = 0x44;
 677         nxt200x_writebytes(state, 0x55, buf, 1);
 678
 679         /* write agc control reg */
 680         buf[0] = 0x04;
 681         nxt200x_writebytes(state, 0x41, buf, 1);
 682
 683         if (state->demod_chip == NXT2004) {
 684                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 685                 buf[0] = 0x24;
 686                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 687
 688                 /* soft reset? */
 689                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 690                 buf[0] = 0x10;
 691                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 692                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 693                 buf[0] = 0x00;
 694                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 695
 696                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 697                 buf[0] = 0x04;
 698                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 699                 buf[0] = 0x00;
 700                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 701                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
 702                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 703                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 704                 buf[0] = 0x11;
 705                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 706                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 707                 buf[0] = 0x44;
 708                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 709         }
 710
 711         /* write agc ucgp0 */
 712         switch (p->modulation) {
 713                 case QAM_64:
 714                                 buf[0] = 0x02;
 715                                 break;
 716                 case QAM_256:
 717                                 buf[0] = 0x03;
 718                                 break;
 719                 case VSB_8:
 720                                 buf[0] = 0x00;
 721                                 break;
 722                 default:
 723                                 return -EINVAL;
 724                                 break;
 725         }
 726         nxt200x_writebytes(state, 0x30, buf, 1);
 727
 728         /* write agc control reg */
 729         buf[0] = 0x00;
 730         nxt200x_writebytes(state, 0x41, buf, 1);
 731
 732         /* write accumulator2 input */
 733         buf[0] = 0x80;
 734         buf[1] = 0x00;
 735         switch (state->demod_chip) {
 736                 case NXT2002:
 737                         nxt200x_writereg_multibyte(state, 0x49, buf, 2);
 738                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 739                         break;
 740                 case NXT2004:
 741                         nxt200x_writebytes(state, 0x49, buf, 2);
 742                         nxt200x_writebytes(state, 0x4B, buf, 2);
 743                         break;
 744                 default:
 745                         return -EINVAL;
 746                         break;
 747         }
 748
 749         /* write agc control reg */
 750         buf[0] = 0x04;
 751         nxt200x_writebytes(state, 0x41, buf, 1);
 752
 753         nxt200x_microcontroller_start(state);
 754
 755         if (state->demod_chip == NXT2004) {
 756                 nxt2004_microcontroller_init(state);
 757
 758                 /* ???? */
 759                 buf[0] = 0xF0;
 760                 buf[1] = 0x00;
 761                 nxt200x_writebytes(state, 0x5C, buf, 2);
 762         }
 763
 764         /* adjacent channel detection should be done here, but I don't
 765         have any stations with this need so I cannot test it */
 766
 767         return 0;
 768 }
 769
 770 static int nxt200x_read_status(struct dvb_frontend *fe, enum fe_status *status)
 771 {
 772         struct nxt200x_state* state = fe->demodulator_priv;
 773         u8 lock;
 774         nxt200x_readbytes(state, 0x31, &lock, 1);
 775
 776         *status = 0;
 777         if (lock & 0x20) {
 778                 *status |= FE_HAS_SIGNAL;
 779                 *status |= FE_HAS_CARRIER;
 780                 *status |= FE_HAS_VITERBI;
 781                 *status |= FE_HAS_SYNC;
 782                 *status |= FE_HAS_LOCK;
 783         }
 784         return 0;
 785 }
 786
 787 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
 788 {
 789         struct nxt200x_state* state = fe->demodulator_priv;
 790         u8 b[3];
 791
 792         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 793
 794         *ber = ((b[0] << 8) + b[1]) * 8;
 795
 796         return 0;
 797 }
 798
 799 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 800 {
 801         struct nxt200x_state* state = fe->demodulator_priv;
 802         u8 b[2];
 803         u16 temp = 0;
 804
 805         /* setup to read cluster variance */
 806         b[0] = 0x00;
 807         nxt200x_writebytes(state, 0xA1, b, 1);
 808
 809         /* get multreg val */
 810         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 811
 812         temp = (b[0] << 8) | b[1];
 813         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
 814
 815         return 0;
 816 }
 817
 818 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
 819 {
 820
 821         struct nxt200x_state* state = fe->demodulator_priv;
 822         u8 b[2];
 823         u16 temp = 0, temp2;
 824         u32 snrdb = 0;
 825
 826         /* setup to read cluster variance */
 827         b[0] = 0x00;
 828         nxt200x_writebytes(state, 0xA1, b, 1);
 829
 830         /* get multreg val from 0xA6 */
 831         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 832
 833         temp = (b[0] << 8) | b[1];
 834         temp2 = 0x7FFF - temp;
 835
 836         /* snr will be in db */
 837         if (temp2 > 0x7F00)
 838                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
 839         else if (temp2 > 0x7EC0)
 840                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
 841         else if (temp2 > 0x7C00)
 842                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
 843         else
 844                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
 845
 846         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
 847         *snr = snrdb * (0xFFFF/32000);
 848
 849         return 0;
 850 }
 851
 852 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 853 {
 854         struct nxt200x_state* state = fe->demodulator_priv;
 855         u8 b[3];
 856
 857         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 858         *ucblocks = b[2];
 859
 860         return 0;
 861 }
 862
 863 static int nxt200x_sleep(struct dvb_frontend* fe)
 864 {
 865         return 0;
 866 }
 867
 868 static int nxt2002_init(struct dvb_frontend* fe)
 869 {
 870         struct nxt200x_state* state = fe->demodulator_priv;
 871         const struct firmware *fw;
 872         int ret;
 873         u8 buf[2];
 874
 875         /* request the firmware, this will block until someone uploads it */
 876         pr_debug("%s: Waiting for firmware upload (%s)...\n",
 877                  __func__, "/*(DEBLOBBED)*/");
 878         ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
 879                                state->i2c->dev.parent);
 880         pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
 881         if (ret) {
 882                 pr_err("%s: No firmware uploaded (timeout or file not found?)"
 883                        "\n", __func__);
 884                 return ret;
 885         }
 886
 887         ret = nxt2002_load_firmware(fe, fw);
 888         release_firmware(fw);
 889         if (ret) {
 890                 pr_err("%s: Writing firmware to device failed\n", __func__);
 891                 return ret;
 892         }
 893         pr_info("%s: Firmware upload complete\n", __func__);
 894
 895         /* Put the micro into reset */
 896         nxt200x_microcontroller_stop(state);
 897
 898         /* ensure transfer is complete */
 899         buf[0]=0x00;
 900         nxt200x_writebytes(state, 0x2B, buf, 1);
 901
 902         /* Put the micro into reset for real this time */
 903         nxt200x_microcontroller_stop(state);
 904
 905         /* soft reset everything (agc,frontend,eq,fec)*/
 906         buf[0] = 0x0F;
 907         nxt200x_writebytes(state, 0x08, buf, 1);
 908         buf[0] = 0x00;
 909         nxt200x_writebytes(state, 0x08, buf, 1);
 910
 911         /* write agc sdm configure */
 912         buf[0] = 0xF1;
 913         nxt200x_writebytes(state, 0x57, buf, 1);
 914
 915         /* write mod output format */
 916         buf[0] = 0x20;
 917         nxt200x_writebytes(state, 0x09, buf, 1);
 918
 919         /* write fec mpeg mode */
 920         buf[0] = 0x7E;
 921         buf[1] = 0x00;
 922         nxt200x_writebytes(state, 0xE9, buf, 2);
 923
 924         /* write mux selection */
 925         buf[0] = 0x00;
 926         nxt200x_writebytes(state, 0xCC, buf, 1);
 927
 928         return 0;
 929 }
 930
 931 static int nxt2004_init(struct dvb_frontend* fe)
 932 {
 933         struct nxt200x_state* state = fe->demodulator_priv;
 934         const struct firmware *fw;
 935         int ret;
 936         u8 buf[3];
 937
 938         /* ??? */
 939         buf[0]=0x00;
 940         nxt200x_writebytes(state, 0x1E, buf, 1);
 941
 942         /* request the firmware, this will block until someone uploads it */
 943         pr_debug("%s: Waiting for firmware upload (%s)...\n",
 944                  __func__, "/*(DEBLOBBED)*/");
 945         ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
 946                                state->i2c->dev.parent);
 947         pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
 948         if (ret) {
 949                 pr_err("%s: No firmware uploaded (timeout or file not found?)"
 950                        "\n", __func__);
 951                 return ret;
 952         }
 953
 954         ret = nxt2004_load_firmware(fe, fw);
 955         release_firmware(fw);
 956         if (ret) {
 957                 pr_err("%s: Writing firmware to device failed\n", __func__);
 958                 return ret;
 959         }
 960         pr_info("%s: Firmware upload complete\n", __func__);
 961
 962         /* ensure transfer is complete */
 963         buf[0] = 0x01;
 964         nxt200x_writebytes(state, 0x19, buf, 1);
 965
 966         nxt2004_microcontroller_init(state);
 967         nxt200x_microcontroller_stop(state);
 968         nxt200x_microcontroller_stop(state);
 969         nxt2004_microcontroller_init(state);
 970         nxt200x_microcontroller_stop(state);
 971
 972         /* soft reset everything (agc,frontend,eq,fec)*/
 973         buf[0] = 0xFF;
 974         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 975         buf[0] = 0x00;
 976         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 977
 978         /* write agc sdm configure */
 979         buf[0] = 0xD7;
 980         nxt200x_writebytes(state, 0x57, buf, 1);
 981
 982         /* ???*/
 983         buf[0] = 0x07;
 984         buf[1] = 0xfe;
 985         nxt200x_writebytes(state, 0x35, buf, 2);
 986         buf[0] = 0x12;
 987         nxt200x_writebytes(state, 0x34, buf, 1);
 988         buf[0] = 0x80;
 989         nxt200x_writebytes(state, 0x21, buf, 1);
 990
 991         /* ???*/
 992         buf[0] = 0x21;
 993         nxt200x_writebytes(state, 0x0A, buf, 1);
 994
 995         /* ???*/
 996         buf[0] = 0x01;
 997         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 998
 999         /* write fec mpeg mode */
1000         buf[0] = 0x7E;
1001         buf[1] = 0x00;
1002         nxt200x_writebytes(state, 0xE9, buf, 2);
1003
1004         /* write mux selection */
1005         buf[0] = 0x00;
1006         nxt200x_writebytes(state, 0xCC, buf, 1);
1007
1008         /* ???*/
1009         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1010         buf[0] = 0x00;
1011         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1012
1013         /* soft reset? */
1014         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1015         buf[0] = 0x10;
1016         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1017         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1018         buf[0] = 0x00;
1019         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1020
1021         /* ???*/
1022         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1023         buf[0] = 0x01;
1024         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1025         buf[0] = 0x70;
1026         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1027         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1028         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1029
1030         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1031         buf[0] = 0x11;
1032         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1033         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1034         buf[0] = 0x40;
1035         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1036
1037         nxt200x_readbytes(state, 0x10, buf, 1);
1038         buf[0] = 0x10;
1039         nxt200x_writebytes(state, 0x10, buf, 1);
1040         nxt200x_readbytes(state, 0x0A, buf, 1);
1041         buf[0] = 0x21;
1042         nxt200x_writebytes(state, 0x0A, buf, 1);
1043
1044         nxt2004_microcontroller_init(state);
1045
1046         buf[0] = 0x21;
1047         nxt200x_writebytes(state, 0x0A, buf, 1);
1048         buf[0] = 0x7E;
1049         nxt200x_writebytes(state, 0xE9, buf, 1);
1050         buf[0] = 0x00;
1051         nxt200x_writebytes(state, 0xEA, buf, 1);
1052
1053         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1054         buf[0] = 0x00;
1055         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1056         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1057         buf[0] = 0x00;
1058         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1059
1060         /* soft reset? */
1061         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1062         buf[0] = 0x10;
1063         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1064         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1065         buf[0] = 0x00;
1066         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1067
1068         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1069         buf[0] = 0x04;
1070         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1071         buf[0] = 0x00;
1072         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1073         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1074         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1075
1076         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1077         buf[0] = 0x11;
1078         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1079
1080         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1081         buf[0] = 0x44;
1082         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1083
1084         /* initialize tuner */
1085         nxt200x_readbytes(state, 0x10, buf, 1);
1086         buf[0] = 0x12;
1087         nxt200x_writebytes(state, 0x10, buf, 1);
1088         buf[0] = 0x04;
1089         nxt200x_writebytes(state, 0x13, buf, 1);
1090         buf[0] = 0x00;
1091         nxt200x_writebytes(state, 0x16, buf, 1);
1092         buf[0] = 0x04;
1093         nxt200x_writebytes(state, 0x14, buf, 1);
1094         buf[0] = 0x00;
1095         nxt200x_writebytes(state, 0x14, buf, 1);
1096         nxt200x_writebytes(state, 0x17, buf, 1);
1097         nxt200x_writebytes(state, 0x14, buf, 1);
1098         nxt200x_writebytes(state, 0x17, buf, 1);
1099
1100         return 0;
1101 }
1102
1103 static int nxt200x_init(struct dvb_frontend* fe)
1104 {
1105         struct nxt200x_state* state = fe->demodulator_priv;
1106         int ret = 0;
1107
1108         if (!state->initialised) {
1109                 switch (state->demod_chip) {
1110                         case NXT2002:
1111                                 ret = nxt2002_init(fe);
1112                                 break;
1113                         case NXT2004:
1114                                 ret = nxt2004_init(fe);
1115                                 break;
1116                         default:
1117                                 return -EINVAL;
1118                                 break;
1119                 }
1120                 state->initialised = 1;
1121         }
1122         return ret;
1123 }
1124
1125 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1126 {
1127         fesettings->min_delay_ms = 500;
1128         fesettings->step_size = 0;
1129         fesettings->max_drift = 0;
1130         return 0;
1131 }
1132
1133 static void nxt200x_release(struct dvb_frontend* fe)
1134 {
1135         struct nxt200x_state* state = fe->demodulator_priv;
1136         kfree(state);
1137 }
1138
1139 static struct dvb_frontend_ops nxt200x_ops;
1140
1141 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1142                                    struct i2c_adapter* i2c)
1143 {
1144         struct nxt200x_state* state = NULL;
1145         u8 buf [] = {0,0,0,0,0};
1146
1147         /* allocate memory for the internal state */
1148         state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1149         if (state == NULL)
1150                 goto error;
1151
1152         /* setup the state */
1153         state->config = config;
1154         state->i2c = i2c;
1155         state->initialised = 0;
1156
1157         /* read card id */
1158         nxt200x_readbytes(state, 0x00, buf, 5);
1159         dprintk("NXT info: %*ph\n", 5, buf);
1160
1161         /* set demod chip */
1162         switch (buf[0]) {
1163                 case 0x04:
1164                         state->demod_chip = NXT2002;
1165                         pr_info("NXT2002 Detected\n");
1166                         break;
1167                 case 0x05:
1168                         state->demod_chip = NXT2004;
1169                         pr_info("NXT2004 Detected\n");
1170                         break;
1171                 default:
1172                         goto error;
1173         }
1174
1175         /* make sure demod chip is supported */
1176         switch (state->demod_chip) {
1177                 case NXT2002:
1178                         if (buf[0] != 0x04) goto error;         /* device id */
1179                         if (buf[1] != 0x02) goto error;         /* fab id */
1180                         if (buf[2] != 0x11) goto error;         /* month */
1181                         if (buf[3] != 0x20) goto error;         /* year msb */
1182                         if (buf[4] != 0x00) goto error;         /* year lsb */
1183                         break;
1184                 case NXT2004:
1185                         if (buf[0] != 0x05) goto error;         /* device id */
1186                         break;
1187                 default:
1188                         goto error;
1189         }
1190
1191         /* create dvb_frontend */
1192         memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1193         state->frontend.demodulator_priv = state;
1194         return &state->frontend;
1195
1196 error:
1197         kfree(state);
1198         pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf);
1199         return NULL;
1200 }
1201
1202 static struct dvb_frontend_ops nxt200x_ops = {
1203         .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1204         .info = {
1205                 .name = "Nextwave NXT200X VSB/QAM frontend",
1206                 .frequency_min =  54000000,
1207                 .frequency_max = 860000000,
1208                 .frequency_stepsize = 166666,   /* stepsize is just a guess */
1209                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1210                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1211                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1212         },
1213
1214         .release = nxt200x_release,
1215
1216         .init = nxt200x_init,
1217         .sleep = nxt200x_sleep,
1218
1219         .set_frontend = nxt200x_setup_frontend_parameters,
1220         .get_tune_settings = nxt200x_get_tune_settings,
1221
1222         .read_status = nxt200x_read_status,
1223         .read_ber = nxt200x_read_ber,
1224         .read_signal_strength = nxt200x_read_signal_strength,
1225         .read_snr = nxt200x_read_snr,
1226         .read_ucblocks = nxt200x_read_ucblocks,
1227 };
1228
1229 module_param(debug, int, 0644);
1230 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1231
1232 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1233 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1234 MODULE_LICENSE("GPL");
1235
1236 EXPORT_SYMBOL(nxt200x_attach);
1237