drivers/media/dvb-frontends/stv090x.c

   1 /*
   2         STV0900/0903 Multistandard Broadcast Frontend driver
   3         Copyright (C) Manu Abraham <abraham.manu@gmail.com>
   4
   5         Copyright (C) ST Microelectronics
   6
   7         This program is free software; you can redistribute it and/or modify
   8         it under the terms of the GNU General Public License as published by
   9         the Free Software Foundation; either version 2 of the License, or
  10         (at your option) any later version.
  11
  12         This program is distributed in the hope that it will be useful,
  13         but WITHOUT ANY WARRANTY; without even the implied warranty of
  14         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15         GNU General Public License for more details.
  16
  17         You should have received a copy of the GNU General Public License
  18         along with this program; if not, write to the Free Software
  19         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20 */
  21
  22 #include <linux/init.h>
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/string.h>
  26 #include <linux/slab.h>
  27 #include <linux/mutex.h>
  28
  29 #include <linux/dvb/frontend.h>
  30 #include "dvb_frontend.h"
  31
  32 #include "stv6110x.h" /* for demodulator internal modes */
  33
  34 #include "stv090x_reg.h"
  35 #include "stv090x.h"
  36 #include "stv090x_priv.h"
  37
  38 /* Max transfer size done by I2C transfer functions */
  39 #define MAX_XFER_SIZE  64
  40
  41 static unsigned int verbose;
  42 module_param(verbose, int, 0644);
  43
  44 /* internal params node */
  45 struct stv090x_dev {
  46         /* pointer for internal params, one for each pair of demods */
  47         struct stv090x_internal         *internal;
  48         struct stv090x_dev              *next_dev;
  49 };
  50
  51 /* first internal params */
  52 static struct stv090x_dev *stv090x_first_dev;
  53
  54 /* find chip by i2c adapter and i2c address */
  55 static struct stv090x_dev *find_dev(struct i2c_adapter *i2c_adap,
  56                                         u8 i2c_addr)
  57 {
  58         struct stv090x_dev *temp_dev = stv090x_first_dev;
  59
  60         /*
  61          Search of the last stv0900 chip or
  62          find it by i2c adapter and i2c address */
  63         while ((temp_dev != NULL) &&
  64                 ((temp_dev->internal->i2c_adap != i2c_adap) ||
  65                 (temp_dev->internal->i2c_addr != i2c_addr))) {
  66
  67                 temp_dev = temp_dev->next_dev;
  68         }
  69
  70         return temp_dev;
  71 }
  72
  73 /* deallocating chip */
  74 static void remove_dev(struct stv090x_internal *internal)
  75 {
  76         struct stv090x_dev *prev_dev = stv090x_first_dev;
  77         struct stv090x_dev *del_dev = find_dev(internal->i2c_adap,
  78                                                 internal->i2c_addr);
  79
  80         if (del_dev != NULL) {
  81                 if (del_dev == stv090x_first_dev) {
  82                         stv090x_first_dev = del_dev->next_dev;
  83                 } else {
  84                         while (prev_dev->next_dev != del_dev)
  85                                 prev_dev = prev_dev->next_dev;
  86
  87                         prev_dev->next_dev = del_dev->next_dev;
  88                 }
  89
  90                 kfree(del_dev);
  91         }
  92 }
  93
  94 /* allocating new chip */
  95 static struct stv090x_dev *append_internal(struct stv090x_internal *internal)
  96 {
  97         struct stv090x_dev *new_dev;
  98         struct stv090x_dev *temp_dev;
  99
 100         new_dev = kmalloc(sizeof(struct stv090x_dev), GFP_KERNEL);
 101         if (new_dev != NULL) {
 102                 new_dev->internal = internal;
 103                 new_dev->next_dev = NULL;
 104
 105                 /* append to list */
 106                 if (stv090x_first_dev == NULL) {
 107                         stv090x_first_dev = new_dev;
 108                 } else {
 109                         temp_dev = stv090x_first_dev;
 110                         while (temp_dev->next_dev != NULL)
 111                                 temp_dev = temp_dev->next_dev;
 112
 113                         temp_dev->next_dev = new_dev;
 114                 }
 115         }
 116
 117         return new_dev;
 118 }
 119
 120
 121 /* DVBS1 and DSS C/N Lookup table */
 122 static const struct stv090x_tab stv090x_s1cn_tab[] = {
 123         {   0, 8917 }, /*  0.0dB */
 124         {   5, 8801 }, /*  0.5dB */
 125         {  10, 8667 }, /*  1.0dB */
 126         {  15, 8522 }, /*  1.5dB */
 127         {  20, 8355 }, /*  2.0dB */
 128         {  25, 8175 }, /*  2.5dB */
 129         {  30, 7979 }, /*  3.0dB */
 130         {  35, 7763 }, /*  3.5dB */
 131         {  40, 7530 }, /*  4.0dB */
 132         {  45, 7282 }, /*  4.5dB */
 133         {  50, 7026 }, /*  5.0dB */
 134         {  55, 6781 }, /*  5.5dB */
 135         {  60, 6514 }, /*  6.0dB */
 136         {  65, 6241 }, /*  6.5dB */
 137         {  70, 5965 }, /*  7.0dB */
 138         {  75, 5690 }, /*  7.5dB */
 139         {  80, 5424 }, /*  8.0dB */
 140         {  85, 5161 }, /*  8.5dB */
 141         {  90, 4902 }, /*  9.0dB */
 142         {  95, 4654 }, /*  9.5dB */
 143         { 100, 4417 }, /* 10.0dB */
 144         { 105, 4186 }, /* 10.5dB */
 145         { 110, 3968 }, /* 11.0dB */
 146         { 115, 3757 }, /* 11.5dB */
 147         { 120, 3558 }, /* 12.0dB */
 148         { 125, 3366 }, /* 12.5dB */
 149         { 130, 3185 }, /* 13.0dB */
 150         { 135, 3012 }, /* 13.5dB */
 151         { 140, 2850 }, /* 14.0dB */
 152         { 145, 2698 }, /* 14.5dB */
 153         { 150, 2550 }, /* 15.0dB */
 154         { 160, 2283 }, /* 16.0dB */
 155         { 170, 2042 }, /* 17.0dB */
 156         { 180, 1827 }, /* 18.0dB */
 157         { 190, 1636 }, /* 19.0dB */
 158         { 200, 1466 }, /* 20.0dB */
 159         { 210, 1315 }, /* 21.0dB */
 160         { 220, 1181 }, /* 22.0dB */
 161         { 230, 1064 }, /* 23.0dB */
 162         { 240,  960 }, /* 24.0dB */
 163         { 250,  869 }, /* 25.0dB */
 164         { 260,  792 }, /* 26.0dB */
 165         { 270,  724 }, /* 27.0dB */
 166         { 280,  665 }, /* 28.0dB */
 167         { 290,  616 }, /* 29.0dB */
 168         { 300,  573 }, /* 30.0dB */
 169         { 310,  537 }, /* 31.0dB */
 170         { 320,  507 }, /* 32.0dB */
 171         { 330,  483 }, /* 33.0dB */
 172         { 400,  398 }, /* 40.0dB */
 173         { 450,  381 }, /* 45.0dB */
 174         { 500,  377 }  /* 50.0dB */
 175 };
 176
 177 /* DVBS2 C/N Lookup table */
 178 static const struct stv090x_tab stv090x_s2cn_tab[] = {
 179         { -30, 13348 }, /* -3.0dB */
 180         { -20, 12640 }, /* -2d.0B */
 181         { -10, 11883 }, /* -1.0dB */
 182         {   0, 11101 }, /* -0.0dB */
 183         {   5, 10718 }, /*  0.5dB */
 184         {  10, 10339 }, /*  1.0dB */
 185         {  15,  9947 }, /*  1.5dB */
 186         {  20,  9552 }, /*  2.0dB */
 187         {  25,  9183 }, /*  2.5dB */
 188         {  30,  8799 }, /*  3.0dB */
 189         {  35,  8422 }, /*  3.5dB */
 190         {  40,  8062 }, /*  4.0dB */
 191         {  45,  7707 }, /*  4.5dB */
 192         {  50,  7353 }, /*  5.0dB */
 193         {  55,  7025 }, /*  5.5dB */
 194         {  60,  6684 }, /*  6.0dB */
 195         {  65,  6331 }, /*  6.5dB */
 196         {  70,  6036 }, /*  7.0dB */
 197         {  75,  5727 }, /*  7.5dB */
 198         {  80,  5437 }, /*  8.0dB */
 199         {  85,  5164 }, /*  8.5dB */
 200         {  90,  4902 }, /*  9.0dB */
 201         {  95,  4653 }, /*  9.5dB */
 202         { 100,  4408 }, /* 10.0dB */
 203         { 105,  4187 }, /* 10.5dB */
 204         { 110,  3961 }, /* 11.0dB */
 205         { 115,  3751 }, /* 11.5dB */
 206         { 120,  3558 }, /* 12.0dB */
 207         { 125,  3368 }, /* 12.5dB */
 208         { 130,  3191 }, /* 13.0dB */
 209         { 135,  3017 }, /* 13.5dB */
 210         { 140,  2862 }, /* 14.0dB */
 211         { 145,  2710 }, /* 14.5dB */
 212         { 150,  2565 }, /* 15.0dB */
 213         { 160,  2300 }, /* 16.0dB */
 214         { 170,  2058 }, /* 17.0dB */
 215         { 180,  1849 }, /* 18.0dB */
 216         { 190,  1663 }, /* 19.0dB */
 217         { 200,  1495 }, /* 20.0dB */
 218         { 210,  1349 }, /* 21.0dB */
 219         { 220,  1222 }, /* 22.0dB */
 220         { 230,  1110 }, /* 23.0dB */
 221         { 240,  1011 }, /* 24.0dB */
 222         { 250,   925 }, /* 25.0dB */
 223         { 260,   853 }, /* 26.0dB */
 224         { 270,   789 }, /* 27.0dB */
 225         { 280,   734 }, /* 28.0dB */
 226         { 290,   690 }, /* 29.0dB */
 227         { 300,   650 }, /* 30.0dB */
 228         { 310,   619 }, /* 31.0dB */
 229         { 320,   593 }, /* 32.0dB */
 230         { 330,   571 }, /* 33.0dB */
 231         { 400,   498 }, /* 40.0dB */
 232         { 450,   484 }, /* 45.0dB */
 233         { 500,   481 }  /* 50.0dB */
 234 };
 235
 236 /* RF level C/N lookup table */
 237 static const struct stv090x_tab stv090x_rf_tab[] = {
 238         {  -5, 0xcaa1 }, /*  -5dBm */
 239         { -10, 0xc229 }, /* -10dBm */
 240         { -15, 0xbb08 }, /* -15dBm */
 241         { -20, 0xb4bc }, /* -20dBm */
 242         { -25, 0xad5a }, /* -25dBm */
 243         { -30, 0xa298 }, /* -30dBm */
 244         { -35, 0x98a8 }, /* -35dBm */
 245         { -40, 0x8389 }, /* -40dBm */
 246         { -45, 0x59be }, /* -45dBm */
 247         { -50, 0x3a14 }, /* -50dBm */
 248         { -55, 0x2d11 }, /* -55dBm */
 249         { -60, 0x210d }, /* -60dBm */
 250         { -65, 0xa14f }, /* -65dBm */
 251         { -70, 0x07aa }  /* -70dBm */
 252 };
 253
 254
 255 static struct stv090x_reg stv0900_initval[] = {
 256
 257         { STV090x_OUTCFG,               0x00 },
 258         { STV090x_MODECFG,              0xff },
 259         { STV090x_AGCRF1CFG,            0x11 },
 260         { STV090x_AGCRF2CFG,            0x13 },
 261         { STV090x_TSGENERAL1X,          0x14 },
 262         { STV090x_TSTTNR2,              0x21 },
 263         { STV090x_TSTTNR4,              0x21 },
 264         { STV090x_P2_DISTXCTL,          0x22 },
 265         { STV090x_P2_F22TX,             0xc0 },
 266         { STV090x_P2_F22RX,             0xc0 },
 267         { STV090x_P2_DISRXCTL,          0x00 },
 268         { STV090x_P2_DMDCFGMD,          0xF9 },
 269         { STV090x_P2_DEMOD,             0x08 },
 270         { STV090x_P2_DMDCFG3,           0xc4 },
 271         { STV090x_P2_CARFREQ,           0xed },
 272         { STV090x_P2_LDT,               0xd0 },
 273         { STV090x_P2_LDT2,              0xb8 },
 274         { STV090x_P2_TMGCFG,            0xd2 },
 275         { STV090x_P2_TMGTHRISE,         0x20 },
 276         { STV090x_P1_TMGCFG,            0xd2 },
 277
 278         { STV090x_P2_TMGTHFALL,         0x00 },
 279         { STV090x_P2_FECSPY,            0x88 },
 280         { STV090x_P2_FSPYDATA,          0x3a },
 281         { STV090x_P2_FBERCPT4,          0x00 },
 282         { STV090x_P2_FSPYBER,           0x10 },
 283         { STV090x_P2_ERRCTRL1,          0x35 },
 284         { STV090x_P2_ERRCTRL2,          0xc1 },
 285         { STV090x_P2_CFRICFG,           0xf8 },
 286         { STV090x_P2_NOSCFG,            0x1c },
 287         { STV090x_P2_DMDTOM,            0x20 },
 288         { STV090x_P2_CORRELMANT,        0x70 },
 289         { STV090x_P2_CORRELABS,         0x88 },
 290         { STV090x_P2_AGC2O,             0x5b },
 291         { STV090x_P2_AGC2REF,           0x38 },
 292         { STV090x_P2_CARCFG,            0xe4 },
 293         { STV090x_P2_ACLC,              0x1A },
 294         { STV090x_P2_BCLC,              0x09 },
 295         { STV090x_P2_CARHDR,            0x08 },
 296         { STV090x_P2_KREFTMG,           0xc1 },
 297         { STV090x_P2_SFRUPRATIO,        0xf0 },
 298         { STV090x_P2_SFRLOWRATIO,       0x70 },
 299         { STV090x_P2_SFRSTEP,           0x58 },
 300         { STV090x_P2_TMGCFG2,           0x01 },
 301         { STV090x_P2_CAR2CFG,           0x26 },
 302         { STV090x_P2_BCLC2S2Q,          0x86 },
 303         { STV090x_P2_BCLC2S28,          0x86 },
 304         { STV090x_P2_SMAPCOEF7,         0x77 },
 305         { STV090x_P2_SMAPCOEF6,         0x85 },
 306         { STV090x_P2_SMAPCOEF5,         0x77 },
 307         { STV090x_P2_TSCFGL,            0x20 },
 308         { STV090x_P2_DMDCFG2,           0x3b },
 309         { STV090x_P2_MODCODLST0,        0xff },
 310         { STV090x_P2_MODCODLST1,        0xff },
 311         { STV090x_P2_MODCODLST2,        0xff },
 312         { STV090x_P2_MODCODLST3,        0xff },
 313         { STV090x_P2_MODCODLST4,        0xff },
 314         { STV090x_P2_MODCODLST5,        0xff },
 315         { STV090x_P2_MODCODLST6,        0xff },
 316         { STV090x_P2_MODCODLST7,        0xcc },
 317         { STV090x_P2_MODCODLST8,        0xcc },
 318         { STV090x_P2_MODCODLST9,        0xcc },
 319         { STV090x_P2_MODCODLSTA,        0xcc },
 320         { STV090x_P2_MODCODLSTB,        0xcc },
 321         { STV090x_P2_MODCODLSTC,        0xcc },
 322         { STV090x_P2_MODCODLSTD,        0xcc },
 323         { STV090x_P2_MODCODLSTE,        0xcc },
 324         { STV090x_P2_MODCODLSTF,        0xcf },
 325         { STV090x_P1_DISTXCTL,          0x22 },
 326         { STV090x_P1_F22TX,             0xc0 },
 327         { STV090x_P1_F22RX,             0xc0 },
 328         { STV090x_P1_DISRXCTL,          0x00 },
 329         { STV090x_P1_DMDCFGMD,          0xf9 },
 330         { STV090x_P1_DEMOD,             0x08 },
 331         { STV090x_P1_DMDCFG3,           0xc4 },
 332         { STV090x_P1_DMDTOM,            0x20 },
 333         { STV090x_P1_CARFREQ,           0xed },
 334         { STV090x_P1_LDT,               0xd0 },
 335         { STV090x_P1_LDT2,              0xb8 },
 336         { STV090x_P1_TMGCFG,            0xd2 },
 337         { STV090x_P1_TMGTHRISE,         0x20 },
 338         { STV090x_P1_TMGTHFALL,         0x00 },
 339         { STV090x_P1_SFRUPRATIO,        0xf0 },
 340         { STV090x_P1_SFRLOWRATIO,       0x70 },
 341         { STV090x_P1_TSCFGL,            0x20 },
 342         { STV090x_P1_FECSPY,            0x88 },
 343         { STV090x_P1_FSPYDATA,          0x3a },
 344         { STV090x_P1_FBERCPT4,          0x00 },
 345         { STV090x_P1_FSPYBER,           0x10 },
 346         { STV090x_P1_ERRCTRL1,          0x35 },
 347         { STV090x_P1_ERRCTRL2,          0xc1 },
 348         { STV090x_P1_CFRICFG,           0xf8 },
 349         { STV090x_P1_NOSCFG,            0x1c },
 350         { STV090x_P1_CORRELMANT,        0x70 },
 351         { STV090x_P1_CORRELABS,         0x88 },
 352         { STV090x_P1_AGC2O,             0x5b },
 353         { STV090x_P1_AGC2REF,           0x38 },
 354         { STV090x_P1_CARCFG,            0xe4 },
 355         { STV090x_P1_ACLC,              0x1A },
 356         { STV090x_P1_BCLC,              0x09 },
 357         { STV090x_P1_CARHDR,            0x08 },
 358         { STV090x_P1_KREFTMG,           0xc1 },
 359         { STV090x_P1_SFRSTEP,           0x58 },
 360         { STV090x_P1_TMGCFG2,           0x01 },
 361         { STV090x_P1_CAR2CFG,           0x26 },
 362         { STV090x_P1_BCLC2S2Q,          0x86 },
 363         { STV090x_P1_BCLC2S28,          0x86 },
 364         { STV090x_P1_SMAPCOEF7,         0x77 },
 365         { STV090x_P1_SMAPCOEF6,         0x85 },
 366         { STV090x_P1_SMAPCOEF5,         0x77 },
 367         { STV090x_P1_DMDCFG2,           0x3b },
 368         { STV090x_P1_MODCODLST0,        0xff },
 369         { STV090x_P1_MODCODLST1,        0xff },
 370         { STV090x_P1_MODCODLST2,        0xff },
 371         { STV090x_P1_MODCODLST3,        0xff },
 372         { STV090x_P1_MODCODLST4,        0xff },
 373         { STV090x_P1_MODCODLST5,        0xff },
 374         { STV090x_P1_MODCODLST6,        0xff },
 375         { STV090x_P1_MODCODLST7,        0xcc },
 376         { STV090x_P1_MODCODLST8,        0xcc },
 377         { STV090x_P1_MODCODLST9,        0xcc },
 378         { STV090x_P1_MODCODLSTA,        0xcc },
 379         { STV090x_P1_MODCODLSTB,        0xcc },
 380         { STV090x_P1_MODCODLSTC,        0xcc },
 381         { STV090x_P1_MODCODLSTD,        0xcc },
 382         { STV090x_P1_MODCODLSTE,        0xcc },
 383         { STV090x_P1_MODCODLSTF,        0xcf },
 384         { STV090x_GENCFG,               0x1d },
 385         { STV090x_NBITER_NF4,           0x37 },
 386         { STV090x_NBITER_NF5,           0x29 },
 387         { STV090x_NBITER_NF6,           0x37 },
 388         { STV090x_NBITER_NF7,           0x33 },
 389         { STV090x_NBITER_NF8,           0x31 },
 390         { STV090x_NBITER_NF9,           0x2f },
 391         { STV090x_NBITER_NF10,          0x39 },
 392         { STV090x_NBITER_NF11,          0x3a },
 393         { STV090x_NBITER_NF12,          0x29 },
 394         { STV090x_NBITER_NF13,          0x37 },
 395         { STV090x_NBITER_NF14,          0x33 },
 396         { STV090x_NBITER_NF15,          0x2f },
 397         { STV090x_NBITER_NF16,          0x39 },
 398         { STV090x_NBITER_NF17,          0x3a },
 399         { STV090x_NBITERNOERR,          0x04 },
 400         { STV090x_GAINLLR_NF4,          0x0C },
 401         { STV090x_GAINLLR_NF5,          0x0F },
 402         { STV090x_GAINLLR_NF6,          0x11 },
 403         { STV090x_GAINLLR_NF7,          0x14 },
 404         { STV090x_GAINLLR_NF8,          0x17 },
 405         { STV090x_GAINLLR_NF9,          0x19 },
 406         { STV090x_GAINLLR_NF10,         0x20 },
 407         { STV090x_GAINLLR_NF11,         0x21 },
 408         { STV090x_GAINLLR_NF12,         0x0D },
 409         { STV090x_GAINLLR_NF13,         0x0F },
 410         { STV090x_GAINLLR_NF14,         0x13 },
 411         { STV090x_GAINLLR_NF15,         0x1A },
 412         { STV090x_GAINLLR_NF16,         0x1F },
 413         { STV090x_GAINLLR_NF17,         0x21 },
 414         { STV090x_RCCFGH,               0x20 },
 415         { STV090x_P1_FECM,              0x01 }, /* disable DSS modes */
 416         { STV090x_P2_FECM,              0x01 }, /* disable DSS modes */
 417         { STV090x_P1_PRVIT,             0x2F }, /* disable PR 6/7 */
 418         { STV090x_P2_PRVIT,             0x2F }, /* disable PR 6/7 */
 419 };
 420
 421 static struct stv090x_reg stv0903_initval[] = {
 422         { STV090x_OUTCFG,               0x00 },
 423         { STV090x_AGCRF1CFG,            0x11 },
 424         { STV090x_STOPCLK1,             0x48 },
 425         { STV090x_STOPCLK2,             0x14 },
 426         { STV090x_TSTTNR1,              0x27 },
 427         { STV090x_TSTTNR2,              0x21 },
 428         { STV090x_P1_DISTXCTL,          0x22 },
 429         { STV090x_P1_F22TX,             0xc0 },
 430         { STV090x_P1_F22RX,             0xc0 },
 431         { STV090x_P1_DISRXCTL,          0x00 },
 432         { STV090x_P1_DMDCFGMD,          0xF9 },
 433         { STV090x_P1_DEMOD,             0x08 },
 434         { STV090x_P1_DMDCFG3,           0xc4 },
 435         { STV090x_P1_CARFREQ,           0xed },
 436         { STV090x_P1_TNRCFG2,           0x82 },
 437         { STV090x_P1_LDT,               0xd0 },
 438         { STV090x_P1_LDT2,              0xb8 },
 439         { STV090x_P1_TMGCFG,            0xd2 },
 440         { STV090x_P1_TMGTHRISE,         0x20 },
 441         { STV090x_P1_TMGTHFALL,         0x00 },
 442         { STV090x_P1_SFRUPRATIO,        0xf0 },
 443         { STV090x_P1_SFRLOWRATIO,       0x70 },
 444         { STV090x_P1_TSCFGL,            0x20 },
 445         { STV090x_P1_FECSPY,            0x88 },
 446         { STV090x_P1_FSPYDATA,          0x3a },
 447         { STV090x_P1_FBERCPT4,          0x00 },
 448         { STV090x_P1_FSPYBER,           0x10 },
 449         { STV090x_P1_ERRCTRL1,          0x35 },
 450         { STV090x_P1_ERRCTRL2,          0xc1 },
 451         { STV090x_P1_CFRICFG,           0xf8 },
 452         { STV090x_P1_NOSCFG,            0x1c },
 453         { STV090x_P1_DMDTOM,            0x20 },
 454         { STV090x_P1_CORRELMANT,        0x70 },
 455         { STV090x_P1_CORRELABS,         0x88 },
 456         { STV090x_P1_AGC2O,             0x5b },
 457         { STV090x_P1_AGC2REF,           0x38 },
 458         { STV090x_P1_CARCFG,            0xe4 },
 459         { STV090x_P1_ACLC,              0x1A },
 460         { STV090x_P1_BCLC,              0x09 },
 461         { STV090x_P1_CARHDR,            0x08 },
 462         { STV090x_P1_KREFTMG,           0xc1 },
 463         { STV090x_P1_SFRSTEP,           0x58 },
 464         { STV090x_P1_TMGCFG2,           0x01 },
 465         { STV090x_P1_CAR2CFG,           0x26 },
 466         { STV090x_P1_BCLC2S2Q,          0x86 },
 467         { STV090x_P1_BCLC2S28,          0x86 },
 468         { STV090x_P1_SMAPCOEF7,         0x77 },
 469         { STV090x_P1_SMAPCOEF6,         0x85 },
 470         { STV090x_P1_SMAPCOEF5,         0x77 },
 471         { STV090x_P1_DMDCFG2,           0x3b },
 472         { STV090x_P1_MODCODLST0,        0xff },
 473         { STV090x_P1_MODCODLST1,        0xff },
 474         { STV090x_P1_MODCODLST2,        0xff },
 475         { STV090x_P1_MODCODLST3,        0xff },
 476         { STV090x_P1_MODCODLST4,        0xff },
 477         { STV090x_P1_MODCODLST5,        0xff },
 478         { STV090x_P1_MODCODLST6,        0xff },
 479         { STV090x_P1_MODCODLST7,        0xcc },
 480         { STV090x_P1_MODCODLST8,        0xcc },
 481         { STV090x_P1_MODCODLST9,        0xcc },
 482         { STV090x_P1_MODCODLSTA,        0xcc },
 483         { STV090x_P1_MODCODLSTB,        0xcc },
 484         { STV090x_P1_MODCODLSTC,        0xcc },
 485         { STV090x_P1_MODCODLSTD,        0xcc },
 486         { STV090x_P1_MODCODLSTE,        0xcc },
 487         { STV090x_P1_MODCODLSTF,        0xcf },
 488         { STV090x_GENCFG,               0x1c },
 489         { STV090x_NBITER_NF4,           0x37 },
 490         { STV090x_NBITER_NF5,           0x29 },
 491         { STV090x_NBITER_NF6,           0x37 },
 492         { STV090x_NBITER_NF7,           0x33 },
 493         { STV090x_NBITER_NF8,           0x31 },
 494         { STV090x_NBITER_NF9,           0x2f },
 495         { STV090x_NBITER_NF10,          0x39 },
 496         { STV090x_NBITER_NF11,          0x3a },
 497         { STV090x_NBITER_NF12,          0x29 },
 498         { STV090x_NBITER_NF13,          0x37 },
 499         { STV090x_NBITER_NF14,          0x33 },
 500         { STV090x_NBITER_NF15,          0x2f },
 501         { STV090x_NBITER_NF16,          0x39 },
 502         { STV090x_NBITER_NF17,          0x3a },
 503         { STV090x_NBITERNOERR,          0x04 },
 504         { STV090x_GAINLLR_NF4,          0x0C },
 505         { STV090x_GAINLLR_NF5,          0x0F },
 506         { STV090x_GAINLLR_NF6,          0x11 },
 507         { STV090x_GAINLLR_NF7,          0x14 },
 508         { STV090x_GAINLLR_NF8,          0x17 },
 509         { STV090x_GAINLLR_NF9,          0x19 },
 510         { STV090x_GAINLLR_NF10,         0x20 },
 511         { STV090x_GAINLLR_NF11,         0x21 },
 512         { STV090x_GAINLLR_NF12,         0x0D },
 513         { STV090x_GAINLLR_NF13,         0x0F },
 514         { STV090x_GAINLLR_NF14,         0x13 },
 515         { STV090x_GAINLLR_NF15,         0x1A },
 516         { STV090x_GAINLLR_NF16,         0x1F },
 517         { STV090x_GAINLLR_NF17,         0x21 },
 518         { STV090x_RCCFGH,               0x20 },
 519         { STV090x_P1_FECM,              0x01 }, /*disable the DSS mode */
 520         { STV090x_P1_PRVIT,             0x2f }  /*disable puncture rate 6/7*/
 521 };
 522
 523 static struct stv090x_reg stv0900_cut20_val[] = {
 524
 525         { STV090x_P2_DMDCFG3,           0xe8 },
 526         { STV090x_P2_DMDCFG4,           0x10 },
 527         { STV090x_P2_CARFREQ,           0x38 },
 528         { STV090x_P2_CARHDR,            0x20 },
 529         { STV090x_P2_KREFTMG,           0x5a },
 530         { STV090x_P2_SMAPCOEF7,         0x06 },
 531         { STV090x_P2_SMAPCOEF6,         0x00 },
 532         { STV090x_P2_SMAPCOEF5,         0x04 },
 533         { STV090x_P2_NOSCFG,            0x0c },
 534         { STV090x_P1_DMDCFG3,           0xe8 },
 535         { STV090x_P1_DMDCFG4,           0x10 },
 536         { STV090x_P1_CARFREQ,           0x38 },
 537         { STV090x_P1_CARHDR,            0x20 },
 538         { STV090x_P1_KREFTMG,           0x5a },
 539         { STV090x_P1_SMAPCOEF7,         0x06 },
 540         { STV090x_P1_SMAPCOEF6,         0x00 },
 541         { STV090x_P1_SMAPCOEF5,         0x04 },
 542         { STV090x_P1_NOSCFG,            0x0c },
 543         { STV090x_GAINLLR_NF4,          0x21 },
 544         { STV090x_GAINLLR_NF5,          0x21 },
 545         { STV090x_GAINLLR_NF6,          0x20 },
 546         { STV090x_GAINLLR_NF7,          0x1F },
 547         { STV090x_GAINLLR_NF8,          0x1E },
 548         { STV090x_GAINLLR_NF9,          0x1E },
 549         { STV090x_GAINLLR_NF10,         0x1D },
 550         { STV090x_GAINLLR_NF11,         0x1B },
 551         { STV090x_GAINLLR_NF12,         0x20 },
 552         { STV090x_GAINLLR_NF13,         0x20 },
 553         { STV090x_GAINLLR_NF14,         0x20 },
 554         { STV090x_GAINLLR_NF15,         0x20 },
 555         { STV090x_GAINLLR_NF16,         0x20 },
 556         { STV090x_GAINLLR_NF17,         0x21 },
 557 };
 558
 559 static struct stv090x_reg stv0903_cut20_val[] = {
 560         { STV090x_P1_DMDCFG3,           0xe8 },
 561         { STV090x_P1_DMDCFG4,           0x10 },
 562         { STV090x_P1_CARFREQ,           0x38 },
 563         { STV090x_P1_CARHDR,            0x20 },
 564         { STV090x_P1_KREFTMG,           0x5a },
 565         { STV090x_P1_SMAPCOEF7,         0x06 },
 566         { STV090x_P1_SMAPCOEF6,         0x00 },
 567         { STV090x_P1_SMAPCOEF5,         0x04 },
 568         { STV090x_P1_NOSCFG,            0x0c },
 569         { STV090x_GAINLLR_NF4,          0x21 },
 570         { STV090x_GAINLLR_NF5,          0x21 },
 571         { STV090x_GAINLLR_NF6,          0x20 },
 572         { STV090x_GAINLLR_NF7,          0x1F },
 573         { STV090x_GAINLLR_NF8,          0x1E },
 574         { STV090x_GAINLLR_NF9,          0x1E },
 575         { STV090x_GAINLLR_NF10,         0x1D },
 576         { STV090x_GAINLLR_NF11,         0x1B },
 577         { STV090x_GAINLLR_NF12,         0x20 },
 578         { STV090x_GAINLLR_NF13,         0x20 },
 579         { STV090x_GAINLLR_NF14,         0x20 },
 580         { STV090x_GAINLLR_NF15,         0x20 },
 581         { STV090x_GAINLLR_NF16,         0x20 },
 582         { STV090x_GAINLLR_NF17,         0x21 }
 583 };
 584
 585 /* Cut 2.0 Long Frame Tracking CR loop */
 586 static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
 587         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 588         { STV090x_QPSK_12,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
 589         { STV090x_QPSK_35,  0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
 590         { STV090x_QPSK_23,  0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
 591         { STV090x_QPSK_34,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 592         { STV090x_QPSK_45,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 593         { STV090x_QPSK_56,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 594         { STV090x_QPSK_89,  0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 595         { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 596         { STV090x_8PSK_35,  0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
 597         { STV090x_8PSK_23,  0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
 598         { STV090x_8PSK_34,  0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
 599         { STV090x_8PSK_56,  0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
 600         { STV090x_8PSK_89,  0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
 601         { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
 602 };
 603
 604 /* Cut 3.0 Long Frame Tracking CR loop */
 605 static  struct stv090x_long_frame_crloop stv090x_s2_crl_cut30[] = {
 606         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 607         { STV090x_QPSK_12,  0x3c, 0x2c, 0x0c, 0x2c, 0x1b, 0x2c, 0x1b, 0x1c, 0x0b, 0x3b },
 608         { STV090x_QPSK_35,  0x0d, 0x0d, 0x0c, 0x0d, 0x1b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
 609         { STV090x_QPSK_23,  0x1d, 0x0d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
 610         { STV090x_QPSK_34,  0x1d, 0x1d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
 611         { STV090x_QPSK_45,  0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 612         { STV090x_QPSK_56,  0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 613         { STV090x_QPSK_89,  0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 614         { STV090x_QPSK_910, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 615         { STV090x_8PSK_35,  0x39, 0x29, 0x39, 0x19, 0x19, 0x19, 0x19, 0x19, 0x09, 0x19 },
 616         { STV090x_8PSK_23,  0x2a, 0x39, 0x1a, 0x0a, 0x39, 0x0a, 0x29, 0x39, 0x29, 0x0a },
 617         { STV090x_8PSK_34,  0x2b, 0x3a, 0x1b, 0x1b, 0x3a, 0x1b, 0x1a, 0x0b, 0x1a, 0x3a },
 618         { STV090x_8PSK_56,  0x0c, 0x1b, 0x3b, 0x3b, 0x1b, 0x3b, 0x3a, 0x3b, 0x3a, 0x1b },
 619         { STV090x_8PSK_89,  0x0d, 0x3c, 0x2c, 0x2c, 0x2b, 0x0c, 0x0b, 0x3b, 0x0b, 0x1b },
 620         { STV090x_8PSK_910, 0x0d, 0x0d, 0x2c, 0x3c, 0x3b, 0x1c, 0x0b, 0x3b, 0x0b, 0x1b }
 621 };
 622
 623 /* Cut 2.0 Long Frame Tracking CR Loop */
 624 static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
 625         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 626         { STV090x_16APSK_23,  0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
 627         { STV090x_16APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
 628         { STV090x_16APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
 629         { STV090x_16APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
 630         { STV090x_16APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
 631         { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
 632         { STV090x_32APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 633         { STV090x_32APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 634         { STV090x_32APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 635         { STV090x_32APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 636         { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
 637 };
 638
 639 /* Cut 3.0 Long Frame Tracking CR Loop */
 640 static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut30[] = {
 641         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 642         { STV090x_16APSK_23,  0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x0a, 0x3a, 0x0a, 0x2a, 0x0a },
 643         { STV090x_16APSK_34,  0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x3b, 0x0a, 0x1b, 0x0a },
 644         { STV090x_16APSK_45,  0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
 645         { STV090x_16APSK_56,  0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
 646         { STV090x_16APSK_89,  0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
 647         { STV090x_16APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
 648         { STV090x_32APSK_34,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 649         { STV090x_32APSK_45,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 650         { STV090x_32APSK_56,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 651         { STV090x_32APSK_89,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 652         { STV090x_32APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }
 653 };
 654
 655 static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
 656         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 657         { STV090x_QPSK_14,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
 658         { STV090x_QPSK_13,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
 659         { STV090x_QPSK_25,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
 660 };
 661
 662 static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut30[] = {
 663         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 664         { STV090x_QPSK_14,  0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x2a, 0x1c, 0x3a, 0x3b },
 665         { STV090x_QPSK_13,  0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b },
 666         { STV090x_QPSK_25,  0x1c, 0x3c, 0x1b, 0x3c, 0x3a, 0x1c, 0x3a, 0x3b, 0x3a, 0x2b }
 667 };
 668
 669 /* Cut 2.0 Short Frame Tracking CR Loop */
 670 static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut20[] = {
 671         /* MODCOD         2M    5M    10M   20M   30M */
 672         { STV090x_QPSK,   0x2f, 0x2e, 0x0e, 0x0e, 0x3d },
 673         { STV090x_8PSK,   0x3e, 0x0e, 0x2d, 0x0d, 0x3c },
 674         { STV090x_16APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d },
 675         { STV090x_32APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d }
 676 };
 677
 678 /* Cut 3.0 Short Frame Tracking CR Loop */
 679 static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut30[] = {
 680         /* MODCOD         2M    5M    10M   20M   30M */
 681         { STV090x_QPSK,   0x2C, 0x2B, 0x0B, 0x0B, 0x3A },
 682         { STV090x_8PSK,   0x3B, 0x0B, 0x2A, 0x0A, 0x39 },
 683         { STV090x_16APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A },
 684         { STV090x_32APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A }
 685 };
 686
 687 static inline s32 comp2(s32 __x, s32 __width)
 688 {
 689         if (__width == 32)
 690                 return __x;
 691         else
 692                 return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
 693 }
 694
 695 static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
 696 {
 697         const struct stv090x_config *config = state->config;
 698         int ret;
 699
 700         u8 b0[] = { reg >> 8, reg & 0xff };
 701         u8 buf;
 702
 703         struct i2c_msg msg[] = {
 704                 { .addr = config->address, .flags       = 0,            .buf = b0,   .len = 2 },
 705                 { .addr = config->address, .flags       = I2C_M_RD,     .buf = &buf, .len = 1 }
 706         };
 707
 708         ret = i2c_transfer(state->i2c, msg, 2);
 709         if (ret != 2) {
 710                 if (ret != -ERESTARTSYS)
 711                         dprintk(FE_ERROR, 1,
 712                                 "Read error, Reg=[0x%02x], Status=%d",
 713                                 reg, ret);
 714
 715                 return ret < 0 ? ret : -EREMOTEIO;
 716         }
 717         if (unlikely(*state->verbose >= FE_DEBUGREG))
 718                 dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
 719                         reg, buf);
 720
 721         return (unsigned int) buf;
 722 }
 723
 724 static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
 725 {
 726         const struct stv090x_config *config = state->config;
 727         int ret;
 728         u8 buf[MAX_XFER_SIZE];
 729         struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
 730
 731         if (2 + count > sizeof(buf)) {
 732                 printk(KERN_WARNING
 733                        "%s: i2c wr reg=%04x: len=%d is too big!\n",
 734                        KBUILD_MODNAME, reg, count);
 735                 return -EINVAL;
 736         }
 737
 738         buf[0] = reg >> 8;
 739         buf[1] = reg & 0xff;
 740         memcpy(&buf[2], data, count);
 741
 742         if (unlikely(*state->verbose >= FE_DEBUGREG)) {
 743                 int i;
 744
 745                 printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg);
 746                 for (i = 0; i < count; i++)
 747                         printk(" %02x", data[i]);
 748                 printk("\n");
 749         }
 750
 751         ret = i2c_transfer(state->i2c, &i2c_msg, 1);
 752         if (ret != 1) {
 753                 if (ret != -ERESTARTSYS)
 754                         dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
 755                                 reg, data[0], count, ret);
 756                 return ret < 0 ? ret : -EREMOTEIO;
 757         }
 758
 759         return 0;
 760 }
 761
 762 static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
 763 {
 764         u8 tmp = data; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */
 765
 766         return stv090x_write_regs(state, reg, &tmp, 1);
 767 }
 768
 769 static int stv090x_i2c_gate_ctrl(struct stv090x_state *state, int enable)
 770 {
 771         u32 reg;
 772
 773         /*
 774          * NOTE! A lock is used as a FSM to control the state in which
 775          * access is serialized between two tuners on the same demod.
 776          * This has nothing to do with a lock to protect a critical section
 777          * which may in some other cases be confused with protecting I/O
 778          * access to the demodulator gate.
 779          * In case of any error, the lock is unlocked and exit within the
 780          * relevant operations themselves.
 781          */
 782         if (enable) {
 783                 if (state->config->tuner_i2c_lock)
 784                         state->config->tuner_i2c_lock(&state->frontend, 1);
 785                 else
 786                         mutex_lock(&state->internal->tuner_lock);
 787         }
 788
 789         reg = STV090x_READ_DEMOD(state, I2CRPT);
 790         if (enable) {
 791                 dprintk(FE_DEBUG, 1, "Enable Gate");
 792                 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
 793                 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
 794                         goto err;
 795
 796         } else {
 797                 dprintk(FE_DEBUG, 1, "Disable Gate");
 798                 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
 799                 if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
 800                         goto err;
 801         }
 802
 803         if (!enable) {
 804                 if (state->config->tuner_i2c_lock)
 805                         state->config->tuner_i2c_lock(&state->frontend, 0);
 806                 else
 807                         mutex_unlock(&state->internal->tuner_lock);
 808         }
 809
 810         return 0;
 811 err:
 812         dprintk(FE_ERROR, 1, "I/O error");
 813         if (state->config->tuner_i2c_lock)
 814                 state->config->tuner_i2c_lock(&state->frontend, 0);
 815         else
 816                 mutex_unlock(&state->internal->tuner_lock);
 817         return -1;
 818 }
 819
 820 static void stv090x_get_lock_tmg(struct stv090x_state *state)
 821 {
 822         switch (state->algo) {
 823         case STV090x_BLIND_SEARCH:
 824                 dprintk(FE_DEBUG, 1, "Blind Search");
 825                 if (state->srate <= 1500000) {  /*10Msps< SR <=15Msps*/
 826                         state->DemodTimeout = 1500;
 827                         state->FecTimeout = 400;
 828                 } else if (state->srate <= 5000000) {  /*10Msps< SR <=15Msps*/
 829                         state->DemodTimeout = 1000;
 830                         state->FecTimeout = 300;
 831                 } else {  /*SR >20Msps*/
 832                         state->DemodTimeout = 700;
 833                         state->FecTimeout = 100;
 834                 }
 835                 break;
 836
 837         case STV090x_COLD_SEARCH:
 838         case STV090x_WARM_SEARCH:
 839         default:
 840                 dprintk(FE_DEBUG, 1, "Normal Search");
 841                 if (state->srate <= 1000000) {  /*SR <=1Msps*/
 842                         state->DemodTimeout = 4500;
 843                         state->FecTimeout = 1700;
 844                 } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
 845                         state->DemodTimeout = 2500;
 846                         state->FecTimeout = 1100;
 847                 } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
 848                         state->DemodTimeout = 1000;
 849                         state->FecTimeout = 550;
 850                 } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
 851                         state->DemodTimeout = 700;
 852                         state->FecTimeout = 250;
 853                 } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
 854                         state->DemodTimeout = 400;
 855                         state->FecTimeout = 130;
 856                 } else {   /*SR >20Msps*/
 857                         state->DemodTimeout = 300;
 858                         state->FecTimeout = 100;
 859                 }
 860                 break;
 861         }
 862
 863         if (state->algo == STV090x_WARM_SEARCH)
 864                 state->DemodTimeout /= 2;
 865 }
 866
 867 static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
 868 {
 869         u32 sym;
 870
 871         if (srate > 60000000) {
 872                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 873                 sym /= (state->internal->mclk >> 12);
 874         } else if (srate > 6000000) {
 875                 sym  = (srate << 6);
 876                 sym /= (state->internal->mclk >> 10);
 877         } else {
 878                 sym  = (srate << 9);
 879                 sym /= (state->internal->mclk >> 7);
 880         }
 881
 882         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
 883                 goto err;
 884         if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
 885                 goto err;
 886
 887         return 0;
 888 err:
 889         dprintk(FE_ERROR, 1, "I/O error");
 890         return -1;
 891 }
 892
 893 static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
 894 {
 895         u32 sym;
 896
 897         srate = 105 * (srate / 100);
 898         if (srate > 60000000) {
 899                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 900                 sym /= (state->internal->mclk >> 12);
 901         } else if (srate > 6000000) {
 902                 sym  = (srate << 6);
 903                 sym /= (state->internal->mclk >> 10);
 904         } else {
 905                 sym  = (srate << 9);
 906                 sym /= (state->internal->mclk >> 7);
 907         }
 908
 909         if (sym < 0x7fff) {
 910                 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
 911                         goto err;
 912                 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
 913                         goto err;
 914         } else {
 915                 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
 916                         goto err;
 917                 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
 918                         goto err;
 919         }
 920
 921         return 0;
 922 err:
 923         dprintk(FE_ERROR, 1, "I/O error");
 924         return -1;
 925 }
 926
 927 static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
 928 {
 929         u32 sym;
 930
 931         srate = 95 * (srate / 100);
 932         if (srate > 60000000) {
 933                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 934                 sym /= (state->internal->mclk >> 12);
 935         } else if (srate > 6000000) {
 936                 sym  = (srate << 6);
 937                 sym /= (state->internal->mclk >> 10);
 938         } else {
 939                 sym  = (srate << 9);
 940                 sym /= (state->internal->mclk >> 7);
 941         }
 942
 943         if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0x7f)) < 0) /* MSB */
 944                 goto err;
 945         if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
 946                 goto err;
 947         return 0;
 948 err:
 949         dprintk(FE_ERROR, 1, "I/O error");
 950         return -1;
 951 }
 952
 953 static u32 stv090x_car_width(u32 srate, enum stv090x_rolloff rolloff)
 954 {
 955         u32 ro;
 956
 957         switch (rolloff) {
 958         case STV090x_RO_20:
 959                 ro = 20;
 960                 break;
 961         case STV090x_RO_25:
 962                 ro = 25;
 963                 break;
 964         case STV090x_RO_35:
 965         default:
 966                 ro = 35;
 967                 break;
 968         }
 969
 970         return srate + (srate * ro) / 100;
 971 }
 972
 973 static int stv090x_set_vit_thacq(struct stv090x_state *state)
 974 {
 975         if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
 976                 goto err;
 977         if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
 978                 goto err;
 979         if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
 980                 goto err;
 981         if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
 982                 goto err;
 983         if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
 984                 goto err;
 985         if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
 986                 goto err;
 987         return 0;
 988 err:
 989         dprintk(FE_ERROR, 1, "I/O error");
 990         return -1;
 991 }
 992
 993 static int stv090x_set_vit_thtracq(struct stv090x_state *state)
 994 {
 995         if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
 996                 goto err;
 997         if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
 998                 goto err;
 999         if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
1000                 goto err;
1001         if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
1002                 goto err;
1003         if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
1004                 goto err;
1005         if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
1006                 goto err;
1007         return 0;
1008 err:
1009         dprintk(FE_ERROR, 1, "I/O error");
1010         return -1;
1011 }
1012
1013 static int stv090x_set_viterbi(struct stv090x_state *state)
1014 {
1015         switch (state->search_mode) {
1016         case STV090x_SEARCH_AUTO:
1017                 if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
1018                         goto err;
1019                 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
1020                         goto err;
1021                 break;
1022         case STV090x_SEARCH_DVBS1:
1023                 if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
1024                         goto err;
1025                 switch (state->fec) {
1026                 case STV090x_PR12:
1027                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
1028                                 goto err;
1029                         break;
1030
1031                 case STV090x_PR23:
1032                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
1033                                 goto err;
1034                         break;
1035
1036                 case STV090x_PR34:
1037                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
1038                                 goto err;
1039                         break;
1040
1041                 case STV090x_PR56:
1042                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
1043                                 goto err;
1044                         break;
1045
1046                 case STV090x_PR78:
1047                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
1048                                 goto err;
1049                         break;
1050
1051                 default:
1052                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
1053                                 goto err;
1054                         break;
1055                 }
1056                 break;
1057         case STV090x_SEARCH_DSS:
1058                 if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
1059                         goto err;
1060                 switch (state->fec) {
1061                 case STV090x_PR12:
1062                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
1063                                 goto err;
1064                         break;
1065
1066                 case STV090x_PR23:
1067                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
1068                                 goto err;
1069                         break;
1070
1071                 case STV090x_PR67:
1072                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
1073                                 goto err;
1074                         break;
1075
1076                 default:
1077                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
1078                                 goto err;
1079                         break;
1080                 }
1081                 break;
1082         default:
1083                 break;
1084         }
1085         return 0;
1086 err:
1087         dprintk(FE_ERROR, 1, "I/O error");
1088         return -1;
1089 }
1090
1091 static int stv090x_stop_modcod(struct stv090x_state *state)
1092 {
1093         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1094                 goto err;
1095         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
1096                 goto err;
1097         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
1098                 goto err;
1099         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
1100                 goto err;
1101         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
1102                 goto err;
1103         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
1104                 goto err;
1105         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
1106                 goto err;
1107         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
1108                 goto err;
1109         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
1110                 goto err;
1111         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
1112                 goto err;
1113         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
1114                 goto err;
1115         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
1116                 goto err;
1117         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
1118                 goto err;
1119         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
1120                 goto err;
1121         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
1122                 goto err;
1123         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
1124                 goto err;
1125         return 0;
1126 err:
1127         dprintk(FE_ERROR, 1, "I/O error");
1128         return -1;
1129 }
1130
1131 static int stv090x_activate_modcod(struct stv090x_state *state)
1132 {
1133         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1134                 goto err;
1135         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
1136                 goto err;
1137         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
1138                 goto err;
1139         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
1140                 goto err;
1141         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
1142                 goto err;
1143         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
1144                 goto err;
1145         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
1146                 goto err;
1147         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
1148                 goto err;
1149         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
1150                 goto err;
1151         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
1152                 goto err;
1153         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
1154                 goto err;
1155         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
1156                 goto err;
1157         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
1158                 goto err;
1159         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
1160                 goto err;
1161         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
1162                 goto err;
1163         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
1164                 goto err;
1165
1166         return 0;
1167 err:
1168         dprintk(FE_ERROR, 1, "I/O error");
1169         return -1;
1170 }
1171
1172 static int stv090x_activate_modcod_single(struct stv090x_state *state)
1173 {
1174
1175         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1176                 goto err;
1177         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xf0) < 0)
1178                 goto err;
1179         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0x00) < 0)
1180                 goto err;
1181         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0x00) < 0)
1182                 goto err;
1183         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0x00) < 0)
1184                 goto err;
1185         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0x00) < 0)
1186                 goto err;
1187         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0x00) < 0)
1188                 goto err;
1189         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0x00) < 0)
1190                 goto err;
1191         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0x00) < 0)
1192                 goto err;
1193         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0x00) < 0)
1194                 goto err;
1195         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0x00) < 0)
1196                 goto err;
1197         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0x00) < 0)
1198                 goto err;
1199         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0x00) < 0)
1200                 goto err;
1201         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0x00) < 0)
1202                 goto err;
1203         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0x00) < 0)
1204                 goto err;
1205         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0x0f) < 0)
1206                 goto err;
1207
1208         return 0;
1209
1210 err:
1211         dprintk(FE_ERROR, 1, "I/O error");
1212         return -1;
1213 }
1214
1215 static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
1216 {
1217         u32 reg;
1218
1219         switch (state->demod) {
1220         case STV090x_DEMODULATOR_0:
1221                 mutex_lock(&state->internal->demod_lock);
1222                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1223                 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
1224                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1225                         goto err;
1226                 mutex_unlock(&state->internal->demod_lock);
1227                 break;
1228
1229         case STV090x_DEMODULATOR_1:
1230                 mutex_lock(&state->internal->demod_lock);
1231                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1232                 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
1233                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1234                         goto err;
1235                 mutex_unlock(&state->internal->demod_lock);
1236                 break;
1237
1238         default:
1239                 dprintk(FE_ERROR, 1, "Wrong demodulator!");
1240                 break;
1241         }
1242         return 0;
1243 err:
1244         mutex_unlock(&state->internal->demod_lock);
1245         dprintk(FE_ERROR, 1, "I/O error");
1246         return -1;
1247 }
1248
1249 static int stv090x_dvbs_track_crl(struct stv090x_state *state)
1250 {
1251         if (state->internal->dev_ver >= 0x30) {
1252                 /* Set ACLC BCLC optimised value vs SR */
1253                 if (state->srate >= 15000000) {
1254                         if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0)
1255                                 goto err;
1256                         if (STV090x_WRITE_DEMOD(state, BCLC, 0x1a) < 0)
1257                                 goto err;
1258                 } else if ((state->srate >= 7000000) && (15000000 > state->srate)) {
1259                         if (STV090x_WRITE_DEMOD(state, ACLC, 0x0c) < 0)
1260                                 goto err;
1261                         if (STV090x_WRITE_DEMOD(state, BCLC, 0x1b) < 0)
1262                                 goto err;
1263                 } else if (state->srate < 7000000) {
1264                         if (STV090x_WRITE_DEMOD(state, ACLC, 0x2c) < 0)
1265                                 goto err;
1266                         if (STV090x_WRITE_DEMOD(state, BCLC, 0x1c) < 0)
1267                                 goto err;
1268                 }
1269
1270         } else {
1271                 /* Cut 2.0 */
1272                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1273                         goto err;
1274                 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1275                         goto err;
1276         }
1277         return 0;
1278 err:
1279         dprintk(FE_ERROR, 1, "I/O error");
1280         return -1;
1281 }
1282
1283 static int stv090x_delivery_search(struct stv090x_state *state)
1284 {
1285         u32 reg;
1286
1287         switch (state->search_mode) {
1288         case STV090x_SEARCH_DVBS1:
1289         case STV090x_SEARCH_DSS:
1290                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1291                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1292                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1293                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1294                         goto err;
1295
1296                 /* Activate Viterbi decoder in legacy search,
1297                  * do not use FRESVIT1, might impact VITERBI2
1298                  */
1299                 if (stv090x_vitclk_ctl(state, 0) < 0)
1300                         goto err;
1301
1302                 if (stv090x_dvbs_track_crl(state) < 0)
1303                         goto err;
1304
1305                 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
1306                         goto err;
1307
1308                 if (stv090x_set_vit_thacq(state) < 0)
1309                         goto err;
1310                 if (stv090x_set_viterbi(state) < 0)
1311                         goto err;
1312                 break;
1313
1314         case STV090x_SEARCH_DVBS2:
1315                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1316                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1317                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1318                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1319                         goto err;
1320                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1321                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1322                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1323                         goto err;
1324
1325                 if (stv090x_vitclk_ctl(state, 1) < 0)
1326                         goto err;
1327
1328                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
1329                         goto err;
1330                 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1331                         goto err;
1332
1333                 if (state->internal->dev_ver <= 0x20) {
1334                         /* enable S2 carrier loop */
1335                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1336                                 goto err;
1337                 } else {
1338                         /* > Cut 3: Stop carrier 3 */
1339                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1340                                 goto err;
1341                 }
1342
1343                 if (state->demod_mode != STV090x_SINGLE) {
1344                         /* Cut 2: enable link during search */
1345                         if (stv090x_activate_modcod(state) < 0)
1346                                 goto err;
1347                 } else {
1348                         /* Single demodulator
1349                          * Authorize SHORT and LONG frames,
1350                          * QPSK, 8PSK, 16APSK and 32APSK
1351                          */
1352                         if (stv090x_activate_modcod_single(state) < 0)
1353                                 goto err;
1354                 }
1355
1356                 if (stv090x_set_vit_thtracq(state) < 0)
1357                         goto err;
1358                 break;
1359
1360         case STV090x_SEARCH_AUTO:
1361         default:
1362                 /* enable DVB-S2 and DVB-S2 in Auto MODE */
1363                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1364                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1365                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1366                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1367                         goto err;
1368                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1369                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1370                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1371                         goto err;
1372
1373                 if (stv090x_vitclk_ctl(state, 0) < 0)
1374                         goto err;
1375
1376                 if (stv090x_dvbs_track_crl(state) < 0)
1377                         goto err;
1378
1379                 if (state->internal->dev_ver <= 0x20) {
1380                         /* enable S2 carrier loop */
1381                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1382                                 goto err;
1383                 } else {
1384                         /* > Cut 3: Stop carrier 3 */
1385                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1386                                 goto err;
1387                 }
1388
1389                 if (state->demod_mode != STV090x_SINGLE) {
1390                         /* Cut 2: enable link during search */
1391                         if (stv090x_activate_modcod(state) < 0)
1392                                 goto err;
1393                 } else {
1394                         /* Single demodulator
1395                          * Authorize SHORT and LONG frames,
1396                          * QPSK, 8PSK, 16APSK and 32APSK
1397                          */
1398                         if (stv090x_activate_modcod_single(state) < 0)
1399                                 goto err;
1400                 }
1401
1402                 if (stv090x_set_vit_thacq(state) < 0)
1403                         goto err;
1404
1405                 if (stv090x_set_viterbi(state) < 0)
1406                         goto err;
1407                 break;
1408         }
1409         return 0;
1410 err:
1411         dprintk(FE_ERROR, 1, "I/O error");
1412         return -1;
1413 }
1414
1415 static int stv090x_start_search(struct stv090x_state *state)
1416 {
1417         u32 reg, freq_abs;
1418         s16 freq;
1419
1420         /* Reset demodulator */
1421         reg = STV090x_READ_DEMOD(state, DMDISTATE);
1422         STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
1423         if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1424                 goto err;
1425
1426         if (state->internal->dev_ver <= 0x20) {
1427                 if (state->srate <= 5000000) {
1428                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
1429                                 goto err;
1430                         if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
1431                                 goto err;
1432                         if (STV090x_WRITE_DEMOD(state, CFRUP0, 0xff) < 0)
1433                                 goto err;
1434                         if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
1435                                 goto err;
1436                         if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
1437                                 goto err;
1438
1439                         /*enlarge the timing bandwidth for Low SR*/
1440                         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
1441                                 goto err;
1442                 } else {
1443                         /* If the symbol rate is >5 Msps
1444                         Set The carrier search up and low to auto mode */
1445                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1446                                 goto err;
1447                         /*reduce the timing bandwidth for high SR*/
1448                         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1449                                 goto err;
1450                 }
1451         } else {
1452                 /* >= Cut 3 */
1453                 if (state->srate <= 5000000) {
1454                         /* enlarge the timing bandwidth for Low SR */
1455                         STV090x_WRITE_DEMOD(state, RTCS2, 0x68);
1456                 } else {
1457                         /* reduce timing bandwidth for high SR */
1458                         STV090x_WRITE_DEMOD(state, RTCS2, 0x44);
1459                 }
1460
1461                 /* Set CFR min and max to manual mode */
1462                 STV090x_WRITE_DEMOD(state, CARCFG, 0x46);
1463
1464                 if (state->algo == STV090x_WARM_SEARCH) {
1465                         /* WARM Start
1466                          * CFR min = -1MHz,
1467                          * CFR max = +1MHz
1468                          */
1469                         freq_abs  = 1000 << 16;
1470                         freq_abs /= (state->internal->mclk / 1000);
1471                         freq      = (s16) freq_abs;
1472                 } else {
1473                         /* COLD Start
1474                          * CFR min =- (SearchRange / 2 + 600KHz)
1475                          * CFR max = +(SearchRange / 2 + 600KHz)
1476                          * (600KHz for the tuner step size)
1477                          */
1478                         freq_abs  = (state->search_range / 2000) + 600;
1479                         freq_abs  = freq_abs << 16;
1480                         freq_abs /= (state->internal->mclk / 1000);
1481                         freq      = (s16) freq_abs;
1482                 }
1483
1484                 if (STV090x_WRITE_DEMOD(state, CFRUP1, MSB(freq)) < 0)
1485                         goto err;
1486                 if (STV090x_WRITE_DEMOD(state, CFRUP0, LSB(freq)) < 0)
1487                         goto err;
1488
1489                 freq *= -1;
1490
1491                 if (STV090x_WRITE_DEMOD(state, CFRLOW1, MSB(freq)) < 0)
1492                         goto err;
1493                 if (STV090x_WRITE_DEMOD(state, CFRLOW0, LSB(freq)) < 0)
1494                         goto err;
1495
1496         }
1497
1498         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
1499                 goto err;
1500         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
1501                 goto err;
1502
1503         if (state->internal->dev_ver >= 0x20) {
1504                 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1505                         goto err;
1506                 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1507                         goto err;
1508
1509                 if ((state->search_mode == STV090x_SEARCH_DVBS1)        ||
1510                         (state->search_mode == STV090x_SEARCH_DSS)      ||
1511                         (state->search_mode == STV090x_SEARCH_AUTO)) {
1512
1513                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1514                                 goto err;
1515                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
1516                                 goto err;
1517                 }
1518         }
1519
1520         if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
1521                 goto err;
1522         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
1523                 goto err;
1524         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
1525                 goto err;
1526
1527         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1528         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1529         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1530         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1531                 goto err;
1532         reg = STV090x_READ_DEMOD(state, DMDCFG2);
1533         STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
1534         if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
1535                 goto err;
1536
1537         if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0)
1538                 goto err;
1539
1540         if (state->internal->dev_ver >= 0x20) {
1541                 /*Frequency offset detector setting*/
1542                 if (state->srate < 2000000) {
1543                         if (state->internal->dev_ver <= 0x20) {
1544                                 /* Cut 2 */
1545                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0)
1546                                         goto err;
1547                         } else {
1548                                 /* Cut 3 */
1549                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x89) < 0)
1550                                         goto err;
1551                         }
1552                         if (STV090x_WRITE_DEMOD(state, CARHDR, 0x40) < 0)
1553                                 goto err;
1554                 } else if (state->srate < 10000000) {
1555                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
1556                                 goto err;
1557                         if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
1558                                 goto err;
1559                 } else {
1560                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
1561                                 goto err;
1562                         if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
1563                                 goto err;
1564                 }
1565         } else {
1566                 if (state->srate < 10000000) {
1567                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
1568                                 goto err;
1569                 } else {
1570                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1571                                 goto err;
1572                 }
1573         }
1574
1575         switch (state->algo) {
1576         case STV090x_WARM_SEARCH:
1577                 /* The symbol rate and the exact
1578                  * carrier Frequency are known
1579                  */
1580                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1581                         goto err;
1582                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
1583                         goto err;
1584                 break;
1585
1586         case STV090x_COLD_SEARCH:
1587                 /* The symbol rate is known */
1588                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1589                         goto err;
1590                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1591                         goto err;
1592                 break;
1593
1594         default:
1595                 break;
1596         }
1597         return 0;
1598 err:
1599         dprintk(FE_ERROR, 1, "I/O error");
1600         return -1;
1601 }
1602
1603 static int stv090x_get_agc2_min_level(struct stv090x_state *state)
1604 {
1605         u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg;
1606         s32 i, j, steps, dir;
1607
1608         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1609                 goto err;
1610         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1611         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1612         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1613         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1614                 goto err;
1615
1616         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
1617                 goto err;
1618         if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1619                 goto err;
1620         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
1621                 goto err;
1622         if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1623                 goto err;
1624         if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
1625                 goto err;
1626         if (stv090x_set_srate(state, 1000000) < 0)
1627                 goto err;
1628
1629         steps  = state->search_range / 1000000;
1630         if (steps <= 0)
1631                 steps = 1;
1632
1633         dir = 1;
1634         freq_step = (1000000 * 256) / (state->internal->mclk / 256);
1635         freq_init = 0;
1636
1637         for (i = 0; i < steps; i++) {
1638                 if (dir > 0)
1639                         freq_init = freq_init + (freq_step * i);
1640                 else
1641                         freq_init = freq_init - (freq_step * i);
1642
1643                 dir *= -1;
1644
1645                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
1646                         goto err;
1647                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
1648                         goto err;
1649                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
1650                         goto err;
1651                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
1652                         goto err;
1653                 msleep(10);
1654
1655                 agc2 = 0;
1656                 for (j = 0; j < 10; j++) {
1657                         agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
1658                                 STV090x_READ_DEMOD(state, AGC2I0);
1659                 }
1660                 agc2 /= 10;
1661                 if (agc2 < agc2_min)
1662                         agc2_min = agc2;
1663         }
1664
1665         return agc2_min;
1666 err:
1667         dprintk(FE_ERROR, 1, "I/O error");
1668         return -1;
1669 }
1670
1671 static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
1672 {
1673         u8 r3, r2, r1, r0;
1674         s32 srate, int_1, int_2, tmp_1, tmp_2;
1675
1676         r3 = STV090x_READ_DEMOD(state, SFR3);
1677         r2 = STV090x_READ_DEMOD(state, SFR2);
1678         r1 = STV090x_READ_DEMOD(state, SFR1);
1679         r0 = STV090x_READ_DEMOD(state, SFR0);
1680
1681         srate = ((r3 << 24) | (r2 << 16) | (r1 <<  8) | r0);
1682
1683         int_1 = clk >> 16;
1684         int_2 = srate >> 16;
1685
1686         tmp_1 = clk % 0x10000;
1687         tmp_2 = srate % 0x10000;
1688
1689         srate = (int_1 * int_2) +
1690                 ((int_1 * tmp_2) >> 16) +
1691                 ((int_2 * tmp_1) >> 16);
1692
1693         return srate;
1694 }
1695
1696 static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1697 {
1698         struct dvb_frontend *fe = &state->frontend;
1699
1700         int tmg_lock = 0, i;
1701         s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
1702         u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
1703         u32 agc2th;
1704
1705         if (state->internal->dev_ver >= 0x30)
1706                 agc2th = 0x2e00;
1707         else
1708                 agc2th = 0x1f00;
1709
1710         reg = STV090x_READ_DEMOD(state, DMDISTATE);
1711         STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
1712         if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1713                 goto err;
1714         if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
1715                 goto err;
1716         if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0)
1717                 goto err;
1718         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
1719                 goto err;
1720         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
1721                 goto err;
1722         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1723         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1724         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1725         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1726                 goto err;
1727
1728         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
1729                 goto err;
1730         if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1731                 goto err;
1732         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
1733                 goto err;
1734         if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1735                 goto err;
1736         if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
1737                 goto err;
1738         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
1739                 goto err;
1740
1741         if (state->internal->dev_ver >= 0x30) {
1742                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0)
1743                         goto err;
1744                 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x98) < 0)
1745                         goto err;
1746
1747         } else if (state->internal->dev_ver >= 0x20) {
1748                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
1749                         goto err;
1750                 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
1751                         goto err;
1752         }
1753
1754         if (state->srate <= 2000000)
1755                 car_step = 1000;
1756         else if (state->srate <= 5000000)
1757                 car_step = 2000;
1758         else if (state->srate <= 12000000)
1759                 car_step = 3000;
1760         else
1761                 car_step = 5000;
1762
1763         steps  = -1 + ((state->search_range / 1000) / car_step);
1764         steps /= 2;
1765         steps  = (2 * steps) + 1;
1766         if (steps < 0)
1767                 steps = 1;
1768         else if (steps > 10) {
1769                 steps = 11;
1770                 car_step = (state->search_range / 1000) / 10;
1771         }
1772         cur_step = 0;
1773         dir = 1;
1774         freq = state->frequency;
1775
1776         while ((!tmg_lock) && (cur_step < steps)) {
1777                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
1778                         goto err;
1779                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
1780                         goto err;
1781                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1782                         goto err;
1783                 if (STV090x_WRITE_DEMOD(state, SFRINIT1, 0x00) < 0)
1784                         goto err;
1785                 if (STV090x_WRITE_DEMOD(state, SFRINIT0, 0x00) < 0)
1786                         goto err;
1787                 /* trigger acquisition */
1788                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x40) < 0)
1789                         goto err;
1790                 msleep(50);
1791                 for (i = 0; i < 10; i++) {
1792                         reg = STV090x_READ_DEMOD(state, DSTATUS);
1793                         if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1794                                 tmg_cpt++;
1795                         agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
1796                                 STV090x_READ_DEMOD(state, AGC2I0);
1797                 }
1798                 agc2 /= 10;
1799                 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1800                 cur_step++;
1801                 dir *= -1;
1802                 if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
1803                     (srate_coarse < 50000000) && (srate_coarse > 850000))
1804                         tmg_lock = 1;
1805                 else if (cur_step < steps) {
1806                         if (dir > 0)
1807                                 freq += cur_step * car_step;
1808                         else
1809                                 freq -= cur_step * car_step;
1810
1811                         /* Setup tuner */
1812                         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
1813                                 goto err;
1814
1815                         if (state->config->tuner_set_frequency) {
1816                                 if (state->config->tuner_set_frequency(fe, freq) < 0)
1817                                         goto err_gateoff;
1818                         }
1819
1820                         if (state->config->tuner_set_bandwidth) {
1821                                 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
1822                                         goto err_gateoff;
1823                         }
1824
1825                         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
1826                                 goto err;
1827
1828                         msleep(50);
1829
1830                         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
1831                                 goto err;
1832
1833                         if (state->config->tuner_get_status) {
1834                                 if (state->config->tuner_get_status(fe, &reg) < 0)
1835                                         goto err_gateoff;
1836                         }
1837
1838                         if (reg)
1839                                 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1840                         else
1841                                 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1842
1843                         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
1844                                 goto err;
1845
1846                 }
1847         }
1848         if (!tmg_lock)
1849                 srate_coarse = 0;
1850         else
1851                 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1852
1853         return srate_coarse;
1854
1855 err_gateoff:
1856         stv090x_i2c_gate_ctrl(state, 0);
1857 err:
1858         dprintk(FE_ERROR, 1, "I/O error");
1859         return -1;
1860 }
1861
1862 static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1863 {
1864         u32 srate_coarse, freq_coarse, sym, reg;
1865
1866         srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1867         freq_coarse  = STV090x_READ_DEMOD(state, CFR2) << 8;
1868         freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
1869         sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1870
1871         if (sym < state->srate)
1872                 srate_coarse = 0;
1873         else {
1874                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
1875                         goto err;
1876                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
1877                         goto err;
1878                 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1879                         goto err;
1880                 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1881                         goto err;
1882                 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
1883                         goto err;
1884                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1885                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
1886                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1887                         goto err;
1888
1889                 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1890                         goto err;
1891
1892                 if (state->internal->dev_ver >= 0x30) {
1893                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
1894                                 goto err;
1895                 } else if (state->internal->dev_ver >= 0x20) {
1896                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
1897                                 goto err;
1898                 }
1899
1900                 if (srate_coarse > 3000000) {
1901                         sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1902                         sym  = (sym / 1000) * 65536;
1903                         sym /= (state->internal->mclk / 1000);
1904                         if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1905                                 goto err;
1906                         if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1907                                 goto err;
1908                         sym  = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
1909                         sym  = (sym / 1000) * 65536;
1910                         sym /= (state->internal->mclk / 1000);
1911                         if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1912                                 goto err;
1913                         if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1914                                 goto err;
1915                         sym  = (srate_coarse / 1000) * 65536;
1916                         sym /= (state->internal->mclk / 1000);
1917                         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1918                                 goto err;
1919                         if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1920                                 goto err;
1921                 } else {
1922                         sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1923                         sym  = (sym / 100) * 65536;
1924                         sym /= (state->internal->mclk / 100);
1925                         if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1926                                 goto err;
1927                         if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1928                                 goto err;
1929                         sym  = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
1930                         sym  = (sym / 100) * 65536;
1931                         sym /= (state->internal->mclk / 100);
1932                         if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1933                                 goto err;
1934                         if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1935                                 goto err;
1936                         sym  = (srate_coarse / 100) * 65536;
1937                         sym /= (state->internal->mclk / 100);
1938                         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1939                                 goto err;
1940                         if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1941                                 goto err;
1942                 }
1943                 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
1944                         goto err;
1945                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
1946                         goto err;
1947                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
1948                         goto err;
1949                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
1950                         goto err;
1951         }
1952
1953         return srate_coarse;
1954
1955 err:
1956         dprintk(FE_ERROR, 1, "I/O error");
1957         return -1;
1958 }
1959
1960 static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
1961 {
1962         s32 timer = 0, lock = 0;
1963         u32 reg;
1964         u8 stat;
1965
1966         while ((timer < timeout) && (!lock)) {
1967                 reg = STV090x_READ_DEMOD(state, DMDSTATE);
1968                 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
1969
1970                 switch (stat) {
1971                 case 0: /* searching */
1972                 case 1: /* first PLH detected */
1973                 default:
1974                         dprintk(FE_DEBUG, 1, "Demodulator searching ..");
1975                         lock = 0;
1976                         break;
1977                 case 2: /* DVB-S2 mode */
1978                 case 3: /* DVB-S1/legacy mode */
1979                         reg = STV090x_READ_DEMOD(state, DSTATUS);
1980                         lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
1981                         break;
1982                 }
1983
1984                 if (!lock)
1985                         msleep(10);
1986                 else
1987                         dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
1988
1989                 timer += 10;
1990         }
1991         return lock;
1992 }
1993
1994 static int stv090x_blind_search(struct stv090x_state *state)
1995 {
1996         u32 agc2, reg, srate_coarse;
1997         s32 cpt_fail, agc2_ovflw, i;
1998         u8 k_ref, k_max, k_min;
1999         int coarse_fail = 0;
2000         int lock;
2001
2002         k_max = 110;
2003         k_min = 10;
2004
2005         agc2 = stv090x_get_agc2_min_level(state);
2006
2007         if (agc2 > STV090x_SEARCH_AGC2_TH(state->internal->dev_ver)) {
2008                 lock = 0;
2009         } else {
2010
2011                 if (state->internal->dev_ver <= 0x20) {
2012                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
2013                                 goto err;
2014                 } else {
2015                         /* > Cut 3 */
2016                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0x06) < 0)
2017                                 goto err;
2018                 }
2019
2020                 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
2021                         goto err;
2022
2023                 if (state->internal->dev_ver >= 0x20) {
2024                         if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
2025                                 goto err;
2026                         if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
2027                                 goto err;
2028                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
2029                                 goto err;
2030                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
2031                                 goto err;
2032                 }
2033
2034                 k_ref = k_max;
2035                 do {
2036                         if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
2037                                 goto err;
2038                         if (stv090x_srate_srch_coarse(state) != 0) {
2039                                 srate_coarse = stv090x_srate_srch_fine(state);
2040                                 if (srate_coarse != 0) {
2041                                         stv090x_get_lock_tmg(state);
2042                                         lock = stv090x_get_dmdlock(state,
2043                                                         state->DemodTimeout);
2044                                 } else {
2045                                         lock = 0;
2046                                 }
2047                         } else {
2048                                 cpt_fail = 0;
2049                                 agc2_ovflw = 0;
2050                                 for (i = 0; i < 10; i++) {
2051                                         agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
2052                                                 STV090x_READ_DEMOD(state, AGC2I0);
2053                                         if (agc2 >= 0xff00)
2054                                                 agc2_ovflw++;
2055                                         reg = STV090x_READ_DEMOD(state, DSTATUS2);
2056                                         if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
2057                                             (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
2058
2059                                                 cpt_fail++;
2060                                 }
2061                                 if ((cpt_fail > 7) || (agc2_ovflw > 7))
2062                                         coarse_fail = 1;
2063
2064                                 lock = 0;
2065                         }
2066                         k_ref -= 20;
2067                 } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
2068         }
2069
2070         return lock;
2071
2072 err:
2073         dprintk(FE_ERROR, 1, "I/O error");
2074         return -1;
2075 }
2076
2077 static int stv090x_chk_tmg(struct stv090x_state *state)
2078 {
2079         u32 reg;
2080         s32 tmg_cpt = 0, i;
2081         u8 freq, tmg_thh, tmg_thl;
2082         int tmg_lock = 0;
2083
2084         freq = STV090x_READ_DEMOD(state, CARFREQ);
2085         tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
2086         tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
2087         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
2088                 goto err;
2089         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
2090                 goto err;
2091
2092         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2093         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
2094         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2095                 goto err;
2096         if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
2097                 goto err;
2098
2099         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
2100                 goto err;
2101         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
2102                 goto err;
2103
2104         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
2105                 goto err;
2106         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
2107                 goto err;
2108         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
2109                 goto err;
2110
2111         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
2112                 goto err;
2113         msleep(10);
2114
2115         for (i = 0; i < 10; i++) {
2116                 reg = STV090x_READ_DEMOD(state, DSTATUS);
2117                 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
2118                         tmg_cpt++;
2119                 msleep(1);
2120         }
2121         if (tmg_cpt >= 3)
2122                 tmg_lock = 1;
2123
2124         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
2125                 goto err;
2126         if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
2127                 goto err;
2128         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
2129                 goto err;
2130
2131         if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
2132                 goto err;
2133         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
2134                 goto err;
2135         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
2136                 goto err;
2137
2138         return  tmg_lock;
2139
2140 err:
2141         dprintk(FE_ERROR, 1, "I/O error");
2142         return -1;
2143 }
2144
2145 static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
2146 {
2147         struct dvb_frontend *fe = &state->frontend;
2148
2149         u32 reg;
2150         s32 car_step, steps, cur_step, dir, freq, timeout_lock;
2151         int lock;
2152
2153         if (state->srate >= 10000000)
2154                 timeout_lock = timeout_dmd / 3;
2155         else
2156                 timeout_lock = timeout_dmd / 2;
2157
2158         lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
2159         if (lock)
2160                 return lock;
2161
2162         if (state->srate >= 10000000) {
2163                 if (stv090x_chk_tmg(state)) {
2164                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2165                                 goto err;
2166                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2167                                 goto err;
2168                         return stv090x_get_dmdlock(state, timeout_dmd);
2169                 }
2170                 return 0;
2171         }
2172
2173         if (state->srate <= 4000000)
2174                 car_step = 1000;
2175         else if (state->srate <= 7000000)
2176                 car_step = 2000;
2177         else if (state->srate <= 10000000)
2178                 car_step = 3000;
2179         else
2180                 car_step = 5000;
2181
2182         steps  = (state->search_range / 1000) / car_step;
2183         steps /= 2;
2184         steps  = 2 * (steps + 1);
2185         if (steps < 0)
2186                 steps = 2;
2187         else if (steps > 12)
2188                 steps = 12;
2189
2190         cur_step = 1;
2191         dir = 1;
2192
2193         freq = state->frequency;
2194         state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
2195         while ((cur_step <= steps) && (!lock)) {
2196                 if (dir > 0)
2197                         freq += cur_step * car_step;
2198                 else
2199                         freq -= cur_step * car_step;
2200
2201                 /* Setup tuner */
2202                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2203                         goto err;
2204
2205                 if (state->config->tuner_set_frequency) {
2206                         if (state->config->tuner_set_frequency(fe, freq) < 0)
2207                                 goto err_gateoff;
2208                 }
2209
2210                 if (state->config->tuner_set_bandwidth) {
2211                         if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
2212                                 goto err_gateoff;
2213                 }
2214
2215                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2216                         goto err;
2217
2218                 msleep(50);
2219
2220                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2221                         goto err;
2222
2223                 if (state->config->tuner_get_status) {
2224                         if (state->config->tuner_get_status(fe, &reg) < 0)
2225                                 goto err_gateoff;
2226                 }
2227
2228                 if (reg)
2229                         dprintk(FE_DEBUG, 1, "Tuner phase locked");
2230                 else
2231                         dprintk(FE_DEBUG, 1, "Tuner unlocked");
2232
2233                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2234                         goto err;
2235
2236                 STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
2237                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
2238                         goto err;
2239                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
2240                         goto err;
2241                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2242                         goto err;
2243                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2244                         goto err;
2245                 lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
2246
2247                 dir *= -1;
2248                 cur_step++;
2249         }
2250
2251         return lock;
2252
2253 err_gateoff:
2254         stv090x_i2c_gate_ctrl(state, 0);
2255 err:
2256         dprintk(FE_ERROR, 1, "I/O error");
2257         return -1;
2258 }
2259
2260 static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
2261 {
2262         s32 timeout, inc, steps_max, srate, car_max;
2263
2264         srate = state->srate;
2265         car_max = state->search_range / 1000;
2266         car_max += car_max / 10;
2267         car_max  = 65536 * (car_max / 2);
2268         car_max /= (state->internal->mclk / 1000);
2269
2270         if (car_max > 0x4000)
2271                 car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
2272
2273         inc  = srate;
2274         inc /= state->internal->mclk / 1000;
2275         inc *= 256;
2276         inc *= 256;
2277         inc /= 1000;
2278
2279         switch (state->search_mode) {
2280         case STV090x_SEARCH_DVBS1:
2281         case STV090x_SEARCH_DSS:
2282                 inc *= 3; /* freq step = 3% of srate */
2283                 timeout = 20;
2284                 break;
2285
2286         case STV090x_SEARCH_DVBS2:
2287                 inc *= 4;
2288                 timeout = 25;
2289                 break;
2290
2291         case STV090x_SEARCH_AUTO:
2292         default:
2293                 inc *= 3;
2294                 timeout = 25;
2295                 break;
2296         }
2297         inc /= 100;
2298         if ((inc > car_max) || (inc < 0))
2299                 inc = car_max / 2; /* increment <= 1/8 Mclk */
2300
2301         timeout *= 27500; /* 27.5 Msps reference */
2302         if (srate > 0)
2303                 timeout /= (srate / 1000);
2304
2305         if ((timeout > 100) || (timeout < 0))
2306                 timeout = 100;
2307
2308         steps_max = (car_max / inc) + 1; /* min steps = 3 */
2309         if ((steps_max > 100) || (steps_max < 0)) {
2310                 steps_max = 100; /* max steps <= 100 */
2311                 inc = car_max / steps_max;
2312         }
2313         *freq_inc = inc;
2314         *timeout_sw = timeout;
2315         *steps = steps_max;
2316
2317         return 0;
2318 }
2319
2320 static int stv090x_chk_signal(struct stv090x_state *state)
2321 {
2322         s32 offst_car, agc2, car_max;
2323         int no_signal;
2324
2325         offst_car  = STV090x_READ_DEMOD(state, CFR2) << 8;
2326         offst_car |= STV090x_READ_DEMOD(state, CFR1);
2327         offst_car = comp2(offst_car, 16);
2328
2329         agc2  = STV090x_READ_DEMOD(state, AGC2I1) << 8;
2330         agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
2331         car_max = state->search_range / 1000;
2332
2333         car_max += (car_max / 10); /* 10% margin */
2334         car_max  = (65536 * car_max / 2);
2335         car_max /= state->internal->mclk / 1000;
2336
2337         if (car_max > 0x4000)
2338                 car_max = 0x4000;
2339
2340         if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
2341                 no_signal = 1;
2342                 dprintk(FE_DEBUG, 1, "No Signal");
2343         } else {
2344                 no_signal = 0;
2345                 dprintk(FE_DEBUG, 1, "Found Signal");
2346         }
2347
2348         return no_signal;
2349 }
2350
2351 static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
2352 {
2353         int no_signal, lock = 0;
2354         s32 cpt_step = 0, offst_freq, car_max;
2355         u32 reg;
2356
2357         car_max  = state->search_range / 1000;
2358         car_max += (car_max / 10);
2359         car_max  = (65536 * car_max / 2);
2360         car_max /= (state->internal->mclk / 1000);
2361         if (car_max > 0x4000)
2362                 car_max = 0x4000;
2363
2364         if (zigzag)
2365                 offst_freq = 0;
2366         else
2367                 offst_freq = -car_max + inc;
2368
2369         do {
2370                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2371                         goto err;
2372                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
2373                         goto err;
2374                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
2375                         goto err;
2376                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2377                         goto err;
2378
2379                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2380                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
2381                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2382                         goto err;
2383
2384                 if (zigzag) {
2385                         if (offst_freq >= 0)
2386                                 offst_freq = -offst_freq - 2 * inc;
2387                         else
2388                                 offst_freq = -offst_freq;
2389                 } else {
2390                         offst_freq += 2 * inc;
2391                 }
2392
2393                 cpt_step++;
2394
2395                 lock = stv090x_get_dmdlock(state, timeout);
2396                 no_signal = stv090x_chk_signal(state);
2397
2398         } while ((!lock) &&
2399                  (!no_signal) &&
2400                   ((offst_freq - inc) < car_max) &&
2401                   ((offst_freq + inc) > -car_max) &&
2402                   (cpt_step < steps_max));
2403
2404         reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2405         STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
2406         if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2407                         goto err;
2408
2409         return lock;
2410 err:
2411         dprintk(FE_ERROR, 1, "I/O error");
2412         return -1;
2413 }
2414
2415 static int stv090x_sw_algo(struct stv090x_state *state)
2416 {
2417         int no_signal, zigzag, lock = 0;
2418         u32 reg;
2419
2420         s32 dvbs2_fly_wheel;
2421         s32 inc, timeout_step, trials, steps_max;
2422
2423         /* get params */
2424         stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max);
2425
2426         switch (state->search_mode) {
2427         case STV090x_SEARCH_DVBS1:
2428         case STV090x_SEARCH_DSS:
2429                 /* accelerate the frequency detector */
2430                 if (state->internal->dev_ver >= 0x20) {
2431                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
2432                                 goto err;
2433                 }
2434
2435                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
2436                         goto err;
2437                 zigzag = 0;
2438                 break;
2439
2440         case STV090x_SEARCH_DVBS2:
2441                 if (state->internal->dev_ver >= 0x20) {
2442                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2443                                 goto err;
2444                 }
2445
2446                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2447                         goto err;
2448                 zigzag = 1;
2449                 break;
2450
2451         case STV090x_SEARCH_AUTO:
2452         default:
2453                 /* accelerate the frequency detector */
2454                 if (state->internal->dev_ver >= 0x20) {
2455                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
2456                                 goto err;
2457                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2458                                 goto err;
2459                 }
2460
2461                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0)
2462                         goto err;
2463                 zigzag = 0;
2464                 break;
2465         }
2466
2467         trials = 0;
2468         do {
2469                 lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
2470                 no_signal = stv090x_chk_signal(state);
2471                 trials++;
2472
2473                 /*run the SW search 2 times maximum*/
2474                 if (lock || no_signal || (trials == 2)) {
2475                         /*Check if the demod is not losing lock in DVBS2*/
2476                         if (state->internal->dev_ver >= 0x20) {
2477                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2478                                         goto err;
2479                                 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
2480                                         goto err;
2481                         }
2482
2483                         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2484                         if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
2485                                 /*Check if the demod is not losing lock in DVBS2*/
2486                                 msleep(timeout_step);
2487                                 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2488                                 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2489                                 if (dvbs2_fly_wheel < 0xd) {     /*if correct frames is decrementing */
2490                                         msleep(timeout_step);
2491                                         reg = STV090x_READ_DEMOD(state, DMDFLYW);
2492                                         dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2493                                 }
2494                                 if (dvbs2_fly_wheel < 0xd) {
2495                                         /*FALSE lock, The demod is losing lock */
2496                                         lock = 0;
2497                                         if (trials < 2) {
2498                                                 if (state->internal->dev_ver >= 0x20) {
2499                                                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2500                                                                 goto err;
2501                                                 }
2502
2503                                                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2504                                                         goto err;
2505                                         }
2506                                 }
2507                         }
2508                 }
2509         } while ((!lock) && (trials < 2) && (!no_signal));
2510
2511         return lock;
2512 err:
2513         dprintk(FE_ERROR, 1, "I/O error");
2514         return -1;
2515 }
2516
2517 static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
2518 {
2519         u32 reg;
2520         enum stv090x_delsys delsys;
2521
2522         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2523         if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
2524                 delsys = STV090x_DVBS2;
2525         else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
2526                 reg = STV090x_READ_DEMOD(state, FECM);
2527                 if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
2528                         delsys = STV090x_DSS;
2529                 else
2530                         delsys = STV090x_DVBS1;
2531         } else {
2532                 delsys = STV090x_ERROR;
2533         }
2534
2535         return delsys;
2536 }
2537
2538 /* in Hz */
2539 static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
2540 {
2541         s32 derot, int_1, int_2, tmp_1, tmp_2;
2542
2543         derot  = STV090x_READ_DEMOD(state, CFR2) << 16;
2544         derot |= STV090x_READ_DEMOD(state, CFR1) <<  8;
2545         derot |= STV090x_READ_DEMOD(state, CFR0);
2546
2547         derot = comp2(derot, 24);
2548         int_1 = mclk >> 12;
2549         int_2 = derot >> 12;
2550
2551         /* carrier_frequency = MasterClock * Reg / 2^24 */
2552         tmp_1 = mclk % 0x1000;
2553         tmp_2 = derot % 0x1000;
2554
2555         derot = (int_1 * int_2) +
2556                 ((int_1 * tmp_2) >> 12) +
2557                 ((int_2 * tmp_1) >> 12);
2558
2559         return derot;
2560 }
2561
2562 static int stv090x_get_viterbi(struct stv090x_state *state)
2563 {
2564         u32 reg, rate;
2565
2566         reg = STV090x_READ_DEMOD(state, VITCURPUN);
2567         rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
2568
2569         switch (rate) {
2570         case 13:
2571                 state->fec = STV090x_PR12;
2572                 break;
2573
2574         case 18:
2575                 state->fec = STV090x_PR23;
2576                 break;
2577
2578         case 21:
2579                 state->fec = STV090x_PR34;
2580                 break;
2581
2582         case 24:
2583                 state->fec = STV090x_PR56;
2584                 break;
2585
2586         case 25:
2587                 state->fec = STV090x_PR67;
2588                 break;
2589
2590         case 26:
2591                 state->fec = STV090x_PR78;
2592                 break;
2593
2594         default:
2595                 state->fec = STV090x_PRERR;
2596                 break;
2597         }
2598
2599         return 0;
2600 }
2601
2602 static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
2603 {
2604         struct dvb_frontend *fe = &state->frontend;
2605
2606         u8 tmg;
2607         u32 reg;
2608         s32 i = 0, offst_freq;
2609
2610         msleep(5);
2611
2612         if (state->algo == STV090x_BLIND_SEARCH) {
2613                 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2614                 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
2615                 while ((i <= 50) && (tmg != 0) && (tmg != 0xff)) {
2616                         tmg = STV090x_READ_DEMOD(state, TMGREG2);
2617                         msleep(5);
2618                         i += 5;
2619                 }
2620         }
2621         state->delsys = stv090x_get_std(state);
2622
2623         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2624                 goto err;
2625
2626         if (state->config->tuner_get_frequency) {
2627                 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2628                         goto err_gateoff;
2629         }
2630
2631         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2632                 goto err;
2633
2634         offst_freq = stv090x_get_car_freq(state, state->internal->mclk) / 1000;
2635         state->frequency += offst_freq;
2636
2637         if (stv090x_get_viterbi(state) < 0)
2638                 goto err;
2639
2640         reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2641         state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2642         state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2643         state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
2644         reg = STV090x_READ_DEMOD(state, TMGOBS);
2645         state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2646         reg = STV090x_READ_DEMOD(state, FECM);
2647         state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
2648
2649         if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
2650
2651                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2652                         goto err;
2653
2654                 if (state->config->tuner_get_frequency) {
2655                         if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2656                                 goto err_gateoff;
2657                 }
2658
2659                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2660                         goto err;
2661
2662                 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2663                         return STV090x_RANGEOK;
2664                 else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
2665                         return STV090x_RANGEOK;
2666         } else {
2667                 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2668                         return STV090x_RANGEOK;
2669         }
2670
2671         return STV090x_OUTOFRANGE;
2672
2673 err_gateoff:
2674         stv090x_i2c_gate_ctrl(state, 0);
2675 err:
2676         dprintk(FE_ERROR, 1, "I/O error");
2677         return -1;
2678 }
2679
2680 static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
2681 {
2682         s32 offst_tmg;
2683
2684         offst_tmg  = STV090x_READ_DEMOD(state, TMGREG2) << 16;
2685         offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) <<  8;
2686         offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
2687
2688         offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
2689         if (!offst_tmg)
2690                 offst_tmg = 1;
2691
2692         offst_tmg  = ((s32) srate * 10) / ((s32) 0x1000000 / offst_tmg);
2693         offst_tmg /= 320;
2694
2695         return offst_tmg;
2696 }
2697
2698 static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
2699 {
2700         u8 aclc = 0x29;
2701         s32 i;
2702         struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low;
2703
2704         if (state->internal->dev_ver == 0x20) {
2705                 car_loop                = stv090x_s2_crl_cut20;
2706                 car_loop_qpsk_low       = stv090x_s2_lowqpsk_crl_cut20;
2707                 car_loop_apsk_low       = stv090x_s2_apsk_crl_cut20;
2708         } else {
2709                 /* >= Cut 3 */
2710                 car_loop                = stv090x_s2_crl_cut30;
2711                 car_loop_qpsk_low       = stv090x_s2_lowqpsk_crl_cut30;
2712                 car_loop_apsk_low       = stv090x_s2_apsk_crl_cut30;
2713         }
2714
2715         if (modcod < STV090x_QPSK_12) {
2716                 i = 0;
2717                 while ((i < 3) && (modcod != car_loop_qpsk_low[i].modcod))
2718                         i++;
2719
2720                 if (i >= 3)
2721                         i = 2;
2722
2723         } else {
2724                 i = 0;
2725                 while ((i < 14) && (modcod != car_loop[i].modcod))
2726                         i++;
2727
2728                 if (i >= 14) {
2729                         i = 0;
2730                         while ((i < 11) && (modcod != car_loop_apsk_low[i].modcod))
2731                                 i++;
2732
2733                         if (i >= 11)
2734                                 i = 10;
2735                 }
2736         }
2737
2738         if (modcod <= STV090x_QPSK_25) {
2739                 if (pilots) {
2740                         if (state->srate <= 3000000)
2741                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_2;
2742                         else if (state->srate <= 7000000)
2743                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_5;
2744                         else if (state->srate <= 15000000)
2745                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_10;
2746                         else if (state->srate <= 25000000)
2747                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_20;
2748                         else
2749                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_30;
2750                 } else {
2751                         if (state->srate <= 3000000)
2752                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_2;
2753                         else if (state->srate <= 7000000)
2754                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_5;
2755                         else if (state->srate <= 15000000)
2756                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_10;
2757                         else if (state->srate <= 25000000)
2758                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_20;
2759                         else
2760                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_30;
2761                 }
2762
2763         } else if (modcod <= STV090x_8PSK_910) {
2764                 if (pilots) {
2765                         if (state->srate <= 3000000)
2766                                 aclc = car_loop[i].crl_pilots_on_2;
2767                         else if (state->srate <= 7000000)
2768                                 aclc = car_loop[i].crl_pilots_on_5;
2769                         else if (state->srate <= 15000000)
2770                                 aclc = car_loop[i].crl_pilots_on_10;
2771                         else if (state->srate <= 25000000)
2772                                 aclc = car_loop[i].crl_pilots_on_20;
2773                         else
2774                                 aclc = car_loop[i].crl_pilots_on_30;
2775                 } else {
2776                         if (state->srate <= 3000000)
2777                                 aclc = car_loop[i].crl_pilots_off_2;
2778                         else if (state->srate <= 7000000)
2779                                 aclc = car_loop[i].crl_pilots_off_5;
2780                         else if (state->srate <= 15000000)
2781                                 aclc = car_loop[i].crl_pilots_off_10;
2782                         else if (state->srate <= 25000000)
2783                                 aclc = car_loop[i].crl_pilots_off_20;
2784                         else
2785                                 aclc = car_loop[i].crl_pilots_off_30;
2786                 }
2787         } else { /* 16APSK and 32APSK */
2788                 /*
2789                  * This should never happen in practice, except if
2790                  * something is really wrong at the car_loop table.
2791                  */
2792                 if (i >= 11)
2793                         i = 10;
2794                 if (state->srate <= 3000000)
2795                         aclc = car_loop_apsk_low[i].crl_pilots_on_2;
2796                 else if (state->srate <= 7000000)
2797                         aclc = car_loop_apsk_low[i].crl_pilots_on_5;
2798                 else if (state->srate <= 15000000)
2799                         aclc = car_loop_apsk_low[i].crl_pilots_on_10;
2800                 else if (state->srate <= 25000000)
2801                         aclc = car_loop_apsk_low[i].crl_pilots_on_20;
2802                 else
2803                         aclc = car_loop_apsk_low[i].crl_pilots_on_30;
2804         }
2805
2806         return aclc;
2807 }
2808
2809 static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
2810 {
2811         struct stv090x_short_frame_crloop *short_crl = NULL;
2812         s32 index = 0;
2813         u8 aclc = 0x0b;
2814
2815         switch (state->modulation) {
2816         case STV090x_QPSK:
2817         default:
2818                 index = 0;
2819                 break;
2820         case STV090x_8PSK:
2821                 index = 1;
2822                 break;
2823         case STV090x_16APSK:
2824                 index = 2;
2825                 break;
2826         case STV090x_32APSK:
2827                 index = 3;
2828                 break;
2829         }
2830
2831         if (state->internal->dev_ver >= 0x30) {
2832                 /* Cut 3.0 and up */
2833                 short_crl = stv090x_s2_short_crl_cut30;
2834         } else {
2835                 /* Cut 2.0 and up: we don't support cuts older than 2.0 */
2836                 short_crl = stv090x_s2_short_crl_cut20;
2837         }
2838
2839         if (state->srate <= 3000000)
2840                 aclc = short_crl[index].crl_2;
2841         else if (state->srate <= 7000000)
2842                 aclc = short_crl[index].crl_5;
2843         else if (state->srate <= 15000000)
2844                 aclc = short_crl[index].crl_10;
2845         else if (state->srate <= 25000000)
2846                 aclc = short_crl[index].crl_20;
2847         else
2848                 aclc = short_crl[index].crl_30;
2849
2850         return aclc;
2851 }
2852
2853 static int stv090x_optimize_track(struct stv090x_state *state)
2854 {
2855         struct dvb_frontend *fe = &state->frontend;
2856
2857         enum stv090x_modcod modcod;
2858
2859         s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
2860         u32 reg;
2861
2862         srate  = stv090x_get_srate(state, state->internal->mclk);
2863         srate += stv090x_get_tmgoffst(state, srate);
2864
2865         switch (state->delsys) {
2866         case STV090x_DVBS1:
2867         case STV090x_DSS:
2868                 if (state->search_mode == STV090x_SEARCH_AUTO) {
2869                         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2870                         STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2871                         STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2872                         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2873                                 goto err;
2874                 }
2875                 reg = STV090x_READ_DEMOD(state, DEMOD);
2876                 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
2877                 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x01);
2878                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2879                         goto err;
2880
2881                 if (state->internal->dev_ver >= 0x30) {
2882                         if (stv090x_get_viterbi(state) < 0)
2883                                 goto err;
2884
2885                         if (state->fec == STV090x_PR12) {
2886                                 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x98) < 0)
2887                                         goto err;
2888                                 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2889                                         goto err;
2890                         } else {
2891                                 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x18) < 0)
2892                                         goto err;
2893                                 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2894                                         goto err;
2895                         }
2896                 }
2897
2898                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
2899                         goto err;
2900                 break;
2901
2902         case STV090x_DVBS2:
2903                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2904                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
2905                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2906                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2907                         goto err;
2908                 if (state->internal->dev_ver >= 0x30) {
2909                         if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
2910                                 goto err;
2911                         if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
2912                                 goto err;
2913                 }
2914                 if (state->frame_len == STV090x_LONG_FRAME) {
2915                         reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2916                         modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2917                         pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2918                         aclc = stv090x_optimize_carloop(state, modcod, pilots);
2919                         if (modcod <= STV090x_QPSK_910) {
2920                                 STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
2921                         } else if (modcod <= STV090x_8PSK_910) {
2922                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2923                                         goto err;
2924                                 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2925                                         goto err;
2926                         }
2927                         if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
2928                                 if (modcod <= STV090x_16APSK_910) {
2929                                         if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2930                                                 goto err;
2931                                         if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2932                                                 goto err;
2933                                 } else {
2934                                         if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2935                                                 goto err;
2936                                         if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2937                                                 goto err;
2938                                 }
2939                         }
2940                 } else {
2941                         /*Carrier loop setting for short frame*/
2942                         aclc = stv090x_optimize_carloop_short(state);
2943                         if (state->modulation == STV090x_QPSK) {
2944                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
2945                                         goto err;
2946                         } else if (state->modulation == STV090x_8PSK) {
2947                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2948                                         goto err;
2949                                 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2950                                         goto err;
2951                         } else if (state->modulation == STV090x_16APSK) {
2952                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2953                                         goto err;
2954                                 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2955                                         goto err;
2956                         } else if (state->modulation == STV090x_32APSK)  {
2957                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2958                                         goto err;
2959                                 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2960                                         goto err;
2961                         }
2962                 }
2963
2964                 STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
2965                 break;
2966
2967         case STV090x_ERROR:
2968         default:
2969                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2970                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2971                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2972                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2973                         goto err;
2974                 break;
2975         }
2976
2977         f_1 = STV090x_READ_DEMOD(state, CFR2);
2978         f_0 = STV090x_READ_DEMOD(state, CFR1);
2979         reg = STV090x_READ_DEMOD(state, TMGOBS);
2980
2981         if (state->algo == STV090x_BLIND_SEARCH) {
2982                 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
2983                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2984                 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
2985                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
2986                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2987                         goto err;
2988                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
2989                         goto err;
2990
2991                 if (stv090x_set_srate(state, srate) < 0)
2992                         goto err;
2993                 blind_tune = 1;
2994
2995                 if (stv090x_dvbs_track_crl(state) < 0)
2996                         goto err;
2997         }
2998
2999         if (state->internal->dev_ver >= 0x20) {
3000                 if ((state->search_mode == STV090x_SEARCH_DVBS1)        ||
3001                     (state->search_mode == STV090x_SEARCH_DSS)          ||
3002                     (state->search_mode == STV090x_SEARCH_AUTO)) {
3003
3004                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
3005                                 goto err;
3006                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
3007                                 goto err;
3008                 }
3009         }
3010
3011         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
3012                 goto err;
3013
3014         /* AUTO tracking MODE */
3015         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x80) < 0)
3016                 goto err;
3017         /* AUTO tracking MODE */
3018         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0)
3019                 goto err;
3020
3021         if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1) ||
3022             (state->srate < 10000000)) {
3023                 /* update initial carrier freq with the found freq offset */
3024                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
3025                         goto err;
3026                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
3027                         goto err;
3028                 state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
3029
3030                 if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1)) {
3031
3032                         if (state->algo != STV090x_WARM_SEARCH) {
3033
3034                                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3035                                         goto err;
3036
3037                                 if (state->config->tuner_set_bandwidth) {
3038                                         if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
3039                                                 goto err_gateoff;
3040                                 }
3041
3042                                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3043                                         goto err;
3044
3045                         }
3046                 }
3047                 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
3048                         msleep(50); /* blind search: wait 50ms for SR stabilization */
3049                 else
3050                         msleep(5);
3051
3052                 stv090x_get_lock_tmg(state);
3053
3054                 if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
3055                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
3056                                 goto err;
3057                         if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
3058                                 goto err;
3059                         if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
3060                                 goto err;
3061                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
3062                                 goto err;
3063
3064                         i = 0;
3065
3066                         while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
3067
3068                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
3069                                         goto err;
3070                                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
3071                                         goto err;
3072                                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
3073                                         goto err;
3074                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
3075                                         goto err;
3076                                 i++;
3077                         }
3078                 }
3079
3080         }
3081
3082         if (state->internal->dev_ver >= 0x20) {
3083                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
3084                         goto err;
3085         }
3086
3087         if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
3088                 stv090x_set_vit_thtracq(state);
3089
3090         return 0;
3091
3092 err_gateoff:
3093         stv090x_i2c_gate_ctrl(state, 0);
3094 err:
3095         dprintk(FE_ERROR, 1, "I/O error");
3096         return -1;
3097 }
3098
3099 static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
3100 {
3101         s32 timer = 0, lock = 0, stat;
3102         u32 reg;
3103
3104         while ((timer < timeout) && (!lock)) {
3105                 reg = STV090x_READ_DEMOD(state, DMDSTATE);
3106                 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3107
3108                 switch (stat) {
3109                 case 0: /* searching */
3110                 case 1: /* first PLH detected */
3111                 default:
3112                         lock = 0;
3113                         break;
3114
3115                 case 2: /* DVB-S2 mode */
3116                         reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
3117                         lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
3118                         break;
3119
3120                 case 3: /* DVB-S1/legacy mode */
3121                         reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3122                         lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
3123                         break;
3124                 }
3125                 if (!lock) {
3126                         msleep(10);
3127                         timer += 10;
3128                 }
3129         }
3130         return lock;
3131 }
3132
3133 static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
3134 {
3135         u32 reg;
3136         s32 timer = 0;
3137         int lock;
3138
3139         lock = stv090x_get_dmdlock(state, timeout_dmd);
3140         if (lock)
3141                 lock = stv090x_get_feclock(state, timeout_fec);
3142
3143         if (lock) {
3144                 lock = 0;
3145
3146                 while ((timer < timeout_fec) && (!lock)) {
3147                         reg = STV090x_READ_DEMOD(state, TSSTATUS);
3148                         lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
3149                         msleep(1);
3150                         timer++;
3151                 }
3152         }
3153
3154         return lock;
3155 }
3156
3157 static int stv090x_set_s2rolloff(struct stv090x_state *state)
3158 {
3159         u32 reg;
3160
3161         if (state->internal->dev_ver <= 0x20) {
3162                 /* rolloff to auto mode if DVBS2 */
3163                 reg = STV090x_READ_DEMOD(state, DEMOD);
3164                 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00);
3165                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3166                         goto err;
3167         } else {
3168                 /* DVB-S2 rolloff to auto mode if DVBS2 */
3169                 reg = STV090x_READ_DEMOD(state, DEMOD);
3170                 STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 0x00);
3171                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3172                         goto err;
3173         }
3174         return 0;
3175 err:
3176         dprintk(FE_ERROR, 1, "I/O error");
3177         return -1;
3178 }
3179
3180
3181 static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3182 {
3183         struct dvb_frontend *fe = &state->frontend;
3184         enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
3185         u32 reg;
3186         s32 agc1_power, power_iq = 0, i;
3187         int lock = 0, low_sr = 0;
3188
3189         reg = STV090x_READ_DEMOD(state, TSCFGH);
3190         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
3191         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3192                 goto err;
3193
3194         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
3195                 goto err;
3196
3197         if (state->internal->dev_ver >= 0x20) {
3198                 if (state->srate > 5000000) {
3199                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
3200                                 goto err;
3201                 } else {
3202                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x82) < 0)
3203                                 goto err;
3204                 }
3205         }
3206
3207         stv090x_get_lock_tmg(state);
3208
3209         if (state->algo == STV090x_BLIND_SEARCH) {
3210                 state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
3211                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0) /* wider srate scan */
3212                         goto err;
3213                 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
3214                         goto err;
3215                 if (stv090x_set_srate(state, 1000000) < 0) /* initial srate = 1Msps */
3216                         goto err;
3217         } else {
3218                 /* known srate */
3219                 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
3220                         goto err;
3221                 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
3222                         goto err;
3223
3224                 if (state->srate < 2000000) {
3225                         /* SR < 2MSPS */
3226                         if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x63) < 0)
3227                                 goto err;
3228                 } else {
3229                         /* SR >= 2Msps */
3230                         if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
3231                                 goto err;
3232                 }
3233
3234                 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
3235                         goto err;
3236
3237                 if (state->internal->dev_ver >= 0x20) {
3238                         if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
3239                                 goto err;
3240                         if (state->algo == STV090x_COLD_SEARCH)
3241                                 state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
3242                         else if (state->algo == STV090x_WARM_SEARCH)
3243                                 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
3244                 }
3245
3246                 /* if cold start or warm  (Symbolrate is known)
3247                  * use a Narrow symbol rate scan range
3248                  */
3249                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) /* narrow srate scan */
3250                         goto err;
3251
3252                 if (stv090x_set_srate(state, state->srate) < 0)
3253                         goto err;
3254
3255                 if (stv090x_set_max_srate(state, state->internal->mclk,
3256                                           state->srate) < 0)
3257                         goto err;
3258                 if (stv090x_set_min_srate(state, state->internal->mclk,
3259                                           state->srate) < 0)
3260                         goto err;
3261
3262                 if (state->srate >= 10000000)
3263                         low_sr = 0;
3264                 else
3265                         low_sr = 1;
3266         }
3267
3268         /* Setup tuner */
3269         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3270                 goto err;
3271
3272         if (state->config->tuner_set_bbgain) {
3273                 reg = state->config->tuner_bbgain;
3274                 if (reg == 0)
3275                         reg = 10; /* default: 10dB */
3276                 if (state->config->tuner_set_bbgain(fe, reg) < 0)
3277                         goto err_gateoff;
3278         }
3279
3280         if (state->config->tuner_set_frequency) {
3281                 if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
3282                         goto err_gateoff;
3283         }
3284
3285         if (state->config->tuner_set_bandwidth) {
3286                 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
3287                         goto err_gateoff;
3288         }
3289
3290         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3291                 goto err;
3292
3293         msleep(50);
3294
3295         if (state->config->tuner_get_status) {
3296                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3297                         goto err;
3298                 if (state->config->tuner_get_status(fe, &reg) < 0)
3299                         goto err_gateoff;
3300                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3301                         goto err;
3302
3303                 if (reg)
3304                         dprintk(FE_DEBUG, 1, "Tuner phase locked");
3305                 else {
3306                         dprintk(FE_DEBUG, 1, "Tuner unlocked");
3307                         return STV090x_NOCARRIER;
3308                 }
3309         }
3310
3311         msleep(10);
3312         agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1),
3313                                 STV090x_READ_DEMOD(state, AGCIQIN0));
3314
3315         if (agc1_power == 0) {
3316                 /* If AGC1 integrator value is 0
3317                  * then read POWERI, POWERQ
3318                  */
3319                 for (i = 0; i < 5; i++) {
3320                         power_iq += (STV090x_READ_DEMOD(state, POWERI) +
3321                                      STV090x_READ_DEMOD(state, POWERQ)) >> 1;
3322                 }
3323                 power_iq /= 5;
3324         }
3325
3326         if ((agc1_power == 0) && (power_iq < STV090x_IQPOWER_THRESHOLD)) {
3327                 dprintk(FE_ERROR, 1, "No Signal: POWER_IQ=0x%02x", power_iq);
3328                 lock = 0;
3329                 signal_state = STV090x_NOAGC1;
3330         } else {
3331                 reg = STV090x_READ_DEMOD(state, DEMOD);
3332                 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
3333
3334                 if (state->internal->dev_ver <= 0x20) {
3335                         /* rolloff to auto mode if DVBS2 */
3336                         STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1);
3337                 } else {
3338                         /* DVB-S2 rolloff to auto mode if DVBS2 */
3339                         STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 1);
3340                 }
3341                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3342                         goto err;
3343
3344                 if (stv090x_delivery_search(state) < 0)
3345                         goto err;
3346
3347                 if (state->algo != STV090x_BLIND_SEARCH) {
3348                         if (stv090x_start_search(state) < 0)
3349                                 goto err;
3350                 }
3351         }
3352
3353         if (signal_state == STV090x_NOAGC1)
3354                 return signal_state;
3355
3356         if (state->algo == STV090x_BLIND_SEARCH)
3357                 lock = stv090x_blind_search(state);
3358
3359         else if (state->algo == STV090x_COLD_SEARCH)
3360                 lock = stv090x_get_coldlock(state, state->DemodTimeout);
3361
3362         else if (state->algo == STV090x_WARM_SEARCH)
3363                 lock = stv090x_get_dmdlock(state, state->DemodTimeout);
3364
3365         if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
3366                 if (!low_sr) {
3367                         if (stv090x_chk_tmg(state))
3368                                 lock = stv090x_sw_algo(state);
3369                 }
3370         }
3371
3372         if (lock)
3373                 signal_state = stv090x_get_sig_params(state);
3374
3375         if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
3376                 stv090x_optimize_track(state);
3377
3378                 if (state->internal->dev_ver >= 0x20) {
3379                         /* >= Cut 2.0 :release TS reset after
3380                          * demod lock and optimized Tracking
3381                          */
3382                         reg = STV090x_READ_DEMOD(state, TSCFGH);
3383                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3384                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3385                                 goto err;
3386
3387                         msleep(3);
3388
3389                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3390                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3391                                 goto err;
3392
3393                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3394                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3395                                 goto err;
3396                 }
3397
3398                 lock = stv090x_get_lock(state, state->FecTimeout,
3399                                 state->FecTimeout);
3400                 if (lock) {
3401                         if (state->delsys == STV090x_DVBS2) {
3402                                 stv090x_set_s2rolloff(state);
3403
3404                                 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3405                                 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 1);
3406                                 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
3407                                         goto err;
3408                                 /* Reset DVBS2 packet delinator error counter */
3409                                 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3410                                 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 0);
3411                                 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
3412                                         goto err;
3413
3414                                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
3415                                         goto err;
3416                         } else {
3417                                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
3418                                         goto err;
3419                         }
3420                         /* Reset the Total packet counter */
3421                         if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
3422                                 goto err;
3423                         /* Reset the packet Error counter2 */
3424                         if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3425                                 goto err;
3426                 } else {
3427                         signal_state = STV090x_NODATA;
3428                         stv090x_chk_signal(state);
3429                 }
3430         }
3431         return signal_state;
3432
3433 err_gateoff:
3434         stv090x_i2c_gate_ctrl(state, 0);
3435 err:
3436         dprintk(FE_ERROR, 1, "I/O error");
3437         return -1;
3438 }
3439
3440 static int stv090x_set_mis(struct stv090x_state *state, int mis)
3441 {
3442         u32 reg;
3443
3444         if (mis < 0 || mis > 255) {
3445                 dprintk(FE_DEBUG, 1, "Disable MIS filtering");
3446                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3447                 STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x00);
3448                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3449                         goto err;
3450         } else {
3451                 dprintk(FE_DEBUG, 1, "Enable MIS filtering - %d", mis);
3452                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3453                 STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x01);
3454                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3455                         goto err;
3456                 if (STV090x_WRITE_DEMOD(state, ISIENTRY, mis) < 0)
3457                         goto err;
3458                 if (STV090x_WRITE_DEMOD(state, ISIBITENA, 0xff) < 0)
3459                         goto err;
3460         }
3461         return 0;
3462 err:
3463         dprintk(FE_ERROR, 1, "I/O error");
3464         return -1;
3465 }
3466
3467 static enum dvbfe_search stv090x_search(struct dvb_frontend *fe)
3468 {
3469         struct stv090x_state *state = fe->demodulator_priv;
3470         struct dtv_frontend_properties *props = &fe->dtv_property_cache;
3471
3472         if (props->frequency == 0)
3473                 return DVBFE_ALGO_SEARCH_INVALID;
3474
3475         switch (props->delivery_system) {
3476         case SYS_DSS:
3477                 state->delsys = STV090x_DSS;
3478                 break;
3479         case SYS_DVBS:
3480                 state->delsys = STV090x_DVBS1;
3481                 break;
3482         case SYS_DVBS2:
3483                 state->delsys = STV090x_DVBS2;
3484                 break;
3485         default:
3486                 return DVBFE_ALGO_SEARCH_INVALID;
3487         }
3488
3489         state->frequency = props->frequency;
3490         state->srate = props->symbol_rate;
3491         state->search_mode = STV090x_SEARCH_AUTO;
3492         state->algo = STV090x_COLD_SEARCH;
3493         state->fec = STV090x_PRERR;
3494         if (state->srate > 10000000) {
3495                 dprintk(FE_DEBUG, 1, "Search range: 10 MHz");
3496                 state->search_range = 10000000;
3497         } else {
3498                 dprintk(FE_DEBUG, 1, "Search range: 5 MHz");
3499                 state->search_range = 5000000;
3500         }
3501
3502         stv090x_set_mis(state, props->stream_id);
3503
3504         if (stv090x_algo(state) == STV090x_RANGEOK) {
3505                 dprintk(FE_DEBUG, 1, "Search success!");
3506                 return DVBFE_ALGO_SEARCH_SUCCESS;
3507         } else {
3508                 dprintk(FE_DEBUG, 1, "Search failed!");
3509                 return DVBFE_ALGO_SEARCH_FAILED;
3510         }
3511
3512         return DVBFE_ALGO_SEARCH_ERROR;
3513 }
3514
3515 static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
3516 {
3517         struct stv090x_state *state = fe->demodulator_priv;
3518         u32 reg, dstatus;
3519         u8 search_state;
3520
3521         *status = 0;
3522
3523         dstatus = STV090x_READ_DEMOD(state, DSTATUS);
3524         if (STV090x_GETFIELD_Px(dstatus, CAR_LOCK_FIELD))
3525                 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
3526
3527         reg = STV090x_READ_DEMOD(state, DMDSTATE);
3528         search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3529
3530         switch (search_state) {
3531         case 0: /* searching */
3532         case 1: /* first PLH detected */
3533         default:
3534                 dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
3535                 break;
3536
3537         case 2: /* DVB-S2 mode */
3538                 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
3539                 if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
3540                         reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
3541                         if (STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD)) {
3542                                 *status |= FE_HAS_VITERBI;
3543                                 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3544                                 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
3545                                         *status |= FE_HAS_SYNC | FE_HAS_LOCK;
3546                         }
3547                 }
3548                 break;
3549
3550         case 3: /* DVB-S1/legacy mode */
3551                 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
3552                 if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
3553                         reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3554                         if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
3555                                 *status |= FE_HAS_VITERBI;
3556                                 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3557                                 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
3558                                         *status |= FE_HAS_SYNC | FE_HAS_LOCK;
3559                         }
3560                 }
3561                 break;
3562         }
3563
3564         return 0;
3565 }
3566
3567 static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
3568 {
3569         struct stv090x_state *state = fe->demodulator_priv;
3570
3571         s32 count_4, count_3, count_2, count_1, count_0, count;
3572         u32 reg, h, m, l;
3573         enum fe_status status;
3574
3575         stv090x_read_status(fe, &status);
3576         if (!(status & FE_HAS_LOCK)) {
3577                 *per = 1 << 23; /* Max PER */
3578         } else {
3579                 /* Counter 2 */
3580                 reg = STV090x_READ_DEMOD(state, ERRCNT22);
3581                 h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
3582
3583                 reg = STV090x_READ_DEMOD(state, ERRCNT21);
3584                 m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
3585
3586                 reg = STV090x_READ_DEMOD(state, ERRCNT20);
3587                 l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
3588
3589                 *per = ((h << 16) | (m << 8) | l);
3590
3591                 count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
3592                 count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
3593                 count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
3594                 count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
3595                 count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
3596
3597                 if ((!count_4) && (!count_3)) {
3598                         count  = (count_2 & 0xff) << 16;
3599                         count |= (count_1 & 0xff) <<  8;
3600                         count |=  count_0 & 0xff;
3601                 } else {
3602                         count = 1 << 24;
3603                 }
3604                 if (count == 0)
3605                         *per = 1;
3606         }
3607         if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
3608                 goto err;
3609         if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3610                 goto err;
3611
3612         return 0;
3613 err:
3614         dprintk(FE_ERROR, 1, "I/O error");
3615         return -1;
3616 }
3617
3618 static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
3619 {
3620         int res = 0;
3621         int min = 0, med;
3622
3623         if ((val >= tab[min].read && val < tab[max].read) ||
3624             (val >= tab[max].read && val < tab[min].read)) {
3625                 while ((max - min) > 1) {
3626                         med = (max + min) / 2;
3627                         if ((val >= tab[min].read && val < tab[med].read) ||
3628                             (val >= tab[med].read && val < tab[min].read))
3629                                 max = med;
3630                         else
3631                                 min = med;
3632                 }
3633                 res = ((val - tab[min].read) *
3634                        (tab[max].real - tab[min].real) /
3635                        (tab[max].read - tab[min].read)) +
3636                         tab[min].real;
3637         } else {
3638                 if (tab[min].read < tab[max].read) {
3639                         if (val < tab[min].read)
3640                                 res = tab[min].real;
3641                         else if (val >= tab[max].read)
3642                                 res = tab[max].real;
3643                 } else {
3644                         if (val >= tab[min].read)
3645                                 res = tab[min].real;
3646                         else if (val < tab[max].read)
3647                                 res = tab[max].real;
3648                 }
3649         }
3650
3651         return res;
3652 }
3653
3654 static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
3655 {
3656         struct stv090x_state *state = fe->demodulator_priv;
3657         u32 reg;
3658         s32 agc_0, agc_1, agc;
3659         s32 str;
3660
3661         reg = STV090x_READ_DEMOD(state, AGCIQIN1);
3662         agc_1 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3663         reg = STV090x_READ_DEMOD(state, AGCIQIN0);
3664         agc_0 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3665         agc = MAKEWORD16(agc_1, agc_0);
3666
3667         str = stv090x_table_lookup(stv090x_rf_tab,
3668                 ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
3669         if (agc > stv090x_rf_tab[0].read)
3670                 str = 0;
3671         else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
3672                 str = -100;
3673         *strength = (str + 100) * 0xFFFF / 100;
3674
3675         return 0;
3676 }
3677
3678 static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
3679 {
3680         struct stv090x_state *state = fe->demodulator_priv;
3681         u32 reg_0, reg_1, reg, i;
3682         s32 val_0, val_1, val = 0;
3683         u8 lock_f;
3684         s32 div;
3685         u32 last;
3686
3687         switch (state->delsys) {
3688         case STV090x_DVBS2:
3689                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3690                 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3691                 if (lock_f) {
3692                         msleep(5);
3693                         for (i = 0; i < 16; i++) {
3694                                 reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
3695                                 val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3696                                 reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
3697                                 val_0 = STV090x_GETFIELD_Px(reg_0, NOSPLHT_NORMED_FIELD);
3698                                 val  += MAKEWORD16(val_1, val_0);
3699                                 msleep(1);
3700                         }
3701                         val /= 16;
3702                         last = ARRAY_SIZE(stv090x_s2cn_tab) - 1;
3703                         div = stv090x_s2cn_tab[0].read -
3704                               stv090x_s2cn_tab[last].read;
3705                         *cnr = 0xFFFF - ((val * 0xFFFF) / div);
3706                 }
3707                 break;
3708
3709         case STV090x_DVBS1:
3710         case STV090x_DSS:
3711                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3712                 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3713                 if (lock_f) {
3714                         msleep(5);
3715                         for (i = 0; i < 16; i++) {
3716                                 reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
3717                                 val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3718                                 reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
3719                                 val_0 = STV090x_GETFIELD_Px(reg_0, NOSDATAT_UNNORMED_FIELD);
3720                                 val  += MAKEWORD16(val_1, val_0);
3721                                 msleep(1);
3722                         }
3723                         val /= 16;
3724                         last = ARRAY_SIZE(stv090x_s1cn_tab) - 1;
3725                         div = stv090x_s1cn_tab[0].read -
3726                               stv090x_s1cn_tab[last].read;
3727                         *cnr = 0xFFFF - ((val * 0xFFFF) / div);
3728                 }
3729                 break;
3730         default:
3731                 break;
3732         }
3733
3734         return 0;
3735 }
3736
3737 static int stv090x_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
3738 {
3739         struct stv090x_state *state = fe->demodulator_priv;
3740         u32 reg;
3741
3742         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3743         switch (tone) {
3744         case SEC_TONE_ON:
3745                 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3746                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3747                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3748                         goto err;
3749                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3750                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3751                         goto err;
3752                 break;
3753
3754         case SEC_TONE_OFF:
3755                 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3756                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3757                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3758                         goto err;
3759                 break;
3760         default:
3761                 return -EINVAL;
3762         }
3763
3764         return 0;
3765 err:
3766         dprintk(FE_ERROR, 1, "I/O error");
3767         return -1;
3768 }
3769
3770
3771 static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
3772 {
3773         return DVBFE_ALGO_CUSTOM;
3774 }
3775
3776 static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
3777 {
3778         struct stv090x_state *state = fe->demodulator_priv;
3779         u32 reg, idle = 0, fifo_full = 1;
3780         int i;
3781
3782         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3783
3784         STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD,
3785                 (state->config->diseqc_envelope_mode) ? 4 : 2);
3786         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3787         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3788                 goto err;
3789         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3790         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3791                 goto err;
3792
3793         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3794         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3795                 goto err;
3796
3797         for (i = 0; i < cmd->msg_len; i++) {
3798
3799                 while (fifo_full) {
3800                         reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3801                         fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3802                 }
3803
3804                 if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
3805                         goto err;
3806         }
3807         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3808         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3809         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3810                 goto err;
3811
3812         i = 0;
3813
3814         while ((!idle) && (i < 10)) {
3815                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3816                 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3817                 msleep(10);
3818                 i++;
3819         }
3820
3821         return 0;
3822 err:
3823         dprintk(FE_ERROR, 1, "I/O error");
3824         return -1;
3825 }
3826
3827 static int stv090x_send_diseqc_burst(struct dvb_frontend *fe,
3828                                      enum fe_sec_mini_cmd burst)
3829 {
3830         struct stv090x_state *state = fe->demodulator_priv;
3831         u32 reg, idle = 0, fifo_full = 1;
3832         u8 mode, value;
3833         int i;
3834
3835         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3836
3837         if (burst == SEC_MINI_A) {
3838                 mode = (state->config->diseqc_envelope_mode) ? 5 : 3;
3839                 value = 0x00;
3840         } else {
3841                 mode = (state->config->diseqc_envelope_mode) ? 4 : 2;
3842                 value = 0xFF;
3843         }
3844
3845         STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
3846         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3847         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3848                 goto err;
3849         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3850         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3851                 goto err;
3852
3853         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3854         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3855                 goto err;
3856
3857         while (fifo_full) {
3858                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3859                 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3860         }
3861
3862         if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
3863                 goto err;
3864
3865         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3866         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3867         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3868                 goto err;
3869
3870         i = 0;
3871
3872         while ((!idle) && (i < 10)) {
3873                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3874                 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3875                 msleep(10);
3876                 i++;
3877         }
3878
3879         return 0;
3880 err:
3881         dprintk(FE_ERROR, 1, "I/O error");
3882         return -1;
3883 }
3884
3885 static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
3886 {
3887         struct stv090x_state *state = fe->demodulator_priv;
3888         u32 reg = 0, i = 0, rx_end = 0;
3889
3890         while ((rx_end != 1) && (i < 10)) {
3891                 msleep(10);
3892                 i++;
3893                 reg = STV090x_READ_DEMOD(state, DISRX_ST0);
3894                 rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
3895         }
3896
3897         if (rx_end) {
3898                 reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
3899                 for (i = 0; i < reply->msg_len; i++)
3900                         reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
3901         }
3902
3903         return 0;
3904 }
3905
3906 static int stv090x_sleep(struct dvb_frontend *fe)
3907 {
3908         struct stv090x_state *state = fe->demodulator_priv;
3909         u32 reg;
3910         u8 full_standby = 0;
3911
3912         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3913                 goto err;
3914
3915         if (state->config->tuner_sleep) {
3916                 if (state->config->tuner_sleep(fe) < 0)
3917                         goto err_gateoff;
3918         }
3919
3920         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3921                 goto err;
3922
3923         dprintk(FE_DEBUG, 1, "Set %s(%d) to sleep",
3924                 state->device == STV0900 ? "STV0900" : "STV0903",
3925                 state->demod);
3926
3927         mutex_lock(&state->internal->demod_lock);
3928
3929         switch (state->demod) {
3930         case STV090x_DEMODULATOR_0:
3931                 /* power off ADC 1 */
3932                 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3933                 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
3934                 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3935                         goto err_unlock;
3936                 /* power off DiSEqC 1 */
3937                 reg = stv090x_read_reg(state, STV090x_TSTTNR2);
3938                 STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 0);
3939                 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
3940                         goto err_unlock;
3941
3942                 /* check whether path 2 is already sleeping, that is when
3943                    ADC2 is off */
3944                 reg = stv090x_read_reg(state, STV090x_TSTTNR3);
3945                 if (STV090x_GETFIELD(reg, ADC2_PON_FIELD) == 0)
3946                         full_standby = 1;
3947
3948                 /* stop clocks */
3949                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
3950                 /* packet delineator 1 clock */
3951                 STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 1);
3952                 /* ADC 1 clock */
3953                 STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 1);
3954                 /* FEC clock is shared between the two paths, only stop it
3955                    when full standby is possible */
3956                 if (full_standby)
3957                         STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
3958                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
3959                         goto err_unlock;
3960                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
3961                 /* sampling 1 clock */
3962                 STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 1);
3963                 /* viterbi 1 clock */
3964                 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 1);
3965                 /* TS clock is shared between the two paths, only stop it
3966                    when full standby is possible */
3967                 if (full_standby)
3968                         STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
3969                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
3970                         goto err_unlock;
3971                 break;
3972
3973         case STV090x_DEMODULATOR_1:
3974                 /* power off ADC 2 */
3975                 reg = stv090x_read_reg(state, STV090x_TSTTNR3);
3976                 STV090x_SETFIELD(reg, ADC2_PON_FIELD, 0);
3977                 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
3978                         goto err_unlock;
3979                 /* power off DiSEqC 2 */
3980                 reg = stv090x_read_reg(state, STV090x_TSTTNR4);
3981                 STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 0);
3982                 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
3983                         goto err_unlock;
3984
3985                 /* check whether path 1 is already sleeping, that is when
3986                    ADC1 is off */
3987                 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3988                 if (STV090x_GETFIELD(reg, ADC1_PON_FIELD) == 0)
3989                         full_standby = 1;
3990
3991                 /* stop clocks */
3992                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
3993                 /* packet delineator 2 clock */
3994                 STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 1);
3995                 /* ADC 2 clock */
3996                 STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 1);
3997                 /* FEC clock is shared between the two paths, only stop it
3998                    when full standby is possible */
3999                 if (full_standby)
4000                         STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
4001                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
4002                         goto err_unlock;
4003                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
4004                 /* sampling 2 clock */
4005                 STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 1);
4006                 /* viterbi 2 clock */
4007                 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 1);
4008                 /* TS clock is shared between the two paths, only stop it
4009                    when full standby is possible */
4010                 if (full_standby)
4011                         STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
4012                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
4013                         goto err_unlock;
4014                 break;
4015
4016         default:
4017                 dprintk(FE_ERROR, 1, "Wrong demodulator!");
4018                 break;
4019         }
4020
4021         if (full_standby) {
4022                 /* general power off */
4023                 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4024                 STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
4025                 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
4026                         goto err_unlock;
4027         }
4028
4029         mutex_unlock(&state->internal->demod_lock);
4030         return 0;
4031
4032 err_gateoff:
4033         stv090x_i2c_gate_ctrl(state, 0);
4034         goto err;
4035 err_unlock:
4036         mutex_unlock(&state->internal->demod_lock);
4037 err:
4038         dprintk(FE_ERROR, 1, "I/O error");
4039         return -1;
4040 }
4041
4042 static int stv090x_wakeup(struct dvb_frontend *fe)
4043 {
4044         struct stv090x_state *state = fe->demodulator_priv;
4045         u32 reg;
4046
4047         dprintk(FE_DEBUG, 1, "Wake %s(%d) from standby",
4048                 state->device == STV0900 ? "STV0900" : "STV0903",
4049                 state->demod);
4050
4051         mutex_lock(&state->internal->demod_lock);
4052
4053         /* general power on */
4054         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4055         STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
4056         if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
4057                 goto err;
4058
4059         switch (state->demod) {
4060         case STV090x_DEMODULATOR_0:
4061                 /* power on ADC 1 */
4062                 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
4063                 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
4064                 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
4065                         goto err;
4066                 /* power on DiSEqC 1 */
4067                 reg = stv090x_read_reg(state, STV090x_TSTTNR2);
4068                 STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 1);
4069                 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
4070                         goto err;
4071
4072                 /* activate clocks */
4073                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
4074                 /* packet delineator 1 clock */
4075                 STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 0);
4076                 /* ADC 1 clock */
4077                 STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 0);
4078                 /* FEC clock */
4079                 STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
4080                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
4081                         goto err;
4082                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
4083                 /* sampling 1 clock */
4084                 STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 0);
4085                 /* viterbi 1 clock */
4086                 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 0);
4087                 /* TS clock */
4088                 STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
4089                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
4090                         goto err;
4091                 break;
4092
4093         case STV090x_DEMODULATOR_1:
4094                 /* power on ADC 2 */
4095                 reg = stv090x_read_reg(state, STV090x_TSTTNR3);
4096                 STV090x_SETFIELD(reg, ADC2_PON_FIELD, 1);
4097                 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
4098                         goto err;
4099                 /* power on DiSEqC 2 */
4100                 reg = stv090x_read_reg(state, STV090x_TSTTNR4);
4101                 STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 1);
4102                 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
4103                         goto err;
4104
4105                 /* activate clocks */
4106                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
4107                 /* packet delineator 2 clock */
4108                 STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 0);
4109                 /* ADC 2 clock */
4110                 STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 0);
4111                 /* FEC clock */
4112                 STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
4113                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
4114                         goto err;
4115                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
4116                 /* sampling 2 clock */
4117                 STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 0);
4118                 /* viterbi 2 clock */
4119                 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 0);
4120                 /* TS clock */
4121                 STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
4122                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
4123                         goto err;
4124                 break;
4125
4126         default:
4127                 dprintk(FE_ERROR, 1, "Wrong demodulator!");
4128                 break;
4129         }
4130
4131         mutex_unlock(&state->internal->demod_lock);
4132         return 0;
4133 err:
4134         mutex_unlock(&state->internal->demod_lock);
4135         dprintk(FE_ERROR, 1, "I/O error");
4136         return -1;
4137 }
4138
4139 static void stv090x_release(struct dvb_frontend *fe)
4140 {
4141         struct stv090x_state *state = fe->demodulator_priv;
4142
4143         state->internal->num_used--;
4144         if (state->internal->num_used <= 0) {
4145
4146                 dprintk(FE_ERROR, 1, "Actually removing");
4147
4148                 remove_dev(state->internal);
4149                 kfree(state->internal);
4150         }
4151
4152         kfree(state);
4153 }
4154
4155 static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
4156 {
4157         u32 reg = 0;
4158
4159         reg = stv090x_read_reg(state, STV090x_GENCFG);
4160
4161         switch (ldpc_mode) {
4162         case STV090x_DUAL:
4163         default:
4164                 if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
4165                         /* set LDPC to dual mode */
4166                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0)
4167                                 goto err;
4168
4169                         state->demod_mode = STV090x_DUAL;
4170
4171                         reg = stv090x_read_reg(state, STV090x_TSTRES0);
4172                         STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
4173                         if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4174                                 goto err;
4175                         STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
4176                         if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4177                                 goto err;
4178
4179                         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
4180                                 goto err;
4181                         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
4182                                 goto err;
4183                         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
4184                                 goto err;
4185                         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
4186                                 goto err;
4187                         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
4188                                 goto err;
4189                         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
4190                                 goto err;
4191                         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
4192                                 goto err;
4193
4194                         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
4195                                 goto err;
4196                         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
4197                                 goto err;
4198                         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
4199                                 goto err;
4200                         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
4201                                 goto err;
4202                         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
4203                                 goto err;
4204                         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
4205                                 goto err;
4206                         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
4207                                 goto err;
4208
4209                         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
4210                                 goto err;
4211                         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
4212                                 goto err;
4213                 }
4214                 break;
4215
4216         case STV090x_SINGLE:
4217                 if (stv090x_stop_modcod(state) < 0)
4218                         goto err;
4219                 if (stv090x_activate_modcod_single(state) < 0)
4220                         goto err;
4221
4222                 if (state->demod == STV090x_DEMODULATOR_1) {
4223                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
4224                                 goto err;
4225                 } else {
4226                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
4227                                 goto err;
4228                 }
4229
4230                 reg = stv090x_read_reg(state, STV090x_TSTRES0);
4231                 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
4232                 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4233                         goto err;
4234                 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
4235                 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4236                         goto err;
4237
4238                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
4239                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
4240                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
4241                         goto err;
4242                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
4243                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
4244                         goto err;
4245                 break;
4246         }
4247
4248         return 0;
4249 err:
4250         dprintk(FE_ERROR, 1, "I/O error");
4251         return -1;
4252 }
4253
4254 /* return (Hz), clk in Hz*/
4255 static u32 stv090x_get_mclk(struct stv090x_state *state)
4256 {
4257         const struct stv090x_config *config = state->config;
4258         u32 div, reg;
4259         u8 ratio;
4260
4261         div = stv090x_read_reg(state, STV090x_NCOARSE);
4262         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4263         ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
4264
4265         return (div + 1) * config->xtal / ratio; /* kHz */
4266 }
4267
4268 static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
4269 {
4270         const struct stv090x_config *config = state->config;
4271         u32 reg, div, clk_sel;
4272
4273         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4274         clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
4275
4276         div = ((clk_sel * mclk) / config->xtal) - 1;
4277
4278         reg = stv090x_read_reg(state, STV090x_NCOARSE);
4279         STV090x_SETFIELD(reg, M_DIV_FIELD, div);
4280         if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
4281                 goto err;
4282
4283         state->internal->mclk = stv090x_get_mclk(state);
4284
4285         /*Set the DiseqC frequency to 22KHz */
4286         div = state->internal->mclk / 704000;
4287         if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
4288                 goto err;
4289         if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
4290                 goto err;
4291
4292         return 0;
4293 err:
4294         dprintk(FE_ERROR, 1, "I/O error");
4295         return -1;
4296 }
4297
4298 static int stv0900_set_tspath(struct stv090x_state *state)
4299 {
4300         u32 reg;
4301
4302         if (state->internal->dev_ver >= 0x20) {
4303                 switch (state->config->ts1_mode) {
4304                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4305                 case STV090x_TSMODE_DVBCI:
4306                         switch (state->config->ts2_mode) {
4307                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4308                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4309                         default:
4310                                 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
4311                                 break;
4312
4313                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4314                         case STV090x_TSMODE_DVBCI:
4315                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
4316                                         goto err;
4317                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4318                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4319                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4320                                         goto err;
4321                                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
4322                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4323                                 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
4324                                         goto err;
4325                                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
4326                                         goto err;
4327                                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
4328                                         goto err;
4329                                 break;
4330                         }
4331                         break;
4332
4333                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4334                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4335                 default:
4336                         switch (state->config->ts2_mode) {
4337                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4338                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4339                         default:
4340                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
4341                                         goto err;
4342                                 break;
4343
4344                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4345                         case STV090x_TSMODE_DVBCI:
4346                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
4347                                         goto err;
4348                                 break;
4349                         }
4350                         break;
4351                 }
4352         } else {
4353                 switch (state->config->ts1_mode) {
4354                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4355                 case STV090x_TSMODE_DVBCI:
4356                         switch (state->config->ts2_mode) {
4357                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4358                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4359                         default:
4360                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
4361                                 break;
4362
4363                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4364                         case STV090x_TSMODE_DVBCI:
4365                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
4366                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4367                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4368                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4369                                         goto err;
4370                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4371                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
4372                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4373                                         goto err;
4374                                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
4375                                         goto err;
4376                                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
4377                                         goto err;
4378                                 break;
4379                         }
4380                         break;
4381
4382                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4383                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4384                 default:
4385                         switch (state->config->ts2_mode) {
4386                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4387                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4388                         default:
4389                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
4390                                 break;
4391
4392                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4393                         case STV090x_TSMODE_DVBCI:
4394                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
4395                                 break;
4396                         }
4397                         break;
4398                 }
4399         }
4400
4401         switch (state->config->ts1_mode) {
4402         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4403                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4404                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4405                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4406                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4407                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4408                         goto err;
4409                 break;
4410
4411         case STV090x_TSMODE_DVBCI:
4412                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4413                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4414                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4415                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4416                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4417                         goto err;
4418                 break;
4419
4420         case STV090x_TSMODE_SERIAL_PUNCTURED:
4421                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4422                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4423                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4424                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4425                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4426                         goto err;
4427                 break;
4428
4429         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4430                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4431                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4432                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4433                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4434                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4435                         goto err;
4436                 break;
4437
4438         default:
4439                 break;
4440         }
4441
4442         switch (state->config->ts2_mode) {
4443         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4444                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4445                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4446                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4447                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4448                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4449                         goto err;
4450                 break;
4451
4452         case STV090x_TSMODE_DVBCI:
4453                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4454                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4455                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4456                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4457                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4458                         goto err;
4459                 break;
4460
4461         case STV090x_TSMODE_SERIAL_PUNCTURED:
4462                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4463                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4464                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4465                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4466                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4467                         goto err;
4468                 break;
4469
4470         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4471                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4472                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4473                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4474                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4475                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4476                         goto err;
4477                 break;
4478
4479         default:
4480                 break;
4481         }
4482
4483         if (state->config->ts1_clk > 0) {
4484                 u32 speed;
4485
4486                 switch (state->config->ts1_mode) {
4487                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4488                 case STV090x_TSMODE_DVBCI:
4489                 default:
4490                         speed = state->internal->mclk /
4491                                 (state->config->ts1_clk / 4);
4492                         if (speed < 0x08)
4493                                 speed = 0x08;
4494                         if (speed > 0xFF)
4495                                 speed = 0xFF;
4496                         break;
4497                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4498                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4499                         speed = state->internal->mclk /
4500                                 (state->config->ts1_clk / 32);
4501                         if (speed < 0x20)
4502                                 speed = 0x20;
4503                         if (speed > 0xFF)
4504                                 speed = 0xFF;
4505                         break;
4506                 }
4507                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4508                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4509                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4510                         goto err;
4511                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
4512                         goto err;
4513         }
4514
4515         if (state->config->ts2_clk > 0) {
4516                 u32 speed;
4517
4518                 switch (state->config->ts2_mode) {
4519                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4520                 case STV090x_TSMODE_DVBCI:
4521                 default:
4522                         speed = state->internal->mclk /
4523                                 (state->config->ts2_clk / 4);
4524                         if (speed < 0x08)
4525                                 speed = 0x08;
4526                         if (speed > 0xFF)
4527                                 speed = 0xFF;
4528                         break;
4529                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4530                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4531                         speed = state->internal->mclk /
4532                                 (state->config->ts2_clk / 32);
4533                         if (speed < 0x20)
4534                                 speed = 0x20;
4535                         if (speed > 0xFF)
4536                                 speed = 0xFF;
4537                         break;
4538                 }
4539                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
4540                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4541                 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
4542                         goto err;
4543                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, speed) < 0)
4544                         goto err;
4545         }
4546
4547         reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4548         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4549         if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4550                 goto err;
4551         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4552         if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4553                 goto err;
4554
4555         reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4556         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4557         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4558                 goto err;
4559         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4560         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4561                 goto err;
4562
4563         return 0;
4564 err:
4565         dprintk(FE_ERROR, 1, "I/O error");
4566         return -1;
4567 }
4568
4569 static int stv0903_set_tspath(struct stv090x_state *state)
4570 {
4571         u32 reg;
4572
4573         if (state->internal->dev_ver >= 0x20) {
4574                 switch (state->config->ts1_mode) {
4575                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4576                 case STV090x_TSMODE_DVBCI:
4577                         stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
4578                         break;
4579
4580                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4581                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4582                 default:
4583                         stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c);
4584                         break;
4585                 }
4586         } else {
4587                 switch (state->config->ts1_mode) {
4588                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4589                 case STV090x_TSMODE_DVBCI:
4590                         stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
4591                         break;
4592
4593                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4594                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4595                 default:
4596                         stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
4597                         break;
4598                 }
4599         }
4600
4601         switch (state->config->ts1_mode) {
4602         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4603                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4604                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4605                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4606                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4607                         goto err;
4608                 break;
4609
4610         case STV090x_TSMODE_DVBCI:
4611                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4612                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4613                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4614                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4615                         goto err;
4616                 break;
4617
4618         case STV090x_TSMODE_SERIAL_PUNCTURED:
4619                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4620                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4621                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4622                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4623                         goto err;
4624                 break;
4625
4626         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4627                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4628                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4629                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4630                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4631                         goto err;
4632                 break;
4633
4634         default:
4635                 break;
4636         }
4637
4638         if (state->config->ts1_clk > 0) {
4639                 u32 speed;
4640
4641                 switch (state->config->ts1_mode) {
4642                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4643                 case STV090x_TSMODE_DVBCI:
4644                 default:
4645                         speed = state->internal->mclk /
4646                                 (state->config->ts1_clk / 4);
4647                         if (speed < 0x08)
4648                                 speed = 0x08;
4649                         if (speed > 0xFF)
4650                                 speed = 0xFF;
4651                         break;
4652                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4653                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4654                         speed = state->internal->mclk /
4655                                 (state->config->ts1_clk / 32);
4656                         if (speed < 0x20)
4657                                 speed = 0x20;
4658                         if (speed > 0xFF)
4659                                 speed = 0xFF;
4660                         break;
4661                 }
4662                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4663                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4664                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4665                         goto err;
4666                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
4667                         goto err;
4668         }
4669
4670         reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4671         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4672         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4673                 goto err;
4674         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4675         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4676                 goto err;
4677
4678         return 0;
4679 err:
4680         dprintk(FE_ERROR, 1, "I/O error");
4681         return -1;
4682 }
4683
4684 static int stv090x_init(struct dvb_frontend *fe)
4685 {
4686         struct stv090x_state *state = fe->demodulator_priv;
4687         const struct stv090x_config *config = state->config;
4688         u32 reg;
4689
4690         if (state->internal->mclk == 0) {
4691                 /* call tuner init to configure the tuner's clock output
4692                    divider directly before setting up the master clock of
4693                    the stv090x. */
4694                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
4695                         goto err;
4696
4697                 if (config->tuner_init) {
4698                         if (config->tuner_init(fe) < 0)
4699                                 goto err_gateoff;
4700                 }
4701
4702                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
4703                         goto err;
4704
4705                 stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
4706                 msleep(5);
4707                 if (stv090x_write_reg(state, STV090x_SYNTCTRL,
4708                                       0x20 | config->clk_mode) < 0)
4709                         goto err;
4710                 stv090x_get_mclk(state);
4711         }
4712
4713         if (stv090x_wakeup(fe) < 0) {
4714                 dprintk(FE_ERROR, 1, "Error waking device");
4715                 goto err;
4716         }
4717
4718         if (stv090x_ldpc_mode(state, state->demod_mode) < 0)
4719                 goto err;
4720
4721         reg = STV090x_READ_DEMOD(state, TNRCFG2);
4722         STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
4723         if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
4724                 goto err;
4725         reg = STV090x_READ_DEMOD(state, DEMOD);
4726         STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
4727         if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
4728                 goto err;
4729
4730         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
4731                 goto err;
4732
4733         if (config->tuner_set_mode) {
4734                 if (config->tuner_set_mode(fe, TUNER_WAKE) < 0)
4735                         goto err_gateoff;
4736         }
4737
4738         if (config->tuner_init) {
4739                 if (config->tuner_init(fe) < 0)
4740                         goto err_gateoff;
4741         }
4742
4743         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
4744                 goto err;
4745
4746         if (state->device == STV0900) {
4747                 if (stv0900_set_tspath(state) < 0)
4748                         goto err;
4749         } else {
4750                 if (stv0903_set_tspath(state) < 0)
4751                         goto err;
4752         }
4753
4754         return 0;
4755
4756 err_gateoff:
4757         stv090x_i2c_gate_ctrl(state, 0);
4758 err:
4759         dprintk(FE_ERROR, 1, "I/O error");
4760         return -1;
4761 }
4762
4763 static int stv090x_setup(struct dvb_frontend *fe)
4764 {
4765         struct stv090x_state *state = fe->demodulator_priv;
4766         const struct stv090x_config *config = state->config;
4767         const struct stv090x_reg *stv090x_initval = NULL;
4768         const struct stv090x_reg *stv090x_cut20_val = NULL;
4769         unsigned long t1_size = 0, t2_size = 0;
4770         u32 reg = 0;
4771
4772         int i;
4773
4774         if (state->device == STV0900) {
4775                 dprintk(FE_DEBUG, 1, "Initializing STV0900");
4776                 stv090x_initval = stv0900_initval;
4777                 t1_size = ARRAY_SIZE(stv0900_initval);
4778                 stv090x_cut20_val = stv0900_cut20_val;
4779                 t2_size = ARRAY_SIZE(stv0900_cut20_val);
4780         } else if (state->device == STV0903) {
4781                 dprintk(FE_DEBUG, 1, "Initializing STV0903");
4782                 stv090x_initval = stv0903_initval;
4783                 t1_size = ARRAY_SIZE(stv0903_initval);
4784                 stv090x_cut20_val = stv0903_cut20_val;
4785                 t2_size = ARRAY_SIZE(stv0903_cut20_val);
4786         }
4787
4788         /* STV090x init */
4789
4790         /* Stop Demod */
4791         if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0)
4792                 goto err;
4793         if (state->device == STV0900)
4794                 if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0)
4795                         goto err;
4796
4797         msleep(5);
4798
4799         /* Set No Tuner Mode */
4800         if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0)
4801                 goto err;
4802         if (state->device == STV0900)
4803                 if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0)
4804                         goto err;
4805
4806         /* I2C repeater OFF */
4807         STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
4808         if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0)
4809                 goto err;
4810         if (state->device == STV0900)
4811                 if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0)
4812                         goto err;
4813
4814         if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
4815                 goto err;
4816         msleep(5);
4817         if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
4818                 goto err;
4819         if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
4820                 goto err;
4821         msleep(5);
4822
4823         /* write initval */
4824         dprintk(FE_DEBUG, 1, "Setting up initial values");
4825         for (i = 0; i < t1_size; i++) {
4826                 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
4827                         goto err;
4828         }
4829
4830         state->internal->dev_ver = stv090x_read_reg(state, STV090x_MID);
4831         if (state->internal->dev_ver >= 0x20) {
4832                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
4833                         goto err;
4834
4835                 /* write cut20_val*/
4836                 dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
4837                 for (i = 0; i < t2_size; i++) {
4838                         if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
4839                                 goto err;
4840                 }
4841
4842         } else if (state->internal->dev_ver < 0x20) {
4843                 dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!",
4844                         state->internal->dev_ver);
4845
4846                 goto err;
4847         } else if (state->internal->dev_ver > 0x30) {
4848                 /* we shouldn't bail out from here */
4849                 dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!",
4850                         state->internal->dev_ver);
4851         }
4852
4853         /* ADC1 range */
4854         reg = stv090x_read_reg(state, STV090x_TSTTNR1);
4855         STV090x_SETFIELD(reg, ADC1_INMODE_FIELD,
4856                 (config->adc1_range == STV090x_ADC_1Vpp) ? 0 : 1);
4857         if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
4858                 goto err;
4859
4860         /* ADC2 range */
4861         reg = stv090x_read_reg(state, STV090x_TSTTNR3);
4862         STV090x_SETFIELD(reg, ADC2_INMODE_FIELD,
4863                 (config->adc2_range == STV090x_ADC_1Vpp) ? 0 : 1);
4864         if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
4865                 goto err;
4866
4867         if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
4868                 goto err;
4869         if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
4870                 goto err;
4871
4872         return 0;
4873 err:
4874         dprintk(FE_ERROR, 1, "I/O error");
4875         return -1;
4876 }
4877
4878 static int stv090x_set_gpio(struct dvb_frontend *fe, u8 gpio, u8 dir,
4879                             u8 value, u8 xor_value)
4880 {
4881         struct stv090x_state *state = fe->demodulator_priv;
4882         u8 reg = 0;
4883
4884         STV090x_SETFIELD(reg, GPIOx_OPD_FIELD, dir);
4885         STV090x_SETFIELD(reg, GPIOx_CONFIG_FIELD, value);
4886         STV090x_SETFIELD(reg, GPIOx_XOR_FIELD, xor_value);
4887
4888         return stv090x_write_reg(state, STV090x_GPIOxCFG(gpio), reg);
4889 }
4890
4891 static struct dvb_frontend_ops stv090x_ops = {
4892         .delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
4893         .info = {
4894                 .name                   = "STV090x Multistandard",
4895                 .frequency_min          = 950000,
4896                 .frequency_max          = 2150000,
4897                 .frequency_stepsize     = 0,
4898                 .frequency_tolerance    = 0,
4899                 .symbol_rate_min        = 1000000,
4900                 .symbol_rate_max        = 45000000,
4901                 .caps                   = FE_CAN_INVERSION_AUTO |
4902                                           FE_CAN_FEC_AUTO       |
4903                                           FE_CAN_QPSK           |
4904                                           FE_CAN_2G_MODULATION
4905         },
4906
4907         .release                        = stv090x_release,
4908         .init                           = stv090x_init,
4909
4910         .sleep                          = stv090x_sleep,
4911         .get_frontend_algo              = stv090x_frontend_algo,
4912
4913         .diseqc_send_master_cmd         = stv090x_send_diseqc_msg,
4914         .diseqc_send_burst              = stv090x_send_diseqc_burst,
4915         .diseqc_recv_slave_reply        = stv090x_recv_slave_reply,
4916         .set_tone                       = stv090x_set_tone,
4917
4918         .search                         = stv090x_search,
4919         .read_status                    = stv090x_read_status,
4920         .read_ber                       = stv090x_read_per,
4921         .read_signal_strength           = stv090x_read_signal_strength,
4922         .read_snr                       = stv090x_read_cnr,
4923 };
4924
4925
4926 struct dvb_frontend *stv090x_attach(struct stv090x_config *config,
4927                                     struct i2c_adapter *i2c,
4928                                     enum stv090x_demodulator demod)
4929 {
4930         struct stv090x_state *state = NULL;
4931         struct stv090x_dev *temp_int;
4932
4933         state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
4934         if (state == NULL)
4935                 goto error;
4936
4937         state->verbose                          = &verbose;
4938         state->config                           = config;
4939         state->i2c                              = i2c;
4940         state->frontend.ops                     = stv090x_ops;
4941         state->frontend.demodulator_priv        = state;
4942         state->demod                            = demod;
4943         state->demod_mode                       = config->demod_mode; /* Single or Dual mode */
4944         state->device                           = config->device;
4945         state->rolloff                          = STV090x_RO_35; /* default */
4946
4947         temp_int = find_dev(state->i2c,
4948                                 state->config->address);
4949
4950         if ((temp_int != NULL) && (state->demod_mode == STV090x_DUAL)) {
4951                 state->internal = temp_int->internal;
4952                 state->internal->num_used++;
4953                 dprintk(FE_INFO, 1, "Found Internal Structure!");
4954         } else {
4955                 state->internal = kmalloc(sizeof(struct stv090x_internal),
4956                                           GFP_KERNEL);
4957                 if (!state->internal)
4958                         goto error;
4959                 temp_int = append_internal(state->internal);
4960                 if (!temp_int) {
4961                         kfree(state->internal);
4962                         goto error;
4963                 }
4964                 state->internal->num_used = 1;
4965                 state->internal->mclk = 0;
4966                 state->internal->dev_ver = 0;
4967                 state->internal->i2c_adap = state->i2c;
4968                 state->internal->i2c_addr = state->config->address;
4969                 dprintk(FE_INFO, 1, "Create New Internal Structure!");
4970
4971                 mutex_init(&state->internal->demod_lock);
4972                 mutex_init(&state->internal->tuner_lock);
4973
4974                 if (stv090x_setup(&state->frontend) < 0) {
4975                         dprintk(FE_ERROR, 1, "Error setting up device");
4976                         goto err_remove;
4977                 }
4978         }
4979
4980         if (state->internal->dev_ver >= 0x30)
4981                 state->frontend.ops.info.caps |= FE_CAN_MULTISTREAM;
4982
4983         /* workaround for stuck DiSEqC output */
4984         if (config->diseqc_envelope_mode)
4985                 stv090x_send_diseqc_burst(&state->frontend, SEC_MINI_A);
4986
4987         config->set_gpio = stv090x_set_gpio;
4988
4989         dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
4990                state->device == STV0900 ? "STV0900" : "STV0903",
4991                demod,
4992                state->internal->dev_ver);
4993
4994         return &state->frontend;
4995
4996 err_remove:
4997         remove_dev(state->internal);
4998         kfree(state->internal);
4999 error:
5000         kfree(state);
5001         return NULL;
5002 }
5003 EXPORT_SYMBOL(stv090x_attach);
5004 MODULE_PARM_DESC(verbose, "Set Verbosity level");
5005 MODULE_AUTHOR("Manu Abraham");
5006 MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
5007 MODULE_LICENSE("GPL");