drivers/media/i2c/adv7180.c

   1 /*
   2  * adv7180.c Analog Devices ADV7180 video decoder driver
   3  * Copyright (c) 2009 Intel Corporation
   4  * Copyright (C) 2013 Cogent Embedded, Inc.
   5  * Copyright (C) 2013 Renesas Solutions Corp.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/init.h>
  23 #include <linux/errno.h>
  24 #include <linux/kernel.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/i2c.h>
  27 #include <linux/slab.h>
  28 #include <linux/of.h>
  29 #include <linux/gpio/consumer.h>
  30 #include <linux/videodev2.h>
  31 #include <media/v4l2-ioctl.h>
  32 #include <media/v4l2-event.h>
  33 #include <media/v4l2-device.h>
  34 #include <media/v4l2-ctrls.h>
  35 #include <linux/mutex.h>
  36 #include <linux/delay.h>
  37
  38 #define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM              0x0
  39 #define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM_PED          0x1
  40 #define ADV7180_STD_AD_PAL_N_NTSC_J_SECAM               0x2
  41 #define ADV7180_STD_AD_PAL_N_NTSC_M_SECAM               0x3
  42 #define ADV7180_STD_NTSC_J                              0x4
  43 #define ADV7180_STD_NTSC_M                              0x5
  44 #define ADV7180_STD_PAL60                               0x6
  45 #define ADV7180_STD_NTSC_443                            0x7
  46 #define ADV7180_STD_PAL_BG                              0x8
  47 #define ADV7180_STD_PAL_N                               0x9
  48 #define ADV7180_STD_PAL_M                               0xa
  49 #define ADV7180_STD_PAL_M_PED                           0xb
  50 #define ADV7180_STD_PAL_COMB_N                          0xc
  51 #define ADV7180_STD_PAL_COMB_N_PED                      0xd
  52 #define ADV7180_STD_PAL_SECAM                           0xe
  53 #define ADV7180_STD_PAL_SECAM_PED                       0xf
  54
  55 #define ADV7180_REG_INPUT_CONTROL                       0x0000
  56 #define ADV7180_INPUT_CONTROL_INSEL_MASK                0x0f
  57
  58 #define ADV7182_REG_INPUT_VIDSEL                        0x0002
  59
  60 #define ADV7180_REG_OUTPUT_CONTROL                      0x0003
  61 #define ADV7180_REG_EXTENDED_OUTPUT_CONTROL             0x0004
  62 #define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS         0xC5
  63
  64 #define ADV7180_REG_AUTODETECT_ENABLE                   0x0007
  65 #define ADV7180_AUTODETECT_DEFAULT                      0x7f
  66 /* Contrast */
  67 #define ADV7180_REG_CON         0x0008  /*Unsigned */
  68 #define ADV7180_CON_MIN         0
  69 #define ADV7180_CON_DEF         128
  70 #define ADV7180_CON_MAX         255
  71 /* Brightness*/
  72 #define ADV7180_REG_BRI         0x000a  /*Signed */
  73 #define ADV7180_BRI_MIN         -128
  74 #define ADV7180_BRI_DEF         0
  75 #define ADV7180_BRI_MAX         127
  76 /* Hue */
  77 #define ADV7180_REG_HUE         0x000b  /*Signed, inverted */
  78 #define ADV7180_HUE_MIN         -127
  79 #define ADV7180_HUE_DEF         0
  80 #define ADV7180_HUE_MAX         128
  81
  82 #define ADV7180_REG_CTRL                0x000e
  83 #define ADV7180_CTRL_IRQ_SPACE          0x20
  84
  85 #define ADV7180_REG_PWR_MAN             0x0f
  86 #define ADV7180_PWR_MAN_ON              0x04
  87 #define ADV7180_PWR_MAN_OFF             0x24
  88 #define ADV7180_PWR_MAN_RES             0x80
  89
  90 #define ADV7180_REG_STATUS1             0x0010
  91 #define ADV7180_STATUS1_IN_LOCK         0x01
  92 #define ADV7180_STATUS1_AUTOD_MASK      0x70
  93 #define ADV7180_STATUS1_AUTOD_NTSM_M_J  0x00
  94 #define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10
  95 #define ADV7180_STATUS1_AUTOD_PAL_M     0x20
  96 #define ADV7180_STATUS1_AUTOD_PAL_60    0x30
  97 #define ADV7180_STATUS1_AUTOD_PAL_B_G   0x40
  98 #define ADV7180_STATUS1_AUTOD_SECAM     0x50
  99 #define ADV7180_STATUS1_AUTOD_PAL_COMB  0x60
 100 #define ADV7180_STATUS1_AUTOD_SECAM_525 0x70
 101
 102 #define ADV7180_REG_IDENT 0x0011
 103 #define ADV7180_ID_7180 0x18
 104
 105 #define ADV7180_REG_STATUS3             0x0013
 106 #define ADV7180_REG_ANALOG_CLAMP_CTL    0x0014
 107 #define ADV7180_REG_SHAP_FILTER_CTL_1   0x0017
 108 #define ADV7180_REG_CTRL_2              0x001d
 109 #define ADV7180_REG_VSYNC_FIELD_CTL_1   0x0031
 110 #define ADV7180_REG_MANUAL_WIN_CTL_1    0x003d
 111 #define ADV7180_REG_MANUAL_WIN_CTL_2    0x003e
 112 #define ADV7180_REG_MANUAL_WIN_CTL_3    0x003f
 113 #define ADV7180_REG_LOCK_CNT            0x0051
 114 #define ADV7180_REG_CVBS_TRIM           0x0052
 115 #define ADV7180_REG_CLAMP_ADJ           0x005a
 116 #define ADV7180_REG_RES_CIR             0x005f
 117 #define ADV7180_REG_DIFF_MODE           0x0060
 118
 119 #define ADV7180_REG_ICONF1              0x2040
 120 #define ADV7180_ICONF1_ACTIVE_LOW       0x01
 121 #define ADV7180_ICONF1_PSYNC_ONLY       0x10
 122 #define ADV7180_ICONF1_ACTIVE_TO_CLR    0xC0
 123 /* Saturation */
 124 #define ADV7180_REG_SD_SAT_CB   0x00e3  /*Unsigned */
 125 #define ADV7180_REG_SD_SAT_CR   0x00e4  /*Unsigned */
 126 #define ADV7180_SAT_MIN         0
 127 #define ADV7180_SAT_DEF         128
 128 #define ADV7180_SAT_MAX         255
 129
 130 #define ADV7180_IRQ1_LOCK       0x01
 131 #define ADV7180_IRQ1_UNLOCK     0x02
 132 #define ADV7180_REG_ISR1        0x2042
 133 #define ADV7180_REG_ICR1        0x2043
 134 #define ADV7180_REG_IMR1        0x2044
 135 #define ADV7180_REG_IMR2        0x2048
 136 #define ADV7180_IRQ3_AD_CHANGE  0x08
 137 #define ADV7180_REG_ISR3        0x204A
 138 #define ADV7180_REG_ICR3        0x204B
 139 #define ADV7180_REG_IMR3        0x204C
 140 #define ADV7180_REG_IMR4        0x2050
 141
 142 #define ADV7180_REG_NTSC_V_BIT_END      0x00E6
 143 #define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND     0x4F
 144
 145 #define ADV7180_REG_VPP_SLAVE_ADDR      0xFD
 146 #define ADV7180_REG_CSI_SLAVE_ADDR      0xFE
 147
 148 #define ADV7180_REG_ACE_CTRL1           0x4080
 149 #define ADV7180_REG_ACE_CTRL5           0x4084
 150 #define ADV7180_REG_FLCONTROL           0x40e0
 151 #define ADV7180_FLCONTROL_FL_ENABLE 0x1
 152
 153 #define ADV7180_REG_RST_CLAMP   0x809c
 154 #define ADV7180_REG_AGC_ADJ1    0x80b6
 155 #define ADV7180_REG_AGC_ADJ2    0x80c0
 156
 157 #define ADV7180_CSI_REG_PWRDN   0x00
 158 #define ADV7180_CSI_PWRDN       0x80
 159
 160 #define ADV7180_INPUT_CVBS_AIN1 0x00
 161 #define ADV7180_INPUT_CVBS_AIN2 0x01
 162 #define ADV7180_INPUT_CVBS_AIN3 0x02
 163 #define ADV7180_INPUT_CVBS_AIN4 0x03
 164 #define ADV7180_INPUT_CVBS_AIN5 0x04
 165 #define ADV7180_INPUT_CVBS_AIN6 0x05
 166 #define ADV7180_INPUT_SVIDEO_AIN1_AIN2 0x06
 167 #define ADV7180_INPUT_SVIDEO_AIN3_AIN4 0x07
 168 #define ADV7180_INPUT_SVIDEO_AIN5_AIN6 0x08
 169 #define ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3 0x09
 170 #define ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0a
 171
 172 #define ADV7182_INPUT_CVBS_AIN1 0x00
 173 #define ADV7182_INPUT_CVBS_AIN2 0x01
 174 #define ADV7182_INPUT_CVBS_AIN3 0x02
 175 #define ADV7182_INPUT_CVBS_AIN4 0x03
 176 #define ADV7182_INPUT_CVBS_AIN5 0x04
 177 #define ADV7182_INPUT_CVBS_AIN6 0x05
 178 #define ADV7182_INPUT_CVBS_AIN7 0x06
 179 #define ADV7182_INPUT_CVBS_AIN8 0x07
 180 #define ADV7182_INPUT_SVIDEO_AIN1_AIN2 0x08
 181 #define ADV7182_INPUT_SVIDEO_AIN3_AIN4 0x09
 182 #define ADV7182_INPUT_SVIDEO_AIN5_AIN6 0x0a
 183 #define ADV7182_INPUT_SVIDEO_AIN7_AIN8 0x0b
 184 #define ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3 0x0c
 185 #define ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0d
 186 #define ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2 0x0e
 187 #define ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4 0x0f
 188 #define ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6 0x10
 189 #define ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8 0x11
 190
 191 #define ADV7180_DEFAULT_CSI_I2C_ADDR 0x44
 192 #define ADV7180_DEFAULT_VPP_I2C_ADDR 0x42
 193
 194 #define V4L2_CID_ADV_FAST_SWITCH        (V4L2_CID_USER_ADV7180_BASE + 0x00)
 195
 196 struct adv7180_state;
 197
 198 #define ADV7180_FLAG_RESET_POWERED      BIT(0)
 199 #define ADV7180_FLAG_V2                 BIT(1)
 200 #define ADV7180_FLAG_MIPI_CSI2          BIT(2)
 201 #define ADV7180_FLAG_I2P                BIT(3)
 202
 203 struct adv7180_chip_info {
 204         unsigned int flags;
 205         unsigned int valid_input_mask;
 206         int (*set_std)(struct adv7180_state *st, unsigned int std);
 207         int (*select_input)(struct adv7180_state *st, unsigned int input);
 208         int (*init)(struct adv7180_state *state);
 209 };
 210
 211 struct adv7180_state {
 212         struct v4l2_ctrl_handler ctrl_hdl;
 213         struct v4l2_subdev      sd;
 214         struct media_pad        pad;
 215         struct mutex            mutex; /* mutual excl. when accessing chip */
 216         int                     irq;
 217         struct gpio_desc        *pwdn_gpio;
 218         v4l2_std_id             curr_norm;
 219         bool                    powered;
 220         bool                    streaming;
 221         u8                      input;
 222
 223         struct i2c_client       *client;
 224         unsigned int            register_page;
 225         struct i2c_client       *csi_client;
 226         struct i2c_client       *vpp_client;
 227         const struct adv7180_chip_info *chip_info;
 228         enum v4l2_field         field;
 229 };
 230 #define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler,             \
 231                                             struct adv7180_state,       \
 232                                             ctrl_hdl)->sd)
 233
 234 static int adv7180_select_page(struct adv7180_state *state, unsigned int page)
 235 {
 236         if (state->register_page != page) {
 237                 i2c_smbus_write_byte_data(state->client, ADV7180_REG_CTRL,
 238                         page);
 239                 state->register_page = page;
 240         }
 241
 242         return 0;
 243 }
 244
 245 static int adv7180_write(struct adv7180_state *state, unsigned int reg,
 246         unsigned int value)
 247 {
 248         lockdep_assert_held(&state->mutex);
 249         adv7180_select_page(state, reg >> 8);
 250         return i2c_smbus_write_byte_data(state->client, reg & 0xff, value);
 251 }
 252
 253 static int adv7180_read(struct adv7180_state *state, unsigned int reg)
 254 {
 255         lockdep_assert_held(&state->mutex);
 256         adv7180_select_page(state, reg >> 8);
 257         return i2c_smbus_read_byte_data(state->client, reg & 0xff);
 258 }
 259
 260 static int adv7180_csi_write(struct adv7180_state *state, unsigned int reg,
 261         unsigned int value)
 262 {
 263         return i2c_smbus_write_byte_data(state->csi_client, reg, value);
 264 }
 265
 266 static int adv7180_set_video_standard(struct adv7180_state *state,
 267         unsigned int std)
 268 {
 269         return state->chip_info->set_std(state, std);
 270 }
 271
 272 static int adv7180_vpp_write(struct adv7180_state *state, unsigned int reg,
 273         unsigned int value)
 274 {
 275         return i2c_smbus_write_byte_data(state->vpp_client, reg, value);
 276 }
 277
 278 static v4l2_std_id adv7180_std_to_v4l2(u8 status1)
 279 {
 280         /* in case V4L2_IN_ST_NO_SIGNAL */
 281         if (!(status1 & ADV7180_STATUS1_IN_LOCK))
 282                 return V4L2_STD_UNKNOWN;
 283
 284         switch (status1 & ADV7180_STATUS1_AUTOD_MASK) {
 285         case ADV7180_STATUS1_AUTOD_NTSM_M_J:
 286                 return V4L2_STD_NTSC;
 287         case ADV7180_STATUS1_AUTOD_NTSC_4_43:
 288                 return V4L2_STD_NTSC_443;
 289         case ADV7180_STATUS1_AUTOD_PAL_M:
 290                 return V4L2_STD_PAL_M;
 291         case ADV7180_STATUS1_AUTOD_PAL_60:
 292                 return V4L2_STD_PAL_60;
 293         case ADV7180_STATUS1_AUTOD_PAL_B_G:
 294                 return V4L2_STD_PAL;
 295         case ADV7180_STATUS1_AUTOD_SECAM:
 296                 return V4L2_STD_SECAM;
 297         case ADV7180_STATUS1_AUTOD_PAL_COMB:
 298                 return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
 299         case ADV7180_STATUS1_AUTOD_SECAM_525:
 300                 return V4L2_STD_SECAM;
 301         default:
 302                 return V4L2_STD_UNKNOWN;
 303         }
 304 }
 305
 306 static int v4l2_std_to_adv7180(v4l2_std_id std)
 307 {
 308         if (std == V4L2_STD_PAL_60)
 309                 return ADV7180_STD_PAL60;
 310         if (std == V4L2_STD_NTSC_443)
 311                 return ADV7180_STD_NTSC_443;
 312         if (std == V4L2_STD_PAL_N)
 313                 return ADV7180_STD_PAL_N;
 314         if (std == V4L2_STD_PAL_M)
 315                 return ADV7180_STD_PAL_M;
 316         if (std == V4L2_STD_PAL_Nc)
 317                 return ADV7180_STD_PAL_COMB_N;
 318
 319         if (std & V4L2_STD_PAL)
 320                 return ADV7180_STD_PAL_BG;
 321         if (std & V4L2_STD_NTSC)
 322                 return ADV7180_STD_NTSC_M;
 323         if (std & V4L2_STD_SECAM)
 324                 return ADV7180_STD_PAL_SECAM;
 325
 326         return -EINVAL;
 327 }
 328
 329 static u32 adv7180_status_to_v4l2(u8 status1)
 330 {
 331         if (!(status1 & ADV7180_STATUS1_IN_LOCK))
 332                 return V4L2_IN_ST_NO_SIGNAL;
 333
 334         return 0;
 335 }
 336
 337 static int __adv7180_status(struct adv7180_state *state, u32 *status,
 338                             v4l2_std_id *std)
 339 {
 340         int status1 = adv7180_read(state, ADV7180_REG_STATUS1);
 341
 342         if (status1 < 0)
 343                 return status1;
 344
 345         if (status)
 346                 *status = adv7180_status_to_v4l2(status1);
 347         if (std)
 348                 *std = adv7180_std_to_v4l2(status1);
 349
 350         return 0;
 351 }
 352
 353 static inline struct adv7180_state *to_state(struct v4l2_subdev *sd)
 354 {
 355         return container_of(sd, struct adv7180_state, sd);
 356 }
 357
 358 static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
 359 {
 360         struct adv7180_state *state = to_state(sd);
 361         int err = mutex_lock_interruptible(&state->mutex);
 362         if (err)
 363                 return err;
 364
 365         if (state->streaming) {
 366                 err = -EBUSY;
 367                 goto unlock;
 368         }
 369
 370         err = adv7180_set_video_standard(state,
 371                         ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM);
 372         if (err)
 373                 goto unlock;
 374
 375         msleep(100);
 376         __adv7180_status(state, NULL, std);
 377
 378         err = v4l2_std_to_adv7180(state->curr_norm);
 379         if (err < 0)
 380                 goto unlock;
 381
 382         err = adv7180_set_video_standard(state, err);
 383
 384 unlock:
 385         mutex_unlock(&state->mutex);
 386         return err;
 387 }
 388
 389 static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,
 390                              u32 output, u32 config)
 391 {
 392         struct adv7180_state *state = to_state(sd);
 393         int ret = mutex_lock_interruptible(&state->mutex);
 394
 395         if (ret)
 396                 return ret;
 397
 398         if (input > 31 || !(BIT(input) & state->chip_info->valid_input_mask)) {
 399                 ret = -EINVAL;
 400                 goto out;
 401         }
 402
 403         ret = state->chip_info->select_input(state, input);
 404
 405         if (ret == 0)
 406                 state->input = input;
 407 out:
 408         mutex_unlock(&state->mutex);
 409         return ret;
 410 }
 411
 412 static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)
 413 {
 414         struct adv7180_state *state = to_state(sd);
 415         int ret = mutex_lock_interruptible(&state->mutex);
 416         if (ret)
 417                 return ret;
 418
 419         ret = __adv7180_status(state, status, NULL);
 420         mutex_unlock(&state->mutex);
 421         return ret;
 422 }
 423
 424 static int adv7180_program_std(struct adv7180_state *state)
 425 {
 426         int ret;
 427
 428         ret = v4l2_std_to_adv7180(state->curr_norm);
 429         if (ret < 0)
 430                 return ret;
 431
 432         ret = adv7180_set_video_standard(state, ret);
 433         if (ret < 0)
 434                 return ret;
 435         return 0;
 436 }
 437
 438 static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
 439 {
 440         struct adv7180_state *state = to_state(sd);
 441         int ret = mutex_lock_interruptible(&state->mutex);
 442
 443         if (ret)
 444                 return ret;
 445
 446         /* Make sure we can support this std */
 447         ret = v4l2_std_to_adv7180(std);
 448         if (ret < 0)
 449                 goto out;
 450
 451         state->curr_norm = std;
 452
 453         ret = adv7180_program_std(state);
 454 out:
 455         mutex_unlock(&state->mutex);
 456         return ret;
 457 }
 458
 459 static int adv7180_g_std(struct v4l2_subdev *sd, v4l2_std_id *norm)
 460 {
 461         struct adv7180_state *state = to_state(sd);
 462
 463         *norm = state->curr_norm;
 464
 465         return 0;
 466 }
 467
 468 static void adv7180_set_power_pin(struct adv7180_state *state, bool on)
 469 {
 470         if (!state->pwdn_gpio)
 471                 return;
 472
 473         if (on) {
 474                 gpiod_set_value_cansleep(state->pwdn_gpio, 0);
 475                 usleep_range(5000, 10000);
 476         } else {
 477                 gpiod_set_value_cansleep(state->pwdn_gpio, 1);
 478         }
 479 }
 480
 481 static int adv7180_set_power(struct adv7180_state *state, bool on)
 482 {
 483         u8 val;
 484         int ret;
 485
 486         if (on)
 487                 val = ADV7180_PWR_MAN_ON;
 488         else
 489                 val = ADV7180_PWR_MAN_OFF;
 490
 491         ret = adv7180_write(state, ADV7180_REG_PWR_MAN, val);
 492         if (ret)
 493                 return ret;
 494
 495         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 496                 if (on) {
 497                         adv7180_csi_write(state, 0xDE, 0x02);
 498                         adv7180_csi_write(state, 0xD2, 0xF7);
 499                         adv7180_csi_write(state, 0xD8, 0x65);
 500                         adv7180_csi_write(state, 0xE0, 0x09);
 501                         adv7180_csi_write(state, 0x2C, 0x00);
 502                         if (state->field == V4L2_FIELD_NONE)
 503                                 adv7180_csi_write(state, 0x1D, 0x80);
 504                         adv7180_csi_write(state, 0x00, 0x00);
 505                 } else {
 506                         adv7180_csi_write(state, 0x00, 0x80);
 507                 }
 508         }
 509
 510         return 0;
 511 }
 512
 513 static int adv7180_s_power(struct v4l2_subdev *sd, int on)
 514 {
 515         struct adv7180_state *state = to_state(sd);
 516         int ret;
 517
 518         ret = mutex_lock_interruptible(&state->mutex);
 519         if (ret)
 520                 return ret;
 521
 522         ret = adv7180_set_power(state, on);
 523         if (ret == 0)
 524                 state->powered = on;
 525
 526         mutex_unlock(&state->mutex);
 527         return ret;
 528 }
 529
 530 static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
 531 {
 532         struct v4l2_subdev *sd = to_adv7180_sd(ctrl);
 533         struct adv7180_state *state = to_state(sd);
 534         int ret = mutex_lock_interruptible(&state->mutex);
 535         int val;
 536
 537         if (ret)
 538                 return ret;
 539         val = ctrl->val;
 540         switch (ctrl->id) {
 541         case V4L2_CID_BRIGHTNESS:
 542                 ret = adv7180_write(state, ADV7180_REG_BRI, val);
 543                 break;
 544         case V4L2_CID_HUE:
 545                 /*Hue is inverted according to HSL chart */
 546                 ret = adv7180_write(state, ADV7180_REG_HUE, -val);
 547                 break;
 548         case V4L2_CID_CONTRAST:
 549                 ret = adv7180_write(state, ADV7180_REG_CON, val);
 550                 break;
 551         case V4L2_CID_SATURATION:
 552                 /*
 553                  *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE
 554                  *Let's not confuse the user, everybody understands saturation
 555                  */
 556                 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CB, val);
 557                 if (ret < 0)
 558                         break;
 559                 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CR, val);
 560                 break;
 561         case V4L2_CID_ADV_FAST_SWITCH:
 562                 if (ctrl->val) {
 563                         /* ADI required write */
 564                         adv7180_write(state, 0x80d9, 0x44);
 565                         adv7180_write(state, ADV7180_REG_FLCONTROL,
 566                                 ADV7180_FLCONTROL_FL_ENABLE);
 567                 } else {
 568                         /* ADI required write */
 569                         adv7180_write(state, 0x80d9, 0xc4);
 570                         adv7180_write(state, ADV7180_REG_FLCONTROL, 0x00);
 571                 }
 572                 break;
 573         default:
 574                 ret = -EINVAL;
 575         }
 576
 577         mutex_unlock(&state->mutex);
 578         return ret;
 579 }
 580
 581 static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
 582         .s_ctrl = adv7180_s_ctrl,
 583 };
 584
 585 static const struct v4l2_ctrl_config adv7180_ctrl_fast_switch = {
 586         .ops = &adv7180_ctrl_ops,
 587         .id = V4L2_CID_ADV_FAST_SWITCH,
 588         .name = "Fast Switching",
 589         .type = V4L2_CTRL_TYPE_BOOLEAN,
 590         .min = 0,
 591         .max = 1,
 592         .step = 1,
 593 };
 594
 595 static int adv7180_init_controls(struct adv7180_state *state)
 596 {
 597         v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
 598
 599         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 600                           V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN,
 601                           ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF);
 602         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 603                           V4L2_CID_CONTRAST, ADV7180_CON_MIN,
 604                           ADV7180_CON_MAX, 1, ADV7180_CON_DEF);
 605         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 606                           V4L2_CID_SATURATION, ADV7180_SAT_MIN,
 607                           ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF);
 608         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 609                           V4L2_CID_HUE, ADV7180_HUE_MIN,
 610                           ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
 611         v4l2_ctrl_new_custom(&state->ctrl_hdl, &adv7180_ctrl_fast_switch, NULL);
 612
 613         state->sd.ctrl_handler = &state->ctrl_hdl;
 614         if (state->ctrl_hdl.error) {
 615                 int err = state->ctrl_hdl.error;
 616
 617                 v4l2_ctrl_handler_free(&state->ctrl_hdl);
 618                 return err;
 619         }
 620         v4l2_ctrl_handler_setup(&state->ctrl_hdl);
 621
 622         return 0;
 623 }
 624 static void adv7180_exit_controls(struct adv7180_state *state)
 625 {
 626         v4l2_ctrl_handler_free(&state->ctrl_hdl);
 627 }
 628
 629 static int adv7180_enum_mbus_code(struct v4l2_subdev *sd,
 630                                   struct v4l2_subdev_pad_config *cfg,
 631                                   struct v4l2_subdev_mbus_code_enum *code)
 632 {
 633         if (code->index != 0)
 634                 return -EINVAL;
 635
 636         code->code = MEDIA_BUS_FMT_UYVY8_2X8;
 637
 638         return 0;
 639 }
 640
 641 static int adv7180_mbus_fmt(struct v4l2_subdev *sd,
 642                             struct v4l2_mbus_framefmt *fmt)
 643 {
 644         struct adv7180_state *state = to_state(sd);
 645
 646         fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
 647         fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
 648         fmt->width = 720;
 649         fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
 650
 651         return 0;
 652 }
 653
 654 static int adv7180_set_field_mode(struct adv7180_state *state)
 655 {
 656         if (!(state->chip_info->flags & ADV7180_FLAG_I2P))
 657                 return 0;
 658
 659         if (state->field == V4L2_FIELD_NONE) {
 660                 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 661                         adv7180_csi_write(state, 0x01, 0x20);
 662                         adv7180_csi_write(state, 0x02, 0x28);
 663                         adv7180_csi_write(state, 0x03, 0x38);
 664                         adv7180_csi_write(state, 0x04, 0x30);
 665                         adv7180_csi_write(state, 0x05, 0x30);
 666                         adv7180_csi_write(state, 0x06, 0x80);
 667                         adv7180_csi_write(state, 0x07, 0x70);
 668                         adv7180_csi_write(state, 0x08, 0x50);
 669                 }
 670                 adv7180_vpp_write(state, 0xa3, 0x00);
 671                 adv7180_vpp_write(state, 0x5b, 0x00);
 672                 adv7180_vpp_write(state, 0x55, 0x80);
 673         } else {
 674                 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 675                         adv7180_csi_write(state, 0x01, 0x18);
 676                         adv7180_csi_write(state, 0x02, 0x18);
 677                         adv7180_csi_write(state, 0x03, 0x30);
 678                         adv7180_csi_write(state, 0x04, 0x20);
 679                         adv7180_csi_write(state, 0x05, 0x28);
 680                         adv7180_csi_write(state, 0x06, 0x40);
 681                         adv7180_csi_write(state, 0x07, 0x58);
 682                         adv7180_csi_write(state, 0x08, 0x30);
 683                 }
 684                 adv7180_vpp_write(state, 0xa3, 0x70);
 685                 adv7180_vpp_write(state, 0x5b, 0x80);
 686                 adv7180_vpp_write(state, 0x55, 0x00);
 687         }
 688
 689         return 0;
 690 }
 691
 692 static int adv7180_get_pad_format(struct v4l2_subdev *sd,
 693                                   struct v4l2_subdev_pad_config *cfg,
 694                                   struct v4l2_subdev_format *format)
 695 {
 696         struct adv7180_state *state = to_state(sd);
 697
 698         if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
 699                 format->format = *v4l2_subdev_get_try_format(sd, cfg, 0);
 700         } else {
 701                 adv7180_mbus_fmt(sd, &format->format);
 702                 format->format.field = state->field;
 703         }
 704
 705         return 0;
 706 }
 707
 708 static int adv7180_set_pad_format(struct v4l2_subdev *sd,
 709                                   struct v4l2_subdev_pad_config *cfg,
 710                                   struct v4l2_subdev_format *format)
 711 {
 712         struct adv7180_state *state = to_state(sd);
 713         struct v4l2_mbus_framefmt *framefmt;
 714         int ret;
 715
 716         switch (format->format.field) {
 717         case V4L2_FIELD_NONE:
 718                 if (!(state->chip_info->flags & ADV7180_FLAG_I2P))
 719                         format->format.field = V4L2_FIELD_INTERLACED;
 720                 break;
 721         default:
 722                 format->format.field = V4L2_FIELD_INTERLACED;
 723                 break;
 724         }
 725
 726         ret = adv7180_mbus_fmt(sd,  &format->format);
 727
 728         if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
 729                 if (state->field != format->format.field) {
 730                         state->field = format->format.field;
 731                         adv7180_set_power(state, false);
 732                         adv7180_set_field_mode(state);
 733                         adv7180_set_power(state, true);
 734                 }
 735         } else {
 736                 framefmt = v4l2_subdev_get_try_format(sd, cfg, 0);
 737                 *framefmt = format->format;
 738         }
 739
 740         return ret;
 741 }
 742
 743 static int adv7180_g_mbus_config(struct v4l2_subdev *sd,
 744                                  struct v4l2_mbus_config *cfg)
 745 {
 746         struct adv7180_state *state = to_state(sd);
 747
 748         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 749                 cfg->type = V4L2_MBUS_CSI2;
 750                 cfg->flags = V4L2_MBUS_CSI2_1_LANE |
 751                                 V4L2_MBUS_CSI2_CHANNEL_0 |
 752                                 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
 753         } else {
 754                 /*
 755                  * The ADV7180 sensor supports BT.601/656 output modes.
 756                  * The BT.656 is default and not yet configurable by s/w.
 757                  */
 758                 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
 759                                  V4L2_MBUS_DATA_ACTIVE_HIGH;
 760                 cfg->type = V4L2_MBUS_BT656;
 761         }
 762
 763         return 0;
 764 }
 765
 766 static int adv7180_g_pixelaspect(struct v4l2_subdev *sd, struct v4l2_fract *aspect)
 767 {
 768         struct adv7180_state *state = to_state(sd);
 769
 770         if (state->curr_norm & V4L2_STD_525_60) {
 771                 aspect->numerator = 11;
 772                 aspect->denominator = 10;
 773         } else {
 774                 aspect->numerator = 54;
 775                 aspect->denominator = 59;
 776         }
 777
 778         return 0;
 779 }
 780
 781 static int adv7180_g_tvnorms(struct v4l2_subdev *sd, v4l2_std_id *norm)
 782 {
 783         *norm = V4L2_STD_ALL;
 784         return 0;
 785 }
 786
 787 static int adv7180_s_stream(struct v4l2_subdev *sd, int enable)
 788 {
 789         struct adv7180_state *state = to_state(sd);
 790         int ret;
 791
 792         /* It's always safe to stop streaming, no need to take the lock */
 793         if (!enable) {
 794                 state->streaming = enable;
 795                 return 0;
 796         }
 797
 798         /* Must wait until querystd released the lock */
 799         ret = mutex_lock_interruptible(&state->mutex);
 800         if (ret)
 801                 return ret;
 802         state->streaming = enable;
 803         mutex_unlock(&state->mutex);
 804         return 0;
 805 }
 806
 807 static int adv7180_subscribe_event(struct v4l2_subdev *sd,
 808                                    struct v4l2_fh *fh,
 809                                    struct v4l2_event_subscription *sub)
 810 {
 811         switch (sub->type) {
 812         case V4L2_EVENT_SOURCE_CHANGE:
 813                 return v4l2_src_change_event_subdev_subscribe(sd, fh, sub);
 814         case V4L2_EVENT_CTRL:
 815                 return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub);
 816         default:
 817                 return -EINVAL;
 818         }
 819 }
 820
 821 static const struct v4l2_subdev_video_ops adv7180_video_ops = {
 822         .s_std = adv7180_s_std,
 823         .g_std = adv7180_g_std,
 824         .querystd = adv7180_querystd,
 825         .g_input_status = adv7180_g_input_status,
 826         .s_routing = adv7180_s_routing,
 827         .g_mbus_config = adv7180_g_mbus_config,
 828         .g_pixelaspect = adv7180_g_pixelaspect,
 829         .g_tvnorms = adv7180_g_tvnorms,
 830         .s_stream = adv7180_s_stream,
 831 };
 832
 833 static const struct v4l2_subdev_core_ops adv7180_core_ops = {
 834         .s_power = adv7180_s_power,
 835         .subscribe_event = adv7180_subscribe_event,
 836         .unsubscribe_event = v4l2_event_subdev_unsubscribe,
 837 };
 838
 839 static const struct v4l2_subdev_pad_ops adv7180_pad_ops = {
 840         .enum_mbus_code = adv7180_enum_mbus_code,
 841         .set_fmt = adv7180_set_pad_format,
 842         .get_fmt = adv7180_get_pad_format,
 843 };
 844
 845 static const struct v4l2_subdev_ops adv7180_ops = {
 846         .core = &adv7180_core_ops,
 847         .video = &adv7180_video_ops,
 848         .pad = &adv7180_pad_ops,
 849 };
 850
 851 static irqreturn_t adv7180_irq(int irq, void *devid)
 852 {
 853         struct adv7180_state *state = devid;
 854         u8 isr3;
 855
 856         mutex_lock(&state->mutex);
 857         isr3 = adv7180_read(state, ADV7180_REG_ISR3);
 858         /* clear */
 859         adv7180_write(state, ADV7180_REG_ICR3, isr3);
 860
 861         if (isr3 & ADV7180_IRQ3_AD_CHANGE) {
 862                 static const struct v4l2_event src_ch = {
 863                         .type = V4L2_EVENT_SOURCE_CHANGE,
 864                         .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
 865                 };
 866
 867                 v4l2_subdev_notify_event(&state->sd, &src_ch);
 868         }
 869         mutex_unlock(&state->mutex);
 870
 871         return IRQ_HANDLED;
 872 }
 873
 874 static int adv7180_init(struct adv7180_state *state)
 875 {
 876         int ret;
 877
 878         /* ITU-R BT.656-4 compatible */
 879         ret = adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
 880                         ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);
 881         if (ret < 0)
 882                 return ret;
 883
 884         /* Manually set V bit end position in NTSC mode */
 885         return adv7180_write(state, ADV7180_REG_NTSC_V_BIT_END,
 886                                         ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);
 887 }
 888
 889 static int adv7180_set_std(struct adv7180_state *state, unsigned int std)
 890 {
 891         return adv7180_write(state, ADV7180_REG_INPUT_CONTROL,
 892                 (std << 4) | state->input);
 893 }
 894
 895 static int adv7180_select_input(struct adv7180_state *state, unsigned int input)
 896 {
 897         int ret;
 898
 899         ret = adv7180_read(state, ADV7180_REG_INPUT_CONTROL);
 900         if (ret < 0)
 901                 return ret;
 902
 903         ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK;
 904         ret |= input;
 905         return adv7180_write(state, ADV7180_REG_INPUT_CONTROL, ret);
 906 }
 907
 908 static int adv7182_init(struct adv7180_state *state)
 909 {
 910         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
 911                 adv7180_write(state, ADV7180_REG_CSI_SLAVE_ADDR,
 912                         ADV7180_DEFAULT_CSI_I2C_ADDR << 1);
 913
 914         if (state->chip_info->flags & ADV7180_FLAG_I2P)
 915                 adv7180_write(state, ADV7180_REG_VPP_SLAVE_ADDR,
 916                         ADV7180_DEFAULT_VPP_I2C_ADDR << 1);
 917
 918         if (state->chip_info->flags & ADV7180_FLAG_V2) {
 919                 /* ADI recommended writes for improved video quality */
 920                 adv7180_write(state, 0x0080, 0x51);
 921                 adv7180_write(state, 0x0081, 0x51);
 922                 adv7180_write(state, 0x0082, 0x68);
 923         }
 924
 925         /* ADI required writes */
 926         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 927                 adv7180_write(state, ADV7180_REG_OUTPUT_CONTROL, 0x4e);
 928                 adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL, 0x57);
 929                 adv7180_write(state, ADV7180_REG_CTRL_2, 0xc0);
 930         } else {
 931                 if (state->chip_info->flags & ADV7180_FLAG_V2)
 932                         adv7180_write(state,
 933                                       ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
 934                                       0x17);
 935                 else
 936                         adv7180_write(state,
 937                                       ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
 938                                       0x07);
 939                 adv7180_write(state, ADV7180_REG_OUTPUT_CONTROL, 0x0c);
 940                 adv7180_write(state, ADV7180_REG_CTRL_2, 0x40);
 941         }
 942
 943         adv7180_write(state, 0x0013, 0x00);
 944
 945         return 0;
 946 }
 947
 948 static int adv7182_set_std(struct adv7180_state *state, unsigned int std)
 949 {
 950         return adv7180_write(state, ADV7182_REG_INPUT_VIDSEL, std << 4);
 951 }
 952
 953 enum adv7182_input_type {
 954         ADV7182_INPUT_TYPE_CVBS,
 955         ADV7182_INPUT_TYPE_DIFF_CVBS,
 956         ADV7182_INPUT_TYPE_SVIDEO,
 957         ADV7182_INPUT_TYPE_YPBPR,
 958 };
 959
 960 static enum adv7182_input_type adv7182_get_input_type(unsigned int input)
 961 {
 962         switch (input) {
 963         case ADV7182_INPUT_CVBS_AIN1:
 964         case ADV7182_INPUT_CVBS_AIN2:
 965         case ADV7182_INPUT_CVBS_AIN3:
 966         case ADV7182_INPUT_CVBS_AIN4:
 967         case ADV7182_INPUT_CVBS_AIN5:
 968         case ADV7182_INPUT_CVBS_AIN6:
 969         case ADV7182_INPUT_CVBS_AIN7:
 970         case ADV7182_INPUT_CVBS_AIN8:
 971                 return ADV7182_INPUT_TYPE_CVBS;
 972         case ADV7182_INPUT_SVIDEO_AIN1_AIN2:
 973         case ADV7182_INPUT_SVIDEO_AIN3_AIN4:
 974         case ADV7182_INPUT_SVIDEO_AIN5_AIN6:
 975         case ADV7182_INPUT_SVIDEO_AIN7_AIN8:
 976                 return ADV7182_INPUT_TYPE_SVIDEO;
 977         case ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3:
 978         case ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6:
 979                 return ADV7182_INPUT_TYPE_YPBPR;
 980         case ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2:
 981         case ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4:
 982         case ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6:
 983         case ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8:
 984                 return ADV7182_INPUT_TYPE_DIFF_CVBS;
 985         default: /* Will never happen */
 986                 return 0;
 987         }
 988 }
 989
 990 /* ADI recommended writes to registers 0x52, 0x53, 0x54 */
 991 static unsigned int adv7182_lbias_settings[][3] = {
 992         [ADV7182_INPUT_TYPE_CVBS] = { 0xCB, 0x4E, 0x80 },
 993         [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 },
 994         [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 },
 995         [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 },
 996 };
 997
 998 static unsigned int adv7280_lbias_settings[][3] = {
 999         [ADV7182_INPUT_TYPE_CVBS] = { 0xCD, 0x4E, 0x80 },
1000         [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 },
1001         [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 },
1002         [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 },
1003 };
1004
1005 static int adv7182_select_input(struct adv7180_state *state, unsigned int input)
1006 {
1007         enum adv7182_input_type input_type;
1008         unsigned int *lbias;
1009         unsigned int i;
1010         int ret;
1011
1012         ret = adv7180_write(state, ADV7180_REG_INPUT_CONTROL, input);
1013         if (ret)
1014                 return ret;
1015
1016         /* Reset clamp circuitry - ADI recommended writes */
1017         adv7180_write(state, ADV7180_REG_RST_CLAMP, 0x00);
1018         adv7180_write(state, ADV7180_REG_RST_CLAMP, 0xff);
1019
1020         input_type = adv7182_get_input_type(input);
1021
1022         switch (input_type) {
1023         case ADV7182_INPUT_TYPE_CVBS:
1024         case ADV7182_INPUT_TYPE_DIFF_CVBS:
1025                 /* ADI recommends to use the SH1 filter */
1026                 adv7180_write(state, ADV7180_REG_SHAP_FILTER_CTL_1, 0x41);
1027                 break;
1028         default:
1029                 adv7180_write(state, ADV7180_REG_SHAP_FILTER_CTL_1, 0x01);
1030                 break;
1031         }
1032
1033         if (state->chip_info->flags & ADV7180_FLAG_V2)
1034                 lbias = adv7280_lbias_settings[input_type];
1035         else
1036                 lbias = adv7182_lbias_settings[input_type];
1037
1038         for (i = 0; i < ARRAY_SIZE(adv7182_lbias_settings[0]); i++)
1039                 adv7180_write(state, ADV7180_REG_CVBS_TRIM + i, lbias[i]);
1040
1041         if (input_type == ADV7182_INPUT_TYPE_DIFF_CVBS) {
1042                 /* ADI required writes to make differential CVBS work */
1043                 adv7180_write(state, ADV7180_REG_RES_CIR, 0xa8);
1044                 adv7180_write(state, ADV7180_REG_CLAMP_ADJ, 0x90);
1045                 adv7180_write(state, ADV7180_REG_DIFF_MODE, 0xb0);
1046                 adv7180_write(state, ADV7180_REG_AGC_ADJ1, 0x08);
1047                 adv7180_write(state, ADV7180_REG_AGC_ADJ2, 0xa0);
1048         } else {
1049                 adv7180_write(state, ADV7180_REG_RES_CIR, 0xf0);
1050                 adv7180_write(state, ADV7180_REG_CLAMP_ADJ, 0xd0);
1051                 adv7180_write(state, ADV7180_REG_DIFF_MODE, 0x10);
1052                 adv7180_write(state, ADV7180_REG_AGC_ADJ1, 0x9c);
1053                 adv7180_write(state, ADV7180_REG_AGC_ADJ2, 0x00);
1054         }
1055
1056         return 0;
1057 }
1058
1059 static const struct adv7180_chip_info adv7180_info = {
1060         .flags = ADV7180_FLAG_RESET_POWERED,
1061         /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept
1062          * all inputs and let the card driver take care of validation
1063          */
1064         .valid_input_mask = BIT(ADV7180_INPUT_CVBS_AIN1) |
1065                 BIT(ADV7180_INPUT_CVBS_AIN2) |
1066                 BIT(ADV7180_INPUT_CVBS_AIN3) |
1067                 BIT(ADV7180_INPUT_CVBS_AIN4) |
1068                 BIT(ADV7180_INPUT_CVBS_AIN5) |
1069                 BIT(ADV7180_INPUT_CVBS_AIN6) |
1070                 BIT(ADV7180_INPUT_SVIDEO_AIN1_AIN2) |
1071                 BIT(ADV7180_INPUT_SVIDEO_AIN3_AIN4) |
1072                 BIT(ADV7180_INPUT_SVIDEO_AIN5_AIN6) |
1073                 BIT(ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1074                 BIT(ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6),
1075         .init = adv7180_init,
1076         .set_std = adv7180_set_std,
1077         .select_input = adv7180_select_input,
1078 };
1079
1080 static const struct adv7180_chip_info adv7182_info = {
1081         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1082                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1083                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1084                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1085                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1086                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1087                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1088                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1089                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4),
1090         .init = adv7182_init,
1091         .set_std = adv7182_set_std,
1092         .select_input = adv7182_select_input,
1093 };
1094
1095 static const struct adv7180_chip_info adv7280_info = {
1096         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_I2P,
1097         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1098                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1099                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1100                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1101                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1102                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1103                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3),
1104         .init = adv7182_init,
1105         .set_std = adv7182_set_std,
1106         .select_input = adv7182_select_input,
1107 };
1108
1109 static const struct adv7180_chip_info adv7280_m_info = {
1110         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2 | ADV7180_FLAG_I2P,
1111         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1112                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1113                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1114                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1115                 BIT(ADV7182_INPUT_CVBS_AIN5) |
1116                 BIT(ADV7182_INPUT_CVBS_AIN6) |
1117                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1118                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1119                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1120                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1121                 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) |
1122                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1123                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1124                 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6),
1125         .init = adv7182_init,
1126         .set_std = adv7182_set_std,
1127         .select_input = adv7182_select_input,
1128 };
1129
1130 static const struct adv7180_chip_info adv7281_info = {
1131         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
1132         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1133                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1134                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1135                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1136                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1137                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1138                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1139                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1140         .init = adv7182_init,
1141         .set_std = adv7182_set_std,
1142         .select_input = adv7182_select_input,
1143 };
1144
1145 static const struct adv7180_chip_info adv7281_m_info = {
1146         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
1147         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1148                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1149                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1150                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1151                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1152                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1153                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1154                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1155                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1156                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1157                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1158                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
1159                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1160         .init = adv7182_init,
1161         .set_std = adv7182_set_std,
1162         .select_input = adv7182_select_input,
1163 };
1164
1165 static const struct adv7180_chip_info adv7281_ma_info = {
1166         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
1167         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1168                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1169                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1170                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1171                 BIT(ADV7182_INPUT_CVBS_AIN5) |
1172                 BIT(ADV7182_INPUT_CVBS_AIN6) |
1173                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1174                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1175                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1176                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1177                 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) |
1178                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1179                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1180                 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6) |
1181                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1182                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
1183                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6) |
1184                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1185         .init = adv7182_init,
1186         .set_std = adv7182_set_std,
1187         .select_input = adv7182_select_input,
1188 };
1189
1190 static const struct adv7180_chip_info adv7282_info = {
1191         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_I2P,
1192         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1193                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1194                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1195                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1196                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1197                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1198                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1199                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1200         .init = adv7182_init,
1201         .set_std = adv7182_set_std,
1202         .select_input = adv7182_select_input,
1203 };
1204
1205 static const struct adv7180_chip_info adv7282_m_info = {
1206         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2 | ADV7180_FLAG_I2P,
1207         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1208                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1209                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1210                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1211                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1212                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1213                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1214                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1215                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1216                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1217                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
1218                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1219         .init = adv7182_init,
1220         .set_std = adv7182_set_std,
1221         .select_input = adv7182_select_input,
1222 };
1223
1224 static int init_device(struct adv7180_state *state)
1225 {
1226         int ret;
1227
1228         mutex_lock(&state->mutex);
1229
1230         adv7180_set_power_pin(state, true);
1231
1232         adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES);
1233         usleep_range(5000, 10000);
1234
1235         ret = state->chip_info->init(state);
1236         if (ret)
1237                 goto out_unlock;
1238
1239         ret = adv7180_program_std(state);
1240         if (ret)
1241                 goto out_unlock;
1242
1243         adv7180_set_field_mode(state);
1244
1245         /* register for interrupts */
1246         if (state->irq > 0) {
1247                 /* config the Interrupt pin to be active low */
1248                 ret = adv7180_write(state, ADV7180_REG_ICONF1,
1249                                                 ADV7180_ICONF1_ACTIVE_LOW |
1250                                                 ADV7180_ICONF1_PSYNC_ONLY);
1251                 if (ret < 0)
1252                         goto out_unlock;
1253
1254                 ret = adv7180_write(state, ADV7180_REG_IMR1, 0);
1255                 if (ret < 0)
1256                         goto out_unlock;
1257
1258                 ret = adv7180_write(state, ADV7180_REG_IMR2, 0);
1259                 if (ret < 0)
1260                         goto out_unlock;
1261
1262                 /* enable AD change interrupts interrupts */
1263                 ret = adv7180_write(state, ADV7180_REG_IMR3,
1264                                                 ADV7180_IRQ3_AD_CHANGE);
1265                 if (ret < 0)
1266                         goto out_unlock;
1267
1268                 ret = adv7180_write(state, ADV7180_REG_IMR4, 0);
1269                 if (ret < 0)
1270                         goto out_unlock;
1271         }
1272
1273 out_unlock:
1274         mutex_unlock(&state->mutex);
1275
1276         return ret;
1277 }
1278
1279 static int adv7180_probe(struct i2c_client *client,
1280                          const struct i2c_device_id *id)
1281 {
1282         struct adv7180_state *state;
1283         struct v4l2_subdev *sd;
1284         int ret;
1285
1286         /* Check if the adapter supports the needed features */
1287         if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1288                 return -EIO;
1289
1290         v4l_info(client, "chip found @ 0x%02x (%s)\n",
1291                  client->addr, client->adapter->name);
1292
1293         state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
1294         if (state == NULL)
1295                 return -ENOMEM;
1296
1297         state->client = client;
1298         state->field = V4L2_FIELD_INTERLACED;
1299         state->chip_info = (struct adv7180_chip_info *)id->driver_data;
1300
1301         state->pwdn_gpio = devm_gpiod_get_optional(&client->dev, "powerdown",
1302                                                    GPIOD_OUT_HIGH);
1303         if (IS_ERR(state->pwdn_gpio)) {
1304                 ret = PTR_ERR(state->pwdn_gpio);
1305                 v4l_err(client, "request for power pin failed: %d\n", ret);
1306                 return ret;
1307         }
1308
1309         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
1310                 state->csi_client = i2c_new_dummy(client->adapter,
1311                                 ADV7180_DEFAULT_CSI_I2C_ADDR);
1312                 if (!state->csi_client)
1313                         return -ENOMEM;
1314         }
1315
1316         if (state->chip_info->flags & ADV7180_FLAG_I2P) {
1317                 state->vpp_client = i2c_new_dummy(client->adapter,
1318                                 ADV7180_DEFAULT_VPP_I2C_ADDR);
1319                 if (!state->vpp_client) {
1320                         ret = -ENOMEM;
1321                         goto err_unregister_csi_client;
1322                 }
1323         }
1324
1325         state->irq = client->irq;
1326         mutex_init(&state->mutex);
1327         state->curr_norm = V4L2_STD_NTSC;
1328         if (state->chip_info->flags & ADV7180_FLAG_RESET_POWERED)
1329                 state->powered = true;
1330         else
1331                 state->powered = false;
1332         state->input = 0;
1333         sd = &state->sd;
1334         v4l2_i2c_subdev_init(sd, client, &adv7180_ops);
1335         sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
1336
1337         ret = adv7180_init_controls(state);
1338         if (ret)
1339                 goto err_unregister_vpp_client;
1340
1341         state->pad.flags = MEDIA_PAD_FL_SOURCE;
1342         sd->entity.flags |= MEDIA_ENT_F_ATV_DECODER;
1343         ret = media_entity_pads_init(&sd->entity, 1, &state->pad);
1344         if (ret)
1345                 goto err_free_ctrl;
1346
1347         ret = init_device(state);
1348         if (ret)
1349                 goto err_media_entity_cleanup;
1350
1351         if (state->irq) {
1352                 ret = request_threaded_irq(client->irq, NULL, adv7180_irq,
1353                                            IRQF_ONESHOT | IRQF_TRIGGER_FALLING,
1354                                            KBUILD_MODNAME, state);
1355                 if (ret)
1356                         goto err_media_entity_cleanup;
1357         }
1358
1359         ret = v4l2_async_register_subdev(sd);
1360         if (ret)
1361                 goto err_free_irq;
1362
1363         return 0;
1364
1365 err_free_irq:
1366         if (state->irq > 0)
1367                 free_irq(client->irq, state);
1368 err_media_entity_cleanup:
1369         media_entity_cleanup(&sd->entity);
1370 err_free_ctrl:
1371         adv7180_exit_controls(state);
1372 err_unregister_vpp_client:
1373         if (state->chip_info->flags & ADV7180_FLAG_I2P)
1374                 i2c_unregister_device(state->vpp_client);
1375 err_unregister_csi_client:
1376         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
1377                 i2c_unregister_device(state->csi_client);
1378         mutex_destroy(&state->mutex);
1379         return ret;
1380 }
1381
1382 static int adv7180_remove(struct i2c_client *client)
1383 {
1384         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1385         struct adv7180_state *state = to_state(sd);
1386
1387         v4l2_async_unregister_subdev(sd);
1388
1389         if (state->irq > 0)
1390                 free_irq(client->irq, state);
1391
1392         media_entity_cleanup(&sd->entity);
1393         adv7180_exit_controls(state);
1394
1395         if (state->chip_info->flags & ADV7180_FLAG_I2P)
1396                 i2c_unregister_device(state->vpp_client);
1397         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
1398                 i2c_unregister_device(state->csi_client);
1399
1400         adv7180_set_power_pin(state, false);
1401
1402         mutex_destroy(&state->mutex);
1403
1404         return 0;
1405 }
1406
1407 static const struct i2c_device_id adv7180_id[] = {
1408         { "adv7180", (kernel_ulong_t)&adv7180_info },
1409         { "adv7182", (kernel_ulong_t)&adv7182_info },
1410         { "adv7280", (kernel_ulong_t)&adv7280_info },
1411         { "adv7280-m", (kernel_ulong_t)&adv7280_m_info },
1412         { "adv7281", (kernel_ulong_t)&adv7281_info },
1413         { "adv7281-m", (kernel_ulong_t)&adv7281_m_info },
1414         { "adv7281-ma", (kernel_ulong_t)&adv7281_ma_info },
1415         { "adv7282", (kernel_ulong_t)&adv7282_info },
1416         { "adv7282-m", (kernel_ulong_t)&adv7282_m_info },
1417         {},
1418 };
1419 MODULE_DEVICE_TABLE(i2c, adv7180_id);
1420
1421 #ifdef CONFIG_PM_SLEEP
1422 static int adv7180_suspend(struct device *dev)
1423 {
1424         struct i2c_client *client = to_i2c_client(dev);
1425         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1426         struct adv7180_state *state = to_state(sd);
1427
1428         return adv7180_set_power(state, false);
1429 }
1430
1431 static int adv7180_resume(struct device *dev)
1432 {
1433         struct i2c_client *client = to_i2c_client(dev);
1434         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1435         struct adv7180_state *state = to_state(sd);
1436         int ret;
1437
1438         ret = init_device(state);
1439         if (ret < 0)
1440                 return ret;
1441
1442         ret = adv7180_set_power(state, state->powered);
1443         if (ret)
1444                 return ret;
1445
1446         return 0;
1447 }
1448
1449 static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume);
1450 #define ADV7180_PM_OPS (&adv7180_pm_ops)
1451
1452 #else
1453 #define ADV7180_PM_OPS NULL
1454 #endif
1455
1456 #ifdef CONFIG_OF
1457 static const struct of_device_id adv7180_of_id[] = {
1458         { .compatible = "adi,adv7180", },
1459         { .compatible = "adi,adv7182", },
1460         { .compatible = "adi,adv7280", },
1461         { .compatible = "adi,adv7280-m", },
1462         { .compatible = "adi,adv7281", },
1463         { .compatible = "adi,adv7281-m", },
1464         { .compatible = "adi,adv7281-ma", },
1465         { .compatible = "adi,adv7282", },
1466         { .compatible = "adi,adv7282-m", },
1467         { },
1468 };
1469
1470 MODULE_DEVICE_TABLE(of, adv7180_of_id);
1471 #endif
1472
1473 static struct i2c_driver adv7180_driver = {
1474         .driver = {
1475                    .name = KBUILD_MODNAME,
1476                    .pm = ADV7180_PM_OPS,
1477                    .of_match_table = of_match_ptr(adv7180_of_id),
1478                    },
1479         .probe = adv7180_probe,
1480         .remove = adv7180_remove,
1481         .id_table = adv7180_id,
1482 };
1483
1484 module_i2c_driver(adv7180_driver);
1485
1486 MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver");
1487 MODULE_AUTHOR("Mocean Laboratories");
1488 MODULE_LICENSE("GPL v2");