drivers/media/i2c/ks0127.c

   1 /*
   2  * Video Capture Driver (Video for Linux 1/2)
   3  * for the Matrox Marvel G200,G400 and Rainbow Runner-G series
   4  *
   5  * This module is an interface to the KS0127 video decoder chip.
   6  *
   7  * Copyright (C) 1999  Ryan Drake <stiletto@mediaone.net>
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version 2
  12  * of the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  *****************************************************************************
  20  *
  21  * Modified and extended by
  22  *      Mike Bernson <mike@mlb.org>
  23  *      Gerard v.d. Horst
  24  *      Leon van Stuivenberg <l.vanstuivenberg@chello.nl>
  25  *      Gernot Ziegler <gz@lysator.liu.se>
  26  *
  27  * Version History:
  28  * V1.0 Ryan Drake         Initial version by Ryan Drake
  29  * V1.1 Gerard v.d. Horst  Added some debugoutput, reset the video-standard
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/module.h>
  34 #include <linux/delay.h>
  35 #include <linux/errno.h>
  36 #include <linux/kernel.h>
  37 #include <linux/i2c.h>
  38 #include <linux/videodev2.h>
  39 #include <linux/slab.h>
  40 #include <media/v4l2-device.h>
  41 #include "ks0127.h"
  42
  43 MODULE_DESCRIPTION("KS0127 video decoder driver");
  44 MODULE_AUTHOR("Ryan Drake");
  45 MODULE_LICENSE("GPL");
  46
  47 /* Addresses */
  48 #define I2C_KS0127_ADDON   0xD8
  49 #define I2C_KS0127_ONBOARD 0xDA
  50
  51
  52 /* ks0127 control registers */
  53 #define KS_STAT     0x00
  54 #define KS_CMDA     0x01
  55 #define KS_CMDB     0x02
  56 #define KS_CMDC     0x03
  57 #define KS_CMDD     0x04
  58 #define KS_HAVB     0x05
  59 #define KS_HAVE     0x06
  60 #define KS_HS1B     0x07
  61 #define KS_HS1E     0x08
  62 #define KS_HS2B     0x09
  63 #define KS_HS2E     0x0a
  64 #define KS_AGC      0x0b
  65 #define KS_HXTRA    0x0c
  66 #define KS_CDEM     0x0d
  67 #define KS_PORTAB   0x0e
  68 #define KS_LUMA     0x0f
  69 #define KS_CON      0x10
  70 #define KS_BRT      0x11
  71 #define KS_CHROMA   0x12
  72 #define KS_CHROMB   0x13
  73 #define KS_DEMOD    0x14
  74 #define KS_SAT      0x15
  75 #define KS_HUE      0x16
  76 #define KS_VERTIA   0x17
  77 #define KS_VERTIB   0x18
  78 #define KS_VERTIC   0x19
  79 #define KS_HSCLL    0x1a
  80 #define KS_HSCLH    0x1b
  81 #define KS_VSCLL    0x1c
  82 #define KS_VSCLH    0x1d
  83 #define KS_OFMTA    0x1e
  84 #define KS_OFMTB    0x1f
  85 #define KS_VBICTL   0x20
  86 #define KS_CCDAT2   0x21
  87 #define KS_CCDAT1   0x22
  88 #define KS_VBIL30   0x23
  89 #define KS_VBIL74   0x24
  90 #define KS_VBIL118  0x25
  91 #define KS_VBIL1512 0x26
  92 #define KS_TTFRAM   0x27
  93 #define KS_TESTA    0x28
  94 #define KS_UVOFFH   0x29
  95 #define KS_UVOFFL   0x2a
  96 #define KS_UGAIN    0x2b
  97 #define KS_VGAIN    0x2c
  98 #define KS_VAVB     0x2d
  99 #define KS_VAVE     0x2e
 100 #define KS_CTRACK   0x2f
 101 #define KS_POLCTL   0x30
 102 #define KS_REFCOD   0x31
 103 #define KS_INVALY   0x32
 104 #define KS_INVALU   0x33
 105 #define KS_INVALV   0x34
 106 #define KS_UNUSEY   0x35
 107 #define KS_UNUSEU   0x36
 108 #define KS_UNUSEV   0x37
 109 #define KS_USRSAV   0x38
 110 #define KS_USREAV   0x39
 111 #define KS_SHS1A    0x3a
 112 #define KS_SHS1B    0x3b
 113 #define KS_SHS1C    0x3c
 114 #define KS_CMDE     0x3d
 115 #define KS_VSDEL    0x3e
 116 #define KS_CMDF     0x3f
 117 #define KS_GAMMA0   0x40
 118 #define KS_GAMMA1   0x41
 119 #define KS_GAMMA2   0x42
 120 #define KS_GAMMA3   0x43
 121 #define KS_GAMMA4   0x44
 122 #define KS_GAMMA5   0x45
 123 #define KS_GAMMA6   0x46
 124 #define KS_GAMMA7   0x47
 125 #define KS_GAMMA8   0x48
 126 #define KS_GAMMA9   0x49
 127 #define KS_GAMMA10  0x4a
 128 #define KS_GAMMA11  0x4b
 129 #define KS_GAMMA12  0x4c
 130 #define KS_GAMMA13  0x4d
 131 #define KS_GAMMA14  0x4e
 132 #define KS_GAMMA15  0x4f
 133 #define KS_GAMMA16  0x50
 134 #define KS_GAMMA17  0x51
 135 #define KS_GAMMA18  0x52
 136 #define KS_GAMMA19  0x53
 137 #define KS_GAMMA20  0x54
 138 #define KS_GAMMA21  0x55
 139 #define KS_GAMMA22  0x56
 140 #define KS_GAMMA23  0x57
 141 #define KS_GAMMA24  0x58
 142 #define KS_GAMMA25  0x59
 143 #define KS_GAMMA26  0x5a
 144 #define KS_GAMMA27  0x5b
 145 #define KS_GAMMA28  0x5c
 146 #define KS_GAMMA29  0x5d
 147 #define KS_GAMMA30  0x5e
 148 #define KS_GAMMA31  0x5f
 149 #define KS_GAMMAD0  0x60
 150 #define KS_GAMMAD1  0x61
 151 #define KS_GAMMAD2  0x62
 152 #define KS_GAMMAD3  0x63
 153 #define KS_GAMMAD4  0x64
 154 #define KS_GAMMAD5  0x65
 155 #define KS_GAMMAD6  0x66
 156 #define KS_GAMMAD7  0x67
 157 #define KS_GAMMAD8  0x68
 158 #define KS_GAMMAD9  0x69
 159 #define KS_GAMMAD10 0x6a
 160 #define KS_GAMMAD11 0x6b
 161 #define KS_GAMMAD12 0x6c
 162 #define KS_GAMMAD13 0x6d
 163 #define KS_GAMMAD14 0x6e
 164 #define KS_GAMMAD15 0x6f
 165 #define KS_GAMMAD16 0x70
 166 #define KS_GAMMAD17 0x71
 167 #define KS_GAMMAD18 0x72
 168 #define KS_GAMMAD19 0x73
 169 #define KS_GAMMAD20 0x74
 170 #define KS_GAMMAD21 0x75
 171 #define KS_GAMMAD22 0x76
 172 #define KS_GAMMAD23 0x77
 173 #define KS_GAMMAD24 0x78
 174 #define KS_GAMMAD25 0x79
 175 #define KS_GAMMAD26 0x7a
 176 #define KS_GAMMAD27 0x7b
 177 #define KS_GAMMAD28 0x7c
 178 #define KS_GAMMAD29 0x7d
 179 #define KS_GAMMAD30 0x7e
 180 #define KS_GAMMAD31 0x7f
 181
 182
 183 /****************************************************************************
 184 * mga_dev : represents one ks0127 chip.
 185 ****************************************************************************/
 186
 187 struct adjust {
 188         int     contrast;
 189         int     bright;
 190         int     hue;
 191         int     ugain;
 192         int     vgain;
 193 };
 194
 195 struct ks0127 {
 196         struct v4l2_subdev sd;
 197         v4l2_std_id     norm;
 198         u8              regs[256];
 199 };
 200
 201 static inline struct ks0127 *to_ks0127(struct v4l2_subdev *sd)
 202 {
 203         return container_of(sd, struct ks0127, sd);
 204 }
 205
 206
 207 static int debug; /* insmod parameter */
 208
 209 module_param(debug, int, 0);
 210 MODULE_PARM_DESC(debug, "Debug output");
 211
 212 static u8 reg_defaults[64];
 213
 214 static void init_reg_defaults(void)
 215 {
 216         static int initialized;
 217         u8 *table = reg_defaults;
 218
 219         if (initialized)
 220                 return;
 221         initialized = 1;
 222
 223         table[KS_CMDA]     = 0x2c;  /* VSE=0, CCIR 601, autodetect standard */
 224         table[KS_CMDB]     = 0x12;  /* VALIGN=0, AGC control and input */
 225         table[KS_CMDC]     = 0x00;  /* Test options */
 226         /* clock & input select, write 1 to PORTA */
 227         table[KS_CMDD]     = 0x01;
 228         table[KS_HAVB]     = 0x00;  /* HAV Start Control */
 229         table[KS_HAVE]     = 0x00;  /* HAV End Control */
 230         table[KS_HS1B]     = 0x10;  /* HS1 Start Control */
 231         table[KS_HS1E]     = 0x00;  /* HS1 End Control */
 232         table[KS_HS2B]     = 0x00;  /* HS2 Start Control */
 233         table[KS_HS2E]     = 0x00;  /* HS2 End Control */
 234         table[KS_AGC]      = 0x53;  /* Manual setting for AGC */
 235         table[KS_HXTRA]    = 0x00;  /* Extra Bits for HAV and HS1/2 */
 236         table[KS_CDEM]     = 0x00;  /* Chroma Demodulation Control */
 237         table[KS_PORTAB]   = 0x0f;  /* port B is input, port A output GPPORT */
 238         table[KS_LUMA]     = 0x01;  /* Luma control */
 239         table[KS_CON]      = 0x00;  /* Contrast Control */
 240         table[KS_BRT]      = 0x00;  /* Brightness Control */
 241         table[KS_CHROMA]   = 0x2a;  /* Chroma control A */
 242         table[KS_CHROMB]   = 0x90;  /* Chroma control B */
 243         table[KS_DEMOD]    = 0x00;  /* Chroma Demodulation Control & Status */
 244         table[KS_SAT]      = 0x00;  /* Color Saturation Control*/
 245         table[KS_HUE]      = 0x00;  /* Hue Control */
 246         table[KS_VERTIA]   = 0x00;  /* Vertical Processing Control A */
 247         /* Vertical Processing Control B, luma 1 line delayed */
 248         table[KS_VERTIB]   = 0x12;
 249         table[KS_VERTIC]   = 0x0b;  /* Vertical Processing Control C */
 250         table[KS_HSCLL]    = 0x00;  /* Horizontal Scaling Ratio Low */
 251         table[KS_HSCLH]    = 0x00;  /* Horizontal Scaling Ratio High */
 252         table[KS_VSCLL]    = 0x00;  /* Vertical Scaling Ratio Low */
 253         table[KS_VSCLH]    = 0x00;  /* Vertical Scaling Ratio High */
 254         /* 16 bit YCbCr 4:2:2 output; I can't make the bt866 like 8 bit /Sam */
 255         table[KS_OFMTA]    = 0x30;
 256         table[KS_OFMTB]    = 0x00;  /* Output Control B */
 257         /* VBI Decoder Control; 4bit fmt: avoid Y overflow */
 258         table[KS_VBICTL]   = 0x5d;
 259         table[KS_CCDAT2]   = 0x00;  /* Read Only register */
 260         table[KS_CCDAT1]   = 0x00;  /* Read Only register */
 261         table[KS_VBIL30]   = 0xa8;  /* VBI data decoding options */
 262         table[KS_VBIL74]   = 0xaa;  /* VBI data decoding options */
 263         table[KS_VBIL118]  = 0x2a;  /* VBI data decoding options */
 264         table[KS_VBIL1512] = 0x00;  /* VBI data decoding options */
 265         table[KS_TTFRAM]   = 0x00;  /* Teletext frame alignment pattern */
 266         table[KS_TESTA]    = 0x00;  /* test register, shouldn't be written */
 267         table[KS_UVOFFH]   = 0x00;  /* UV Offset Adjustment High */
 268         table[KS_UVOFFL]   = 0x00;  /* UV Offset Adjustment Low */
 269         table[KS_UGAIN]    = 0x00;  /* U Component Gain Adjustment */
 270         table[KS_VGAIN]    = 0x00;  /* V Component Gain Adjustment */
 271         table[KS_VAVB]     = 0x07;  /* VAV Begin */
 272         table[KS_VAVE]     = 0x00;  /* VAV End */
 273         table[KS_CTRACK]   = 0x00;  /* Chroma Tracking Control */
 274         table[KS_POLCTL]   = 0x41;  /* Timing Signal Polarity Control */
 275         table[KS_REFCOD]   = 0x80;  /* Reference Code Insertion Control */
 276         table[KS_INVALY]   = 0x10;  /* Invalid Y Code */
 277         table[KS_INVALU]   = 0x80;  /* Invalid U Code */
 278         table[KS_INVALV]   = 0x80;  /* Invalid V Code */
 279         table[KS_UNUSEY]   = 0x10;  /* Unused Y Code */
 280         table[KS_UNUSEU]   = 0x80;  /* Unused U Code */
 281         table[KS_UNUSEV]   = 0x80;  /* Unused V Code */
 282         table[KS_USRSAV]   = 0x00;  /* reserved */
 283         table[KS_USREAV]   = 0x00;  /* reserved */
 284         table[KS_SHS1A]    = 0x00;  /* User Defined SHS1 A */
 285         /* User Defined SHS1 B, ALT656=1 on 0127B */
 286         table[KS_SHS1B]    = 0x80;
 287         table[KS_SHS1C]    = 0x00;  /* User Defined SHS1 C */
 288         table[KS_CMDE]     = 0x00;  /* Command Register E */
 289         table[KS_VSDEL]    = 0x00;  /* VS Delay Control */
 290         /* Command Register F, update -immediately- */
 291         /* (there might come no vsync)*/
 292         table[KS_CMDF]     = 0x02;
 293 }
 294
 295
 296 /* We need to manually read because of a bug in the KS0127 chip.
 297  *
 298  * An explanation from kayork@mail.utexas.edu:
 299  *
 300  * During I2C reads, the KS0127 only samples for a stop condition
 301  * during the place where the acknowledge bit should be. Any standard
 302  * I2C implementation (correctly) throws in another clock transition
 303  * at the 9th bit, and the KS0127 will not recognize the stop condition
 304  * and will continue to clock out data.
 305  *
 306  * So we have to do the read ourself.  Big deal.
 307  *         workaround in i2c-algo-bit
 308  */
 309
 310
 311 static u8 ks0127_read(struct v4l2_subdev *sd, u8 reg)
 312 {
 313         struct i2c_client *client = v4l2_get_subdevdata(sd);
 314         char val = 0;
 315         struct i2c_msg msgs[] = {
 316                 {
 317                         .addr = client->addr,
 318                         .len = sizeof(reg),
 319                         .buf = &reg
 320                 },
 321                 {
 322                         .addr = client->addr,
 323                         .flags = I2C_M_RD | I2C_M_NO_RD_ACK,
 324                         .len = sizeof(val),
 325                         .buf = &val
 326                 }
 327         };
 328         int ret;
 329
 330         ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
 331         if (ret != ARRAY_SIZE(msgs))
 332                 v4l2_dbg(1, debug, sd, "read error\n");
 333
 334         return val;
 335 }
 336
 337
 338 static void ks0127_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 339 {
 340         struct i2c_client *client = v4l2_get_subdevdata(sd);
 341         struct ks0127 *ks = to_ks0127(sd);
 342         char msg[] = { reg, val };
 343
 344         if (i2c_master_send(client, msg, sizeof(msg)) != sizeof(msg))
 345                 v4l2_dbg(1, debug, sd, "write error\n");
 346
 347         ks->regs[reg] = val;
 348 }
 349
 350
 351 /* generic bit-twiddling */
 352 static void ks0127_and_or(struct v4l2_subdev *sd, u8 reg, u8 and_v, u8 or_v)
 353 {
 354         struct ks0127 *ks = to_ks0127(sd);
 355
 356         u8 val = ks->regs[reg];
 357         val = (val & and_v) | or_v;
 358         ks0127_write(sd, reg, val);
 359 }
 360
 361
 362
 363 /****************************************************************************
 364 * ks0127 private api
 365 ****************************************************************************/
 366 static void ks0127_init(struct v4l2_subdev *sd)
 367 {
 368         u8 *table = reg_defaults;
 369         int i;
 370
 371         v4l2_dbg(1, debug, sd, "reset\n");
 372         msleep(1);
 373
 374         /* initialize all registers to known values */
 375         /* (except STAT, 0x21, 0x22, TEST and 0x38,0x39) */
 376
 377         for (i = 1; i < 33; i++)
 378                 ks0127_write(sd, i, table[i]);
 379
 380         for (i = 35; i < 40; i++)
 381                 ks0127_write(sd, i, table[i]);
 382
 383         for (i = 41; i < 56; i++)
 384                 ks0127_write(sd, i, table[i]);
 385
 386         for (i = 58; i < 64; i++)
 387                 ks0127_write(sd, i, table[i]);
 388
 389
 390         if ((ks0127_read(sd, KS_STAT) & 0x80) == 0) {
 391                 v4l2_dbg(1, debug, sd, "ks0122s found\n");
 392                 return;
 393         }
 394
 395         switch (ks0127_read(sd, KS_CMDE) & 0x0f) {
 396         case 0:
 397                 v4l2_dbg(1, debug, sd, "ks0127 found\n");
 398                 break;
 399
 400         case 9:
 401                 v4l2_dbg(1, debug, sd, "ks0127B Revision A found\n");
 402                 break;
 403
 404         default:
 405                 v4l2_dbg(1, debug, sd, "unknown revision\n");
 406                 break;
 407         }
 408 }
 409
 410 static int ks0127_s_routing(struct v4l2_subdev *sd,
 411                             u32 input, u32 output, u32 config)
 412 {
 413         struct ks0127 *ks = to_ks0127(sd);
 414
 415         switch (input) {
 416         case KS_INPUT_COMPOSITE_1:
 417         case KS_INPUT_COMPOSITE_2:
 418         case KS_INPUT_COMPOSITE_3:
 419         case KS_INPUT_COMPOSITE_4:
 420         case KS_INPUT_COMPOSITE_5:
 421         case KS_INPUT_COMPOSITE_6:
 422                 v4l2_dbg(1, debug, sd,
 423                         "s_routing %d: Composite\n", input);
 424                 /* autodetect 50/60 Hz */
 425                 ks0127_and_or(sd, KS_CMDA,   0xfc, 0x00);
 426                 /* VSE=0 */
 427                 ks0127_and_or(sd, KS_CMDA,   ~0x40, 0x00);
 428                 /* set input line */
 429                 ks0127_and_or(sd, KS_CMDB,   0xb0, input);
 430                 /* non-freerunning mode */
 431                 ks0127_and_or(sd, KS_CMDC,   0x70, 0x0a);
 432                 /* analog input */
 433                 ks0127_and_or(sd, KS_CMDD,   0x03, 0x00);
 434                 /* enable chroma demodulation */
 435                 ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x00);
 436                 /* chroma trap, HYBWR=1 */
 437                 ks0127_and_or(sd, KS_LUMA,   0x00,
 438                                (reg_defaults[KS_LUMA])|0x0c);
 439                 /* scaler fullbw, luma comb off */
 440                 ks0127_and_or(sd, KS_VERTIA, 0x08, 0x81);
 441                 /* manual chroma comb .25 .5 .25 */
 442                 ks0127_and_or(sd, KS_VERTIC, 0x0f, 0x90);
 443
 444                 /* chroma path delay */
 445                 ks0127_and_or(sd, KS_CHROMB, 0x0f, 0x90);
 446
 447                 ks0127_write(sd, KS_UGAIN, reg_defaults[KS_UGAIN]);
 448                 ks0127_write(sd, KS_VGAIN, reg_defaults[KS_VGAIN]);
 449                 ks0127_write(sd, KS_UVOFFH, reg_defaults[KS_UVOFFH]);
 450                 ks0127_write(sd, KS_UVOFFL, reg_defaults[KS_UVOFFL]);
 451                 break;
 452
 453         case KS_INPUT_SVIDEO_1:
 454         case KS_INPUT_SVIDEO_2:
 455         case KS_INPUT_SVIDEO_3:
 456                 v4l2_dbg(1, debug, sd,
 457                         "s_routing %d: S-Video\n", input);
 458                 /* autodetect 50/60 Hz */
 459                 ks0127_and_or(sd, KS_CMDA,   0xfc, 0x00);
 460                 /* VSE=0 */
 461                 ks0127_and_or(sd, KS_CMDA,   ~0x40, 0x00);
 462                 /* set input line */
 463                 ks0127_and_or(sd, KS_CMDB,   0xb0, input);
 464                 /* non-freerunning mode */
 465                 ks0127_and_or(sd, KS_CMDC,   0x70, 0x0a);
 466                 /* analog input */
 467                 ks0127_and_or(sd, KS_CMDD,   0x03, 0x00);
 468                 /* enable chroma demodulation */
 469                 ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x00);
 470                 ks0127_and_or(sd, KS_LUMA, 0x00,
 471                                reg_defaults[KS_LUMA]);
 472                 /* disable luma comb */
 473                 ks0127_and_or(sd, KS_VERTIA, 0x08,
 474                                (reg_defaults[KS_VERTIA]&0xf0)|0x01);
 475                 ks0127_and_or(sd, KS_VERTIC, 0x0f,
 476                                reg_defaults[KS_VERTIC]&0xf0);
 477
 478                 ks0127_and_or(sd, KS_CHROMB, 0x0f,
 479                                reg_defaults[KS_CHROMB]&0xf0);
 480
 481                 ks0127_write(sd, KS_UGAIN, reg_defaults[KS_UGAIN]);
 482                 ks0127_write(sd, KS_VGAIN, reg_defaults[KS_VGAIN]);
 483                 ks0127_write(sd, KS_UVOFFH, reg_defaults[KS_UVOFFH]);
 484                 ks0127_write(sd, KS_UVOFFL, reg_defaults[KS_UVOFFL]);
 485                 break;
 486
 487         case KS_INPUT_YUV656:
 488                 v4l2_dbg(1, debug, sd, "s_routing 15: YUV656\n");
 489                 if (ks->norm & V4L2_STD_525_60)
 490                         /* force 60 Hz */
 491                         ks0127_and_or(sd, KS_CMDA,   0xfc, 0x03);
 492                 else
 493                         /* force 50 Hz */
 494                         ks0127_and_or(sd, KS_CMDA,   0xfc, 0x02);
 495
 496                 ks0127_and_or(sd, KS_CMDA,   0xff, 0x40); /* VSE=1 */
 497                 /* set input line and VALIGN */
 498                 ks0127_and_or(sd, KS_CMDB,   0xb0, (input | 0x40));
 499                 /* freerunning mode, */
 500                 /* TSTGEN = 1 TSTGFR=11 TSTGPH=0 TSTGPK=0  VMEM=1*/
 501                 ks0127_and_or(sd, KS_CMDC,   0x70, 0x87);
 502                 /* digital input, SYNDIR = 0 INPSL=01 CLKDIR=0 EAV=0 */
 503                 ks0127_and_or(sd, KS_CMDD,   0x03, 0x08);
 504                 /* disable chroma demodulation */
 505                 ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x30);
 506                 /* HYPK =01 CTRAP = 0 HYBWR=0 PED=1 RGBH=1 UNIT=1 */
 507                 ks0127_and_or(sd, KS_LUMA,   0x00, 0x71);
 508                 ks0127_and_or(sd, KS_VERTIC, 0x0f,
 509                                reg_defaults[KS_VERTIC]&0xf0);
 510
 511                 /* scaler fullbw, luma comb off */
 512                 ks0127_and_or(sd, KS_VERTIA, 0x08, 0x81);
 513
 514                 ks0127_and_or(sd, KS_CHROMB, 0x0f,
 515                                reg_defaults[KS_CHROMB]&0xf0);
 516
 517                 ks0127_and_or(sd, KS_CON, 0x00, 0x00);
 518                 ks0127_and_or(sd, KS_BRT, 0x00, 32);    /* spec: 34 */
 519                         /* spec: 229 (e5) */
 520                 ks0127_and_or(sd, KS_SAT, 0x00, 0xe8);
 521                 ks0127_and_or(sd, KS_HUE, 0x00, 0);
 522
 523                 ks0127_and_or(sd, KS_UGAIN, 0x00, 238);
 524                 ks0127_and_or(sd, KS_VGAIN, 0x00, 0x00);
 525
 526                 /*UOFF:0x30, VOFF:0x30, TSTCGN=1 */
 527                 ks0127_and_or(sd, KS_UVOFFH, 0x00, 0x4f);
 528                 ks0127_and_or(sd, KS_UVOFFL, 0x00, 0x00);
 529                 break;
 530
 531         default:
 532                 v4l2_dbg(1, debug, sd,
 533                         "s_routing: Unknown input %d\n", input);
 534                 break;
 535         }
 536
 537         /* hack: CDMLPF sometimes spontaneously switches on; */
 538         /* force back off */
 539         ks0127_write(sd, KS_DEMOD, reg_defaults[KS_DEMOD]);
 540         return 0;
 541 }
 542
 543 static int ks0127_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
 544 {
 545         struct ks0127 *ks = to_ks0127(sd);
 546
 547         /* Set to automatic SECAM/Fsc mode */
 548         ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x00);
 549
 550         ks->norm = std;
 551         if (std & V4L2_STD_NTSC) {
 552                 v4l2_dbg(1, debug, sd,
 553                         "s_std: NTSC_M\n");
 554                 ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x20);
 555         } else if (std & V4L2_STD_PAL_N) {
 556                 v4l2_dbg(1, debug, sd,
 557                         "s_std: NTSC_N (fixme)\n");
 558                 ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x40);
 559         } else if (std & V4L2_STD_PAL) {
 560                 v4l2_dbg(1, debug, sd,
 561                         "s_std: PAL_N\n");
 562                 ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x20);
 563         } else if (std & V4L2_STD_PAL_M) {
 564                 v4l2_dbg(1, debug, sd,
 565                         "s_std: PAL_M (fixme)\n");
 566                 ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x40);
 567         } else if (std & V4L2_STD_SECAM) {
 568                 v4l2_dbg(1, debug, sd,
 569                         "s_std: SECAM\n");
 570
 571                 /* set to secam autodetection */
 572                 ks0127_and_or(sd, KS_CHROMA, 0xdf, 0x20);
 573                 ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x00);
 574                 schedule_timeout_interruptible(HZ/10+1);
 575
 576                 /* did it autodetect? */
 577                 if (!(ks0127_read(sd, KS_DEMOD) & 0x40))
 578                         /* force to secam mode */
 579                         ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x0f);
 580         } else {
 581                 v4l2_dbg(1, debug, sd, "s_std: Unknown norm %llx\n",
 582                                (unsigned long long)std);
 583         }
 584         return 0;
 585 }
 586
 587 static int ks0127_s_stream(struct v4l2_subdev *sd, int enable)
 588 {
 589         v4l2_dbg(1, debug, sd, "s_stream(%d)\n", enable);
 590         if (enable) {
 591                 /* All output pins on */
 592                 ks0127_and_or(sd, KS_OFMTA, 0xcf, 0x30);
 593                 /* Obey the OEN pin */
 594                 ks0127_and_or(sd, KS_CDEM, 0x7f, 0x00);
 595         } else {
 596                 /* Video output pins off */
 597                 ks0127_and_or(sd, KS_OFMTA, 0xcf, 0x00);
 598                 /* Ignore the OEN pin */
 599                 ks0127_and_or(sd, KS_CDEM, 0x7f, 0x80);
 600         }
 601         return 0;
 602 }
 603
 604 static int ks0127_status(struct v4l2_subdev *sd, u32 *pstatus, v4l2_std_id *pstd)
 605 {
 606         int stat = V4L2_IN_ST_NO_SIGNAL;
 607         u8 status;
 608         v4l2_std_id std = pstd ? *pstd : V4L2_STD_ALL;
 609
 610         status = ks0127_read(sd, KS_STAT);
 611         if (!(status & 0x20))            /* NOVID not set */
 612                 stat = 0;
 613         if (!(status & 0x01)) {               /* CLOCK set */
 614                 stat |= V4L2_IN_ST_NO_COLOR;
 615                 std = V4L2_STD_UNKNOWN;
 616         } else {
 617                 if ((status & 0x08))               /* PALDET set */
 618                         std &= V4L2_STD_PAL;
 619                 else
 620                         std &= V4L2_STD_NTSC;
 621         }
 622         if ((status & 0x10))               /* PALDET set */
 623                 std &= V4L2_STD_525_60;
 624         else
 625                 std &= V4L2_STD_625_50;
 626         if (pstd)
 627                 *pstd = std;
 628         if (pstatus)
 629                 *pstatus = stat;
 630         return 0;
 631 }
 632
 633 static int ks0127_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
 634 {
 635         v4l2_dbg(1, debug, sd, "querystd\n");
 636         return ks0127_status(sd, NULL, std);
 637 }
 638
 639 static int ks0127_g_input_status(struct v4l2_subdev *sd, u32 *status)
 640 {
 641         v4l2_dbg(1, debug, sd, "g_input_status\n");
 642         return ks0127_status(sd, status, NULL);
 643 }
 644
 645 /* ----------------------------------------------------------------------- */
 646
 647 static const struct v4l2_subdev_video_ops ks0127_video_ops = {
 648         .s_std = ks0127_s_std,
 649         .s_routing = ks0127_s_routing,
 650         .s_stream = ks0127_s_stream,
 651         .querystd = ks0127_querystd,
 652         .g_input_status = ks0127_g_input_status,
 653 };
 654
 655 static const struct v4l2_subdev_ops ks0127_ops = {
 656         .video = &ks0127_video_ops,
 657 };
 658
 659 /* ----------------------------------------------------------------------- */
 660
 661
 662 static int ks0127_probe(struct i2c_client *client, const struct i2c_device_id *id)
 663 {
 664         struct ks0127 *ks;
 665         struct v4l2_subdev *sd;
 666
 667         v4l_info(client, "%s chip found @ 0x%x (%s)\n",
 668                 client->addr == (I2C_KS0127_ADDON >> 1) ? "addon" : "on-board",
 669                 client->addr << 1, client->adapter->name);
 670
 671         ks = devm_kzalloc(&client->dev, sizeof(*ks), GFP_KERNEL);
 672         if (ks == NULL)
 673                 return -ENOMEM;
 674         sd = &ks->sd;
 675         v4l2_i2c_subdev_init(sd, client, &ks0127_ops);
 676
 677         /* power up */
 678         init_reg_defaults();
 679         ks0127_write(sd, KS_CMDA, 0x2c);
 680         mdelay(10);
 681
 682         /* reset the device */
 683         ks0127_init(sd);
 684         return 0;
 685 }
 686
 687 static int ks0127_remove(struct i2c_client *client)
 688 {
 689         struct v4l2_subdev *sd = i2c_get_clientdata(client);
 690
 691         v4l2_device_unregister_subdev(sd);
 692         ks0127_write(sd, KS_OFMTA, 0x20); /* tristate */
 693         ks0127_write(sd, KS_CMDA, 0x2c | 0x80); /* power down */
 694         return 0;
 695 }
 696
 697 static const struct i2c_device_id ks0127_id[] = {
 698         { "ks0127", 0 },
 699         { "ks0127b", 0 },
 700         { "ks0122s", 0 },
 701         { }
 702 };
 703 MODULE_DEVICE_TABLE(i2c, ks0127_id);
 704
 705 static struct i2c_driver ks0127_driver = {
 706         .driver = {
 707                 .name   = "ks0127",
 708         },
 709         .probe          = ks0127_probe,
 710         .remove         = ks0127_remove,
 711         .id_table       = ks0127_id,
 712 };
 713
 714 module_i2c_driver(ks0127_driver);