GNU Linux-libre 4.19.264-gnu1
[releases.git] / drivers / media / pci / netup_unidvb / netup_unidvb_core.c
1 /*
2  * netup_unidvb_core.c
3  *
4  * Main module for NetUP Universal Dual DVB-CI
5  *
6  * Copyright (C) 2014 NetUP Inc.
7  * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
8  * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or
13  * (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  */
20
21 #include <linux/init.h>
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/kmod.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/interrupt.h>
28 #include <linux/delay.h>
29 #include <linux/list.h>
30 #include <media/videobuf2-v4l2.h>
31 #include <media/videobuf2-vmalloc.h>
32
33 #include "netup_unidvb.h"
34 #include "cxd2841er.h"
35 #include "horus3a.h"
36 #include "ascot2e.h"
37 #include "helene.h"
38 #include "lnbh25.h"
39
40 static int spi_enable;
41 module_param(spi_enable, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
42
43 MODULE_DESCRIPTION("Driver for NetUP Dual Universal DVB CI PCIe card");
44 MODULE_AUTHOR("info@netup.ru");
45 MODULE_VERSION(NETUP_UNIDVB_VERSION);
46 MODULE_LICENSE("GPL");
47
48 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
49
50 /* Avalon-MM PCI-E registers */
51 #define AVL_PCIE_IENR           0x50
52 #define AVL_PCIE_ISR            0x40
53 #define AVL_IRQ_ENABLE          0x80
54 #define AVL_IRQ_ASSERTED        0x80
55 /* GPIO registers */
56 #define GPIO_REG_IO             0x4880
57 #define GPIO_REG_IO_TOGGLE      0x4882
58 #define GPIO_REG_IO_SET         0x4884
59 #define GPIO_REG_IO_CLEAR       0x4886
60 /* GPIO bits */
61 #define GPIO_FEA_RESET          (1 << 0)
62 #define GPIO_FEB_RESET          (1 << 1)
63 #define GPIO_RFA_CTL            (1 << 2)
64 #define GPIO_RFB_CTL            (1 << 3)
65 #define GPIO_FEA_TU_RESET       (1 << 4)
66 #define GPIO_FEB_TU_RESET       (1 << 5)
67 /* DMA base address */
68 #define NETUP_DMA0_ADDR         0x4900
69 #define NETUP_DMA1_ADDR         0x4940
70 /* 8 DMA blocks * 128 packets * 188 bytes*/
71 #define NETUP_DMA_BLOCKS_COUNT  8
72 #define NETUP_DMA_PACKETS_COUNT 128
73 /* DMA status bits */
74 #define BIT_DMA_RUN             1
75 #define BIT_DMA_ERROR           2
76 #define BIT_DMA_IRQ             0x200
77
78 /**
79  * struct netup_dma_regs - the map of DMA module registers
80  * @ctrlstat_set:       Control register, write to set control bits
81  * @ctrlstat_clear:     Control register, write to clear control bits
82  * @start_addr_lo:      DMA ring buffer start address, lower part
83  * @start_addr_hi:      DMA ring buffer start address, higher part
84  * @size:               DMA ring buffer size register
85  *                      * Bits [0-7]:   DMA packet size, 188 bytes
86  *                      * Bits [16-23]: packets count in block, 128 packets
87  *                      * Bits [24-31]: blocks count, 8 blocks
88  * @timeout:            DMA timeout in units of 8ns
89  *                      For example, value of 375000000 equals to 3 sec
90  * @curr_addr_lo:       Current ring buffer head address, lower part
91  * @curr_addr_hi:       Current ring buffer head address, higher part
92  * @stat_pkt_received:  Statistic register, not tested
93  * @stat_pkt_accepted:  Statistic register, not tested
94  * @stat_pkt_overruns:  Statistic register, not tested
95  * @stat_pkt_underruns: Statistic register, not tested
96  * @stat_fifo_overruns: Statistic register, not tested
97  */
98 struct netup_dma_regs {
99         __le32  ctrlstat_set;
100         __le32  ctrlstat_clear;
101         __le32  start_addr_lo;
102         __le32  start_addr_hi;
103         __le32  size;
104         __le32  timeout;
105         __le32  curr_addr_lo;
106         __le32  curr_addr_hi;
107         __le32  stat_pkt_received;
108         __le32  stat_pkt_accepted;
109         __le32  stat_pkt_overruns;
110         __le32  stat_pkt_underruns;
111         __le32  stat_fifo_overruns;
112 } __packed __aligned(1);
113
114 struct netup_unidvb_buffer {
115         struct vb2_v4l2_buffer vb;
116         struct list_head        list;
117         u32                     size;
118 };
119
120 static int netup_unidvb_tuner_ctrl(void *priv, int is_dvb_tc);
121 static void netup_unidvb_queue_cleanup(struct netup_dma *dma);
122
123 static struct cxd2841er_config demod_config = {
124         .i2c_addr = 0xc8,
125         .xtal = SONY_XTAL_24000,
126         .flags = CXD2841ER_USE_GATECTRL | CXD2841ER_ASCOT
127 };
128
129 static struct horus3a_config horus3a_conf = {
130         .i2c_address = 0xc0,
131         .xtal_freq_mhz = 16,
132         .set_tuner_callback = netup_unidvb_tuner_ctrl
133 };
134
135 static struct ascot2e_config ascot2e_conf = {
136         .i2c_address = 0xc2,
137         .set_tuner_callback = netup_unidvb_tuner_ctrl
138 };
139
140 static struct helene_config helene_conf = {
141         .i2c_address = 0xc0,
142         .xtal = SONY_HELENE_XTAL_24000,
143         .set_tuner_callback = netup_unidvb_tuner_ctrl
144 };
145
146 static struct lnbh25_config lnbh25_conf = {
147         .i2c_address = 0x10,
148         .data2_config = LNBH25_TEN | LNBH25_EXTM
149 };
150
151 static int netup_unidvb_tuner_ctrl(void *priv, int is_dvb_tc)
152 {
153         u8 reg, mask;
154         struct netup_dma *dma = priv;
155         struct netup_unidvb_dev *ndev;
156
157         if (!priv)
158                 return -EINVAL;
159         ndev = dma->ndev;
160         dev_dbg(&ndev->pci_dev->dev, "%s(): num %d is_dvb_tc %d\n",
161                 __func__, dma->num, is_dvb_tc);
162         reg = readb(ndev->bmmio0 + GPIO_REG_IO);
163         mask = (dma->num == 0) ? GPIO_RFA_CTL : GPIO_RFB_CTL;
164
165         /* inverted tuner control in hw rev. 1.4 */
166         if (ndev->rev == NETUP_HW_REV_1_4)
167                 is_dvb_tc = !is_dvb_tc;
168
169         if (!is_dvb_tc)
170                 reg |= mask;
171         else
172                 reg &= ~mask;
173         writeb(reg, ndev->bmmio0 + GPIO_REG_IO);
174         return 0;
175 }
176
177 static void netup_unidvb_dev_enable(struct netup_unidvb_dev *ndev)
178 {
179         u16 gpio_reg;
180
181         /* enable PCI-E interrupts */
182         writel(AVL_IRQ_ENABLE, ndev->bmmio0 + AVL_PCIE_IENR);
183         /* unreset frontends bits[0:1] */
184         writeb(0x00, ndev->bmmio0 + GPIO_REG_IO);
185         msleep(100);
186         gpio_reg =
187                 GPIO_FEA_RESET | GPIO_FEB_RESET |
188                 GPIO_FEA_TU_RESET | GPIO_FEB_TU_RESET |
189                 GPIO_RFA_CTL | GPIO_RFB_CTL;
190         writeb(gpio_reg, ndev->bmmio0 + GPIO_REG_IO);
191         dev_dbg(&ndev->pci_dev->dev,
192                 "%s(): AVL_PCIE_IENR 0x%x GPIO_REG_IO 0x%x\n",
193                 __func__, readl(ndev->bmmio0 + AVL_PCIE_IENR),
194                 (int)readb(ndev->bmmio0 + GPIO_REG_IO));
195
196 }
197
198 static void netup_unidvb_dma_enable(struct netup_dma *dma, int enable)
199 {
200         u32 irq_mask = (dma->num == 0 ?
201                 NETUP_UNIDVB_IRQ_DMA1 : NETUP_UNIDVB_IRQ_DMA2);
202
203         dev_dbg(&dma->ndev->pci_dev->dev,
204                 "%s(): DMA%d enable %d\n", __func__, dma->num, enable);
205         if (enable) {
206                 writel(BIT_DMA_RUN, &dma->regs->ctrlstat_set);
207                 writew(irq_mask, dma->ndev->bmmio0 + REG_IMASK_SET);
208         } else {
209                 writel(BIT_DMA_RUN, &dma->regs->ctrlstat_clear);
210                 writew(irq_mask, dma->ndev->bmmio0 + REG_IMASK_CLEAR);
211         }
212 }
213
214 static irqreturn_t netup_dma_interrupt(struct netup_dma *dma)
215 {
216         u64 addr_curr;
217         u32 size;
218         unsigned long flags;
219         struct device *dev = &dma->ndev->pci_dev->dev;
220
221         spin_lock_irqsave(&dma->lock, flags);
222         addr_curr = ((u64)readl(&dma->regs->curr_addr_hi) << 32) |
223                 (u64)readl(&dma->regs->curr_addr_lo) | dma->high_addr;
224         /* clear IRQ */
225         writel(BIT_DMA_IRQ, &dma->regs->ctrlstat_clear);
226         /* sanity check */
227         if (addr_curr < dma->addr_phys ||
228                         addr_curr > dma->addr_phys +  dma->ring_buffer_size) {
229                 if (addr_curr != 0) {
230                         dev_err(dev,
231                                 "%s(): addr 0x%llx not from 0x%llx:0x%llx\n",
232                                 __func__, addr_curr, (u64)dma->addr_phys,
233                                 (u64)(dma->addr_phys + dma->ring_buffer_size));
234                 }
235                 goto irq_handled;
236         }
237         size = (addr_curr >= dma->addr_last) ?
238                 (u32)(addr_curr - dma->addr_last) :
239                 (u32)(dma->ring_buffer_size - (dma->addr_last - addr_curr));
240         if (dma->data_size != 0) {
241                 printk_ratelimited("%s(): lost interrupt, data size %d\n",
242                         __func__, dma->data_size);
243                 dma->data_size += size;
244         }
245         if (dma->data_size == 0 || dma->data_size > dma->ring_buffer_size) {
246                 dma->data_size = size;
247                 dma->data_offset = (u32)(dma->addr_last - dma->addr_phys);
248         }
249         dma->addr_last = addr_curr;
250         queue_work(dma->ndev->wq, &dma->work);
251 irq_handled:
252         spin_unlock_irqrestore(&dma->lock, flags);
253         return IRQ_HANDLED;
254 }
255
256 static irqreturn_t netup_unidvb_isr(int irq, void *dev_id)
257 {
258         struct pci_dev *pci_dev = (struct pci_dev *)dev_id;
259         struct netup_unidvb_dev *ndev = pci_get_drvdata(pci_dev);
260         u32 reg40, reg_isr;
261         irqreturn_t iret = IRQ_NONE;
262
263         /* disable interrupts */
264         writel(0, ndev->bmmio0 + AVL_PCIE_IENR);
265         /* check IRQ source */
266         reg40 = readl(ndev->bmmio0 + AVL_PCIE_ISR);
267         if ((reg40 & AVL_IRQ_ASSERTED) != 0) {
268                 /* IRQ is being signaled */
269                 reg_isr = readw(ndev->bmmio0 + REG_ISR);
270                 if (reg_isr & NETUP_UNIDVB_IRQ_SPI)
271                         iret = netup_spi_interrupt(ndev->spi);
272                 else if (!ndev->old_fw) {
273                         if (reg_isr & NETUP_UNIDVB_IRQ_I2C0) {
274                                 iret = netup_i2c_interrupt(&ndev->i2c[0]);
275                         } else if (reg_isr & NETUP_UNIDVB_IRQ_I2C1) {
276                                 iret = netup_i2c_interrupt(&ndev->i2c[1]);
277                         } else if (reg_isr & NETUP_UNIDVB_IRQ_DMA1) {
278                                 iret = netup_dma_interrupt(&ndev->dma[0]);
279                         } else if (reg_isr & NETUP_UNIDVB_IRQ_DMA2) {
280                                 iret = netup_dma_interrupt(&ndev->dma[1]);
281                         } else if (reg_isr & NETUP_UNIDVB_IRQ_CI) {
282                                 iret = netup_ci_interrupt(ndev);
283                         } else {
284                                 goto err;
285                         }
286                 } else {
287 err:
288                         dev_err(&pci_dev->dev,
289                                 "%s(): unknown interrupt 0x%x\n",
290                                 __func__, reg_isr);
291                 }
292         }
293         /* re-enable interrupts */
294         writel(AVL_IRQ_ENABLE, ndev->bmmio0 + AVL_PCIE_IENR);
295         return iret;
296 }
297
298 static int netup_unidvb_queue_setup(struct vb2_queue *vq,
299                                     unsigned int *nbuffers,
300                                     unsigned int *nplanes,
301                                     unsigned int sizes[],
302                                     struct device *alloc_devs[])
303 {
304         struct netup_dma *dma = vb2_get_drv_priv(vq);
305
306         dev_dbg(&dma->ndev->pci_dev->dev, "%s()\n", __func__);
307
308         *nplanes = 1;
309         if (vq->num_buffers + *nbuffers < VIDEO_MAX_FRAME)
310                 *nbuffers = VIDEO_MAX_FRAME - vq->num_buffers;
311         sizes[0] = PAGE_ALIGN(NETUP_DMA_PACKETS_COUNT * 188);
312         dev_dbg(&dma->ndev->pci_dev->dev, "%s() nbuffers=%d sizes[0]=%d\n",
313                 __func__, *nbuffers, sizes[0]);
314         return 0;
315 }
316
317 static int netup_unidvb_buf_prepare(struct vb2_buffer *vb)
318 {
319         struct netup_dma *dma = vb2_get_drv_priv(vb->vb2_queue);
320         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
321         struct netup_unidvb_buffer *buf = container_of(vbuf,
322                                 struct netup_unidvb_buffer, vb);
323
324         dev_dbg(&dma->ndev->pci_dev->dev, "%s(): buf 0x%p\n", __func__, buf);
325         buf->size = 0;
326         return 0;
327 }
328
329 static void netup_unidvb_buf_queue(struct vb2_buffer *vb)
330 {
331         unsigned long flags;
332         struct netup_dma *dma = vb2_get_drv_priv(vb->vb2_queue);
333         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
334         struct netup_unidvb_buffer *buf = container_of(vbuf,
335                                 struct netup_unidvb_buffer, vb);
336
337         dev_dbg(&dma->ndev->pci_dev->dev, "%s(): %p\n", __func__, buf);
338         spin_lock_irqsave(&dma->lock, flags);
339         list_add_tail(&buf->list, &dma->free_buffers);
340         spin_unlock_irqrestore(&dma->lock, flags);
341         mod_timer(&dma->timeout, jiffies + msecs_to_jiffies(1000));
342 }
343
344 static int netup_unidvb_start_streaming(struct vb2_queue *q, unsigned int count)
345 {
346         struct netup_dma *dma = vb2_get_drv_priv(q);
347
348         dev_dbg(&dma->ndev->pci_dev->dev, "%s()\n", __func__);
349         netup_unidvb_dma_enable(dma, 1);
350         return 0;
351 }
352
353 static void netup_unidvb_stop_streaming(struct vb2_queue *q)
354 {
355         struct netup_dma *dma = vb2_get_drv_priv(q);
356
357         dev_dbg(&dma->ndev->pci_dev->dev, "%s()\n", __func__);
358         netup_unidvb_dma_enable(dma, 0);
359         netup_unidvb_queue_cleanup(dma);
360 }
361
362 static const struct vb2_ops dvb_qops = {
363         .queue_setup            = netup_unidvb_queue_setup,
364         .buf_prepare            = netup_unidvb_buf_prepare,
365         .buf_queue              = netup_unidvb_buf_queue,
366         .start_streaming        = netup_unidvb_start_streaming,
367         .stop_streaming         = netup_unidvb_stop_streaming,
368 };
369
370 static int netup_unidvb_queue_init(struct netup_dma *dma,
371                                    struct vb2_queue *vb_queue)
372 {
373         int res;
374
375         /* Init videobuf2 queue structure */
376         vb_queue->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
377         vb_queue->io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ;
378         vb_queue->drv_priv = dma;
379         vb_queue->buf_struct_size = sizeof(struct netup_unidvb_buffer);
380         vb_queue->ops = &dvb_qops;
381         vb_queue->mem_ops = &vb2_vmalloc_memops;
382         vb_queue->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
383         res = vb2_queue_init(vb_queue);
384         if (res != 0) {
385                 dev_err(&dma->ndev->pci_dev->dev,
386                         "%s(): vb2_queue_init failed (%d)\n", __func__, res);
387         }
388         return res;
389 }
390
391 static int netup_unidvb_dvb_init(struct netup_unidvb_dev *ndev,
392                                  int num)
393 {
394         int fe_count = 2;
395         int i = 0;
396         struct vb2_dvb_frontend *fes[2];
397         u8 fe_name[32];
398
399         if (ndev->rev == NETUP_HW_REV_1_3)
400                 demod_config.xtal = SONY_XTAL_20500;
401         else
402                 demod_config.xtal = SONY_XTAL_24000;
403
404         if (num < 0 || num > 1) {
405                 dev_dbg(&ndev->pci_dev->dev,
406                         "%s(): unable to init DVB bus %d\n", __func__, num);
407                 return -ENODEV;
408         }
409         mutex_init(&ndev->frontends[num].lock);
410         INIT_LIST_HEAD(&ndev->frontends[num].felist);
411
412         for (i = 0; i < fe_count; i++) {
413                 if (vb2_dvb_alloc_frontend(&ndev->frontends[num], i+1)
414                                 == NULL) {
415                         dev_err(&ndev->pci_dev->dev,
416                                         "%s(): unable to allocate vb2_dvb_frontend\n",
417                                         __func__);
418                         return -ENOMEM;
419                 }
420         }
421
422         for (i = 0; i < fe_count; i++) {
423                 fes[i] = vb2_dvb_get_frontend(&ndev->frontends[num], i+1);
424                 if (fes[i] == NULL) {
425                         dev_err(&ndev->pci_dev->dev,
426                                 "%s(): frontends has not been allocated\n",
427                                 __func__);
428                         return -EINVAL;
429                 }
430         }
431
432         for (i = 0; i < fe_count; i++) {
433                 netup_unidvb_queue_init(&ndev->dma[num], &fes[i]->dvb.dvbq);
434                 snprintf(fe_name, sizeof(fe_name), "netup_fe%d", i);
435                 fes[i]->dvb.name = fe_name;
436         }
437
438         fes[0]->dvb.frontend = dvb_attach(cxd2841er_attach_s,
439                 &demod_config, &ndev->i2c[num].adap);
440         if (fes[0]->dvb.frontend == NULL) {
441                 dev_dbg(&ndev->pci_dev->dev,
442                         "%s(): unable to attach DVB-S/S2 frontend\n",
443                         __func__);
444                 goto frontend_detach;
445         }
446
447         if (ndev->rev == NETUP_HW_REV_1_3) {
448                 horus3a_conf.set_tuner_priv = &ndev->dma[num];
449                 if (!dvb_attach(horus3a_attach, fes[0]->dvb.frontend,
450                                         &horus3a_conf, &ndev->i2c[num].adap)) {
451                         dev_dbg(&ndev->pci_dev->dev,
452                                         "%s(): unable to attach HORUS3A DVB-S/S2 tuner frontend\n",
453                                         __func__);
454                         goto frontend_detach;
455                 }
456         } else {
457                 helene_conf.set_tuner_priv = &ndev->dma[num];
458                 if (!dvb_attach(helene_attach_s, fes[0]->dvb.frontend,
459                                         &helene_conf, &ndev->i2c[num].adap)) {
460                         dev_err(&ndev->pci_dev->dev,
461                                         "%s(): unable to attach HELENE DVB-S/S2 tuner frontend\n",
462                                         __func__);
463                         goto frontend_detach;
464                 }
465         }
466
467         if (!dvb_attach(lnbh25_attach, fes[0]->dvb.frontend,
468                         &lnbh25_conf, &ndev->i2c[num].adap)) {
469                 dev_dbg(&ndev->pci_dev->dev,
470                         "%s(): unable to attach SEC frontend\n", __func__);
471                 goto frontend_detach;
472         }
473
474         /* DVB-T/T2 frontend */
475         fes[1]->dvb.frontend = dvb_attach(cxd2841er_attach_t_c,
476                 &demod_config, &ndev->i2c[num].adap);
477         if (fes[1]->dvb.frontend == NULL) {
478                 dev_dbg(&ndev->pci_dev->dev,
479                         "%s(): unable to attach Ter frontend\n", __func__);
480                 goto frontend_detach;
481         }
482         fes[1]->dvb.frontend->id = 1;
483         if (ndev->rev == NETUP_HW_REV_1_3) {
484                 ascot2e_conf.set_tuner_priv = &ndev->dma[num];
485                 if (!dvb_attach(ascot2e_attach, fes[1]->dvb.frontend,
486                                         &ascot2e_conf, &ndev->i2c[num].adap)) {
487                         dev_dbg(&ndev->pci_dev->dev,
488                                         "%s(): unable to attach Ter tuner frontend\n",
489                                         __func__);
490                         goto frontend_detach;
491                 }
492         } else {
493                 helene_conf.set_tuner_priv = &ndev->dma[num];
494                 if (!dvb_attach(helene_attach, fes[1]->dvb.frontend,
495                                         &helene_conf, &ndev->i2c[num].adap)) {
496                         dev_err(&ndev->pci_dev->dev,
497                                         "%s(): unable to attach HELENE Ter tuner frontend\n",
498                                         __func__);
499                         goto frontend_detach;
500                 }
501         }
502
503         if (vb2_dvb_register_bus(&ndev->frontends[num],
504                                  THIS_MODULE, NULL,
505                                  &ndev->pci_dev->dev, NULL, adapter_nr, 1)) {
506                 dev_dbg(&ndev->pci_dev->dev,
507                         "%s(): unable to register DVB bus %d\n",
508                         __func__, num);
509                 goto frontend_detach;
510         }
511         dev_info(&ndev->pci_dev->dev, "DVB init done, num=%d\n", num);
512         return 0;
513 frontend_detach:
514         vb2_dvb_dealloc_frontends(&ndev->frontends[num]);
515         return -EINVAL;
516 }
517
518 static void netup_unidvb_dvb_fini(struct netup_unidvb_dev *ndev, int num)
519 {
520         if (num < 0 || num > 1) {
521                 dev_err(&ndev->pci_dev->dev,
522                         "%s(): unable to unregister DVB bus %d\n",
523                         __func__, num);
524                 return;
525         }
526         vb2_dvb_unregister_bus(&ndev->frontends[num]);
527         dev_info(&ndev->pci_dev->dev,
528                 "%s(): DVB bus %d unregistered\n", __func__, num);
529 }
530
531 static int netup_unidvb_dvb_setup(struct netup_unidvb_dev *ndev)
532 {
533         int res;
534
535         res = netup_unidvb_dvb_init(ndev, 0);
536         if (res)
537                 return res;
538         res = netup_unidvb_dvb_init(ndev, 1);
539         if (res) {
540                 netup_unidvb_dvb_fini(ndev, 0);
541                 return res;
542         }
543         return 0;
544 }
545
546 static int netup_unidvb_ring_copy(struct netup_dma *dma,
547                                   struct netup_unidvb_buffer *buf)
548 {
549         u32 copy_bytes, ring_bytes;
550         u32 buff_bytes = NETUP_DMA_PACKETS_COUNT * 188 - buf->size;
551         u8 *p = vb2_plane_vaddr(&buf->vb.vb2_buf, 0);
552         struct netup_unidvb_dev *ndev = dma->ndev;
553
554         if (p == NULL) {
555                 dev_err(&ndev->pci_dev->dev,
556                         "%s(): buffer is NULL\n", __func__);
557                 return -EINVAL;
558         }
559         p += buf->size;
560         if (dma->data_offset + dma->data_size > dma->ring_buffer_size) {
561                 ring_bytes = dma->ring_buffer_size - dma->data_offset;
562                 copy_bytes = (ring_bytes > buff_bytes) ?
563                         buff_bytes : ring_bytes;
564                 memcpy_fromio(p, (u8 __iomem *)(dma->addr_virt + dma->data_offset), copy_bytes);
565                 p += copy_bytes;
566                 buf->size += copy_bytes;
567                 buff_bytes -= copy_bytes;
568                 dma->data_size -= copy_bytes;
569                 dma->data_offset += copy_bytes;
570                 if (dma->data_offset == dma->ring_buffer_size)
571                         dma->data_offset = 0;
572         }
573         if (buff_bytes > 0) {
574                 ring_bytes = dma->data_size;
575                 copy_bytes = (ring_bytes > buff_bytes) ?
576                                 buff_bytes : ring_bytes;
577                 memcpy_fromio(p, (u8 __iomem *)(dma->addr_virt + dma->data_offset), copy_bytes);
578                 buf->size += copy_bytes;
579                 dma->data_size -= copy_bytes;
580                 dma->data_offset += copy_bytes;
581                 if (dma->data_offset == dma->ring_buffer_size)
582                         dma->data_offset = 0;
583         }
584         return 0;
585 }
586
587 static void netup_unidvb_dma_worker(struct work_struct *work)
588 {
589         struct netup_dma *dma = container_of(work, struct netup_dma, work);
590         struct netup_unidvb_dev *ndev = dma->ndev;
591         struct netup_unidvb_buffer *buf;
592         unsigned long flags;
593
594         spin_lock_irqsave(&dma->lock, flags);
595         if (dma->data_size == 0) {
596                 dev_dbg(&ndev->pci_dev->dev,
597                         "%s(): data_size == 0\n", __func__);
598                 goto work_done;
599         }
600         while (dma->data_size > 0) {
601                 if (list_empty(&dma->free_buffers)) {
602                         dev_dbg(&ndev->pci_dev->dev,
603                                 "%s(): no free buffers\n", __func__);
604                         goto work_done;
605                 }
606                 buf = list_first_entry(&dma->free_buffers,
607                         struct netup_unidvb_buffer, list);
608                 if (buf->size >= NETUP_DMA_PACKETS_COUNT * 188) {
609                         dev_dbg(&ndev->pci_dev->dev,
610                                 "%s(): buffer overflow, size %d\n",
611                                 __func__, buf->size);
612                         goto work_done;
613                 }
614                 if (netup_unidvb_ring_copy(dma, buf))
615                         goto work_done;
616                 if (buf->size == NETUP_DMA_PACKETS_COUNT * 188) {
617                         list_del(&buf->list);
618                         dev_dbg(&ndev->pci_dev->dev,
619                                 "%s(): buffer %p done, size %d\n",
620                                 __func__, buf, buf->size);
621                         buf->vb.vb2_buf.timestamp = ktime_get_ns();
622                         vb2_set_plane_payload(&buf->vb.vb2_buf, 0, buf->size);
623                         vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
624                 }
625         }
626 work_done:
627         dma->data_size = 0;
628         spin_unlock_irqrestore(&dma->lock, flags);
629 }
630
631 static void netup_unidvb_queue_cleanup(struct netup_dma *dma)
632 {
633         struct netup_unidvb_buffer *buf;
634         unsigned long flags;
635
636         spin_lock_irqsave(&dma->lock, flags);
637         while (!list_empty(&dma->free_buffers)) {
638                 buf = list_first_entry(&dma->free_buffers,
639                         struct netup_unidvb_buffer, list);
640                 list_del(&buf->list);
641                 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
642         }
643         spin_unlock_irqrestore(&dma->lock, flags);
644 }
645
646 static void netup_unidvb_dma_timeout(struct timer_list *t)
647 {
648         struct netup_dma *dma = from_timer(dma, t, timeout);
649         struct netup_unidvb_dev *ndev = dma->ndev;
650
651         dev_dbg(&ndev->pci_dev->dev, "%s()\n", __func__);
652         netup_unidvb_queue_cleanup(dma);
653 }
654
655 static int netup_unidvb_dma_init(struct netup_unidvb_dev *ndev, int num)
656 {
657         struct netup_dma *dma;
658         struct device *dev = &ndev->pci_dev->dev;
659
660         if (num < 0 || num > 1) {
661                 dev_err(dev, "%s(): unable to register DMA%d\n",
662                         __func__, num);
663                 return -ENODEV;
664         }
665         dma = &ndev->dma[num];
666         dev_info(dev, "%s(): starting DMA%d\n", __func__, num);
667         dma->num = num;
668         dma->ndev = ndev;
669         spin_lock_init(&dma->lock);
670         INIT_WORK(&dma->work, netup_unidvb_dma_worker);
671         INIT_LIST_HEAD(&dma->free_buffers);
672         timer_setup(&dma->timeout, netup_unidvb_dma_timeout, 0);
673         dma->ring_buffer_size = ndev->dma_size / 2;
674         dma->addr_virt = ndev->dma_virt + dma->ring_buffer_size * num;
675         dma->addr_phys = (dma_addr_t)((u64)ndev->dma_phys +
676                 dma->ring_buffer_size * num);
677         dev_info(dev, "%s(): DMA%d buffer virt/phys 0x%p/0x%llx size %d\n",
678                 __func__, num, dma->addr_virt,
679                 (unsigned long long)dma->addr_phys,
680                 dma->ring_buffer_size);
681         memset_io((u8 __iomem *)dma->addr_virt, 0, dma->ring_buffer_size);
682         dma->addr_last = dma->addr_phys;
683         dma->high_addr = (u32)(dma->addr_phys & 0xC0000000);
684         dma->regs = (struct netup_dma_regs __iomem *)(num == 0 ?
685                 ndev->bmmio0 + NETUP_DMA0_ADDR :
686                 ndev->bmmio0 + NETUP_DMA1_ADDR);
687         writel((NETUP_DMA_BLOCKS_COUNT << 24) |
688                 (NETUP_DMA_PACKETS_COUNT << 8) | 188, &dma->regs->size);
689         writel((u32)(dma->addr_phys & 0x3FFFFFFF), &dma->regs->start_addr_lo);
690         writel(0, &dma->regs->start_addr_hi);
691         writel(dma->high_addr, ndev->bmmio0 + 0x1000);
692         writel(375000000, &dma->regs->timeout);
693         msleep(1000);
694         writel(BIT_DMA_IRQ, &dma->regs->ctrlstat_clear);
695         return 0;
696 }
697
698 static void netup_unidvb_dma_fini(struct netup_unidvb_dev *ndev, int num)
699 {
700         struct netup_dma *dma;
701
702         if (num < 0 || num > 1)
703                 return;
704         dev_dbg(&ndev->pci_dev->dev, "%s(): num %d\n", __func__, num);
705         dma = &ndev->dma[num];
706         netup_unidvb_dma_enable(dma, 0);
707         msleep(50);
708         cancel_work_sync(&dma->work);
709         del_timer(&dma->timeout);
710 }
711
712 static int netup_unidvb_dma_setup(struct netup_unidvb_dev *ndev)
713 {
714         int res;
715
716         res = netup_unidvb_dma_init(ndev, 0);
717         if (res)
718                 return res;
719         res = netup_unidvb_dma_init(ndev, 1);
720         if (res) {
721                 netup_unidvb_dma_fini(ndev, 0);
722                 return res;
723         }
724         netup_unidvb_dma_enable(&ndev->dma[0], 0);
725         netup_unidvb_dma_enable(&ndev->dma[1], 0);
726         return 0;
727 }
728
729 static int netup_unidvb_ci_setup(struct netup_unidvb_dev *ndev,
730                                  struct pci_dev *pci_dev)
731 {
732         int res;
733
734         writew(NETUP_UNIDVB_IRQ_CI, ndev->bmmio0 + REG_IMASK_SET);
735         res = netup_unidvb_ci_register(ndev, 0, pci_dev);
736         if (res)
737                 return res;
738         res = netup_unidvb_ci_register(ndev, 1, pci_dev);
739         if (res)
740                 netup_unidvb_ci_unregister(ndev, 0);
741         return res;
742 }
743
744 static int netup_unidvb_request_mmio(struct pci_dev *pci_dev)
745 {
746         if (!request_mem_region(pci_resource_start(pci_dev, 0),
747                         pci_resource_len(pci_dev, 0), NETUP_UNIDVB_NAME)) {
748                 dev_err(&pci_dev->dev,
749                         "%s(): unable to request MMIO bar 0 at 0x%llx\n",
750                         __func__,
751                         (unsigned long long)pci_resource_start(pci_dev, 0));
752                 return -EBUSY;
753         }
754         if (!request_mem_region(pci_resource_start(pci_dev, 1),
755                         pci_resource_len(pci_dev, 1), NETUP_UNIDVB_NAME)) {
756                 dev_err(&pci_dev->dev,
757                         "%s(): unable to request MMIO bar 1 at 0x%llx\n",
758                         __func__,
759                         (unsigned long long)pci_resource_start(pci_dev, 1));
760                 release_mem_region(pci_resource_start(pci_dev, 0),
761                         pci_resource_len(pci_dev, 0));
762                 return -EBUSY;
763         }
764         return 0;
765 }
766
767 static int netup_unidvb_request_modules(struct device *dev)
768 {
769         static const char * const modules[] = {
770                 "lnbh25", "ascot2e", "horus3a", "cxd2841er", "helene", NULL
771         };
772         const char * const *curr_mod = modules;
773         int err;
774
775         while (*curr_mod != NULL) {
776                 err = request_module(*curr_mod);
777                 if (err) {
778                         dev_warn(dev, "request_module(%s) failed: %d\n",
779                                 *curr_mod, err);
780                 }
781                 ++curr_mod;
782         }
783         return 0;
784 }
785
786 static int netup_unidvb_initdev(struct pci_dev *pci_dev,
787                                 const struct pci_device_id *pci_id)
788 {
789         u8 board_revision;
790         u16 board_vendor;
791         struct netup_unidvb_dev *ndev;
792         int old_firmware = 0;
793
794         netup_unidvb_request_modules(&pci_dev->dev);
795
796         /* Check card revision */
797         if (pci_dev->revision != NETUP_PCI_DEV_REVISION) {
798                 dev_err(&pci_dev->dev,
799                         "netup_unidvb: expected card revision %d, got %d\n",
800                         NETUP_PCI_DEV_REVISION, pci_dev->revision);
801                 dev_err(&pci_dev->dev,
802                         "Please upgrade firmware!\n");
803                 dev_err(&pci_dev->dev,
804                         "Instructions on http://www.netup.tv\n");
805                 old_firmware = 1;
806                 spi_enable = 1;
807         }
808
809         /* allocate device context */
810         ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
811         if (!ndev)
812                 goto dev_alloc_err;
813
814         /* detect hardware revision */
815         if (pci_dev->device == NETUP_HW_REV_1_3)
816                 ndev->rev = NETUP_HW_REV_1_3;
817         else
818                 ndev->rev = NETUP_HW_REV_1_4;
819
820         dev_info(&pci_dev->dev,
821                 "%s(): board (0x%x) hardware revision 0x%x\n",
822                 __func__, pci_dev->device, ndev->rev);
823
824         ndev->old_fw = old_firmware;
825         ndev->wq = create_singlethread_workqueue(NETUP_UNIDVB_NAME);
826         if (!ndev->wq) {
827                 dev_err(&pci_dev->dev,
828                         "%s(): unable to create workqueue\n", __func__);
829                 goto wq_create_err;
830         }
831         ndev->pci_dev = pci_dev;
832         ndev->pci_bus = pci_dev->bus->number;
833         ndev->pci_slot = PCI_SLOT(pci_dev->devfn);
834         ndev->pci_func = PCI_FUNC(pci_dev->devfn);
835         ndev->board_num = ndev->pci_bus*10 + ndev->pci_slot;
836         pci_set_drvdata(pci_dev, ndev);
837         /* PCI init */
838         dev_info(&pci_dev->dev, "%s(): PCI device (%d). Bus:0x%x Slot:0x%x\n",
839                 __func__, ndev->board_num, ndev->pci_bus, ndev->pci_slot);
840
841         if (pci_enable_device(pci_dev)) {
842                 dev_err(&pci_dev->dev, "%s(): pci_enable_device failed\n",
843                         __func__);
844                 goto pci_enable_err;
845         }
846         /* read PCI info */
847         pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &board_revision);
848         pci_read_config_word(pci_dev, PCI_VENDOR_ID, &board_vendor);
849         if (board_vendor != NETUP_VENDOR_ID) {
850                 dev_err(&pci_dev->dev, "%s(): unknown board vendor 0x%x",
851                         __func__, board_vendor);
852                 goto pci_detect_err;
853         }
854         dev_info(&pci_dev->dev,
855                 "%s(): board vendor 0x%x, revision 0x%x\n",
856                 __func__, board_vendor, board_revision);
857         pci_set_master(pci_dev);
858         if (pci_set_dma_mask(pci_dev, 0xffffffff) < 0) {
859                 dev_err(&pci_dev->dev,
860                         "%s(): 32bit PCI DMA is not supported\n", __func__);
861                 goto pci_detect_err;
862         }
863         dev_info(&pci_dev->dev, "%s(): using 32bit PCI DMA\n", __func__);
864         /* Clear "no snoop" and "relaxed ordering" bits, use default MRRS. */
865         pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL,
866                 PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN |
867                 PCI_EXP_DEVCTL_NOSNOOP_EN, 0);
868         /* Adjust PCIe completion timeout. */
869         pcie_capability_clear_and_set_word(pci_dev,
870                 PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_COMP_TIMEOUT, 0x2);
871
872         if (netup_unidvb_request_mmio(pci_dev)) {
873                 dev_err(&pci_dev->dev,
874                         "%s(): unable to request MMIO regions\n", __func__);
875                 goto pci_detect_err;
876         }
877         ndev->lmmio0 = ioremap(pci_resource_start(pci_dev, 0),
878                 pci_resource_len(pci_dev, 0));
879         if (!ndev->lmmio0) {
880                 dev_err(&pci_dev->dev,
881                         "%s(): unable to remap MMIO bar 0\n", __func__);
882                 goto pci_bar0_error;
883         }
884         ndev->lmmio1 = ioremap(pci_resource_start(pci_dev, 1),
885                 pci_resource_len(pci_dev, 1));
886         if (!ndev->lmmio1) {
887                 dev_err(&pci_dev->dev,
888                         "%s(): unable to remap MMIO bar 1\n", __func__);
889                 goto pci_bar1_error;
890         }
891         ndev->bmmio0 = (u8 __iomem *)ndev->lmmio0;
892         ndev->bmmio1 = (u8 __iomem *)ndev->lmmio1;
893         dev_info(&pci_dev->dev,
894                 "%s(): PCI MMIO at 0x%p (%d); 0x%p (%d); IRQ %d",
895                 __func__,
896                 ndev->lmmio0, (u32)pci_resource_len(pci_dev, 0),
897                 ndev->lmmio1, (u32)pci_resource_len(pci_dev, 1),
898                 pci_dev->irq);
899         if (request_irq(pci_dev->irq, netup_unidvb_isr, IRQF_SHARED,
900                         "netup_unidvb", pci_dev) < 0) {
901                 dev_err(&pci_dev->dev,
902                         "%s(): can't get IRQ %d\n", __func__, pci_dev->irq);
903                 goto irq_request_err;
904         }
905         ndev->dma_size = 2 * 188 *
906                 NETUP_DMA_BLOCKS_COUNT * NETUP_DMA_PACKETS_COUNT;
907         ndev->dma_virt = dma_alloc_coherent(&pci_dev->dev,
908                 ndev->dma_size, &ndev->dma_phys, GFP_KERNEL);
909         if (!ndev->dma_virt) {
910                 dev_err(&pci_dev->dev, "%s(): unable to allocate DMA buffer\n",
911                         __func__);
912                 goto dma_alloc_err;
913         }
914         netup_unidvb_dev_enable(ndev);
915         if (spi_enable && netup_spi_init(ndev)) {
916                 dev_warn(&pci_dev->dev,
917                         "netup_unidvb: SPI flash setup failed\n");
918                 goto spi_setup_err;
919         }
920         if (old_firmware) {
921                 dev_err(&pci_dev->dev,
922                         "netup_unidvb: card initialization was incomplete\n");
923                 return 0;
924         }
925         if (netup_i2c_register(ndev)) {
926                 dev_err(&pci_dev->dev, "netup_unidvb: I2C setup failed\n");
927                 goto i2c_setup_err;
928         }
929         /* enable I2C IRQs */
930         writew(NETUP_UNIDVB_IRQ_I2C0 | NETUP_UNIDVB_IRQ_I2C1,
931                 ndev->bmmio0 + REG_IMASK_SET);
932         usleep_range(5000, 10000);
933         if (netup_unidvb_dvb_setup(ndev)) {
934                 dev_err(&pci_dev->dev, "netup_unidvb: DVB setup failed\n");
935                 goto dvb_setup_err;
936         }
937         if (netup_unidvb_ci_setup(ndev, pci_dev)) {
938                 dev_err(&pci_dev->dev, "netup_unidvb: CI setup failed\n");
939                 goto ci_setup_err;
940         }
941         if (netup_unidvb_dma_setup(ndev)) {
942                 dev_err(&pci_dev->dev, "netup_unidvb: DMA setup failed\n");
943                 goto dma_setup_err;
944         }
945         dev_info(&pci_dev->dev,
946                 "netup_unidvb: device has been initialized\n");
947         return 0;
948 dma_setup_err:
949         netup_unidvb_ci_unregister(ndev, 0);
950         netup_unidvb_ci_unregister(ndev, 1);
951 ci_setup_err:
952         netup_unidvb_dvb_fini(ndev, 0);
953         netup_unidvb_dvb_fini(ndev, 1);
954 dvb_setup_err:
955         netup_i2c_unregister(ndev);
956 i2c_setup_err:
957         if (ndev->spi)
958                 netup_spi_release(ndev);
959 spi_setup_err:
960         dma_free_coherent(&pci_dev->dev, ndev->dma_size,
961                         ndev->dma_virt, ndev->dma_phys);
962 dma_alloc_err:
963         free_irq(pci_dev->irq, pci_dev);
964 irq_request_err:
965         iounmap(ndev->lmmio1);
966 pci_bar1_error:
967         iounmap(ndev->lmmio0);
968 pci_bar0_error:
969         release_mem_region(pci_resource_start(pci_dev, 0),
970                 pci_resource_len(pci_dev, 0));
971         release_mem_region(pci_resource_start(pci_dev, 1),
972                 pci_resource_len(pci_dev, 1));
973 pci_detect_err:
974         pci_disable_device(pci_dev);
975 pci_enable_err:
976         pci_set_drvdata(pci_dev, NULL);
977         destroy_workqueue(ndev->wq);
978 wq_create_err:
979         kfree(ndev);
980 dev_alloc_err:
981         dev_err(&pci_dev->dev,
982                 "%s(): failed to initialize device\n", __func__);
983         return -EIO;
984 }
985
986 static void netup_unidvb_finidev(struct pci_dev *pci_dev)
987 {
988         struct netup_unidvb_dev *ndev = pci_get_drvdata(pci_dev);
989
990         dev_info(&pci_dev->dev, "%s(): trying to stop device\n", __func__);
991         if (!ndev->old_fw) {
992                 netup_unidvb_dma_fini(ndev, 0);
993                 netup_unidvb_dma_fini(ndev, 1);
994                 netup_unidvb_ci_unregister(ndev, 0);
995                 netup_unidvb_ci_unregister(ndev, 1);
996                 netup_unidvb_dvb_fini(ndev, 0);
997                 netup_unidvb_dvb_fini(ndev, 1);
998                 netup_i2c_unregister(ndev);
999         }
1000         if (ndev->spi)
1001                 netup_spi_release(ndev);
1002         writew(0xffff, ndev->bmmio0 + REG_IMASK_CLEAR);
1003         dma_free_coherent(&ndev->pci_dev->dev, ndev->dma_size,
1004                         ndev->dma_virt, ndev->dma_phys);
1005         free_irq(pci_dev->irq, pci_dev);
1006         iounmap(ndev->lmmio0);
1007         iounmap(ndev->lmmio1);
1008         release_mem_region(pci_resource_start(pci_dev, 0),
1009                 pci_resource_len(pci_dev, 0));
1010         release_mem_region(pci_resource_start(pci_dev, 1),
1011                 pci_resource_len(pci_dev, 1));
1012         pci_disable_device(pci_dev);
1013         pci_set_drvdata(pci_dev, NULL);
1014         destroy_workqueue(ndev->wq);
1015         kfree(ndev);
1016         dev_info(&pci_dev->dev,
1017                 "%s(): device has been successfully stopped\n", __func__);
1018 }
1019
1020
1021 static const struct pci_device_id netup_unidvb_pci_tbl[] = {
1022         { PCI_DEVICE(0x1b55, 0x18f6) }, /* hw rev. 1.3 */
1023         { PCI_DEVICE(0x1b55, 0x18f7) }, /* hw rev. 1.4 */
1024         { 0, }
1025 };
1026 MODULE_DEVICE_TABLE(pci, netup_unidvb_pci_tbl);
1027
1028 static struct pci_driver netup_unidvb_pci_driver = {
1029         .name     = "netup_unidvb",
1030         .id_table = netup_unidvb_pci_tbl,
1031         .probe    = netup_unidvb_initdev,
1032         .remove   = netup_unidvb_finidev,
1033         .suspend  = NULL,
1034         .resume   = NULL,
1035 };
1036
1037 module_pci_driver(netup_unidvb_pci_driver);