drivers/media/platform/coda/coda-bit.c

   1 /*
   2  * Coda multi-standard codec IP - BIT processor functions
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <javier.martin@vista-silicon.com>
   6  *    Xavier Duret
   7  * Copyright (C) 2012-2014 Philipp Zabel, Pengutronix
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/irqreturn.h>
  17 #include <linux/kernel.h>
  18 #include <linux/log2.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/reset.h>
  21 #include <linux/slab.h>
  22 #include <linux/videodev2.h>
  23
  24 #include <media/v4l2-common.h>
  25 #include <media/v4l2-ctrls.h>
  26 #include <media/v4l2-fh.h>
  27 #include <media/v4l2-mem2mem.h>
  28 #include <media/videobuf2-v4l2.h>
  29 #include <media/videobuf2-dma-contig.h>
  30 #include <media/videobuf2-vmalloc.h>
  31
  32 #include "coda.h"
  33 #define CREATE_TRACE_POINTS
  34 #include "trace.h"
  35
  36 #define CODA_PARA_BUF_SIZE      (10 * 1024)
  37 #define CODA7_PS_BUF_SIZE       0x28000
  38 #define CODA9_PS_SAVE_SIZE      (512 * 1024)
  39
  40 #define CODA_DEFAULT_GAMMA      4096
  41 #define CODA9_DEFAULT_GAMMA     24576   /* 0.75 * 32768 */
  42
  43 static void coda_free_bitstream_buffer(struct coda_ctx *ctx);
  44
  45 static inline int coda_is_initialized(struct coda_dev *dev)
  46 {
  47         return coda_read(dev, CODA_REG_BIT_CUR_PC) != 0;
  48 }
  49
  50 static inline unsigned long coda_isbusy(struct coda_dev *dev)
  51 {
  52         return coda_read(dev, CODA_REG_BIT_BUSY);
  53 }
  54
  55 static int coda_wait_timeout(struct coda_dev *dev)
  56 {
  57         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  58
  59         while (coda_isbusy(dev)) {
  60                 if (time_after(jiffies, timeout))
  61                         return -ETIMEDOUT;
  62         }
  63         return 0;
  64 }
  65
  66 static void coda_command_async(struct coda_ctx *ctx, int cmd)
  67 {
  68         struct coda_dev *dev = ctx->dev;
  69
  70         if (dev->devtype->product == CODA_960 ||
  71             dev->devtype->product == CODA_7541) {
  72                 /* Restore context related registers to CODA */
  73                 coda_write(dev, ctx->bit_stream_param,
  74                                 CODA_REG_BIT_BIT_STREAM_PARAM);
  75                 coda_write(dev, ctx->frm_dis_flg,
  76                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  77                 coda_write(dev, ctx->frame_mem_ctrl,
  78                                 CODA_REG_BIT_FRAME_MEM_CTRL);
  79                 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
  80         }
  81
  82         if (dev->devtype->product == CODA_960) {
  83                 coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR);
  84                 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
  85         }
  86
  87         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  88
  89         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
  90         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
  91         coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
  92
  93         trace_coda_bit_run(ctx, cmd);
  94
  95         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
  96 }
  97
  98 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
  99 {
 100         struct coda_dev *dev = ctx->dev;
 101         int ret;
 102
 103         coda_command_async(ctx, cmd);
 104         ret = coda_wait_timeout(dev);
 105         trace_coda_bit_done(ctx);
 106
 107         return ret;
 108 }
 109
 110 int coda_hw_reset(struct coda_ctx *ctx)
 111 {
 112         struct coda_dev *dev = ctx->dev;
 113         unsigned long timeout;
 114         unsigned int idx;
 115         int ret;
 116
 117         if (!dev->rstc)
 118                 return -ENOENT;
 119
 120         idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX);
 121
 122         if (dev->devtype->product == CODA_960) {
 123                 timeout = jiffies + msecs_to_jiffies(100);
 124                 coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL);
 125                 while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) {
 126                         if (time_after(jiffies, timeout))
 127                                 return -ETIME;
 128                         cpu_relax();
 129                 }
 130         }
 131
 132         ret = reset_control_reset(dev->rstc);
 133         if (ret < 0)
 134                 return ret;
 135
 136         if (dev->devtype->product == CODA_960)
 137                 coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL);
 138         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 139         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
 140         ret = coda_wait_timeout(dev);
 141         coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX);
 142
 143         return ret;
 144 }
 145
 146 static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
 147 {
 148         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 149         struct coda_dev *dev = ctx->dev;
 150         u32 rd_ptr;
 151
 152         rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 153         kfifo->out = (kfifo->in & ~kfifo->mask) |
 154                       (rd_ptr - ctx->bitstream.paddr);
 155         if (kfifo->out > kfifo->in)
 156                 kfifo->out -= kfifo->mask + 1;
 157 }
 158
 159 static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
 160 {
 161         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 162         struct coda_dev *dev = ctx->dev;
 163         u32 rd_ptr, wr_ptr;
 164
 165         rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
 166         coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 167         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 168         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 169 }
 170
 171 static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
 172 {
 173         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 174         struct coda_dev *dev = ctx->dev;
 175         u32 wr_ptr;
 176
 177         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 178         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 179 }
 180
 181 static int coda_bitstream_queue(struct coda_ctx *ctx,
 182                                 struct vb2_v4l2_buffer *src_buf)
 183 {
 184         u32 src_size = vb2_get_plane_payload(&src_buf->vb2_buf, 0);
 185         u32 n;
 186
 187         n = kfifo_in(&ctx->bitstream_fifo,
 188                         vb2_plane_vaddr(&src_buf->vb2_buf, 0), src_size);
 189         if (n < src_size)
 190                 return -ENOSPC;
 191
 192         src_buf->sequence = ctx->qsequence++;
 193
 194         return 0;
 195 }
 196
 197 static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
 198                                      struct vb2_v4l2_buffer *src_buf)
 199 {
 200         int ret;
 201
 202         if (coda_get_bitstream_payload(ctx) +
 203             vb2_get_plane_payload(&src_buf->vb2_buf, 0) + 512 >=
 204             ctx->bitstream.size)
 205                 return false;
 206
 207         if (vb2_plane_vaddr(&src_buf->vb2_buf, 0) == NULL) {
 208                 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
 209                 return true;
 210         }
 211
 212         ret = coda_bitstream_queue(ctx, src_buf);
 213         if (ret < 0) {
 214                 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
 215                 return false;
 216         }
 217         /* Sync read pointer to device */
 218         if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
 219                 coda_kfifo_sync_to_device_write(ctx);
 220
 221         ctx->hold = false;
 222
 223         return true;
 224 }
 225
 226 void coda_fill_bitstream(struct coda_ctx *ctx, bool streaming)
 227 {
 228         struct vb2_v4l2_buffer *src_buf;
 229         struct coda_buffer_meta *meta;
 230         unsigned long flags;
 231         u32 start;
 232
 233         if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG)
 234                 return;
 235
 236         while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) {
 237                 /*
 238                  * Only queue a single JPEG into the bitstream buffer, except
 239                  * to increase payload over 512 bytes or if in hold state.
 240                  */
 241                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
 242                     (coda_get_bitstream_payload(ctx) >= 512) && !ctx->hold)
 243                         break;
 244
 245                 src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
 246
 247                 /* Drop frames that do not start/end with a SOI/EOI markers */
 248                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
 249                     !coda_jpeg_check_buffer(ctx, &src_buf->vb2_buf)) {
 250                         v4l2_err(&ctx->dev->v4l2_dev,
 251                                  "dropping invalid JPEG frame %d\n",
 252                                  ctx->qsequence);
 253                         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 254                         v4l2_m2m_buf_done(src_buf, streaming ?
 255                                           VB2_BUF_STATE_ERROR :
 256                                           VB2_BUF_STATE_QUEUED);
 257                         continue;
 258                 }
 259
 260                 /* Dump empty buffers */
 261                 if (!vb2_get_plane_payload(&src_buf->vb2_buf, 0)) {
 262                         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 263                         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
 264                         continue;
 265                 }
 266
 267                 /* Buffer start position */
 268                 start = ctx->bitstream_fifo.kfifo.in &
 269                         ctx->bitstream_fifo.kfifo.mask;
 270
 271                 if (coda_bitstream_try_queue(ctx, src_buf)) {
 272                         /*
 273                          * Source buffer is queued in the bitstream ringbuffer;
 274                          * queue the timestamp and mark source buffer as done
 275                          */
 276                         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 277
 278                         meta = kmalloc(sizeof(*meta), GFP_KERNEL);
 279                         if (meta) {
 280                                 meta->sequence = src_buf->sequence;
 281                                 meta->timecode = src_buf->timecode;
 282                                 meta->timestamp = src_buf->vb2_buf.timestamp;
 283                                 meta->start = start;
 284                                 meta->end = ctx->bitstream_fifo.kfifo.in &
 285                                             ctx->bitstream_fifo.kfifo.mask;
 286                                 spin_lock_irqsave(&ctx->buffer_meta_lock,
 287                                                   flags);
 288                                 list_add_tail(&meta->list,
 289                                               &ctx->buffer_meta_list);
 290                                 ctx->num_metas++;
 291                                 spin_unlock_irqrestore(&ctx->buffer_meta_lock,
 292                                                        flags);
 293
 294                                 trace_coda_bit_queue(ctx, src_buf, meta);
 295                         }
 296
 297                         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
 298                 } else {
 299                         break;
 300                 }
 301         }
 302 }
 303
 304 void coda_bit_stream_end_flag(struct coda_ctx *ctx)
 305 {
 306         struct coda_dev *dev = ctx->dev;
 307
 308         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
 309
 310         /* If this context is currently running, update the hardware flag */
 311         if ((dev->devtype->product == CODA_960) &&
 312             coda_isbusy(dev) &&
 313             (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
 314                 coda_write(dev, ctx->bit_stream_param,
 315                            CODA_REG_BIT_BIT_STREAM_PARAM);
 316         }
 317 }
 318
 319 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
 320 {
 321         struct coda_dev *dev = ctx->dev;
 322         u32 *p = ctx->parabuf.vaddr;
 323
 324         if (dev->devtype->product == CODA_DX6)
 325                 p[index] = value;
 326         else
 327                 p[index ^ 1] = value;
 328 }
 329
 330 static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
 331                                          struct coda_aux_buf *buf, size_t size,
 332                                          const char *name)
 333 {
 334         return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry);
 335 }
 336
 337
 338 static void coda_free_framebuffers(struct coda_ctx *ctx)
 339 {
 340         int i;
 341
 342         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
 343                 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
 344 }
 345
 346 static int coda_alloc_framebuffers(struct coda_ctx *ctx,
 347                                    struct coda_q_data *q_data, u32 fourcc)
 348 {
 349         struct coda_dev *dev = ctx->dev;
 350         int width, height;
 351         int ysize;
 352         int ret;
 353         int i;
 354
 355         if (ctx->codec && (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
 356              ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264)) {
 357                 width = round_up(q_data->width, 16);
 358                 height = round_up(q_data->height, 16);
 359         } else {
 360                 width = round_up(q_data->width, 8);
 361                 height = q_data->height;
 362         }
 363         ysize = width * height;
 364
 365         /* Allocate frame buffers */
 366         for (i = 0; i < ctx->num_internal_frames; i++) {
 367                 size_t size;
 368                 char *name;
 369
 370                 if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
 371                         size = round_up(ysize, 4096) + ysize / 2;
 372                 else
 373                         size = ysize + ysize / 2;
 374                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
 375                     dev->devtype->product != CODA_DX6)
 376                         size += ysize / 4;
 377                 name = kasprintf(GFP_KERNEL, "fb%d", i);
 378                 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i],
 379                                              size, name);
 380                 kfree(name);
 381                 if (ret < 0) {
 382                         coda_free_framebuffers(ctx);
 383                         return ret;
 384                 }
 385         }
 386
 387         /* Register frame buffers in the parameter buffer */
 388         for (i = 0; i < ctx->num_internal_frames; i++) {
 389                 u32 y, cb, cr;
 390
 391                 /* Start addresses of Y, Cb, Cr planes */
 392                 y = ctx->internal_frames[i].paddr;
 393                 cb = y + ysize;
 394                 cr = y + ysize + ysize/4;
 395                 if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP) {
 396                         cb = round_up(cb, 4096);
 397                         cr = 0;
 398                         /* Packed 20-bit MSB of base addresses */
 399                         /* YYYYYCCC, CCyyyyyc, cccc.... */
 400                         y = (y & 0xfffff000) | cb >> 20;
 401                         cb = (cb & 0x000ff000) << 12;
 402                 }
 403                 coda_parabuf_write(ctx, i * 3 + 0, y);
 404                 coda_parabuf_write(ctx, i * 3 + 1, cb);
 405                 coda_parabuf_write(ctx, i * 3 + 2, cr);
 406
 407                 /* mvcol buffer for h.264 */
 408                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
 409                     dev->devtype->product != CODA_DX6)
 410                         coda_parabuf_write(ctx, 96 + i,
 411                                            ctx->internal_frames[i].paddr +
 412                                            ysize + ysize/4 + ysize/4);
 413         }
 414
 415         /* mvcol buffer for mpeg4 */
 416         if ((dev->devtype->product != CODA_DX6) &&
 417             (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
 418                 coda_parabuf_write(ctx, 97, ctx->internal_frames[0].paddr +
 419                                             ysize + ysize/4 + ysize/4);
 420
 421         return 0;
 422 }
 423
 424 static void coda_free_context_buffers(struct coda_ctx *ctx)
 425 {
 426         struct coda_dev *dev = ctx->dev;
 427
 428         coda_free_aux_buf(dev, &ctx->slicebuf);
 429         coda_free_aux_buf(dev, &ctx->psbuf);
 430         if (dev->devtype->product != CODA_DX6)
 431                 coda_free_aux_buf(dev, &ctx->workbuf);
 432         coda_free_aux_buf(dev, &ctx->parabuf);
 433 }
 434
 435 static int coda_alloc_context_buffers(struct coda_ctx *ctx,
 436                                       struct coda_q_data *q_data)
 437 {
 438         struct coda_dev *dev = ctx->dev;
 439         size_t size;
 440         int ret;
 441
 442         if (!ctx->parabuf.vaddr) {
 443                 ret = coda_alloc_context_buf(ctx, &ctx->parabuf,
 444                                              CODA_PARA_BUF_SIZE, "parabuf");
 445                 if (ret < 0)
 446                         return ret;
 447         }
 448
 449         if (dev->devtype->product == CODA_DX6)
 450                 return 0;
 451
 452         if (!ctx->slicebuf.vaddr && q_data->fourcc == V4L2_PIX_FMT_H264) {
 453                 /* worst case slice size */
 454                 size = (DIV_ROUND_UP(q_data->width, 16) *
 455                         DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
 456                 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size,
 457                                              "slicebuf");
 458                 if (ret < 0)
 459                         goto err;
 460         }
 461
 462         if (!ctx->psbuf.vaddr && dev->devtype->product == CODA_7541) {
 463                 ret = coda_alloc_context_buf(ctx, &ctx->psbuf,
 464                                              CODA7_PS_BUF_SIZE, "psbuf");
 465                 if (ret < 0)
 466                         goto err;
 467         }
 468
 469         if (!ctx->workbuf.vaddr) {
 470                 size = dev->devtype->workbuf_size;
 471                 if (dev->devtype->product == CODA_960 &&
 472                     q_data->fourcc == V4L2_PIX_FMT_H264)
 473                         size += CODA9_PS_SAVE_SIZE;
 474                 ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size,
 475                                              "workbuf");
 476                 if (ret < 0)
 477                         goto err;
 478         }
 479
 480         return 0;
 481
 482 err:
 483         coda_free_context_buffers(ctx);
 484         return ret;
 485 }
 486
 487 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_v4l2_buffer *buf,
 488                               int header_code, u8 *header, int *size)
 489 {
 490         struct vb2_buffer *vb = &buf->vb2_buf;
 491         struct coda_dev *dev = ctx->dev;
 492         size_t bufsize;
 493         int ret;
 494         int i;
 495
 496         if (dev->devtype->product == CODA_960)
 497                 memset(vb2_plane_vaddr(vb, 0), 0, 64);
 498
 499         coda_write(dev, vb2_dma_contig_plane_dma_addr(vb, 0),
 500                    CODA_CMD_ENC_HEADER_BB_START);
 501         bufsize = vb2_plane_size(vb, 0);
 502         if (dev->devtype->product == CODA_960)
 503                 bufsize /= 1024;
 504         coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE);
 505         coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
 506         ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
 507         if (ret < 0) {
 508                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
 509                 return ret;
 510         }
 511
 512         if (dev->devtype->product == CODA_960) {
 513                 for (i = 63; i > 0; i--)
 514                         if (((char *)vb2_plane_vaddr(vb, 0))[i] != 0)
 515                                 break;
 516                 *size = i + 1;
 517         } else {
 518                 *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
 519                         coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
 520         }
 521         memcpy(header, vb2_plane_vaddr(vb, 0), *size);
 522
 523         return 0;
 524 }
 525
 526 static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
 527 {
 528         phys_addr_t ret;
 529
 530         size = round_up(size, 1024);
 531         if (size > iram->remaining)
 532                 return 0;
 533         iram->remaining -= size;
 534
 535         ret = iram->next_paddr;
 536         iram->next_paddr += size;
 537
 538         return ret;
 539 }
 540
 541 static void coda_setup_iram(struct coda_ctx *ctx)
 542 {
 543         struct coda_iram_info *iram_info = &ctx->iram_info;
 544         struct coda_dev *dev = ctx->dev;
 545         int w64, w128;
 546         int mb_width;
 547         int dbk_bits;
 548         int bit_bits;
 549         int ip_bits;
 550
 551         memset(iram_info, 0, sizeof(*iram_info));
 552         iram_info->next_paddr = dev->iram.paddr;
 553         iram_info->remaining = dev->iram.size;
 554
 555         if (!dev->iram.vaddr)
 556                 return;
 557
 558         switch (dev->devtype->product) {
 559         case CODA_7541:
 560                 dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
 561                 bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
 562                 ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
 563                 break;
 564         case CODA_960:
 565                 dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
 566                 bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
 567                 ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
 568                 break;
 569         default: /* CODA_DX6 */
 570                 return;
 571         }
 572
 573         if (ctx->inst_type == CODA_INST_ENCODER) {
 574                 struct coda_q_data *q_data_src;
 575
 576                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 577                 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
 578                 w128 = mb_width * 128;
 579                 w64 = mb_width * 64;
 580
 581                 /* Prioritize in case IRAM is too small for everything */
 582                 if (dev->devtype->product == CODA_7541) {
 583                         iram_info->search_ram_size = round_up(mb_width * 16 *
 584                                                               36 + 2048, 1024);
 585                         iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
 586                                                 iram_info->search_ram_size);
 587                         if (!iram_info->search_ram_paddr) {
 588                                 pr_err("IRAM is smaller than the search ram size\n");
 589                                 goto out;
 590                         }
 591                         iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
 592                                                    CODA7_USE_ME_ENABLE;
 593                 }
 594
 595                 /* Only H.264BP and H.263P3 are considered */
 596                 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w64);
 597                 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w64);
 598                 if (!iram_info->buf_dbk_y_use || !iram_info->buf_dbk_c_use)
 599                         goto out;
 600                 iram_info->axi_sram_use |= dbk_bits;
 601
 602                 iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
 603                 if (!iram_info->buf_bit_use)
 604                         goto out;
 605                 iram_info->axi_sram_use |= bit_bits;
 606
 607                 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
 608                 if (!iram_info->buf_ip_ac_dc_use)
 609                         goto out;
 610                 iram_info->axi_sram_use |= ip_bits;
 611
 612                 /* OVL and BTP disabled for encoder */
 613         } else if (ctx->inst_type == CODA_INST_DECODER) {
 614                 struct coda_q_data *q_data_dst;
 615
 616                 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 617                 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
 618                 w128 = mb_width * 128;
 619
 620                 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w128);
 621                 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w128);
 622                 if (!iram_info->buf_dbk_y_use || !iram_info->buf_dbk_c_use)
 623                         goto out;
 624                 iram_info->axi_sram_use |= dbk_bits;
 625
 626                 iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
 627                 if (!iram_info->buf_bit_use)
 628                         goto out;
 629                 iram_info->axi_sram_use |= bit_bits;
 630
 631                 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
 632                 if (!iram_info->buf_ip_ac_dc_use)
 633                         goto out;
 634                 iram_info->axi_sram_use |= ip_bits;
 635
 636                 /* OVL and BTP unused as there is no VC1 support yet */
 637         }
 638
 639 out:
 640         if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
 641                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 642                          "IRAM smaller than needed\n");
 643
 644         if (dev->devtype->product == CODA_7541) {
 645                 /* TODO - Enabling these causes picture errors on CODA7541 */
 646                 if (ctx->inst_type == CODA_INST_DECODER) {
 647                         /* fw 1.4.50 */
 648                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
 649                                                      CODA7_USE_IP_ENABLE);
 650                 } else {
 651                         /* fw 13.4.29 */
 652                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
 653                                                      CODA7_USE_HOST_DBK_ENABLE |
 654                                                      CODA7_USE_IP_ENABLE |
 655                                                      CODA7_USE_DBK_ENABLE);
 656                 }
 657         }
 658 }
 659
 660 static u32 coda_supported_firmwares[] = {
 661         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
 662         CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
 663         CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
 664 };
 665
 666 static bool coda_firmware_supported(u32 vernum)
 667 {
 668         int i;
 669
 670         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
 671                 if (vernum == coda_supported_firmwares[i])
 672                         return true;
 673         return false;
 674 }
 675
 676 int coda_check_firmware(struct coda_dev *dev)
 677 {
 678         u16 product, major, minor, release;
 679         u32 data;
 680         int ret;
 681
 682         ret = clk_prepare_enable(dev->clk_per);
 683         if (ret)
 684                 goto err_clk_per;
 685
 686         ret = clk_prepare_enable(dev->clk_ahb);
 687         if (ret)
 688                 goto err_clk_ahb;
 689
 690         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
 691         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 692         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
 693         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
 694         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
 695         if (coda_wait_timeout(dev)) {
 696                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
 697                 ret = -EIO;
 698                 goto err_run_cmd;
 699         }
 700
 701         if (dev->devtype->product == CODA_960) {
 702                 data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV);
 703                 v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n",
 704                           data);
 705         }
 706
 707         /* Check we are compatible with the loaded firmware */
 708         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
 709         product = CODA_FIRMWARE_PRODUCT(data);
 710         major = CODA_FIRMWARE_MAJOR(data);
 711         minor = CODA_FIRMWARE_MINOR(data);
 712         release = CODA_FIRMWARE_RELEASE(data);
 713
 714         clk_disable_unprepare(dev->clk_per);
 715         clk_disable_unprepare(dev->clk_ahb);
 716
 717         if (product != dev->devtype->product) {
 718                 v4l2_err(&dev->v4l2_dev,
 719                          "Wrong firmware. Hw: %s, Fw: %s, Version: %u.%u.%u\n",
 720                          coda_product_name(dev->devtype->product),
 721                          coda_product_name(product), major, minor, release);
 722                 return -EINVAL;
 723         }
 724
 725         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
 726                   coda_product_name(product));
 727
 728         if (coda_firmware_supported(data)) {
 729                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
 730                           major, minor, release);
 731         } else {
 732                 v4l2_warn(&dev->v4l2_dev,
 733                           "Unsupported firmware version: %u.%u.%u\n",
 734                           major, minor, release);
 735         }
 736
 737         return 0;
 738
 739 err_run_cmd:
 740         clk_disable_unprepare(dev->clk_ahb);
 741 err_clk_ahb:
 742         clk_disable_unprepare(dev->clk_per);
 743 err_clk_per:
 744         return ret;
 745 }
 746
 747 static void coda9_set_frame_cache(struct coda_ctx *ctx, u32 fourcc)
 748 {
 749         u32 cache_size, cache_config;
 750
 751         if (ctx->tiled_map_type == GDI_LINEAR_FRAME_MAP) {
 752                 /* Luma 2x0 page, 2x6 cache, chroma 2x0 page, 2x4 cache size */
 753                 cache_size = 0x20262024;
 754                 cache_config = 2 << CODA9_CACHE_PAGEMERGE_OFFSET;
 755         } else {
 756                 /* Luma 0x2 page, 4x4 cache, chroma 0x2 page, 4x3 cache size */
 757                 cache_size = 0x02440243;
 758                 cache_config = 1 << CODA9_CACHE_PAGEMERGE_OFFSET;
 759         }
 760         coda_write(ctx->dev, cache_size, CODA9_CMD_SET_FRAME_CACHE_SIZE);
 761         if (fourcc == V4L2_PIX_FMT_NV12) {
 762                 cache_config |= 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
 763                                 16 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET |
 764                                 0 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET;
 765         } else {
 766                 cache_config |= 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
 767                                 8 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET |
 768                                 8 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET;
 769         }
 770         coda_write(ctx->dev, cache_config, CODA9_CMD_SET_FRAME_CACHE_CONFIG);
 771 }
 772
 773 /*
 774  * Encoder context operations
 775  */
 776
 777 static int coda_encoder_reqbufs(struct coda_ctx *ctx,
 778                                 struct v4l2_requestbuffers *rb)
 779 {
 780         struct coda_q_data *q_data_src;
 781         int ret;
 782
 783         if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
 784                 return 0;
 785
 786         if (rb->count) {
 787                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 788                 ret = coda_alloc_context_buffers(ctx, q_data_src);
 789                 if (ret < 0)
 790                         return ret;
 791         } else {
 792                 coda_free_context_buffers(ctx);
 793         }
 794
 795         return 0;
 796 }
 797
 798 static int coda_start_encoding(struct coda_ctx *ctx)
 799 {
 800         struct coda_dev *dev = ctx->dev;
 801         struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
 802         struct coda_q_data *q_data_src, *q_data_dst;
 803         u32 bitstream_buf, bitstream_size;
 804         struct vb2_v4l2_buffer *buf;
 805         int gamma, ret, value;
 806         u32 dst_fourcc;
 807         int num_fb;
 808         u32 stride;
 809
 810         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 811         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 812         dst_fourcc = q_data_dst->fourcc;
 813
 814         buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
 815         bitstream_buf = vb2_dma_contig_plane_dma_addr(&buf->vb2_buf, 0);
 816         bitstream_size = q_data_dst->sizeimage;
 817
 818         if (!coda_is_initialized(dev)) {
 819                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
 820                 return -EFAULT;
 821         }
 822
 823         if (dst_fourcc == V4L2_PIX_FMT_JPEG) {
 824                 if (!ctx->params.jpeg_qmat_tab[0]) {
 825                         ctx->params.jpeg_qmat_tab[0] = kmalloc(64, GFP_KERNEL);
 826                         if (!ctx->params.jpeg_qmat_tab[0])
 827                                 return -ENOMEM;
 828                 }
 829                 if (!ctx->params.jpeg_qmat_tab[1]) {
 830                         ctx->params.jpeg_qmat_tab[1] = kmalloc(64, GFP_KERNEL);
 831                         if (!ctx->params.jpeg_qmat_tab[1])
 832                                 return -ENOMEM;
 833                 }
 834                 coda_set_jpeg_compression_quality(ctx, ctx->params.jpeg_quality);
 835         }
 836
 837         mutex_lock(&dev->coda_mutex);
 838
 839         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
 840         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 841         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 842         switch (dev->devtype->product) {
 843         case CODA_DX6:
 844                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
 845                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
 846                 break;
 847         case CODA_960:
 848                 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
 849                 /* fallthrough */
 850         case CODA_7541:
 851                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
 852                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
 853                 break;
 854         }
 855
 856         ctx->frame_mem_ctrl &= ~(CODA_FRAME_CHROMA_INTERLEAVE | (0x3 << 9) |
 857                                  CODA9_FRAME_TILED2LINEAR);
 858         if (q_data_src->fourcc == V4L2_PIX_FMT_NV12)
 859                 ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
 860         if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
 861                 ctx->frame_mem_ctrl |= (0x3 << 9) | CODA9_FRAME_TILED2LINEAR;
 862         coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
 863
 864         if (dev->devtype->product == CODA_DX6) {
 865                 /* Configure the coda */
 866                 coda_write(dev, dev->iram.paddr,
 867                            CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
 868         }
 869
 870         /* Could set rotation here if needed */
 871         value = 0;
 872         switch (dev->devtype->product) {
 873         case CODA_DX6:
 874                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK)
 875                         << CODADX6_PICWIDTH_OFFSET;
 876                 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK)
 877                          << CODA_PICHEIGHT_OFFSET;
 878                 break;
 879         case CODA_7541:
 880                 if (dst_fourcc == V4L2_PIX_FMT_H264) {
 881                         value = (round_up(q_data_src->width, 16) &
 882                                  CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
 883                         value |= (round_up(q_data_src->height, 16) &
 884                                  CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
 885                         break;
 886                 }
 887                 /* fallthrough */
 888         case CODA_960:
 889                 value = (q_data_src->width & CODA7_PICWIDTH_MASK)
 890                         << CODA7_PICWIDTH_OFFSET;
 891                 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK)
 892                          << CODA_PICHEIGHT_OFFSET;
 893         }
 894         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
 895         if (dst_fourcc == V4L2_PIX_FMT_JPEG)
 896                 ctx->params.framerate = 0;
 897         coda_write(dev, ctx->params.framerate,
 898                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
 899
 900         ctx->params.codec_mode = ctx->codec->mode;
 901         switch (dst_fourcc) {
 902         case V4L2_PIX_FMT_MPEG4:
 903                 if (dev->devtype->product == CODA_960)
 904                         coda_write(dev, CODA9_STD_MPEG4,
 905                                    CODA_CMD_ENC_SEQ_COD_STD);
 906                 else
 907                         coda_write(dev, CODA_STD_MPEG4,
 908                                    CODA_CMD_ENC_SEQ_COD_STD);
 909                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
 910                 break;
 911         case V4L2_PIX_FMT_H264:
 912                 if (dev->devtype->product == CODA_960)
 913                         coda_write(dev, CODA9_STD_H264,
 914                                    CODA_CMD_ENC_SEQ_COD_STD);
 915                 else
 916                         coda_write(dev, CODA_STD_H264,
 917                                    CODA_CMD_ENC_SEQ_COD_STD);
 918                 if (ctx->params.h264_deblk_enabled) {
 919                         value = ((ctx->params.h264_deblk_alpha &
 920                                   CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
 921                                  CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
 922                                 ((ctx->params.h264_deblk_beta &
 923                                   CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
 924                                  CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
 925                 } else {
 926                         value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET;
 927                 }
 928                 coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
 929                 break;
 930         case V4L2_PIX_FMT_JPEG:
 931                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_PARA);
 932                 coda_write(dev, ctx->params.jpeg_restart_interval,
 933                                 CODA_CMD_ENC_SEQ_JPG_RST_INTERVAL);
 934                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_EN);
 935                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_SIZE);
 936                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_OFFSET);
 937
 938                 coda_jpeg_write_tables(ctx);
 939                 break;
 940         default:
 941                 v4l2_err(v4l2_dev,
 942                          "dst format (0x%08x) invalid.\n", dst_fourcc);
 943                 ret = -EINVAL;
 944                 goto out;
 945         }
 946
 947         /*
 948          * slice mode and GOP size registers are used for thumb size/offset
 949          * in JPEG mode
 950          */
 951         if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
 952                 switch (ctx->params.slice_mode) {
 953                 case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
 954                         value = 0;
 955                         break;
 956                 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
 957                         value  = (ctx->params.slice_max_mb &
 958                                   CODA_SLICING_SIZE_MASK)
 959                                  << CODA_SLICING_SIZE_OFFSET;
 960                         value |= (1 & CODA_SLICING_UNIT_MASK)
 961                                  << CODA_SLICING_UNIT_OFFSET;
 962                         value |=  1 & CODA_SLICING_MODE_MASK;
 963                         break;
 964                 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
 965                         value  = (ctx->params.slice_max_bits &
 966                                   CODA_SLICING_SIZE_MASK)
 967                                  << CODA_SLICING_SIZE_OFFSET;
 968                         value |= (0 & CODA_SLICING_UNIT_MASK)
 969                                  << CODA_SLICING_UNIT_OFFSET;
 970                         value |=  1 & CODA_SLICING_MODE_MASK;
 971                         break;
 972                 }
 973                 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
 974                 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
 975                 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
 976         }
 977
 978         if (ctx->params.bitrate) {
 979                 /* Rate control enabled */
 980                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK)
 981                         << CODA_RATECONTROL_BITRATE_OFFSET;
 982                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
 983                 value |= (ctx->params.vbv_delay &
 984                           CODA_RATECONTROL_INITIALDELAY_MASK)
 985                          << CODA_RATECONTROL_INITIALDELAY_OFFSET;
 986                 if (dev->devtype->product == CODA_960)
 987                         value |= BIT(31); /* disable autoskip */
 988         } else {
 989                 value = 0;
 990         }
 991         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
 992
 993         coda_write(dev, ctx->params.vbv_size, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
 994         coda_write(dev, ctx->params.intra_refresh,
 995                    CODA_CMD_ENC_SEQ_INTRA_REFRESH);
 996
 997         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
 998         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
 999
1000
1001         value = 0;
1002         if (dev->devtype->product == CODA_960)
1003                 gamma = CODA9_DEFAULT_GAMMA;
1004         else
1005                 gamma = CODA_DEFAULT_GAMMA;
1006         if (gamma > 0) {
1007                 coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET,
1008                            CODA_CMD_ENC_SEQ_RC_GAMMA);
1009         }
1010
1011         if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) {
1012                 coda_write(dev,
1013                            ctx->params.h264_min_qp << CODA_QPMIN_OFFSET |
1014                            ctx->params.h264_max_qp << CODA_QPMAX_OFFSET,
1015                            CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX);
1016         }
1017         if (dev->devtype->product == CODA_960) {
1018                 if (ctx->params.h264_max_qp)
1019                         value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET;
1020                 if (CODA_DEFAULT_GAMMA > 0)
1021                         value |= 1 << CODA9_OPTION_GAMMA_OFFSET;
1022         } else {
1023                 if (CODA_DEFAULT_GAMMA > 0) {
1024                         if (dev->devtype->product == CODA_DX6)
1025                                 value |= 1 << CODADX6_OPTION_GAMMA_OFFSET;
1026                         else
1027                                 value |= 1 << CODA7_OPTION_GAMMA_OFFSET;
1028                 }
1029                 if (ctx->params.h264_min_qp)
1030                         value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET;
1031                 if (ctx->params.h264_max_qp)
1032                         value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET;
1033         }
1034         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1035
1036         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE);
1037
1038         coda_setup_iram(ctx);
1039
1040         if (dst_fourcc == V4L2_PIX_FMT_H264) {
1041                 switch (dev->devtype->product) {
1042                 case CODA_DX6:
1043                         value = FMO_SLICE_SAVE_BUF_SIZE << 7;
1044                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1045                         break;
1046                 case CODA_7541:
1047                         coda_write(dev, ctx->iram_info.search_ram_paddr,
1048                                         CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1049                         coda_write(dev, ctx->iram_info.search_ram_size,
1050                                         CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1051                         break;
1052                 case CODA_960:
1053                         coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION);
1054                         coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT);
1055                 }
1056         }
1057
1058         ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
1059         if (ret < 0) {
1060                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1061                 goto out;
1062         }
1063
1064         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
1065                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
1066                 ret = -EFAULT;
1067                 goto out;
1068         }
1069         ctx->initialized = 1;
1070
1071         if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
1072                 if (dev->devtype->product == CODA_960)
1073                         ctx->num_internal_frames = 4;
1074                 else
1075                         ctx->num_internal_frames = 2;
1076                 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1077                 if (ret < 0) {
1078                         v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
1079                         goto out;
1080                 }
1081                 num_fb = 2;
1082                 stride = q_data_src->bytesperline;
1083         } else {
1084                 ctx->num_internal_frames = 0;
1085                 num_fb = 0;
1086                 stride = 0;
1087         }
1088         coda_write(dev, num_fb, CODA_CMD_SET_FRAME_BUF_NUM);
1089         coda_write(dev, stride, CODA_CMD_SET_FRAME_BUF_STRIDE);
1090
1091         if (dev->devtype->product == CODA_7541) {
1092                 coda_write(dev, q_data_src->bytesperline,
1093                                 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1094         }
1095         if (dev->devtype->product != CODA_DX6) {
1096                 coda_write(dev, ctx->iram_info.buf_bit_use,
1097                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1098                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1099                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1100                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1101                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1102                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1103                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1104                 coda_write(dev, ctx->iram_info.buf_ovl_use,
1105                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1106                 if (dev->devtype->product == CODA_960) {
1107                         coda_write(dev, ctx->iram_info.buf_btp_use,
1108                                         CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1109
1110                         coda9_set_frame_cache(ctx, q_data_src->fourcc);
1111
1112                         /* FIXME */
1113                         coda_write(dev, ctx->internal_frames[2].paddr,
1114                                    CODA9_CMD_SET_FRAME_SUBSAMP_A);
1115                         coda_write(dev, ctx->internal_frames[3].paddr,
1116                                    CODA9_CMD_SET_FRAME_SUBSAMP_B);
1117                 }
1118         }
1119
1120         ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
1121         if (ret < 0) {
1122                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1123                 goto out;
1124         }
1125
1126         /* Save stream headers */
1127         buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1128         switch (dst_fourcc) {
1129         case V4L2_PIX_FMT_H264:
1130                 /*
1131                  * Get SPS in the first frame and copy it to an
1132                  * intermediate buffer.
1133                  */
1134                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
1135                                          &ctx->vpu_header[0][0],
1136                                          &ctx->vpu_header_size[0]);
1137                 if (ret < 0)
1138                         goto out;
1139
1140                 /*
1141                  * Get PPS in the first frame and copy it to an
1142                  * intermediate buffer.
1143                  */
1144                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
1145                                          &ctx->vpu_header[1][0],
1146                                          &ctx->vpu_header_size[1]);
1147                 if (ret < 0)
1148                         goto out;
1149
1150                 /*
1151                  * Length of H.264 headers is variable and thus it might not be
1152                  * aligned for the coda to append the encoded frame. In that is
1153                  * the case a filler NAL must be added to header 2.
1154                  */
1155                 ctx->vpu_header_size[2] = coda_h264_padding(
1156                                         (ctx->vpu_header_size[0] +
1157                                          ctx->vpu_header_size[1]),
1158                                          ctx->vpu_header[2]);
1159                 break;
1160         case V4L2_PIX_FMT_MPEG4:
1161                 /*
1162                  * Get VOS in the first frame and copy it to an
1163                  * intermediate buffer
1164                  */
1165                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
1166                                          &ctx->vpu_header[0][0],
1167                                          &ctx->vpu_header_size[0]);
1168                 if (ret < 0)
1169                         goto out;
1170
1171                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
1172                                          &ctx->vpu_header[1][0],
1173                                          &ctx->vpu_header_size[1]);
1174                 if (ret < 0)
1175                         goto out;
1176
1177                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
1178                                          &ctx->vpu_header[2][0],
1179                                          &ctx->vpu_header_size[2]);
1180                 if (ret < 0)
1181                         goto out;
1182                 break;
1183         default:
1184                 /* No more formats need to save headers at the moment */
1185                 break;
1186         }
1187
1188 out:
1189         mutex_unlock(&dev->coda_mutex);
1190         return ret;
1191 }
1192
1193 static int coda_prepare_encode(struct coda_ctx *ctx)
1194 {
1195         struct coda_q_data *q_data_src, *q_data_dst;
1196         struct vb2_v4l2_buffer *src_buf, *dst_buf;
1197         struct coda_dev *dev = ctx->dev;
1198         int force_ipicture;
1199         int quant_param = 0;
1200         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1201         u32 rot_mode = 0;
1202         u32 dst_fourcc;
1203         u32 reg;
1204
1205         src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1206         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1207         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1208         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1209         dst_fourcc = q_data_dst->fourcc;
1210
1211         src_buf->sequence = ctx->osequence;
1212         dst_buf->sequence = ctx->osequence;
1213         ctx->osequence++;
1214
1215         /*
1216          * Workaround coda firmware BUG that only marks the first
1217          * frame as IDR. This is a problem for some decoders that can't
1218          * recover when a frame is lost.
1219          */
1220         if (src_buf->sequence % ctx->params.gop_size) {
1221                 src_buf->flags |= V4L2_BUF_FLAG_PFRAME;
1222                 src_buf->flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1223         } else {
1224                 src_buf->flags |= V4L2_BUF_FLAG_KEYFRAME;
1225                 src_buf->flags &= ~V4L2_BUF_FLAG_PFRAME;
1226         }
1227
1228         if (dev->devtype->product == CODA_960)
1229                 coda_set_gdi_regs(ctx);
1230
1231         /*
1232          * Copy headers at the beginning of the first frame for H.264 only.
1233          * In MPEG4 they are already copied by the coda.
1234          */
1235         if (src_buf->sequence == 0) {
1236                 pic_stream_buffer_addr =
1237                         vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0) +
1238                         ctx->vpu_header_size[0] +
1239                         ctx->vpu_header_size[1] +
1240                         ctx->vpu_header_size[2];
1241                 pic_stream_buffer_size = q_data_dst->sizeimage -
1242                         ctx->vpu_header_size[0] -
1243                         ctx->vpu_header_size[1] -
1244                         ctx->vpu_header_size[2];
1245                 memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0),
1246                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1247                 memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0)
1248                         + ctx->vpu_header_size[0], &ctx->vpu_header[1][0],
1249                         ctx->vpu_header_size[1]);
1250                 memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0)
1251                         + ctx->vpu_header_size[0] + ctx->vpu_header_size[1],
1252                         &ctx->vpu_header[2][0], ctx->vpu_header_size[2]);
1253         } else {
1254                 pic_stream_buffer_addr =
1255                         vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0);
1256                 pic_stream_buffer_size = q_data_dst->sizeimage;
1257         }
1258
1259         if (src_buf->flags & V4L2_BUF_FLAG_KEYFRAME) {
1260                 force_ipicture = 1;
1261                 switch (dst_fourcc) {
1262                 case V4L2_PIX_FMT_H264:
1263                         quant_param = ctx->params.h264_intra_qp;
1264                         break;
1265                 case V4L2_PIX_FMT_MPEG4:
1266                         quant_param = ctx->params.mpeg4_intra_qp;
1267                         break;
1268                 case V4L2_PIX_FMT_JPEG:
1269                         quant_param = 30;
1270                         break;
1271                 default:
1272                         v4l2_warn(&ctx->dev->v4l2_dev,
1273                                 "cannot set intra qp, fmt not supported\n");
1274                         break;
1275                 }
1276         } else {
1277                 force_ipicture = 0;
1278                 switch (dst_fourcc) {
1279                 case V4L2_PIX_FMT_H264:
1280                         quant_param = ctx->params.h264_inter_qp;
1281                         break;
1282                 case V4L2_PIX_FMT_MPEG4:
1283                         quant_param = ctx->params.mpeg4_inter_qp;
1284                         break;
1285                 default:
1286                         v4l2_warn(&ctx->dev->v4l2_dev,
1287                                 "cannot set inter qp, fmt not supported\n");
1288                         break;
1289                 }
1290         }
1291
1292         /* submit */
1293         if (ctx->params.rot_mode)
1294                 rot_mode = CODA_ROT_MIR_ENABLE | ctx->params.rot_mode;
1295         coda_write(dev, rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1296         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1297
1298         if (dev->devtype->product == CODA_960) {
1299                 coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX);
1300                 coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE);
1301                 coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC);
1302
1303                 reg = CODA9_CMD_ENC_PIC_SRC_ADDR_Y;
1304         } else {
1305                 reg = CODA_CMD_ENC_PIC_SRC_ADDR_Y;
1306         }
1307         coda_write_base(ctx, q_data_src, src_buf, reg);
1308
1309         coda_write(dev, force_ipicture << 1 & 0x2,
1310                    CODA_CMD_ENC_PIC_OPTION);
1311
1312         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1313         coda_write(dev, pic_stream_buffer_size / 1024,
1314                    CODA_CMD_ENC_PIC_BB_SIZE);
1315
1316         if (!ctx->streamon_out) {
1317                 /* After streamoff on the output side, set stream end flag */
1318                 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1319                 coda_write(dev, ctx->bit_stream_param,
1320                            CODA_REG_BIT_BIT_STREAM_PARAM);
1321         }
1322
1323         if (dev->devtype->product != CODA_DX6)
1324                 coda_write(dev, ctx->iram_info.axi_sram_use,
1325                                 CODA7_REG_BIT_AXI_SRAM_USE);
1326
1327         trace_coda_enc_pic_run(ctx, src_buf);
1328
1329         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1330
1331         return 0;
1332 }
1333
1334 static void coda_finish_encode(struct coda_ctx *ctx)
1335 {
1336         struct vb2_v4l2_buffer *src_buf, *dst_buf;
1337         struct coda_dev *dev = ctx->dev;
1338         u32 wr_ptr, start_ptr;
1339
1340         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
1341         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1342
1343         trace_coda_enc_pic_done(ctx, dst_buf);
1344
1345         /* Get results from the coda */
1346         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1347         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1348
1349         /* Calculate bytesused field */
1350         if (dst_buf->sequence == 0) {
1351                 vb2_set_plane_payload(&dst_buf->vb2_buf, 0, wr_ptr - start_ptr +
1352                                         ctx->vpu_header_size[0] +
1353                                         ctx->vpu_header_size[1] +
1354                                         ctx->vpu_header_size[2]);
1355         } else {
1356                 vb2_set_plane_payload(&dst_buf->vb2_buf, 0, wr_ptr - start_ptr);
1357         }
1358
1359         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1360                  wr_ptr - start_ptr);
1361
1362         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1363         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1364
1365         if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
1366                 dst_buf->flags |= V4L2_BUF_FLAG_KEYFRAME;
1367                 dst_buf->flags &= ~V4L2_BUF_FLAG_PFRAME;
1368         } else {
1369                 dst_buf->flags |= V4L2_BUF_FLAG_PFRAME;
1370                 dst_buf->flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1371         }
1372
1373         dst_buf->vb2_buf.timestamp = src_buf->vb2_buf.timestamp;
1374         dst_buf->flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1375         dst_buf->flags |=
1376                 src_buf->flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1377         dst_buf->timecode = src_buf->timecode;
1378
1379         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1380
1381         dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
1382         coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_DONE);
1383
1384         ctx->gopcounter--;
1385         if (ctx->gopcounter < 0)
1386                 ctx->gopcounter = ctx->params.gop_size - 1;
1387
1388         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1389                 "job finished: encoding frame (%d) (%s)\n",
1390                 dst_buf->sequence,
1391                 (dst_buf->flags & V4L2_BUF_FLAG_KEYFRAME) ?
1392                 "KEYFRAME" : "PFRAME");
1393 }
1394
1395 static void coda_seq_end_work(struct work_struct *work)
1396 {
1397         struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work);
1398         struct coda_dev *dev = ctx->dev;
1399
1400         mutex_lock(&ctx->buffer_mutex);
1401         mutex_lock(&dev->coda_mutex);
1402
1403         if (ctx->initialized == 0)
1404                 goto out;
1405
1406         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1407                  "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx,
1408                  __func__);
1409         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1410                 v4l2_err(&dev->v4l2_dev,
1411                          "CODA_COMMAND_SEQ_END failed\n");
1412         }
1413
1414         /*
1415          * FIXME: Sometimes h.264 encoding fails with 8-byte sequences missing
1416          * from the output stream after the h.264 decoder has run. Resetting the
1417          * hardware after the decoder has finished seems to help.
1418          */
1419         if (dev->devtype->product == CODA_960)
1420                 coda_hw_reset(ctx);
1421
1422         kfifo_init(&ctx->bitstream_fifo,
1423                 ctx->bitstream.vaddr, ctx->bitstream.size);
1424
1425         coda_free_framebuffers(ctx);
1426
1427         ctx->initialized = 0;
1428
1429 out:
1430         mutex_unlock(&dev->coda_mutex);
1431         mutex_unlock(&ctx->buffer_mutex);
1432 }
1433
1434 static void coda_bit_release(struct coda_ctx *ctx)
1435 {
1436         mutex_lock(&ctx->buffer_mutex);
1437         coda_free_framebuffers(ctx);
1438         coda_free_context_buffers(ctx);
1439         coda_free_bitstream_buffer(ctx);
1440         mutex_unlock(&ctx->buffer_mutex);
1441 }
1442
1443 const struct coda_context_ops coda_bit_encode_ops = {
1444         .queue_init = coda_encoder_queue_init,
1445         .reqbufs = coda_encoder_reqbufs,
1446         .start_streaming = coda_start_encoding,
1447         .prepare_run = coda_prepare_encode,
1448         .finish_run = coda_finish_encode,
1449         .seq_end_work = coda_seq_end_work,
1450         .release = coda_bit_release,
1451 };
1452
1453 /*
1454  * Decoder context operations
1455  */
1456
1457 static int coda_alloc_bitstream_buffer(struct coda_ctx *ctx,
1458                                        struct coda_q_data *q_data)
1459 {
1460         if (ctx->bitstream.vaddr)
1461                 return 0;
1462
1463         ctx->bitstream.size = roundup_pow_of_two(q_data->sizeimage * 2);
1464         ctx->bitstream.vaddr = dma_alloc_wc(&ctx->dev->plat_dev->dev,
1465                                             ctx->bitstream.size,
1466                                             &ctx->bitstream.paddr, GFP_KERNEL);
1467         if (!ctx->bitstream.vaddr) {
1468                 v4l2_err(&ctx->dev->v4l2_dev,
1469                          "failed to allocate bitstream ringbuffer");
1470                 return -ENOMEM;
1471         }
1472         kfifo_init(&ctx->bitstream_fifo,
1473                    ctx->bitstream.vaddr, ctx->bitstream.size);
1474
1475         return 0;
1476 }
1477
1478 static void coda_free_bitstream_buffer(struct coda_ctx *ctx)
1479 {
1480         if (ctx->bitstream.vaddr == NULL)
1481                 return;
1482
1483         dma_free_wc(&ctx->dev->plat_dev->dev, ctx->bitstream.size,
1484                     ctx->bitstream.vaddr, ctx->bitstream.paddr);
1485         ctx->bitstream.vaddr = NULL;
1486         kfifo_init(&ctx->bitstream_fifo, NULL, 0);
1487 }
1488
1489 static int coda_decoder_reqbufs(struct coda_ctx *ctx,
1490                                 struct v4l2_requestbuffers *rb)
1491 {
1492         struct coda_q_data *q_data_src;
1493         int ret;
1494
1495         if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
1496                 return 0;
1497
1498         if (rb->count) {
1499                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1500                 ret = coda_alloc_context_buffers(ctx, q_data_src);
1501                 if (ret < 0)
1502                         return ret;
1503                 ret = coda_alloc_bitstream_buffer(ctx, q_data_src);
1504                 if (ret < 0) {
1505                         coda_free_context_buffers(ctx);
1506                         return ret;
1507                 }
1508         } else {
1509                 coda_free_bitstream_buffer(ctx);
1510                 coda_free_context_buffers(ctx);
1511         }
1512
1513         return 0;
1514 }
1515
1516 static int __coda_start_decoding(struct coda_ctx *ctx)
1517 {
1518         struct coda_q_data *q_data_src, *q_data_dst;
1519         u32 bitstream_buf, bitstream_size;
1520         struct coda_dev *dev = ctx->dev;
1521         int width, height;
1522         u32 src_fourcc, dst_fourcc;
1523         u32 val;
1524         int ret;
1525
1526         /* Start decoding */
1527         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1528         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1529         bitstream_buf = ctx->bitstream.paddr;
1530         bitstream_size = ctx->bitstream.size;
1531         src_fourcc = q_data_src->fourcc;
1532         dst_fourcc = q_data_dst->fourcc;
1533
1534         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1535
1536         /* Update coda bitstream read and write pointers from kfifo */
1537         coda_kfifo_sync_to_device_full(ctx);
1538
1539         ctx->frame_mem_ctrl &= ~(CODA_FRAME_CHROMA_INTERLEAVE | (0x3 << 9) |
1540                                  CODA9_FRAME_TILED2LINEAR);
1541         if (dst_fourcc == V4L2_PIX_FMT_NV12)
1542                 ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
1543         if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
1544                 ctx->frame_mem_ctrl |= (0x3 << 9) | CODA9_FRAME_TILED2LINEAR;
1545         coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
1546
1547         ctx->display_idx = -1;
1548         ctx->frm_dis_flg = 0;
1549         coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1550
1551         coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
1552                         CODA_REG_BIT_BIT_STREAM_PARAM);
1553
1554         coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1555         coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1556         val = 0;
1557         if ((dev->devtype->product == CODA_7541) ||
1558             (dev->devtype->product == CODA_960))
1559                 val |= CODA_REORDER_ENABLE;
1560         if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG)
1561                 val |= CODA_NO_INT_ENABLE;
1562         coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1563
1564         ctx->params.codec_mode = ctx->codec->mode;
1565         if (dev->devtype->product == CODA_960 &&
1566             src_fourcc == V4L2_PIX_FMT_MPEG4)
1567                 ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4;
1568         else
1569                 ctx->params.codec_mode_aux = 0;
1570         if (src_fourcc == V4L2_PIX_FMT_H264) {
1571                 if (dev->devtype->product == CODA_7541) {
1572                         coda_write(dev, ctx->psbuf.paddr,
1573                                         CODA_CMD_DEC_SEQ_PS_BB_START);
1574                         coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1575                                         CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1576                 }
1577                 if (dev->devtype->product == CODA_960) {
1578                         coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN);
1579                         coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE);
1580                 }
1581         }
1582         if (dev->devtype->product != CODA_960)
1583                 coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE);
1584
1585         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1586                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1587                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1588                 return -ETIMEDOUT;
1589         }
1590         ctx->sequence_offset = ~0U;
1591         ctx->initialized = 1;
1592
1593         /* Update kfifo out pointer from coda bitstream read pointer */
1594         coda_kfifo_sync_from_device(ctx);
1595
1596         coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1597
1598         if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1599                 v4l2_err(&dev->v4l2_dev,
1600                         "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
1601                         coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1602                 return -EAGAIN;
1603         }
1604
1605         val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1606         if (dev->devtype->product == CODA_DX6) {
1607                 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1608                 height = val & CODADX6_PICHEIGHT_MASK;
1609         } else {
1610                 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1611                 height = val & CODA7_PICHEIGHT_MASK;
1612         }
1613
1614         if (width > q_data_dst->bytesperline || height > q_data_dst->height) {
1615                 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1616                          width, height, q_data_dst->bytesperline,
1617                          q_data_dst->height);
1618                 return -EINVAL;
1619         }
1620
1621         width = round_up(width, 16);
1622         height = round_up(height, 16);
1623
1624         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
1625                  __func__, ctx->idx, width, height);
1626
1627         ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED);
1628         if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
1629                 v4l2_err(&dev->v4l2_dev,
1630                          "not enough framebuffers to decode (%d < %d)\n",
1631                          CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
1632                 return -EINVAL;
1633         }
1634
1635         if (src_fourcc == V4L2_PIX_FMT_H264) {
1636                 u32 left_right;
1637                 u32 top_bottom;
1638
1639                 left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT);
1640                 top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM);
1641
1642                 q_data_dst->rect.left = (left_right >> 10) & 0x3ff;
1643                 q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff;
1644                 q_data_dst->rect.width = width - q_data_dst->rect.left -
1645                                          (left_right & 0x3ff);
1646                 q_data_dst->rect.height = height - q_data_dst->rect.top -
1647                                           (top_bottom & 0x3ff);
1648         }
1649
1650         ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
1651         if (ret < 0) {
1652                 v4l2_err(&dev->v4l2_dev, "failed to allocate framebuffers\n");
1653                 return ret;
1654         }
1655
1656         /* Tell the decoder how many frame buffers we allocated. */
1657         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1658         coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
1659
1660         if (dev->devtype->product != CODA_DX6) {
1661                 /* Set secondary AXI IRAM */
1662                 coda_setup_iram(ctx);
1663
1664                 coda_write(dev, ctx->iram_info.buf_bit_use,
1665                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1666                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1667                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1668                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1669                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1670                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1671                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1672                 coda_write(dev, ctx->iram_info.buf_ovl_use,
1673                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1674                 if (dev->devtype->product == CODA_960) {
1675                         coda_write(dev, ctx->iram_info.buf_btp_use,
1676                                         CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1677
1678                         coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY);
1679                         coda9_set_frame_cache(ctx, dst_fourcc);
1680                 }
1681         }
1682
1683         if (src_fourcc == V4L2_PIX_FMT_H264) {
1684                 coda_write(dev, ctx->slicebuf.paddr,
1685                                 CODA_CMD_SET_FRAME_SLICE_BB_START);
1686                 coda_write(dev, ctx->slicebuf.size / 1024,
1687                                 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
1688         }
1689
1690         if (dev->devtype->product == CODA_7541) {
1691                 int max_mb_x = 1920 / 16;
1692                 int max_mb_y = 1088 / 16;
1693                 int max_mb_num = max_mb_x * max_mb_y;
1694
1695                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1696                                 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
1697         } else if (dev->devtype->product == CODA_960) {
1698                 int max_mb_x = 1920 / 16;
1699                 int max_mb_y = 1088 / 16;
1700                 int max_mb_num = max_mb_x * max_mb_y;
1701
1702                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1703                                 CODA9_CMD_SET_FRAME_MAX_DEC_SIZE);
1704         }
1705
1706         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1707                 v4l2_err(&ctx->dev->v4l2_dev,
1708                          "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1709                 return -ETIMEDOUT;
1710         }
1711
1712         return 0;
1713 }
1714
1715 static int coda_start_decoding(struct coda_ctx *ctx)
1716 {
1717         struct coda_dev *dev = ctx->dev;
1718         int ret;
1719
1720         mutex_lock(&dev->coda_mutex);
1721         ret = __coda_start_decoding(ctx);
1722         mutex_unlock(&dev->coda_mutex);
1723
1724         return ret;
1725 }
1726
1727 static int coda_prepare_decode(struct coda_ctx *ctx)
1728 {
1729         struct vb2_v4l2_buffer *dst_buf;
1730         struct coda_dev *dev = ctx->dev;
1731         struct coda_q_data *q_data_dst;
1732         struct coda_buffer_meta *meta;
1733         unsigned long flags;
1734         u32 reg_addr, reg_stride;
1735
1736         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1737         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1738
1739         /* Try to copy source buffer contents into the bitstream ringbuffer */
1740         mutex_lock(&ctx->bitstream_mutex);
1741         coda_fill_bitstream(ctx, true);
1742         mutex_unlock(&ctx->bitstream_mutex);
1743
1744         if (coda_get_bitstream_payload(ctx) < 512 &&
1745             (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1746                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1747                          "bitstream payload: %d, skipping\n",
1748                          coda_get_bitstream_payload(ctx));
1749                 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1750                 return -EAGAIN;
1751         }
1752
1753         /* Run coda_start_decoding (again) if not yet initialized */
1754         if (!ctx->initialized) {
1755                 int ret = __coda_start_decoding(ctx);
1756
1757                 if (ret < 0) {
1758                         v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
1759                         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1760                         return -EAGAIN;
1761                 } else {
1762                         ctx->initialized = 1;
1763                 }
1764         }
1765
1766         if (dev->devtype->product == CODA_960)
1767                 coda_set_gdi_regs(ctx);
1768
1769         if (dev->devtype->product == CODA_960) {
1770                 /*
1771                  * The CODA960 seems to have an internal list of buffers with
1772                  * 64 entries that includes the registered frame buffers as
1773                  * well as the rotator buffer output.
1774                  * ROT_INDEX needs to be < 0x40, but > ctx->num_internal_frames.
1775                  */
1776                 coda_write(dev, CODA_MAX_FRAMEBUFFERS + dst_buf->vb2_buf.index,
1777                                 CODA9_CMD_DEC_PIC_ROT_INDEX);
1778
1779                 reg_addr = CODA9_CMD_DEC_PIC_ROT_ADDR_Y;
1780                 reg_stride = CODA9_CMD_DEC_PIC_ROT_STRIDE;
1781         } else {
1782                 reg_addr = CODA_CMD_DEC_PIC_ROT_ADDR_Y;
1783                 reg_stride = CODA_CMD_DEC_PIC_ROT_STRIDE;
1784         }
1785         coda_write_base(ctx, q_data_dst, dst_buf, reg_addr);
1786         coda_write(dev, q_data_dst->bytesperline, reg_stride);
1787
1788         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1789                         CODA_CMD_DEC_PIC_ROT_MODE);
1790
1791         switch (dev->devtype->product) {
1792         case CODA_DX6:
1793                 /* TBD */
1794         case CODA_7541:
1795                 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1796                 break;
1797         case CODA_960:
1798                 /* 'hardcode to use interrupt disable mode'? */
1799                 coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION);
1800                 break;
1801         }
1802
1803         coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1804
1805         coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1806         coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1807
1808         if (dev->devtype->product != CODA_DX6)
1809                 coda_write(dev, ctx->iram_info.axi_sram_use,
1810                                 CODA7_REG_BIT_AXI_SRAM_USE);
1811
1812         spin_lock_irqsave(&ctx->buffer_meta_lock, flags);
1813         meta = list_first_entry_or_null(&ctx->buffer_meta_list,
1814                                         struct coda_buffer_meta, list);
1815
1816         if (meta && ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG) {
1817
1818                 /* If this is the last buffer in the bitstream, add padding */
1819                 if (meta->end == (ctx->bitstream_fifo.kfifo.in &
1820                                   ctx->bitstream_fifo.kfifo.mask)) {
1821                         static unsigned char buf[512];
1822                         unsigned int pad;
1823
1824                         /* Pad to multiple of 256 and then add 256 more */
1825                         pad = ((0 - meta->end) & 0xff) + 256;
1826
1827                         memset(buf, 0xff, sizeof(buf));
1828
1829                         kfifo_in(&ctx->bitstream_fifo, buf, pad);
1830                 }
1831         }
1832         spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
1833
1834         coda_kfifo_sync_to_device_full(ctx);
1835
1836         /* Clear decode success flag */
1837         coda_write(dev, 0, CODA_RET_DEC_PIC_SUCCESS);
1838
1839         /* Clear error return value */
1840         coda_write(dev, 0, CODA_RET_DEC_PIC_ERR_MB);
1841
1842         trace_coda_dec_pic_run(ctx, meta);
1843
1844         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1845
1846         return 0;
1847 }
1848
1849 static void coda_finish_decode(struct coda_ctx *ctx)
1850 {
1851         struct coda_dev *dev = ctx->dev;
1852         struct coda_q_data *q_data_src;
1853         struct coda_q_data *q_data_dst;
1854         struct vb2_v4l2_buffer *dst_buf;
1855         struct coda_buffer_meta *meta;
1856         unsigned long payload;
1857         unsigned long flags;
1858         int width, height;
1859         int decoded_idx;
1860         int display_idx;
1861         u32 src_fourcc;
1862         int success;
1863         u32 err_mb;
1864         u32 val;
1865
1866         /* Update kfifo out pointer from coda bitstream read pointer */
1867         coda_kfifo_sync_from_device(ctx);
1868
1869         /*
1870          * in stream-end mode, the read pointer can overshoot the write pointer
1871          * by up to 512 bytes
1872          */
1873         if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
1874                 if (coda_get_bitstream_payload(ctx) >= ctx->bitstream.size - 512)
1875                         kfifo_init(&ctx->bitstream_fifo,
1876                                 ctx->bitstream.vaddr, ctx->bitstream.size);
1877         }
1878
1879         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1880         src_fourcc = q_data_src->fourcc;
1881
1882         val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
1883         if (val != 1)
1884                 pr_err("DEC_PIC_SUCCESS = %d\n", val);
1885
1886         success = val & 0x1;
1887         if (!success)
1888                 v4l2_err(&dev->v4l2_dev, "decode failed\n");
1889
1890         if (src_fourcc == V4L2_PIX_FMT_H264) {
1891                 if (val & (1 << 3))
1892                         v4l2_err(&dev->v4l2_dev,
1893                                  "insufficient PS buffer space (%d bytes)\n",
1894                                  ctx->psbuf.size);
1895                 if (val & (1 << 2))
1896                         v4l2_err(&dev->v4l2_dev,
1897                                  "insufficient slice buffer space (%d bytes)\n",
1898                                  ctx->slicebuf.size);
1899         }
1900
1901         val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
1902         width = (val >> 16) & 0xffff;
1903         height = val & 0xffff;
1904
1905         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1906
1907         /* frame crop information */
1908         if (src_fourcc == V4L2_PIX_FMT_H264) {
1909                 u32 left_right;
1910                 u32 top_bottom;
1911
1912                 left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT);
1913                 top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM);
1914
1915                 if (left_right == 0xffffffff && top_bottom == 0xffffffff) {
1916                         /* Keep current crop information */
1917                 } else {
1918                         struct v4l2_rect *rect = &q_data_dst->rect;
1919
1920                         rect->left = left_right >> 16 & 0xffff;
1921                         rect->top = top_bottom >> 16 & 0xffff;
1922                         rect->width = width - rect->left -
1923                                       (left_right & 0xffff);
1924                         rect->height = height - rect->top -
1925                                        (top_bottom & 0xffff);
1926                 }
1927         } else {
1928                 /* no cropping */
1929         }
1930
1931         err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
1932         if (err_mb > 0)
1933                 v4l2_err(&dev->v4l2_dev,
1934                          "errors in %d macroblocks\n", err_mb);
1935
1936         if (dev->devtype->product == CODA_7541) {
1937                 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
1938                 if (val == 0) {
1939                         /* not enough bitstream data */
1940                         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1941                                  "prescan failed: %d\n", val);
1942                         ctx->hold = true;
1943                         return;
1944                 }
1945         }
1946
1947         ctx->frm_dis_flg = coda_read(dev,
1948                                      CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1949
1950         /*
1951          * The previous display frame was copied out by the rotator,
1952          * now it can be overwritten again
1953          */
1954         if (ctx->display_idx >= 0 &&
1955             ctx->display_idx < ctx->num_internal_frames) {
1956                 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
1957                 coda_write(dev, ctx->frm_dis_flg,
1958                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1959         }
1960
1961         /*
1962          * The index of the last decoded frame, not necessarily in
1963          * display order, and the index of the next display frame.
1964          * The latter could have been decoded in a previous run.
1965          */
1966         decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
1967         display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
1968
1969         if (decoded_idx == -1) {
1970                 /* no frame was decoded, but we might have a display frame */
1971                 if (display_idx >= 0 && display_idx < ctx->num_internal_frames)
1972                         ctx->sequence_offset++;
1973                 else if (ctx->display_idx < 0)
1974                         ctx->hold = true;
1975         } else if (decoded_idx == -2) {
1976                 if (ctx->display_idx >= 0 &&
1977                     ctx->display_idx < ctx->num_internal_frames)
1978                         ctx->sequence_offset++;
1979                 /* no frame was decoded, we still return remaining buffers */
1980         } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
1981                 v4l2_err(&dev->v4l2_dev,
1982                          "decoded frame index out of range: %d\n", decoded_idx);
1983         } else {
1984                 val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM);
1985                 if (ctx->sequence_offset == -1)
1986                         ctx->sequence_offset = val;
1987                 val -= ctx->sequence_offset;
1988                 spin_lock_irqsave(&ctx->buffer_meta_lock, flags);
1989                 if (!list_empty(&ctx->buffer_meta_list)) {
1990                         meta = list_first_entry(&ctx->buffer_meta_list,
1991                                               struct coda_buffer_meta, list);
1992                         list_del(&meta->list);
1993                         ctx->num_metas--;
1994                         spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
1995                         /*
1996                          * Clamp counters to 16 bits for comparison, as the HW
1997                          * counter rolls over at this point for h.264. This
1998                          * may be different for other formats, but using 16 bits
1999                          * should be enough to detect most errors and saves us
2000                          * from doing different things based on the format.
2001                          */
2002                         if ((val & 0xffff) != (meta->sequence & 0xffff)) {
2003                                 v4l2_err(&dev->v4l2_dev,
2004                                          "sequence number mismatch (%d(%d) != %d)\n",
2005                                          val, ctx->sequence_offset,
2006                                          meta->sequence);
2007                         }
2008                         ctx->frame_metas[decoded_idx] = *meta;
2009                         kfree(meta);
2010                 } else {
2011                         spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
2012                         v4l2_err(&dev->v4l2_dev, "empty timestamp list!\n");
2013                         memset(&ctx->frame_metas[decoded_idx], 0,
2014                                sizeof(struct coda_buffer_meta));
2015                         ctx->frame_metas[decoded_idx].sequence = val;
2016                         ctx->sequence_offset++;
2017                 }
2018
2019                 trace_coda_dec_pic_done(ctx, &ctx->frame_metas[decoded_idx]);
2020
2021                 val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7;
2022                 if (val == 0)
2023                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME;
2024                 else if (val == 1)
2025                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME;
2026                 else
2027                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME;
2028
2029                 ctx->frame_errors[decoded_idx] = err_mb;
2030         }
2031
2032         if (display_idx == -1) {
2033                 /*
2034                  * no more frames to be decoded, but there could still
2035                  * be rotator output to dequeue
2036                  */
2037                 ctx->hold = true;
2038         } else if (display_idx == -3) {
2039                 /* possibly prescan failure */
2040         } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
2041                 v4l2_err(&dev->v4l2_dev,
2042                          "presentation frame index out of range: %d\n",
2043                          display_idx);
2044         }
2045
2046         /* If a frame was copied out, return it */
2047         if (ctx->display_idx >= 0 &&
2048             ctx->display_idx < ctx->num_internal_frames) {
2049                 dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
2050                 dst_buf->sequence = ctx->osequence++;
2051
2052                 dst_buf->flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
2053                                              V4L2_BUF_FLAG_PFRAME |
2054                                              V4L2_BUF_FLAG_BFRAME);
2055                 dst_buf->flags |= ctx->frame_types[ctx->display_idx];
2056                 meta = &ctx->frame_metas[ctx->display_idx];
2057                 dst_buf->timecode = meta->timecode;
2058                 dst_buf->vb2_buf.timestamp = meta->timestamp;
2059
2060                 trace_coda_dec_rot_done(ctx, dst_buf, meta);
2061
2062                 switch (q_data_dst->fourcc) {
2063                 case V4L2_PIX_FMT_YUV420:
2064                 case V4L2_PIX_FMT_YVU420:
2065                 case V4L2_PIX_FMT_NV12:
2066                 default:
2067                         payload = width * height * 3 / 2;
2068                         break;
2069                 case V4L2_PIX_FMT_YUV422P:
2070                         payload = width * height * 2;
2071                         break;
2072                 }
2073                 vb2_set_plane_payload(&dst_buf->vb2_buf, 0, payload);
2074
2075                 coda_m2m_buf_done(ctx, dst_buf, ctx->frame_errors[display_idx] ?
2076                                   VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
2077
2078                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2079                         "job finished: decoding frame (%d) (%s)\n",
2080                         dst_buf->sequence,
2081                         (dst_buf->flags & V4L2_BUF_FLAG_KEYFRAME) ?
2082                         "KEYFRAME" : "PFRAME");
2083         } else {
2084                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2085                         "job finished: no frame decoded\n");
2086         }
2087
2088         /* The rotator will copy the current display frame next time */
2089         ctx->display_idx = display_idx;
2090 }
2091
2092 const struct coda_context_ops coda_bit_decode_ops = {
2093         .queue_init = coda_decoder_queue_init,
2094         .reqbufs = coda_decoder_reqbufs,
2095         .start_streaming = coda_start_decoding,
2096         .prepare_run = coda_prepare_decode,
2097         .finish_run = coda_finish_decode,
2098         .seq_end_work = coda_seq_end_work,
2099         .release = coda_bit_release,
2100 };
2101
2102 irqreturn_t coda_irq_handler(int irq, void *data)
2103 {
2104         struct coda_dev *dev = data;
2105         struct coda_ctx *ctx;
2106
2107         /* read status register to attend the IRQ */
2108         coda_read(dev, CODA_REG_BIT_INT_STATUS);
2109         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
2110                       CODA_REG_BIT_INT_CLEAR);
2111
2112         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2113         if (ctx == NULL) {
2114                 v4l2_err(&dev->v4l2_dev,
2115                          "Instance released before the end of transaction\n");
2116                 return IRQ_HANDLED;
2117         }
2118
2119         trace_coda_bit_done(ctx);
2120
2121         if (ctx->aborting) {
2122                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2123                          "task has been aborted\n");
2124         }
2125
2126         if (coda_isbusy(ctx->dev)) {
2127                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2128                          "coda is still busy!!!!\n");
2129                 return IRQ_NONE;
2130         }
2131
2132         complete(&ctx->completion);
2133
2134         return IRQ_HANDLED;
2135 }