6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
45 #include <asm/cacheflush.h>
47 #include <linux/clk.h>
48 #include <linux/clkdev.h>
49 #include <linux/delay.h>
50 #include <linux/device.h>
51 #include <linux/dma-mapping.h>
52 #include <linux/i2c.h>
53 #include <linux/interrupt.h>
54 #include <linux/mfd/syscon.h>
55 #include <linux/module.h>
56 #include <linux/omap-iommu.h>
57 #include <linux/platform_device.h>
58 #include <linux/regulator/consumer.h>
59 #include <linux/slab.h>
60 #include <linux/sched.h>
61 #include <linux/vmalloc.h>
63 #include <asm/dma-iommu.h>
65 #include <media/v4l2-common.h>
66 #include <media/v4l2-device.h>
67 #include <media/v4l2-of.h>
72 #include "isppreview.h"
73 #include "ispresizer.h"
79 static unsigned int autoidle;
80 module_param(autoidle, int, 0444);
81 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
83 static void isp_save_ctx(struct isp_device *isp);
85 static void isp_restore_ctx(struct isp_device *isp);
87 static const struct isp_res_mapping isp_res_maps[] = {
89 .isp_rev = ISP_REVISION_2_0,
92 0x0000, /* base, len 0x0070 */
93 0x0400, /* ccp2, len 0x01f0 */
94 0x0600, /* ccdc, len 0x00a8 */
95 0x0a00, /* hist, len 0x0048 */
96 0x0c00, /* h3a, len 0x0060 */
97 0x0e00, /* preview, len 0x00a0 */
98 0x1000, /* resizer, len 0x00ac */
99 0x1200, /* sbl, len 0x00fc */
100 /* second MMIO area */
101 0x0000, /* csi2a, len 0x0170 */
102 0x0170, /* csiphy2, len 0x000c */
104 .phy_type = ISP_PHY_TYPE_3430,
107 .isp_rev = ISP_REVISION_15_0,
109 /* first MMIO area */
110 0x0000, /* base, len 0x0070 */
111 0x0400, /* ccp2, len 0x01f0 */
112 0x0600, /* ccdc, len 0x00a8 */
113 0x0a00, /* hist, len 0x0048 */
114 0x0c00, /* h3a, len 0x0060 */
115 0x0e00, /* preview, len 0x00a0 */
116 0x1000, /* resizer, len 0x00ac */
117 0x1200, /* sbl, len 0x00fc */
118 /* second MMIO area */
119 0x0000, /* csi2a, len 0x0170 (1st area) */
120 0x0170, /* csiphy2, len 0x000c */
121 0x01c0, /* csi2a, len 0x0040 (2nd area) */
122 0x0400, /* csi2c, len 0x0170 (1st area) */
123 0x0570, /* csiphy1, len 0x000c */
124 0x05c0, /* csi2c, len 0x0040 (2nd area) */
126 .phy_type = ISP_PHY_TYPE_3630,
130 /* Structure for saving/restoring ISP module registers */
131 static struct isp_reg isp_reg_list[] = {
132 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
133 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
134 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
139 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
140 * @isp: OMAP3 ISP device
142 * In order to force posting of pending writes, we need to write and
143 * readback the same register, in this case the revision register.
145 * See this link for reference:
146 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
148 void omap3isp_flush(struct isp_device *isp)
150 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
151 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
154 /* -----------------------------------------------------------------------------
158 #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
160 static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
164 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
165 ISPTCTRL_CTRL_DIVA_MASK,
166 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
169 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
170 ISPTCTRL_CTRL_DIVB_MASK,
171 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
176 static int isp_xclk_prepare(struct clk_hw *hw)
178 struct isp_xclk *xclk = to_isp_xclk(hw);
180 omap3isp_get(xclk->isp);
185 static void isp_xclk_unprepare(struct clk_hw *hw)
187 struct isp_xclk *xclk = to_isp_xclk(hw);
189 omap3isp_put(xclk->isp);
192 static int isp_xclk_enable(struct clk_hw *hw)
194 struct isp_xclk *xclk = to_isp_xclk(hw);
197 spin_lock_irqsave(&xclk->lock, flags);
198 isp_xclk_update(xclk, xclk->divider);
199 xclk->enabled = true;
200 spin_unlock_irqrestore(&xclk->lock, flags);
205 static void isp_xclk_disable(struct clk_hw *hw)
207 struct isp_xclk *xclk = to_isp_xclk(hw);
210 spin_lock_irqsave(&xclk->lock, flags);
211 isp_xclk_update(xclk, 0);
212 xclk->enabled = false;
213 spin_unlock_irqrestore(&xclk->lock, flags);
216 static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
217 unsigned long parent_rate)
219 struct isp_xclk *xclk = to_isp_xclk(hw);
221 return parent_rate / xclk->divider;
224 static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
228 if (*rate >= parent_rate) {
230 return ISPTCTRL_CTRL_DIV_BYPASS;
236 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
237 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
238 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
240 *rate = parent_rate / divider;
244 static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
245 unsigned long *parent_rate)
247 isp_xclk_calc_divider(&rate, *parent_rate);
251 static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
252 unsigned long parent_rate)
254 struct isp_xclk *xclk = to_isp_xclk(hw);
258 divider = isp_xclk_calc_divider(&rate, parent_rate);
260 spin_lock_irqsave(&xclk->lock, flags);
262 xclk->divider = divider;
264 isp_xclk_update(xclk, divider);
266 spin_unlock_irqrestore(&xclk->lock, flags);
268 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
269 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
273 static const struct clk_ops isp_xclk_ops = {
274 .prepare = isp_xclk_prepare,
275 .unprepare = isp_xclk_unprepare,
276 .enable = isp_xclk_enable,
277 .disable = isp_xclk_disable,
278 .recalc_rate = isp_xclk_recalc_rate,
279 .round_rate = isp_xclk_round_rate,
280 .set_rate = isp_xclk_set_rate,
283 static const char *isp_xclk_parent_name = "cam_mclk";
285 static const struct clk_init_data isp_xclk_init_data = {
287 .ops = &isp_xclk_ops,
288 .parent_names = &isp_xclk_parent_name,
292 static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
294 unsigned int idx = clkspec->args[0];
295 struct isp_device *isp = data;
297 if (idx >= ARRAY_SIZE(isp->xclks))
298 return ERR_PTR(-ENOENT);
300 return isp->xclks[idx].clk;
303 static int isp_xclk_init(struct isp_device *isp)
305 struct device_node *np = isp->dev->of_node;
306 struct clk_init_data init = { 0 };
309 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
310 isp->xclks[i].clk = ERR_PTR(-EINVAL);
312 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
313 struct isp_xclk *xclk = &isp->xclks[i];
316 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
318 spin_lock_init(&xclk->lock);
320 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
321 init.ops = &isp_xclk_ops;
322 init.parent_names = &isp_xclk_parent_name;
323 init.num_parents = 1;
325 xclk->hw.init = &init;
327 * The first argument is NULL in order to avoid circular
328 * reference, as this driver takes reference on the
329 * sensor subdevice modules and the sensors would take
330 * reference on this module through clk_get().
332 xclk->clk = clk_register(NULL, &xclk->hw);
333 if (IS_ERR(xclk->clk))
334 return PTR_ERR(xclk->clk);
338 of_clk_add_provider(np, isp_xclk_src_get, isp);
343 static void isp_xclk_cleanup(struct isp_device *isp)
345 struct device_node *np = isp->dev->of_node;
349 of_clk_del_provider(np);
351 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
352 struct isp_xclk *xclk = &isp->xclks[i];
354 if (!IS_ERR(xclk->clk))
355 clk_unregister(xclk->clk);
359 /* -----------------------------------------------------------------------------
364 * isp_enable_interrupts - Enable ISP interrupts.
365 * @isp: OMAP3 ISP device
367 static void isp_enable_interrupts(struct isp_device *isp)
369 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
370 | IRQ0ENABLE_CSIB_IRQ
371 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
372 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
373 | IRQ0ENABLE_CCDC_VD0_IRQ
374 | IRQ0ENABLE_CCDC_VD1_IRQ
375 | IRQ0ENABLE_HS_VS_IRQ
376 | IRQ0ENABLE_HIST_DONE_IRQ
377 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
378 | IRQ0ENABLE_H3A_AF_DONE_IRQ
379 | IRQ0ENABLE_PRV_DONE_IRQ
380 | IRQ0ENABLE_RSZ_DONE_IRQ;
382 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
383 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
387 * isp_disable_interrupts - Disable ISP interrupts.
388 * @isp: OMAP3 ISP device
390 static void isp_disable_interrupts(struct isp_device *isp)
392 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
396 * isp_core_init - ISP core settings
397 * @isp: OMAP3 ISP device
398 * @idle: Consider idle state.
400 * Set the power settings for the ISP and SBL bus and configure the HS/VS
403 * We need to configure the HS/VS interrupt source before interrupts get
404 * enabled, as the sensor might be free-running and the ISP default setting
405 * (HS edge) would put an unnecessary burden on the CPU.
407 static void isp_core_init(struct isp_device *isp, int idle)
410 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
411 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
412 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
413 ((isp->revision == ISP_REVISION_15_0) ?
414 ISP_SYSCONFIG_AUTOIDLE : 0),
415 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
418 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
419 ISPCTRL_SYNC_DETECT_VSRISE,
420 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
424 * Configure the bridge and lane shifter. Valid inputs are
426 * CCDC_INPUT_PARALLEL: Parallel interface
427 * CCDC_INPUT_CSI2A: CSI2a receiver
428 * CCDC_INPUT_CCP2B: CCP2b receiver
429 * CCDC_INPUT_CSI2C: CSI2c receiver
431 * The bridge and lane shifter are configured according to the selected input
432 * and the ISP platform data.
434 void omap3isp_configure_bridge(struct isp_device *isp,
435 enum ccdc_input_entity input,
436 const struct isp_parallel_cfg *parcfg,
437 unsigned int shift, unsigned int bridge)
441 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
442 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
443 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
444 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
445 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
446 ispctrl_val |= bridge;
449 case CCDC_INPUT_PARALLEL:
450 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
451 ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
452 shift += parcfg->data_lane_shift * 2;
455 case CCDC_INPUT_CSI2A:
456 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
459 case CCDC_INPUT_CCP2B:
460 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
463 case CCDC_INPUT_CSI2C:
464 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
471 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
473 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
476 void omap3isp_hist_dma_done(struct isp_device *isp)
478 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
479 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
480 /* Histogram cannot be enabled in this frame anymore */
481 atomic_set(&isp->isp_hist.buf_err, 1);
482 dev_dbg(isp->dev, "hist: Out of synchronization with "
483 "CCDC. Ignoring next buffer.\n");
487 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
489 static const char *name[] = {
508 "CCDC_LSC_PREFETCH_COMPLETED",
509 "CCDC_LSC_PREFETCH_ERROR",
525 dev_dbg(isp->dev, "ISP IRQ: ");
527 for (i = 0; i < ARRAY_SIZE(name); i++) {
528 if ((1 << i) & irqstatus)
529 printk(KERN_CONT "%s ", name[i]);
531 printk(KERN_CONT "\n");
534 static void isp_isr_sbl(struct isp_device *isp)
536 struct device *dev = isp->dev;
537 struct isp_pipeline *pipe;
541 * Handle shared buffer logic overflows for video buffers.
542 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
544 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
545 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
546 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
549 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
551 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
552 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
557 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
558 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
563 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
564 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
569 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
570 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
575 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
576 | ISPSBL_PCR_RSZ2_WBL_OVF
577 | ISPSBL_PCR_RSZ3_WBL_OVF
578 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
579 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
584 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
585 omap3isp_stat_sbl_overflow(&isp->isp_af);
587 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
588 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
592 * isp_isr - Interrupt Service Routine for Camera ISP module.
593 * @irq: Not used currently.
594 * @_isp: Pointer to the OMAP3 ISP device
596 * Handles the corresponding callback if plugged in.
598 static irqreturn_t isp_isr(int irq, void *_isp)
600 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
601 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
602 IRQ0STATUS_CCDC_VD0_IRQ |
603 IRQ0STATUS_CCDC_VD1_IRQ |
604 IRQ0STATUS_HS_VS_IRQ;
605 struct isp_device *isp = _isp;
608 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
609 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
613 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
614 omap3isp_csi2_isr(&isp->isp_csi2a);
616 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
617 omap3isp_ccp2_isr(&isp->isp_ccp2);
619 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
620 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
621 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
622 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
623 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
624 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
625 omap3isp_stat_isr_frame_sync(&isp->isp_af);
626 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
629 if (irqstatus & ccdc_events)
630 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
632 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
633 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
634 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
635 omap3isp_preview_isr(&isp->isp_prev);
638 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
639 omap3isp_resizer_isr(&isp->isp_res);
641 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
642 omap3isp_stat_isr(&isp->isp_aewb);
644 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
645 omap3isp_stat_isr(&isp->isp_af);
647 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
648 omap3isp_stat_isr(&isp->isp_hist);
652 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
653 isp_isr_dbg(isp, irqstatus);
659 /* -----------------------------------------------------------------------------
660 * Pipeline power management
662 * Entities must be powered up when part of a pipeline that contains at least
663 * one open video device node.
665 * To achieve this use the entity use_count field to track the number of users.
666 * For entities corresponding to video device nodes the use_count field stores
667 * the users count of the node. For entities corresponding to subdevs the
668 * use_count field stores the total number of users of all video device nodes
671 * The omap3isp_pipeline_pm_use() function must be called in the open() and
672 * close() handlers of video device nodes. It increments or decrements the use
673 * count of all subdev entities in the pipeline.
675 * To react to link management on powered pipelines, the link setup notification
676 * callback updates the use count of all entities in the source and sink sides
681 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
682 * @entity: The entity
684 * Return the total number of users of all video device nodes in the pipeline.
686 static int isp_pipeline_pm_use_count(struct media_entity *entity)
688 struct media_entity_graph graph;
691 media_entity_graph_walk_start(&graph, entity);
693 while ((entity = media_entity_graph_walk_next(&graph))) {
694 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
695 use += entity->use_count;
702 * isp_pipeline_pm_power_one - Apply power change to an entity
703 * @entity: The entity
704 * @change: Use count change
706 * Change the entity use count by @change. If the entity is a subdev update its
707 * power state by calling the core::s_power operation when the use count goes
708 * from 0 to != 0 or from != 0 to 0.
710 * Return 0 on success or a negative error code on failure.
712 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
714 struct v4l2_subdev *subdev;
717 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
718 ? media_entity_to_v4l2_subdev(entity) : NULL;
720 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
721 ret = v4l2_subdev_call(subdev, core, s_power, 1);
722 if (ret < 0 && ret != -ENOIOCTLCMD)
726 entity->use_count += change;
727 WARN_ON(entity->use_count < 0);
729 if (entity->use_count == 0 && change < 0 && subdev != NULL)
730 v4l2_subdev_call(subdev, core, s_power, 0);
736 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
737 * @entity: The entity
738 * @change: Use count change
740 * Walk the pipeline to update the use count and the power state of all non-node
743 * Return 0 on success or a negative error code on failure.
745 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
747 struct media_entity_graph graph;
748 struct media_entity *first = entity;
754 media_entity_graph_walk_start(&graph, entity);
756 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
757 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
758 ret = isp_pipeline_pm_power_one(entity, change);
763 media_entity_graph_walk_start(&graph, first);
765 while ((first = media_entity_graph_walk_next(&graph))
767 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
768 isp_pipeline_pm_power_one(first, -change);
774 * omap3isp_pipeline_pm_use - Update the use count of an entity
775 * @entity: The entity
776 * @use: Use (1) or stop using (0) the entity
778 * Update the use count of all entities in the pipeline and power entities on or
781 * Return 0 on success or a negative error code on failure. Powering entities
782 * off is assumed to never fail. No failure can occur when the use parameter is
785 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
787 int change = use ? 1 : -1;
790 mutex_lock(&entity->parent->graph_mutex);
792 /* Apply use count to node. */
793 entity->use_count += change;
794 WARN_ON(entity->use_count < 0);
796 /* Apply power change to connected non-nodes. */
797 ret = isp_pipeline_pm_power(entity, change);
799 entity->use_count -= change;
801 mutex_unlock(&entity->parent->graph_mutex);
807 * isp_pipeline_link_notify - Link management notification callback
809 * @flags: New link flags that will be applied
810 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
812 * React to link management on powered pipelines by updating the use count of
813 * all entities in the source and sink sides of the link. Entities are powered
814 * on or off accordingly.
816 * Return 0 on success or a negative error code on failure. Powering entities
817 * off is assumed to never fail. This function will not fail for disconnection
820 static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
821 unsigned int notification)
823 struct media_entity *source = link->source->entity;
824 struct media_entity *sink = link->sink->entity;
825 int source_use = isp_pipeline_pm_use_count(source);
826 int sink_use = isp_pipeline_pm_use_count(sink);
829 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
830 !(flags & MEDIA_LNK_FL_ENABLED)) {
831 /* Powering off entities is assumed to never fail. */
832 isp_pipeline_pm_power(source, -sink_use);
833 isp_pipeline_pm_power(sink, -source_use);
837 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH &&
838 (flags & MEDIA_LNK_FL_ENABLED)) {
840 ret = isp_pipeline_pm_power(source, sink_use);
844 ret = isp_pipeline_pm_power(sink, source_use);
846 isp_pipeline_pm_power(source, -sink_use);
854 /* -----------------------------------------------------------------------------
855 * Pipeline stream management
859 * isp_pipeline_enable - Enable streaming on a pipeline
860 * @pipe: ISP pipeline
861 * @mode: Stream mode (single shot or continuous)
863 * Walk the entities chain starting at the pipeline output video node and start
864 * all modules in the chain in the given mode.
866 * Return 0 if successful, or the return value of the failed video::s_stream
867 * operation otherwise.
869 static int isp_pipeline_enable(struct isp_pipeline *pipe,
870 enum isp_pipeline_stream_state mode)
872 struct isp_device *isp = pipe->output->isp;
873 struct media_entity *entity;
874 struct media_pad *pad;
875 struct v4l2_subdev *subdev;
879 /* Refuse to start streaming if an entity included in the pipeline has
880 * crashed. This check must be performed before the loop below to avoid
881 * starting entities if the pipeline won't start anyway (those entities
882 * would then likely fail to stop, making the problem worse).
884 if (pipe->entities & isp->crashed)
887 spin_lock_irqsave(&pipe->lock, flags);
888 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
889 spin_unlock_irqrestore(&pipe->lock, flags);
891 pipe->do_propagation = false;
893 entity = &pipe->output->video.entity;
895 pad = &entity->pads[0];
896 if (!(pad->flags & MEDIA_PAD_FL_SINK))
899 pad = media_entity_remote_pad(pad);
901 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
904 entity = pad->entity;
905 subdev = media_entity_to_v4l2_subdev(entity);
907 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
908 if (ret < 0 && ret != -ENOIOCTLCMD)
911 if (subdev == &isp->isp_ccdc.subdev) {
912 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
914 v4l2_subdev_call(&isp->isp_af.subdev, video,
916 v4l2_subdev_call(&isp->isp_hist.subdev, video,
918 pipe->do_propagation = true;
921 /* Stop at the first external sub-device. */
922 if (subdev->dev != isp->dev)
929 static int isp_pipeline_wait_resizer(struct isp_device *isp)
931 return omap3isp_resizer_busy(&isp->isp_res);
934 static int isp_pipeline_wait_preview(struct isp_device *isp)
936 return omap3isp_preview_busy(&isp->isp_prev);
939 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
941 return omap3isp_stat_busy(&isp->isp_af)
942 || omap3isp_stat_busy(&isp->isp_aewb)
943 || omap3isp_stat_busy(&isp->isp_hist)
944 || omap3isp_ccdc_busy(&isp->isp_ccdc);
947 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
949 static int isp_pipeline_wait(struct isp_device *isp,
950 int(*busy)(struct isp_device *isp))
952 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
954 while (!time_after(jiffies, timeout)) {
963 * isp_pipeline_disable - Disable streaming on a pipeline
964 * @pipe: ISP pipeline
966 * Walk the entities chain starting at the pipeline output video node and stop
967 * all modules in the chain. Wait synchronously for the modules to be stopped if
970 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
971 * can't be stopped (in which case a software reset of the ISP is probably
974 static int isp_pipeline_disable(struct isp_pipeline *pipe)
976 struct isp_device *isp = pipe->output->isp;
977 struct media_entity *entity;
978 struct media_pad *pad;
979 struct v4l2_subdev *subdev;
984 * We need to stop all the modules after CCDC first or they'll
985 * never stop since they may not get a full frame from CCDC.
987 entity = &pipe->output->video.entity;
989 pad = &entity->pads[0];
990 if (!(pad->flags & MEDIA_PAD_FL_SINK))
993 pad = media_entity_remote_pad(pad);
995 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
998 entity = pad->entity;
999 subdev = media_entity_to_v4l2_subdev(entity);
1001 if (subdev == &isp->isp_ccdc.subdev) {
1002 v4l2_subdev_call(&isp->isp_aewb.subdev,
1003 video, s_stream, 0);
1004 v4l2_subdev_call(&isp->isp_af.subdev,
1005 video, s_stream, 0);
1006 v4l2_subdev_call(&isp->isp_hist.subdev,
1007 video, s_stream, 0);
1010 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
1012 if (subdev == &isp->isp_res.subdev)
1013 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
1014 else if (subdev == &isp->isp_prev.subdev)
1015 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
1016 else if (subdev == &isp->isp_ccdc.subdev)
1017 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
1019 /* Handle stop failures. An entity that fails to stop can
1020 * usually just be restarted. Flag the stop failure nonetheless
1021 * to trigger an ISP reset the next time the device is released,
1024 * The preview engine is a special case. A failure to stop can
1025 * mean a hardware crash. When that happens the preview engine
1026 * won't respond to read/write operations on the L4 bus anymore,
1027 * resulting in a bus fault and a kernel oops next time it gets
1028 * accessed. Mark it as crashed to prevent pipelines including
1029 * it from being started.
1032 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
1033 isp->stop_failure = true;
1034 if (subdev == &isp->isp_prev.subdev)
1035 isp->crashed |= 1U << subdev->entity.id;
1036 failure = -ETIMEDOUT;
1039 /* Stop at the first external sub-device. */
1040 if (subdev->dev != isp->dev)
1048 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1049 * @pipe: ISP pipeline
1050 * @state: Stream state (stopped, single shot or continuous)
1052 * Set the pipeline to the given stream state. Pipelines can be started in
1053 * single-shot or continuous mode.
1055 * Return 0 if successful, or the return value of the failed video::s_stream
1056 * operation otherwise. The pipeline state is not updated when the operation
1057 * fails, except when stopping the pipeline.
1059 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1060 enum isp_pipeline_stream_state state)
1064 if (state == ISP_PIPELINE_STREAM_STOPPED)
1065 ret = isp_pipeline_disable(pipe);
1067 ret = isp_pipeline_enable(pipe, state);
1069 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1070 pipe->stream_state = state;
1076 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
1077 * @pipe: ISP pipeline
1079 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
1080 * erroneous and makes sure no new buffer can be queued. This function is called
1081 * when a fatal error that prevents any further operation on the pipeline
1084 void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
1087 omap3isp_video_cancel_stream(pipe->input);
1089 omap3isp_video_cancel_stream(pipe->output);
1093 * isp_pipeline_resume - Resume streaming on a pipeline
1094 * @pipe: ISP pipeline
1096 * Resume video output and input and re-enable pipeline.
1098 static void isp_pipeline_resume(struct isp_pipeline *pipe)
1100 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1102 omap3isp_video_resume(pipe->output, !singleshot);
1104 omap3isp_video_resume(pipe->input, 0);
1105 isp_pipeline_enable(pipe, pipe->stream_state);
1109 * isp_pipeline_suspend - Suspend streaming on a pipeline
1110 * @pipe: ISP pipeline
1114 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1116 isp_pipeline_disable(pipe);
1120 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1122 * @me: ISP module's media entity
1124 * Returns 1 if the entity has an enabled link to the output video node or 0
1125 * otherwise. It's true only while pipeline can have no more than one output
1128 static int isp_pipeline_is_last(struct media_entity *me)
1130 struct isp_pipeline *pipe;
1131 struct media_pad *pad;
1135 pipe = to_isp_pipeline(me);
1136 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1138 pad = media_entity_remote_pad(&pipe->output->pad);
1139 return pad->entity == me;
1143 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1144 * @me: ISP module's media entity
1146 * Suspend the whole pipeline if module's entity has an enabled link to the
1147 * output video node. It works only while pipeline can have no more than one
1150 static void isp_suspend_module_pipeline(struct media_entity *me)
1152 if (isp_pipeline_is_last(me))
1153 isp_pipeline_suspend(to_isp_pipeline(me));
1157 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1158 * @me: ISP module's media entity
1160 * Resume the whole pipeline if module's entity has an enabled link to the
1161 * output video node. It works only while pipeline can have no more than one
1164 static void isp_resume_module_pipeline(struct media_entity *me)
1166 if (isp_pipeline_is_last(me))
1167 isp_pipeline_resume(to_isp_pipeline(me));
1171 * isp_suspend_modules - Suspend ISP submodules.
1172 * @isp: OMAP3 ISP device
1174 * Returns 0 if suspend left in idle state all the submodules properly,
1175 * or returns 1 if a general Reset is required to suspend the submodules.
1177 static int isp_suspend_modules(struct isp_device *isp)
1179 unsigned long timeout;
1181 omap3isp_stat_suspend(&isp->isp_aewb);
1182 omap3isp_stat_suspend(&isp->isp_af);
1183 omap3isp_stat_suspend(&isp->isp_hist);
1184 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1185 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1186 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1187 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1188 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1190 timeout = jiffies + ISP_STOP_TIMEOUT;
1191 while (omap3isp_stat_busy(&isp->isp_af)
1192 || omap3isp_stat_busy(&isp->isp_aewb)
1193 || omap3isp_stat_busy(&isp->isp_hist)
1194 || omap3isp_preview_busy(&isp->isp_prev)
1195 || omap3isp_resizer_busy(&isp->isp_res)
1196 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1197 if (time_after(jiffies, timeout)) {
1198 dev_info(isp->dev, "can't stop modules.\n");
1208 * isp_resume_modules - Resume ISP submodules.
1209 * @isp: OMAP3 ISP device
1211 static void isp_resume_modules(struct isp_device *isp)
1213 omap3isp_stat_resume(&isp->isp_aewb);
1214 omap3isp_stat_resume(&isp->isp_af);
1215 omap3isp_stat_resume(&isp->isp_hist);
1216 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1217 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1218 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1219 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1220 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1224 * isp_reset - Reset ISP with a timeout wait for idle.
1225 * @isp: OMAP3 ISP device
1227 static int isp_reset(struct isp_device *isp)
1229 unsigned long timeout = 0;
1232 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1233 | ISP_SYSCONFIG_SOFTRESET,
1234 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1235 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1236 ISP_SYSSTATUS) & 0x1)) {
1237 if (timeout++ > 10000) {
1238 dev_alert(isp->dev, "cannot reset ISP\n");
1244 isp->stop_failure = false;
1250 * isp_save_context - Saves the values of the ISP module registers.
1251 * @isp: OMAP3 ISP device
1252 * @reg_list: Structure containing pairs of register address and value to
1256 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1258 struct isp_reg *next = reg_list;
1260 for (; next->reg != ISP_TOK_TERM; next++)
1261 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1265 * isp_restore_context - Restores the values of the ISP module registers.
1266 * @isp: OMAP3 ISP device
1267 * @reg_list: Structure containing pairs of register address and value to
1271 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1273 struct isp_reg *next = reg_list;
1275 for (; next->reg != ISP_TOK_TERM; next++)
1276 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1280 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1281 * @isp: OMAP3 ISP device
1283 * Routine for saving the context of each module in the ISP.
1284 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1286 static void isp_save_ctx(struct isp_device *isp)
1288 isp_save_context(isp, isp_reg_list);
1289 omap_iommu_save_ctx(isp->dev);
1293 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1294 * @isp: OMAP3 ISP device
1296 * Routine for restoring the context of each module in the ISP.
1297 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1299 static void isp_restore_ctx(struct isp_device *isp)
1301 isp_restore_context(isp, isp_reg_list);
1302 omap_iommu_restore_ctx(isp->dev);
1303 omap3isp_ccdc_restore_context(isp);
1304 omap3isp_preview_restore_context(isp);
1307 /* -----------------------------------------------------------------------------
1308 * SBL resources management
1310 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1311 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1312 OMAP3_ISP_SBL_PREVIEW_READ | \
1313 OMAP3_ISP_SBL_RESIZER_READ)
1314 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1315 OMAP3_ISP_SBL_CSI2A_WRITE | \
1316 OMAP3_ISP_SBL_CSI2C_WRITE | \
1317 OMAP3_ISP_SBL_CCDC_WRITE | \
1318 OMAP3_ISP_SBL_PREVIEW_WRITE)
1320 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1324 isp->sbl_resources |= res;
1326 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1327 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1329 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1330 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1332 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1333 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1335 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1336 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1338 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1339 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1341 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1342 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1344 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1347 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1351 isp->sbl_resources &= ~res;
1353 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1354 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1356 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1357 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1359 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1360 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1362 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1363 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1365 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1366 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1368 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1369 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1371 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1375 * isp_module_sync_idle - Helper to sync module with its idle state
1376 * @me: ISP submodule's media entity
1377 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1378 * @stopping: flag which tells module wants to stop
1380 * This function checks if ISP submodule needs to wait for next interrupt. If
1381 * yes, makes the caller to sleep while waiting for such event.
1383 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1386 struct isp_pipeline *pipe = to_isp_pipeline(me);
1388 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1389 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1390 !isp_pipeline_ready(pipe)))
1394 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1395 * scenario. We'll call it here to avoid race conditions.
1397 atomic_set(stopping, 1);
1401 * If module is the last one, it's writing to memory. In this case,
1402 * it's necessary to check if the module is already paused due to
1403 * DMA queue underrun or if it has to wait for next interrupt to be
1405 * If it isn't the last one, the function won't sleep but *stopping
1406 * will still be set to warn next submodule caller's interrupt the
1407 * module wants to be idle.
1409 if (isp_pipeline_is_last(me)) {
1410 struct isp_video *video = pipe->output;
1411 unsigned long flags;
1412 spin_lock_irqsave(&video->irqlock, flags);
1413 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1414 spin_unlock_irqrestore(&video->irqlock, flags);
1415 atomic_set(stopping, 0);
1419 spin_unlock_irqrestore(&video->irqlock, flags);
1420 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1421 msecs_to_jiffies(1000))) {
1422 atomic_set(stopping, 0);
1432 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
1433 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1434 * @stopping: flag which tells module wants to stop
1436 * This function checks if ISP submodule was stopping. In case of yes, it
1437 * notices the caller by setting stopping to 0 and waking up the wait queue.
1438 * Returns 1 if it was stopping or 0 otherwise.
1440 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1443 if (atomic_cmpxchg(stopping, 1, 0)) {
1451 /* --------------------------------------------------------------------------
1455 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1456 ISPCTRL_HIST_CLK_EN | \
1457 ISPCTRL_RSZ_CLK_EN | \
1458 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1459 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1461 static void __isp_subclk_update(struct isp_device *isp)
1465 /* AEWB and AF share the same clock. */
1466 if (isp->subclk_resources &
1467 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1468 clk |= ISPCTRL_H3A_CLK_EN;
1470 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1471 clk |= ISPCTRL_HIST_CLK_EN;
1473 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1474 clk |= ISPCTRL_RSZ_CLK_EN;
1476 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1479 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1480 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1482 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1483 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1485 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1486 ISPCTRL_CLKS_MASK, clk);
1489 void omap3isp_subclk_enable(struct isp_device *isp,
1490 enum isp_subclk_resource res)
1492 isp->subclk_resources |= res;
1494 __isp_subclk_update(isp);
1497 void omap3isp_subclk_disable(struct isp_device *isp,
1498 enum isp_subclk_resource res)
1500 isp->subclk_resources &= ~res;
1502 __isp_subclk_update(isp);
1506 * isp_enable_clocks - Enable ISP clocks
1507 * @isp: OMAP3 ISP device
1509 * Return 0 if successful, or clk_prepare_enable return value if any of them
1512 static int isp_enable_clocks(struct isp_device *isp)
1517 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1519 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1520 goto out_clk_enable_ick;
1522 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
1524 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
1525 goto out_clk_enable_mclk;
1527 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1529 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
1530 goto out_clk_enable_mclk;
1532 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1533 if (rate != CM_CAM_MCLK_HZ)
1534 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1536 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1537 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1539 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
1540 goto out_clk_enable_csi2_fclk;
1544 out_clk_enable_csi2_fclk:
1545 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1546 out_clk_enable_mclk:
1547 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1553 * isp_disable_clocks - Disable ISP clocks
1554 * @isp: OMAP3 ISP device
1556 static void isp_disable_clocks(struct isp_device *isp)
1558 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1559 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1560 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
1563 static const char *isp_clocks[] = {
1570 static int isp_get_clocks(struct isp_device *isp)
1575 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1576 clk = devm_clk_get(isp->dev, isp_clocks[i]);
1578 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1579 return PTR_ERR(clk);
1582 isp->clock[i] = clk;
1589 * omap3isp_get - Acquire the ISP resource.
1591 * Initializes the clocks for the first acquire.
1593 * Increment the reference count on the ISP. If the first reference is taken,
1594 * enable clocks and power-up all submodules.
1596 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1598 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1600 struct isp_device *__isp = isp;
1605 mutex_lock(&isp->isp_mutex);
1606 if (isp->ref_count > 0)
1609 if (isp_enable_clocks(isp) < 0) {
1614 /* We don't want to restore context before saving it! */
1615 if (isp->has_context)
1616 isp_restore_ctx(isp);
1619 isp_enable_interrupts(isp);
1624 mutex_unlock(&isp->isp_mutex);
1629 struct isp_device *omap3isp_get(struct isp_device *isp)
1631 return __omap3isp_get(isp, true);
1635 * omap3isp_put - Release the ISP
1637 * Decrement the reference count on the ISP. If the last reference is released,
1638 * power-down all submodules, disable clocks and free temporary buffers.
1640 static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
1645 mutex_lock(&isp->isp_mutex);
1646 BUG_ON(isp->ref_count == 0);
1647 if (--isp->ref_count == 0) {
1648 isp_disable_interrupts(isp);
1651 isp->has_context = 1;
1653 /* Reset the ISP if an entity has failed to stop. This is the
1654 * only way to recover from such conditions.
1656 if (isp->crashed || isp->stop_failure)
1658 isp_disable_clocks(isp);
1660 mutex_unlock(&isp->isp_mutex);
1663 void omap3isp_put(struct isp_device *isp)
1665 __omap3isp_put(isp, true);
1668 /* --------------------------------------------------------------------------
1669 * Platform device driver
1673 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1674 * @isp: OMAP3 ISP device
1676 #define ISP_PRINT_REGISTER(isp, name)\
1677 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1678 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1679 #define SBL_PRINT_REGISTER(isp, name)\
1680 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1681 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1683 void omap3isp_print_status(struct isp_device *isp)
1685 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1687 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1688 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1689 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1690 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1691 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1692 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1693 ISP_PRINT_REGISTER(isp, CTRL);
1694 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1695 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1696 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1697 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1698 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1699 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1700 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1701 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1703 SBL_PRINT_REGISTER(isp, PCR);
1704 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1706 dev_dbg(isp->dev, "--------------------------------------------\n");
1712 * Power management support.
1714 * As the ISP can't properly handle an input video stream interruption on a non
1715 * frame boundary, the ISP pipelines need to be stopped before sensors get
1716 * suspended. However, as suspending the sensors can require a running clock,
1717 * which can be provided by the ISP, the ISP can't be completely suspended
1718 * before the sensor.
1720 * To solve this problem power management support is split into prepare/complete
1721 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1722 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1723 * resume(), and the the pipelines are restarted in complete().
1725 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
1728 static int isp_pm_prepare(struct device *dev)
1730 struct isp_device *isp = dev_get_drvdata(dev);
1733 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1735 if (isp->ref_count == 0)
1738 reset = isp_suspend_modules(isp);
1739 isp_disable_interrupts(isp);
1747 static int isp_pm_suspend(struct device *dev)
1749 struct isp_device *isp = dev_get_drvdata(dev);
1751 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1754 isp_disable_clocks(isp);
1759 static int isp_pm_resume(struct device *dev)
1761 struct isp_device *isp = dev_get_drvdata(dev);
1763 if (isp->ref_count == 0)
1766 return isp_enable_clocks(isp);
1769 static void isp_pm_complete(struct device *dev)
1771 struct isp_device *isp = dev_get_drvdata(dev);
1773 if (isp->ref_count == 0)
1776 isp_restore_ctx(isp);
1777 isp_enable_interrupts(isp);
1778 isp_resume_modules(isp);
1783 #define isp_pm_prepare NULL
1784 #define isp_pm_suspend NULL
1785 #define isp_pm_resume NULL
1786 #define isp_pm_complete NULL
1788 #endif /* CONFIG_PM */
1790 static void isp_unregister_entities(struct isp_device *isp)
1792 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1793 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1794 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1795 omap3isp_preview_unregister_entities(&isp->isp_prev);
1796 omap3isp_resizer_unregister_entities(&isp->isp_res);
1797 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1798 omap3isp_stat_unregister_entities(&isp->isp_af);
1799 omap3isp_stat_unregister_entities(&isp->isp_hist);
1801 v4l2_device_unregister(&isp->v4l2_dev);
1802 media_device_unregister(&isp->media_dev);
1805 static int isp_link_entity(
1806 struct isp_device *isp, struct media_entity *entity,
1807 enum isp_interface_type interface)
1809 struct media_entity *input;
1814 /* Connect the sensor to the correct interface module.
1815 * Parallel sensors are connected directly to the CCDC, while
1816 * serial sensors are connected to the CSI2a, CCP2b or CSI2c
1817 * receiver through CSIPHY1 or CSIPHY2.
1819 switch (interface) {
1820 case ISP_INTERFACE_PARALLEL:
1821 input = &isp->isp_ccdc.subdev.entity;
1822 pad = CCDC_PAD_SINK;
1826 case ISP_INTERFACE_CSI2A_PHY2:
1827 input = &isp->isp_csi2a.subdev.entity;
1828 pad = CSI2_PAD_SINK;
1829 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1832 case ISP_INTERFACE_CCP2B_PHY1:
1833 case ISP_INTERFACE_CCP2B_PHY2:
1834 input = &isp->isp_ccp2.subdev.entity;
1835 pad = CCP2_PAD_SINK;
1839 case ISP_INTERFACE_CSI2C_PHY1:
1840 input = &isp->isp_csi2c.subdev.entity;
1841 pad = CSI2_PAD_SINK;
1842 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1846 dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
1852 * Not all interfaces are available on all revisions of the
1853 * ISP. The sub-devices of those interfaces aren't initialised
1854 * in such a case. Check this by ensuring the num_pads is
1857 if (!input->num_pads) {
1858 dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
1863 for (i = 0; i < entity->num_pads; i++) {
1864 if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
1867 if (i == entity->num_pads) {
1868 dev_err(isp->dev, "%s: no source pad in external entity\n",
1873 return media_entity_create_link(entity, i, input, pad, flags);
1876 static int isp_register_entities(struct isp_device *isp)
1880 isp->media_dev.dev = isp->dev;
1881 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1882 sizeof(isp->media_dev.model));
1883 isp->media_dev.hw_revision = isp->revision;
1884 isp->media_dev.link_notify = isp_pipeline_link_notify;
1885 ret = media_device_register(&isp->media_dev);
1887 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
1892 isp->v4l2_dev.mdev = &isp->media_dev;
1893 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1895 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1900 /* Register internal entities */
1901 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1905 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1909 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1913 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1918 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1922 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1926 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1930 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1936 isp_unregister_entities(isp);
1941 static void isp_cleanup_modules(struct isp_device *isp)
1943 omap3isp_h3a_aewb_cleanup(isp);
1944 omap3isp_h3a_af_cleanup(isp);
1945 omap3isp_hist_cleanup(isp);
1946 omap3isp_resizer_cleanup(isp);
1947 omap3isp_preview_cleanup(isp);
1948 omap3isp_ccdc_cleanup(isp);
1949 omap3isp_ccp2_cleanup(isp);
1950 omap3isp_csi2_cleanup(isp);
1953 static int isp_initialize_modules(struct isp_device *isp)
1957 ret = omap3isp_csiphy_init(isp);
1959 dev_err(isp->dev, "CSI PHY initialization failed\n");
1963 ret = omap3isp_csi2_init(isp);
1965 dev_err(isp->dev, "CSI2 initialization failed\n");
1969 ret = omap3isp_ccp2_init(isp);
1971 dev_err(isp->dev, "CCP2 initialization failed\n");
1975 ret = omap3isp_ccdc_init(isp);
1977 dev_err(isp->dev, "CCDC initialization failed\n");
1981 ret = omap3isp_preview_init(isp);
1983 dev_err(isp->dev, "Preview initialization failed\n");
1987 ret = omap3isp_resizer_init(isp);
1989 dev_err(isp->dev, "Resizer initialization failed\n");
1993 ret = omap3isp_hist_init(isp);
1995 dev_err(isp->dev, "Histogram initialization failed\n");
1999 ret = omap3isp_h3a_aewb_init(isp);
2001 dev_err(isp->dev, "H3A AEWB initialization failed\n");
2002 goto error_h3a_aewb;
2005 ret = omap3isp_h3a_af_init(isp);
2007 dev_err(isp->dev, "H3A AF initialization failed\n");
2011 /* Connect the submodules. */
2012 ret = media_entity_create_link(
2013 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
2014 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2018 ret = media_entity_create_link(
2019 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
2020 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2024 ret = media_entity_create_link(
2025 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2026 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
2030 ret = media_entity_create_link(
2031 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
2032 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2036 ret = media_entity_create_link(
2037 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2038 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2042 ret = media_entity_create_link(
2043 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2044 &isp->isp_aewb.subdev.entity, 0,
2045 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2049 ret = media_entity_create_link(
2050 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2051 &isp->isp_af.subdev.entity, 0,
2052 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2056 ret = media_entity_create_link(
2057 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2058 &isp->isp_hist.subdev.entity, 0,
2059 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2066 omap3isp_h3a_af_cleanup(isp);
2068 omap3isp_h3a_aewb_cleanup(isp);
2070 omap3isp_hist_cleanup(isp);
2072 omap3isp_resizer_cleanup(isp);
2074 omap3isp_preview_cleanup(isp);
2076 omap3isp_ccdc_cleanup(isp);
2078 omap3isp_ccp2_cleanup(isp);
2080 omap3isp_csi2_cleanup(isp);
2086 static void isp_detach_iommu(struct isp_device *isp)
2088 arm_iommu_detach_device(isp->dev);
2089 arm_iommu_release_mapping(isp->mapping);
2090 isp->mapping = NULL;
2091 iommu_group_remove_device(isp->dev);
2094 static int isp_attach_iommu(struct isp_device *isp)
2096 struct dma_iommu_mapping *mapping;
2097 struct iommu_group *group;
2100 /* Create a device group and add the device to it. */
2101 group = iommu_group_alloc();
2102 if (IS_ERR(group)) {
2103 dev_err(isp->dev, "failed to allocate IOMMU group\n");
2104 return PTR_ERR(group);
2107 ret = iommu_group_add_device(group, isp->dev);
2108 iommu_group_put(group);
2111 dev_err(isp->dev, "failed to add device to IPMMU group\n");
2116 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
2117 * VAs. This will allocate a corresponding IOMMU domain.
2119 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
2120 if (IS_ERR(mapping)) {
2121 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
2122 return PTR_ERR(mapping);
2125 isp->mapping = mapping;
2127 /* Attach the ARM VA mapping to the device. */
2128 ret = arm_iommu_attach_device(isp->dev, mapping);
2130 dev_err(isp->dev, "failed to attach device to VA mapping\n");
2137 arm_iommu_release_mapping(isp->mapping);
2138 isp->mapping = NULL;
2143 * isp_remove - Remove ISP platform device
2144 * @pdev: Pointer to ISP platform device
2148 static int isp_remove(struct platform_device *pdev)
2150 struct isp_device *isp = platform_get_drvdata(pdev);
2152 v4l2_async_notifier_unregister(&isp->notifier);
2153 isp_unregister_entities(isp);
2154 isp_cleanup_modules(isp);
2155 isp_xclk_cleanup(isp);
2157 __omap3isp_get(isp, false);
2158 isp_detach_iommu(isp);
2159 __omap3isp_put(isp, false);
2165 ISP_OF_PHY_PARALLEL = 0,
2170 static int isp_of_parse_node(struct device *dev, struct device_node *node,
2171 struct isp_async_subdev *isd)
2173 struct isp_bus_cfg *buscfg = &isd->bus;
2174 struct v4l2_of_endpoint vep;
2177 v4l2_of_parse_endpoint(node, &vep);
2179 dev_dbg(dev, "parsing endpoint %s, interface %u\n", node->full_name,
2182 switch (vep.base.port) {
2183 case ISP_OF_PHY_PARALLEL:
2184 buscfg->interface = ISP_INTERFACE_PARALLEL;
2185 buscfg->bus.parallel.data_lane_shift =
2186 vep.bus.parallel.data_shift;
2187 buscfg->bus.parallel.clk_pol =
2188 !!(vep.bus.parallel.flags
2189 & V4L2_MBUS_PCLK_SAMPLE_FALLING);
2190 buscfg->bus.parallel.hs_pol =
2191 !!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
2192 buscfg->bus.parallel.vs_pol =
2193 !!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
2194 buscfg->bus.parallel.fld_pol =
2195 !!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
2196 buscfg->bus.parallel.data_pol =
2197 !!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
2200 case ISP_OF_PHY_CSIPHY1:
2201 case ISP_OF_PHY_CSIPHY2:
2202 /* FIXME: always assume CSI-2 for now. */
2203 switch (vep.base.port) {
2204 case ISP_OF_PHY_CSIPHY1:
2205 buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
2207 case ISP_OF_PHY_CSIPHY2:
2208 buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
2211 buscfg->bus.csi2.lanecfg.clk.pos = vep.bus.mipi_csi2.clock_lane;
2212 buscfg->bus.csi2.lanecfg.clk.pol =
2213 vep.bus.mipi_csi2.lane_polarities[0];
2214 dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2215 buscfg->bus.csi2.lanecfg.clk.pol,
2216 buscfg->bus.csi2.lanecfg.clk.pos);
2218 for (i = 0; i < ISP_CSIPHY2_NUM_DATA_LANES; i++) {
2219 buscfg->bus.csi2.lanecfg.data[i].pos =
2220 vep.bus.mipi_csi2.data_lanes[i];
2221 buscfg->bus.csi2.lanecfg.data[i].pol =
2222 vep.bus.mipi_csi2.lane_polarities[i + 1];
2223 dev_dbg(dev, "data lane %u polarity %u, pos %u\n", i,
2224 buscfg->bus.csi2.lanecfg.data[i].pol,
2225 buscfg->bus.csi2.lanecfg.data[i].pos);
2229 * FIXME: now we assume the CRC is always there.
2230 * Implement a way to obtain this information from the
2231 * sensor. Frame descriptors, perhaps?
2233 buscfg->bus.csi2.crc = 1;
2237 dev_warn(dev, "%s: invalid interface %u\n", node->full_name,
2245 static int isp_of_parse_nodes(struct device *dev,
2246 struct v4l2_async_notifier *notifier)
2248 struct device_node *node = NULL;
2250 notifier->subdevs = devm_kcalloc(
2251 dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL);
2252 if (!notifier->subdevs)
2255 while (notifier->num_subdevs < ISP_MAX_SUBDEVS &&
2256 (node = of_graph_get_next_endpoint(dev->of_node, node))) {
2257 struct isp_async_subdev *isd;
2259 isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL);
2265 notifier->subdevs[notifier->num_subdevs] = &isd->asd;
2267 if (isp_of_parse_node(dev, node, isd)) {
2272 isd->asd.match.of.node = of_graph_get_remote_port_parent(node);
2274 if (!isd->asd.match.of.node) {
2275 dev_warn(dev, "bad remote port parent\n");
2279 isd->asd.match_type = V4L2_ASYNC_MATCH_OF;
2280 notifier->num_subdevs++;
2283 return notifier->num_subdevs;
2286 static int isp_subdev_notifier_bound(struct v4l2_async_notifier *async,
2287 struct v4l2_subdev *subdev,
2288 struct v4l2_async_subdev *asd)
2290 struct isp_device *isp = container_of(async, struct isp_device,
2292 struct isp_async_subdev *isd =
2293 container_of(asd, struct isp_async_subdev, asd);
2296 ret = isp_link_entity(isp, &subdev->entity, isd->bus.interface);
2301 isd->sd->host_priv = &isd->bus;
2306 static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
2308 struct isp_device *isp = container_of(async, struct isp_device,
2311 return v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
2315 * isp_probe - Probe ISP platform device
2316 * @pdev: Pointer to ISP platform device
2318 * Returns 0 if successful,
2319 * -ENOMEM if no memory available,
2320 * -ENODEV if no platform device resources found
2321 * or no space for remapping registers,
2322 * -EINVAL if couldn't install ISR,
2323 * or clk_get return error value.
2325 static int isp_probe(struct platform_device *pdev)
2327 struct isp_device *isp;
2328 struct resource *mem;
2332 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
2334 dev_err(&pdev->dev, "could not allocate memory\n");
2338 ret = of_property_read_u32(pdev->dev.of_node, "ti,phy-type",
2343 isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
2345 if (IS_ERR(isp->syscon))
2346 return PTR_ERR(isp->syscon);
2348 ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
2349 &isp->syscon_offset);
2353 ret = isp_of_parse_nodes(&pdev->dev, &isp->notifier);
2357 isp->autoidle = autoidle;
2359 mutex_init(&isp->isp_mutex);
2360 spin_lock_init(&isp->stat_lock);
2362 isp->dev = &pdev->dev;
2365 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2369 platform_set_drvdata(pdev, isp);
2372 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
2373 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
2377 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2378 * manually to read the revision before calling __omap3isp_get().
2380 * Start by mapping the ISP MMIO area, which is in two pieces.
2381 * The ISP IOMMU is in between. Map both now, and fill in the
2382 * ISP revision specific portions a little later in the
2385 for (i = 0; i < 2; i++) {
2386 unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
2388 mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
2389 isp->mmio_base[map_idx] =
2390 devm_ioremap_resource(isp->dev, mem);
2391 if (IS_ERR(isp->mmio_base[map_idx])) {
2392 ret = PTR_ERR(isp->mmio_base[map_idx]);
2397 ret = isp_get_clocks(isp);
2401 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2405 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2406 dev_info(isp->dev, "Revision %d.%d found\n",
2407 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2409 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2411 if (__omap3isp_get(isp, false) == NULL) {
2416 ret = isp_reset(isp);
2420 ret = isp_xclk_init(isp);
2424 /* Memory resources */
2425 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2426 if (isp->revision == isp_res_maps[m].isp_rev)
2429 if (m == ARRAY_SIZE(isp_res_maps)) {
2430 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2431 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2436 for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
2438 isp->mmio_base[0] + isp_res_maps[m].offset[i];
2440 for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
2442 isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
2443 + isp_res_maps[m].offset[i];
2445 isp->mmio_hist_base_phys =
2446 mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
2449 ret = isp_attach_iommu(isp);
2451 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
2456 isp->irq_num = platform_get_irq(pdev, 0);
2457 if (isp->irq_num <= 0) {
2458 dev_err(isp->dev, "No IRQ resource\n");
2463 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2464 "OMAP3 ISP", isp)) {
2465 dev_err(isp->dev, "Unable to request IRQ\n");
2471 ret = isp_initialize_modules(isp);
2475 ret = isp_register_entities(isp);
2479 isp->notifier.bound = isp_subdev_notifier_bound;
2480 isp->notifier.complete = isp_subdev_notifier_complete;
2482 ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
2484 goto error_register_entities;
2486 isp_core_init(isp, 1);
2491 error_register_entities:
2492 isp_unregister_entities(isp);
2494 isp_cleanup_modules(isp);
2496 isp_detach_iommu(isp);
2498 isp_xclk_cleanup(isp);
2499 __omap3isp_put(isp, false);
2501 mutex_destroy(&isp->isp_mutex);
2506 static const struct dev_pm_ops omap3isp_pm_ops = {
2507 .prepare = isp_pm_prepare,
2508 .suspend = isp_pm_suspend,
2509 .resume = isp_pm_resume,
2510 .complete = isp_pm_complete,
2513 static struct platform_device_id omap3isp_id_table[] = {
2517 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2519 static const struct of_device_id omap3isp_of_table[] = {
2520 { .compatible = "ti,omap3-isp" },
2524 static struct platform_driver omap3isp_driver = {
2526 .remove = isp_remove,
2527 .id_table = omap3isp_id_table,
2530 .pm = &omap3isp_pm_ops,
2531 .of_match_table = omap3isp_of_table,
2535 module_platform_driver(omap3isp_driver);
2537 MODULE_AUTHOR("Nokia Corporation");
2538 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2539 MODULE_LICENSE("GPL");
2540 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);