drivers/misc/mei/pci-me.c

   1 /*
   2  *
   3  * Intel Management Engine Interface (Intel MEI) Linux driver
   4  * Copyright (c) 2003-2012, Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  */
  16 #include <linux/module.h>
  17 #include <linux/moduleparam.h>
  18 #include <linux/kernel.h>
  19 #include <linux/device.h>
  20 #include <linux/fs.h>
  21 #include <linux/errno.h>
  22 #include <linux/types.h>
  23 #include <linux/fcntl.h>
  24 #include <linux/pci.h>
  25 #include <linux/poll.h>
  26 #include <linux/ioctl.h>
  27 #include <linux/cdev.h>
  28 #include <linux/sched.h>
  29 #include <linux/uuid.h>
  30 #include <linux/compat.h>
  31 #include <linux/jiffies.h>
  32 #include <linux/interrupt.h>
  33
  34 #include <linux/pm_domain.h>
  35 #include <linux/pm_runtime.h>
  36
  37 #include <linux/mei.h>
  38
  39 #include "mei_dev.h"
  40 #include "client.h"
  41 #include "hw-me-regs.h"
  42 #include "hw-me.h"
  43
  44 /* mei_pci_tbl - PCI Device ID Table */
  45 static const struct pci_device_id mei_me_pci_tbl[] = {
  46         {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, MEI_ME_ICH_CFG)},
  47         {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, MEI_ME_ICH_CFG)},
  48         {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, MEI_ME_ICH_CFG)},
  49         {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, MEI_ME_ICH_CFG)},
  50         {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, MEI_ME_ICH_CFG)},
  51         {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, MEI_ME_ICH_CFG)},
  52         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, MEI_ME_ICH_CFG)},
  53         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, MEI_ME_ICH_CFG)},
  54         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, MEI_ME_ICH_CFG)},
  55         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, MEI_ME_ICH_CFG)},
  56         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, MEI_ME_ICH_CFG)},
  57
  58         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, MEI_ME_ICH_CFG)},
  59         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, MEI_ME_ICH_CFG)},
  60         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, MEI_ME_ICH_CFG)},
  61         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, MEI_ME_ICH_CFG)},
  62         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, MEI_ME_ICH_CFG)},
  63         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, MEI_ME_ICH_CFG)},
  64         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, MEI_ME_ICH_CFG)},
  65         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, MEI_ME_ICH_CFG)},
  66         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, MEI_ME_ICH_CFG)},
  67
  68         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, MEI_ME_ICH10_CFG)},
  69         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, MEI_ME_ICH10_CFG)},
  70         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, MEI_ME_ICH10_CFG)},
  71         {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, MEI_ME_ICH10_CFG)},
  72
  73         {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, MEI_ME_PCH6_CFG)},
  74         {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, MEI_ME_PCH6_CFG)},
  75         {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, MEI_ME_PCH_CPT_PBG_CFG)},
  76         {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, MEI_ME_PCH_CPT_PBG_CFG)},
  77         {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, MEI_ME_PCH7_CFG)},
  78         {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, MEI_ME_PCH7_CFG)},
  79         {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, MEI_ME_PCH7_CFG)},
  80         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, MEI_ME_PCH8_SPS_CFG)},
  81         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, MEI_ME_PCH8_SPS_CFG)},
  82         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, MEI_ME_PCH8_CFG)},
  83         {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, MEI_ME_PCH8_SPS_CFG)},
  84         {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, MEI_ME_PCH8_CFG)},
  85         {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, MEI_ME_PCH8_CFG)},
  86
  87         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, MEI_ME_PCH8_CFG)},
  88         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, MEI_ME_PCH8_CFG)},
  89         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, MEI_ME_PCH8_SPS_CFG)},
  90         {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, MEI_ME_PCH8_SPS_CFG)},
  91         {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_CFG)},
  92
  93         {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, MEI_ME_PCH8_CFG)},
  94         {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, MEI_ME_PCH8_CFG)},
  95
  96         {MEI_PCI_DEVICE(MEI_DEV_ID_DNV_IE, MEI_ME_PCH8_CFG)},
  97
  98         {MEI_PCI_DEVICE(MEI_DEV_ID_GLK, MEI_ME_PCH8_CFG)},
  99
 100         {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, MEI_ME_PCH8_CFG)},
 101         {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, MEI_ME_PCH8_CFG)},
 102
 103         {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP, MEI_ME_PCH8_CFG)},
 104         {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP_4, MEI_ME_PCH8_CFG)},
 105         {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H, MEI_ME_PCH8_CFG)},
 106         {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H_4, MEI_ME_PCH8_CFG)},
 107
 108         {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP, MEI_ME_PCH12_CFG)},
 109         {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP_3, MEI_ME_PCH8_CFG)},
 110         {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_V, MEI_ME_PCH12_CFG)},
 111         {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_H, MEI_ME_PCH12_CFG)},
 112         {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_H_3, MEI_ME_PCH8_CFG)},
 113
 114         {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)},
 115         {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_N, MEI_ME_PCH12_CFG)},
 116
 117         {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_LP, MEI_ME_PCH12_CFG)},
 118
 119         {MEI_PCI_DEVICE(MEI_DEV_ID_MCC, MEI_ME_PCH12_CFG)},
 120         {MEI_PCI_DEVICE(MEI_DEV_ID_MCC_4, MEI_ME_PCH8_CFG)},
 121
 122         {MEI_PCI_DEVICE(MEI_DEV_ID_CDF, MEI_ME_PCH8_CFG)},
 123
 124         /* required last entry */
 125         {0, }
 126 };
 127
 128 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
 129
 130 #ifdef CONFIG_PM
 131 static inline void mei_me_set_pm_domain(struct mei_device *dev);
 132 static inline void mei_me_unset_pm_domain(struct mei_device *dev);
 133 #else
 134 static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
 135 static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
 136 #endif /* CONFIG_PM */
 137
 138 /**
 139  * mei_me_quirk_probe - probe for devices that doesn't valid ME interface
 140  *
 141  * @pdev: PCI device structure
 142  * @cfg: per generation config
 143  *
 144  * Return: true if ME Interface is valid, false otherwise
 145  */
 146 static bool mei_me_quirk_probe(struct pci_dev *pdev,
 147                                 const struct mei_cfg *cfg)
 148 {
 149         if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
 150                 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
 151                 return false;
 152         }
 153
 154         return true;
 155 }
 156
 157 /**
 158  * mei_me_probe - Device Initialization Routine
 159  *
 160  * @pdev: PCI device structure
 161  * @ent: entry in kcs_pci_tbl
 162  *
 163  * Return: 0 on success, <0 on failure.
 164  */
 165 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 166 {
 167         const struct mei_cfg *cfg;
 168         struct mei_device *dev;
 169         struct mei_me_hw *hw;
 170         unsigned int irqflags;
 171         int err;
 172
 173         cfg = mei_me_get_cfg(ent->driver_data);
 174         if (!cfg)
 175                 return -ENODEV;
 176
 177         if (!mei_me_quirk_probe(pdev, cfg))
 178                 return -ENODEV;
 179
 180         /* enable pci dev */
 181         err = pcim_enable_device(pdev);
 182         if (err) {
 183                 dev_err(&pdev->dev, "failed to enable pci device.\n");
 184                 goto end;
 185         }
 186         /* set PCI host mastering  */
 187         pci_set_master(pdev);
 188         /* pci request regions and mapping IO device memory for mei driver */
 189         err = pcim_iomap_regions(pdev, BIT(0), KBUILD_MODNAME);
 190         if (err) {
 191                 dev_err(&pdev->dev, "failed to get pci regions.\n");
 192                 goto end;
 193         }
 194
 195         if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
 196             dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
 197
 198                 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
 199                 if (err)
 200                         err = dma_set_coherent_mask(&pdev->dev,
 201                                                     DMA_BIT_MASK(32));
 202         }
 203         if (err) {
 204                 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
 205                 goto end;
 206         }
 207
 208         /* allocates and initializes the mei dev structure */
 209         dev = mei_me_dev_init(pdev, cfg);
 210         if (!dev) {
 211                 err = -ENOMEM;
 212                 goto end;
 213         }
 214         hw = to_me_hw(dev);
 215         hw->mem_addr = pcim_iomap_table(pdev)[0];
 216
 217         pci_enable_msi(pdev);
 218
 219          /* request and enable interrupt */
 220         irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
 221
 222         err = request_threaded_irq(pdev->irq,
 223                         mei_me_irq_quick_handler,
 224                         mei_me_irq_thread_handler,
 225                         irqflags, KBUILD_MODNAME, dev);
 226         if (err) {
 227                 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
 228                        pdev->irq);
 229                 goto end;
 230         }
 231
 232         if (mei_start(dev)) {
 233                 dev_err(&pdev->dev, "init hw failure.\n");
 234                 err = -ENODEV;
 235                 goto release_irq;
 236         }
 237
 238         pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
 239         pm_runtime_use_autosuspend(&pdev->dev);
 240
 241         err = mei_register(dev, &pdev->dev);
 242         if (err)
 243                 goto stop;
 244
 245         pci_set_drvdata(pdev, dev);
 246
 247         /*
 248          * MEI requires to resume from runtime suspend mode
 249          * in order to perform link reset flow upon system suspend.
 250          */
 251         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NEVER_SKIP);
 252
 253         /*
 254          * ME maps runtime suspend/resume to D0i states,
 255          * hence we need to go around native PCI runtime service which
 256          * eventually brings the device into D3cold/hot state,
 257          * but the mei device cannot wake up from D3 unlike from D0i3.
 258          * To get around the PCI device native runtime pm,
 259          * ME uses runtime pm domain handlers which take precedence
 260          * over the driver's pm handlers.
 261          */
 262         mei_me_set_pm_domain(dev);
 263
 264         if (mei_pg_is_enabled(dev)) {
 265                 pm_runtime_put_noidle(&pdev->dev);
 266                 if (hw->d0i3_supported)
 267                         pm_runtime_allow(&pdev->dev);
 268         }
 269
 270         dev_dbg(&pdev->dev, "initialization successful.\n");
 271
 272         return 0;
 273
 274 stop:
 275         mei_stop(dev);
 276 release_irq:
 277         mei_cancel_work(dev);
 278         mei_disable_interrupts(dev);
 279         free_irq(pdev->irq, dev);
 280 end:
 281         dev_err(&pdev->dev, "initialization failed.\n");
 282         return err;
 283 }
 284
 285 /**
 286  * mei_me_shutdown - Device Removal Routine
 287  *
 288  * @pdev: PCI device structure
 289  *
 290  * mei_me_shutdown is called from the reboot notifier
 291  * it's a simplified version of remove so we go down
 292  * faster.
 293  */
 294 static void mei_me_shutdown(struct pci_dev *pdev)
 295 {
 296         struct mei_device *dev;
 297
 298         dev = pci_get_drvdata(pdev);
 299         if (!dev)
 300                 return;
 301
 302         dev_dbg(&pdev->dev, "shutdown\n");
 303         mei_stop(dev);
 304
 305         mei_me_unset_pm_domain(dev);
 306
 307         mei_disable_interrupts(dev);
 308         free_irq(pdev->irq, dev);
 309 }
 310
 311 /**
 312  * mei_me_remove - Device Removal Routine
 313  *
 314  * @pdev: PCI device structure
 315  *
 316  * mei_me_remove is called by the PCI subsystem to alert the driver
 317  * that it should release a PCI device.
 318  */
 319 static void mei_me_remove(struct pci_dev *pdev)
 320 {
 321         struct mei_device *dev;
 322
 323         dev = pci_get_drvdata(pdev);
 324         if (!dev)
 325                 return;
 326
 327         if (mei_pg_is_enabled(dev))
 328                 pm_runtime_get_noresume(&pdev->dev);
 329
 330         dev_dbg(&pdev->dev, "stop\n");
 331         mei_stop(dev);
 332
 333         mei_me_unset_pm_domain(dev);
 334
 335         mei_disable_interrupts(dev);
 336
 337         free_irq(pdev->irq, dev);
 338
 339         mei_deregister(dev);
 340 }
 341
 342 #ifdef CONFIG_PM_SLEEP
 343 static int mei_me_pci_suspend(struct device *device)
 344 {
 345         struct pci_dev *pdev = to_pci_dev(device);
 346         struct mei_device *dev = pci_get_drvdata(pdev);
 347
 348         if (!dev)
 349                 return -ENODEV;
 350
 351         dev_dbg(&pdev->dev, "suspend\n");
 352
 353         mei_stop(dev);
 354
 355         mei_disable_interrupts(dev);
 356
 357         free_irq(pdev->irq, dev);
 358         pci_disable_msi(pdev);
 359
 360         return 0;
 361 }
 362
 363 static int mei_me_pci_resume(struct device *device)
 364 {
 365         struct pci_dev *pdev = to_pci_dev(device);
 366         struct mei_device *dev;
 367         unsigned int irqflags;
 368         int err;
 369
 370         dev = pci_get_drvdata(pdev);
 371         if (!dev)
 372                 return -ENODEV;
 373
 374         pci_enable_msi(pdev);
 375
 376         irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
 377
 378         /* request and enable interrupt */
 379         err = request_threaded_irq(pdev->irq,
 380                         mei_me_irq_quick_handler,
 381                         mei_me_irq_thread_handler,
 382                         irqflags, KBUILD_MODNAME, dev);
 383
 384         if (err) {
 385                 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
 386                                 pdev->irq);
 387                 return err;
 388         }
 389
 390         err = mei_restart(dev);
 391         if (err)
 392                 return err;
 393
 394         /* Start timer if stopped in suspend */
 395         schedule_delayed_work(&dev->timer_work, HZ);
 396
 397         return 0;
 398 }
 399 #endif /* CONFIG_PM_SLEEP */
 400
 401 #ifdef CONFIG_PM
 402 static int mei_me_pm_runtime_idle(struct device *device)
 403 {
 404         struct pci_dev *pdev = to_pci_dev(device);
 405         struct mei_device *dev;
 406
 407         dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
 408
 409         dev = pci_get_drvdata(pdev);
 410         if (!dev)
 411                 return -ENODEV;
 412         if (mei_write_is_idle(dev))
 413                 pm_runtime_autosuspend(device);
 414
 415         return -EBUSY;
 416 }
 417
 418 static int mei_me_pm_runtime_suspend(struct device *device)
 419 {
 420         struct pci_dev *pdev = to_pci_dev(device);
 421         struct mei_device *dev;
 422         int ret;
 423
 424         dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
 425
 426         dev = pci_get_drvdata(pdev);
 427         if (!dev)
 428                 return -ENODEV;
 429
 430         mutex_lock(&dev->device_lock);
 431
 432         if (mei_write_is_idle(dev))
 433                 ret = mei_me_pg_enter_sync(dev);
 434         else
 435                 ret = -EAGAIN;
 436
 437         mutex_unlock(&dev->device_lock);
 438
 439         dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
 440
 441         if (ret && ret != -EAGAIN)
 442                 schedule_work(&dev->reset_work);
 443
 444         return ret;
 445 }
 446
 447 static int mei_me_pm_runtime_resume(struct device *device)
 448 {
 449         struct pci_dev *pdev = to_pci_dev(device);
 450         struct mei_device *dev;
 451         int ret;
 452
 453         dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
 454
 455         dev = pci_get_drvdata(pdev);
 456         if (!dev)
 457                 return -ENODEV;
 458
 459         mutex_lock(&dev->device_lock);
 460
 461         ret = mei_me_pg_exit_sync(dev);
 462
 463         mutex_unlock(&dev->device_lock);
 464
 465         dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
 466
 467         if (ret)
 468                 schedule_work(&dev->reset_work);
 469
 470         return ret;
 471 }
 472
 473 /**
 474  * mei_me_set_pm_domain - fill and set pm domain structure for device
 475  *
 476  * @dev: mei_device
 477  */
 478 static inline void mei_me_set_pm_domain(struct mei_device *dev)
 479 {
 480         struct pci_dev *pdev  = to_pci_dev(dev->dev);
 481
 482         if (pdev->dev.bus && pdev->dev.bus->pm) {
 483                 dev->pg_domain.ops = *pdev->dev.bus->pm;
 484
 485                 dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
 486                 dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
 487                 dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;
 488
 489                 dev_pm_domain_set(&pdev->dev, &dev->pg_domain);
 490         }
 491 }
 492
 493 /**
 494  * mei_me_unset_pm_domain - clean pm domain structure for device
 495  *
 496  * @dev: mei_device
 497  */
 498 static inline void mei_me_unset_pm_domain(struct mei_device *dev)
 499 {
 500         /* stop using pm callbacks if any */
 501         dev_pm_domain_set(dev->dev, NULL);
 502 }
 503
 504 static const struct dev_pm_ops mei_me_pm_ops = {
 505         SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
 506                                 mei_me_pci_resume)
 507         SET_RUNTIME_PM_OPS(
 508                 mei_me_pm_runtime_suspend,
 509                 mei_me_pm_runtime_resume,
 510                 mei_me_pm_runtime_idle)
 511 };
 512
 513 #define MEI_ME_PM_OPS   (&mei_me_pm_ops)
 514 #else
 515 #define MEI_ME_PM_OPS   NULL
 516 #endif /* CONFIG_PM */
 517 /*
 518  *  PCI driver structure
 519  */
 520 static struct pci_driver mei_me_driver = {
 521         .name = KBUILD_MODNAME,
 522         .id_table = mei_me_pci_tbl,
 523         .probe = mei_me_probe,
 524         .remove = mei_me_remove,
 525         .shutdown = mei_me_shutdown,
 526         .driver.pm = MEI_ME_PM_OPS,
 527         .driver.probe_type = PROBE_PREFER_ASYNCHRONOUS,
 528 };
 529
 530 module_pci_driver(mei_me_driver);
 531
 532 MODULE_AUTHOR("Intel Corporation");
 533 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
 534 MODULE_LICENSE("GPL v2");