drivers/mmc/host/sdhci-pci-core.c

   1 /*  linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
   2  *
   3  *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or (at
   8  * your option) any later version.
   9  *
  10  * Thanks to the following companies for their support:
  11  *
  12  *     - JMicron (hardware and technical support)
  13  */
  14
  15 #include <linux/delay.h>
  16 #include <linux/highmem.h>
  17 #include <linux/module.h>
  18 #include <linux/pci.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/slab.h>
  21 #include <linux/device.h>
  22 #include <linux/mmc/host.h>
  23 #include <linux/mmc/mmc.h>
  24 #include <linux/scatterlist.h>
  25 #include <linux/io.h>
  26 #include <linux/gpio.h>
  27 #include <linux/pm_runtime.h>
  28 #include <linux/mmc/slot-gpio.h>
  29 #include <linux/mmc/sdhci-pci-data.h>
  30
  31 #include "sdhci.h"
  32 #include "sdhci-pci.h"
  33 #include "sdhci-pci-o2micro.h"
  34
  35 static int sdhci_pci_enable_dma(struct sdhci_host *host);
  36 static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width);
  37 static void sdhci_pci_hw_reset(struct sdhci_host *host);
  38 static int sdhci_pci_select_drive_strength(struct sdhci_host *host,
  39                                            struct mmc_card *card,
  40                                            unsigned int max_dtr, int host_drv,
  41                                            int card_drv, int *drv_type);
  42
  43 /*****************************************************************************\
  44  *                                                                           *
  45  * Hardware specific quirk handling                                          *
  46  *                                                                           *
  47 \*****************************************************************************/
  48
  49 static int ricoh_probe(struct sdhci_pci_chip *chip)
  50 {
  51         if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
  52             chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
  53                 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
  54         return 0;
  55 }
  56
  57 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
  58 {
  59         slot->host->caps =
  60                 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
  61                         & SDHCI_TIMEOUT_CLK_MASK) |
  62
  63                 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
  64                         & SDHCI_CLOCK_BASE_MASK) |
  65
  66                 SDHCI_TIMEOUT_CLK_UNIT |
  67                 SDHCI_CAN_VDD_330 |
  68                 SDHCI_CAN_DO_HISPD |
  69                 SDHCI_CAN_DO_SDMA;
  70         return 0;
  71 }
  72
  73 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
  74 {
  75         /* Apply a delay to allow controller to settle */
  76         /* Otherwise it becomes confused if card state changed
  77                 during suspend */
  78         msleep(500);
  79         return 0;
  80 }
  81
  82 static const struct sdhci_pci_fixes sdhci_ricoh = {
  83         .probe          = ricoh_probe,
  84         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
  85                           SDHCI_QUIRK_FORCE_DMA |
  86                           SDHCI_QUIRK_CLOCK_BEFORE_RESET,
  87 };
  88
  89 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
  90         .probe_slot     = ricoh_mmc_probe_slot,
  91         .resume         = ricoh_mmc_resume,
  92         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
  93                           SDHCI_QUIRK_CLOCK_BEFORE_RESET |
  94                           SDHCI_QUIRK_NO_CARD_NO_RESET |
  95                           SDHCI_QUIRK_MISSING_CAPS
  96 };
  97
  98 static const struct sdhci_pci_fixes sdhci_ene_712 = {
  99         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
 100                           SDHCI_QUIRK_BROKEN_DMA,
 101 };
 102
 103 static const struct sdhci_pci_fixes sdhci_ene_714 = {
 104         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
 105                           SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
 106                           SDHCI_QUIRK_BROKEN_DMA,
 107 };
 108
 109 static const struct sdhci_pci_fixes sdhci_cafe = {
 110         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
 111                           SDHCI_QUIRK_NO_BUSY_IRQ |
 112                           SDHCI_QUIRK_BROKEN_CARD_DETECTION |
 113                           SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
 114 };
 115
 116 static const struct sdhci_pci_fixes sdhci_intel_qrk = {
 117         .quirks         = SDHCI_QUIRK_NO_HISPD_BIT,
 118 };
 119
 120 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
 121 {
 122         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
 123         return 0;
 124 }
 125
 126 /*
 127  * ADMA operation is disabled for Moorestown platform due to
 128  * hardware bugs.
 129  */
 130 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
 131 {
 132         /*
 133          * slots number is fixed here for MRST as SDIO3/5 are never used and
 134          * have hardware bugs.
 135          */
 136         chip->num_slots = 1;
 137         return 0;
 138 }
 139
 140 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
 141 {
 142         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
 143         return 0;
 144 }
 145
 146 #ifdef CONFIG_PM
 147
 148 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
 149 {
 150         struct sdhci_pci_slot *slot = dev_id;
 151         struct sdhci_host *host = slot->host;
 152
 153         mmc_detect_change(host->mmc, msecs_to_jiffies(200));
 154         return IRQ_HANDLED;
 155 }
 156
 157 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
 158 {
 159         int err, irq, gpio = slot->cd_gpio;
 160
 161         slot->cd_gpio = -EINVAL;
 162         slot->cd_irq = -EINVAL;
 163
 164         if (!gpio_is_valid(gpio))
 165                 return;
 166
 167         err = devm_gpio_request(&slot->chip->pdev->dev, gpio, "sd_cd");
 168         if (err < 0)
 169                 goto out;
 170
 171         err = gpio_direction_input(gpio);
 172         if (err < 0)
 173                 goto out_free;
 174
 175         irq = gpio_to_irq(gpio);
 176         if (irq < 0)
 177                 goto out_free;
 178
 179         err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
 180                           IRQF_TRIGGER_FALLING, "sd_cd", slot);
 181         if (err)
 182                 goto out_free;
 183
 184         slot->cd_gpio = gpio;
 185         slot->cd_irq = irq;
 186
 187         return;
 188
 189 out_free:
 190         devm_gpio_free(&slot->chip->pdev->dev, gpio);
 191 out:
 192         dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
 193 }
 194
 195 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
 196 {
 197         if (slot->cd_irq >= 0)
 198                 free_irq(slot->cd_irq, slot);
 199 }
 200
 201 #else
 202
 203 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
 204 {
 205 }
 206
 207 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
 208 {
 209 }
 210
 211 #endif
 212
 213 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
 214 {
 215         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
 216         slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
 217                                   MMC_CAP2_HC_ERASE_SZ;
 218         return 0;
 219 }
 220
 221 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
 222 {
 223         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
 224         return 0;
 225 }
 226
 227 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
 228         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
 229         .probe_slot     = mrst_hc_probe_slot,
 230 };
 231
 232 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
 233         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
 234         .probe          = mrst_hc_probe,
 235 };
 236
 237 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
 238         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 239         .allow_runtime_pm = true,
 240         .own_cd_for_runtime_pm = true,
 241 };
 242
 243 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
 244         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 245         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
 246         .allow_runtime_pm = true,
 247         .probe_slot     = mfd_sdio_probe_slot,
 248 };
 249
 250 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
 251         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 252         .allow_runtime_pm = true,
 253         .probe_slot     = mfd_emmc_probe_slot,
 254 };
 255
 256 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
 257         .quirks         = SDHCI_QUIRK_BROKEN_ADMA,
 258         .probe_slot     = pch_hc_probe_slot,
 259 };
 260
 261 static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
 262 {
 263         u8 reg;
 264
 265         reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
 266         reg |= 0x10;
 267         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
 268         /* For eMMC, minimum is 1us but give it 9us for good measure */
 269         udelay(9);
 270         reg &= ~0x10;
 271         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
 272         /* For eMMC, minimum is 200us but give it 300us for good measure */
 273         usleep_range(300, 1000);
 274 }
 275
 276 static int spt_select_drive_strength(struct sdhci_host *host,
 277                                      struct mmc_card *card,
 278                                      unsigned int max_dtr,
 279                                      int host_drv, int card_drv, int *drv_type)
 280 {
 281         int drive_strength;
 282
 283         if (sdhci_pci_spt_drive_strength > 0)
 284                 drive_strength = sdhci_pci_spt_drive_strength & 0xf;
 285         else
 286                 drive_strength = 0; /* Default 50-ohm */
 287
 288         if ((mmc_driver_type_mask(drive_strength) & card_drv) == 0)
 289                 drive_strength = 0; /* Default 50-ohm */
 290
 291         return drive_strength;
 292 }
 293
 294 /* Try to read the drive strength from the card */
 295 static void spt_read_drive_strength(struct sdhci_host *host)
 296 {
 297         u32 val, i, t;
 298         u16 m;
 299
 300         if (sdhci_pci_spt_drive_strength)
 301                 return;
 302
 303         sdhci_pci_spt_drive_strength = -1;
 304
 305         m = sdhci_readw(host, SDHCI_HOST_CONTROL2) & 0x7;
 306         if (m != 3 && m != 5)
 307                 return;
 308         val = sdhci_readl(host, SDHCI_PRESENT_STATE);
 309         if (val & 0x3)
 310                 return;
 311         sdhci_writel(host, 0x007f0023, SDHCI_INT_ENABLE);
 312         sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
 313         sdhci_writew(host, 0x10, SDHCI_TRANSFER_MODE);
 314         sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
 315         sdhci_writew(host, 512, SDHCI_BLOCK_SIZE);
 316         sdhci_writew(host, 1, SDHCI_BLOCK_COUNT);
 317         sdhci_writel(host, 0, SDHCI_ARGUMENT);
 318         sdhci_writew(host, 0x83b, SDHCI_COMMAND);
 319         for (i = 0; i < 1000; i++) {
 320                 val = sdhci_readl(host, SDHCI_INT_STATUS);
 321                 if (val & 0xffff8000)
 322                         return;
 323                 if (val & 0x20)
 324                         break;
 325                 udelay(1);
 326         }
 327         val = sdhci_readl(host, SDHCI_PRESENT_STATE);
 328         if (!(val & 0x800))
 329                 return;
 330         for (i = 0; i < 47; i++)
 331                 val = sdhci_readl(host, SDHCI_BUFFER);
 332         t = val & 0xf00;
 333         if (t != 0x200 && t != 0x300)
 334                 return;
 335
 336         sdhci_pci_spt_drive_strength = 0x10 | ((val >> 12) & 0xf);
 337 }
 338
 339 static int bxt_get_cd(struct mmc_host *mmc)
 340 {
 341         int gpio_cd = mmc_gpio_get_cd(mmc);
 342         struct sdhci_host *host = mmc_priv(mmc);
 343         unsigned long flags;
 344         int ret = 0;
 345
 346         if (!gpio_cd)
 347                 return 0;
 348
 349         spin_lock_irqsave(&host->lock, flags);
 350
 351         if (host->flags & SDHCI_DEVICE_DEAD)
 352                 goto out;
 353
 354         ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
 355 out:
 356         spin_unlock_irqrestore(&host->lock, flags);
 357
 358         return ret;
 359 }
 360
 361 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
 362 {
 363         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
 364                                  MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
 365                                  MMC_CAP_CMD_DURING_TFR |
 366                                  MMC_CAP_WAIT_WHILE_BUSY;
 367         slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
 368         slot->hw_reset = sdhci_pci_int_hw_reset;
 369         if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC)
 370                 slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
 371         if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_SPT_EMMC) {
 372                 spt_read_drive_strength(slot->host);
 373                 slot->select_drive_strength = spt_select_drive_strength;
 374         }
 375         return 0;
 376 }
 377
 378 static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
 379 {
 380         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
 381                                  MMC_CAP_WAIT_WHILE_BUSY;
 382         return 0;
 383 }
 384
 385 static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
 386 {
 387         slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
 388         slot->cd_con_id = NULL;
 389         slot->cd_idx = 0;
 390         slot->cd_override_level = true;
 391         if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD ||
 392             slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD ||
 393             slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD) {
 394                 slot->host->mmc_host_ops.get_cd = bxt_get_cd;
 395                 slot->host->mmc->caps |= MMC_CAP_AGGRESSIVE_PM;
 396         }
 397
 398         return 0;
 399 }
 400
 401 #define SDHCI_INTEL_PWR_TIMEOUT_CNT     20
 402 #define SDHCI_INTEL_PWR_TIMEOUT_UDELAY  100
 403
 404 static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode,
 405                                   unsigned short vdd)
 406 {
 407         int cntr;
 408         u8 reg;
 409
 410         sdhci_set_power(host, mode, vdd);
 411
 412         if (mode == MMC_POWER_OFF)
 413                 return;
 414
 415         spin_unlock_irq(&host->lock);
 416
 417         /*
 418          * Bus power might not enable after D3 -> D0 transition due to the
 419          * present state not yet having propagated. Retry for up to 2ms.
 420          */
 421         for (cntr = 0; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT; cntr++) {
 422                 reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
 423                 if (reg & SDHCI_POWER_ON)
 424                         break;
 425                 udelay(SDHCI_INTEL_PWR_TIMEOUT_UDELAY);
 426                 reg |= SDHCI_POWER_ON;
 427                 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
 428         }
 429
 430         spin_lock_irq(&host->lock);
 431 }
 432
 433 static const struct sdhci_ops sdhci_intel_byt_ops = {
 434         .set_clock              = sdhci_set_clock,
 435         .set_power              = sdhci_intel_set_power,
 436         .enable_dma             = sdhci_pci_enable_dma,
 437         .set_bus_width          = sdhci_pci_set_bus_width,
 438         .reset                  = sdhci_reset,
 439         .set_uhs_signaling      = sdhci_set_uhs_signaling,
 440         .hw_reset               = sdhci_pci_hw_reset,
 441         .select_drive_strength  = sdhci_pci_select_drive_strength,
 442 };
 443
 444 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
 445         .allow_runtime_pm = true,
 446         .probe_slot     = byt_emmc_probe_slot,
 447         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 448         .quirks2        = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 449                           SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
 450                           SDHCI_QUIRK2_STOP_WITH_TC,
 451         .ops            = &sdhci_intel_byt_ops,
 452 };
 453
 454 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
 455         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 456         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON |
 457                         SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 458         .allow_runtime_pm = true,
 459         .probe_slot     = byt_sdio_probe_slot,
 460         .ops            = &sdhci_intel_byt_ops,
 461 };
 462
 463 static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
 464         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 465         .quirks2        = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
 466                           SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 467                           SDHCI_QUIRK2_STOP_WITH_TC,
 468         .allow_runtime_pm = true,
 469         .own_cd_for_runtime_pm = true,
 470         .probe_slot     = byt_sd_probe_slot,
 471         .ops            = &sdhci_intel_byt_ops,
 472 };
 473
 474 /* Define Host controllers for Intel Merrifield platform */
 475 #define INTEL_MRFLD_EMMC_0      0
 476 #define INTEL_MRFLD_EMMC_1      1
 477 #define INTEL_MRFLD_SD          2
 478 #define INTEL_MRFLD_SDIO        3
 479
 480 static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot)
 481 {
 482         unsigned int func = PCI_FUNC(slot->chip->pdev->devfn);
 483
 484         switch (func) {
 485         case INTEL_MRFLD_EMMC_0:
 486         case INTEL_MRFLD_EMMC_1:
 487                 slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE |
 488                                          MMC_CAP_8_BIT_DATA |
 489                                          MMC_CAP_1_8V_DDR;
 490                 break;
 491         case INTEL_MRFLD_SD:
 492                 slot->host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
 493                 break;
 494         case INTEL_MRFLD_SDIO:
 495                 /* Advertise 2.0v for compatibility with the SDIO card's OCR */
 496                 slot->host->ocr_mask = MMC_VDD_20_21 | MMC_VDD_165_195;
 497                 slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE |
 498                                          MMC_CAP_POWER_OFF_CARD;
 499                 break;
 500         default:
 501                 return -ENODEV;
 502         }
 503         return 0;
 504 }
 505
 506 static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc = {
 507         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 508         .quirks2        = SDHCI_QUIRK2_BROKEN_HS200 |
 509                         SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 510         .allow_runtime_pm = true,
 511         .probe_slot     = intel_mrfld_mmc_probe_slot,
 512 };
 513
 514 /* O2Micro extra registers */
 515 #define O2_SD_LOCK_WP           0xD3
 516 #define O2_SD_MULTI_VCC3V       0xEE
 517 #define O2_SD_CLKREQ            0xEC
 518 #define O2_SD_CAPS              0xE0
 519 #define O2_SD_ADMA1             0xE2
 520 #define O2_SD_ADMA2             0xE7
 521 #define O2_SD_INF_MOD           0xF1
 522
 523 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
 524 {
 525         u8 scratch;
 526         int ret;
 527
 528         ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
 529         if (ret)
 530                 return ret;
 531
 532         /*
 533          * Turn PMOS on [bit 0], set over current detection to 2.4 V
 534          * [bit 1:2] and enable over current debouncing [bit 6].
 535          */
 536         if (on)
 537                 scratch |= 0x47;
 538         else
 539                 scratch &= ~0x47;
 540
 541         return pci_write_config_byte(chip->pdev, 0xAE, scratch);
 542 }
 543
 544 static int jmicron_probe(struct sdhci_pci_chip *chip)
 545 {
 546         int ret;
 547         u16 mmcdev = 0;
 548
 549         if (chip->pdev->revision == 0) {
 550                 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
 551                           SDHCI_QUIRK_32BIT_DMA_SIZE |
 552                           SDHCI_QUIRK_32BIT_ADMA_SIZE |
 553                           SDHCI_QUIRK_RESET_AFTER_REQUEST |
 554                           SDHCI_QUIRK_BROKEN_SMALL_PIO;
 555         }
 556
 557         /*
 558          * JMicron chips can have two interfaces to the same hardware
 559          * in order to work around limitations in Microsoft's driver.
 560          * We need to make sure we only bind to one of them.
 561          *
 562          * This code assumes two things:
 563          *
 564          * 1. The PCI code adds subfunctions in order.
 565          *
 566          * 2. The MMC interface has a lower subfunction number
 567          *    than the SD interface.
 568          */
 569         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
 570                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
 571         else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
 572                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
 573
 574         if (mmcdev) {
 575                 struct pci_dev *sd_dev;
 576
 577                 sd_dev = NULL;
 578                 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
 579                                                 mmcdev, sd_dev)) != NULL) {
 580                         if ((PCI_SLOT(chip->pdev->devfn) ==
 581                                 PCI_SLOT(sd_dev->devfn)) &&
 582                                 (chip->pdev->bus == sd_dev->bus))
 583                                 break;
 584                 }
 585
 586                 if (sd_dev) {
 587                         pci_dev_put(sd_dev);
 588                         dev_info(&chip->pdev->dev, "Refusing to bind to "
 589                                 "secondary interface.\n");
 590                         return -ENODEV;
 591                 }
 592         }
 593
 594         /*
 595          * JMicron chips need a bit of a nudge to enable the power
 596          * output pins.
 597          */
 598         ret = jmicron_pmos(chip, 1);
 599         if (ret) {
 600                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
 601                 return ret;
 602         }
 603
 604         /* quirk for unsable RO-detection on JM388 chips */
 605         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
 606             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
 607                 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
 608
 609         return 0;
 610 }
 611
 612 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
 613 {
 614         u8 scratch;
 615
 616         scratch = readb(host->ioaddr + 0xC0);
 617
 618         if (on)
 619                 scratch |= 0x01;
 620         else
 621                 scratch &= ~0x01;
 622
 623         writeb(scratch, host->ioaddr + 0xC0);
 624 }
 625
 626 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
 627 {
 628         if (slot->chip->pdev->revision == 0) {
 629                 u16 version;
 630
 631                 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
 632                 version = (version & SDHCI_VENDOR_VER_MASK) >>
 633                         SDHCI_VENDOR_VER_SHIFT;
 634
 635                 /*
 636                  * Older versions of the chip have lots of nasty glitches
 637                  * in the ADMA engine. It's best just to avoid it
 638                  * completely.
 639                  */
 640                 if (version < 0xAC)
 641                         slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
 642         }
 643
 644         /* JM388 MMC doesn't support 1.8V while SD supports it */
 645         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
 646                 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
 647                         MMC_VDD_29_30 | MMC_VDD_30_31 |
 648                         MMC_VDD_165_195; /* allow 1.8V */
 649                 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
 650                         MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
 651         }
 652
 653         /*
 654          * The secondary interface requires a bit set to get the
 655          * interrupts.
 656          */
 657         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 658             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
 659                 jmicron_enable_mmc(slot->host, 1);
 660
 661         slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
 662
 663         return 0;
 664 }
 665
 666 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
 667 {
 668         if (dead)
 669                 return;
 670
 671         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 672             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
 673                 jmicron_enable_mmc(slot->host, 0);
 674 }
 675
 676 static int jmicron_suspend(struct sdhci_pci_chip *chip)
 677 {
 678         int i;
 679
 680         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 681             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
 682                 for (i = 0; i < chip->num_slots; i++)
 683                         jmicron_enable_mmc(chip->slots[i]->host, 0);
 684         }
 685
 686         return 0;
 687 }
 688
 689 static int jmicron_resume(struct sdhci_pci_chip *chip)
 690 {
 691         int ret, i;
 692
 693         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 694             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
 695                 for (i = 0; i < chip->num_slots; i++)
 696                         jmicron_enable_mmc(chip->slots[i]->host, 1);
 697         }
 698
 699         ret = jmicron_pmos(chip, 1);
 700         if (ret) {
 701                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
 702                 return ret;
 703         }
 704
 705         return 0;
 706 }
 707
 708 static const struct sdhci_pci_fixes sdhci_o2 = {
 709         .probe = sdhci_pci_o2_probe,
 710         .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 711         .quirks2 = SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD,
 712         .probe_slot = sdhci_pci_o2_probe_slot,
 713         .resume = sdhci_pci_o2_resume,
 714 };
 715
 716 static const struct sdhci_pci_fixes sdhci_jmicron = {
 717         .probe          = jmicron_probe,
 718
 719         .probe_slot     = jmicron_probe_slot,
 720         .remove_slot    = jmicron_remove_slot,
 721
 722         .suspend        = jmicron_suspend,
 723         .resume         = jmicron_resume,
 724 };
 725
 726 /* SysKonnect CardBus2SDIO extra registers */
 727 #define SYSKT_CTRL              0x200
 728 #define SYSKT_RDFIFO_STAT       0x204
 729 #define SYSKT_WRFIFO_STAT       0x208
 730 #define SYSKT_POWER_DATA        0x20c
 731 #define   SYSKT_POWER_330       0xef
 732 #define   SYSKT_POWER_300       0xf8
 733 #define   SYSKT_POWER_184       0xcc
 734 #define SYSKT_POWER_CMD         0x20d
 735 #define   SYSKT_POWER_START     (1 << 7)
 736 #define SYSKT_POWER_STATUS      0x20e
 737 #define   SYSKT_POWER_STATUS_OK (1 << 0)
 738 #define SYSKT_BOARD_REV         0x210
 739 #define SYSKT_CHIP_REV          0x211
 740 #define SYSKT_CONF_DATA         0x212
 741 #define   SYSKT_CONF_DATA_1V8   (1 << 2)
 742 #define   SYSKT_CONF_DATA_2V5   (1 << 1)
 743 #define   SYSKT_CONF_DATA_3V3   (1 << 0)
 744
 745 static int syskt_probe(struct sdhci_pci_chip *chip)
 746 {
 747         if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
 748                 chip->pdev->class &= ~0x0000FF;
 749                 chip->pdev->class |= PCI_SDHCI_IFDMA;
 750         }
 751         return 0;
 752 }
 753
 754 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
 755 {
 756         int tm, ps;
 757
 758         u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
 759         u8  chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
 760         dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
 761                                          "board rev %d.%d, chip rev %d.%d\n",
 762                                          board_rev >> 4, board_rev & 0xf,
 763                                          chip_rev >> 4,  chip_rev & 0xf);
 764         if (chip_rev >= 0x20)
 765                 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
 766
 767         writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
 768         writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
 769         udelay(50);
 770         tm = 10;  /* Wait max 1 ms */
 771         do {
 772                 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
 773                 if (ps & SYSKT_POWER_STATUS_OK)
 774                         break;
 775                 udelay(100);
 776         } while (--tm);
 777         if (!tm) {
 778                 dev_err(&slot->chip->pdev->dev,
 779                         "power regulator never stabilized");
 780                 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
 781                 return -ENODEV;
 782         }
 783
 784         return 0;
 785 }
 786
 787 static const struct sdhci_pci_fixes sdhci_syskt = {
 788         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
 789         .probe          = syskt_probe,
 790         .probe_slot     = syskt_probe_slot,
 791 };
 792
 793 static int via_probe(struct sdhci_pci_chip *chip)
 794 {
 795         if (chip->pdev->revision == 0x10)
 796                 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
 797
 798         return 0;
 799 }
 800
 801 static const struct sdhci_pci_fixes sdhci_via = {
 802         .probe          = via_probe,
 803 };
 804
 805 static int rtsx_probe_slot(struct sdhci_pci_slot *slot)
 806 {
 807         slot->host->mmc->caps2 |= MMC_CAP2_HS200;
 808         return 0;
 809 }
 810
 811 static const struct sdhci_pci_fixes sdhci_rtsx = {
 812         .quirks2        = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 813                         SDHCI_QUIRK2_BROKEN_64_BIT_DMA |
 814                         SDHCI_QUIRK2_BROKEN_DDR50,
 815         .probe_slot     = rtsx_probe_slot,
 816 };
 817
 818 /*AMD chipset generation*/
 819 enum amd_chipset_gen {
 820         AMD_CHIPSET_BEFORE_ML,
 821         AMD_CHIPSET_CZ,
 822         AMD_CHIPSET_NL,
 823         AMD_CHIPSET_UNKNOWN,
 824 };
 825
 826 static int amd_probe(struct sdhci_pci_chip *chip)
 827 {
 828         struct pci_dev  *smbus_dev;
 829         enum amd_chipset_gen gen;
 830
 831         smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
 832                         PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
 833         if (smbus_dev) {
 834                 gen = AMD_CHIPSET_BEFORE_ML;
 835         } else {
 836                 smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
 837                                 PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL);
 838                 if (smbus_dev) {
 839                         if (smbus_dev->revision < 0x51)
 840                                 gen = AMD_CHIPSET_CZ;
 841                         else
 842                                 gen = AMD_CHIPSET_NL;
 843                 } else {
 844                         gen = AMD_CHIPSET_UNKNOWN;
 845                 }
 846         }
 847
 848         if ((gen == AMD_CHIPSET_BEFORE_ML) || (gen == AMD_CHIPSET_CZ)) {
 849                 chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
 850                 chip->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
 851         }
 852
 853         return 0;
 854 }
 855
 856 static const struct sdhci_pci_fixes sdhci_amd = {
 857         .probe          = amd_probe,
 858 };
 859
 860 static const struct pci_device_id pci_ids[] = {
 861         {
 862                 .vendor         = PCI_VENDOR_ID_RICOH,
 863                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
 864                 .subvendor      = PCI_ANY_ID,
 865                 .subdevice      = PCI_ANY_ID,
 866                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh,
 867         },
 868
 869         {
 870                 .vendor         = PCI_VENDOR_ID_RICOH,
 871                 .device         = 0x843,
 872                 .subvendor      = PCI_ANY_ID,
 873                 .subdevice      = PCI_ANY_ID,
 874                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
 875         },
 876
 877         {
 878                 .vendor         = PCI_VENDOR_ID_RICOH,
 879                 .device         = 0xe822,
 880                 .subvendor      = PCI_ANY_ID,
 881                 .subdevice      = PCI_ANY_ID,
 882                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
 883         },
 884
 885         {
 886                 .vendor         = PCI_VENDOR_ID_RICOH,
 887                 .device         = 0xe823,
 888                 .subvendor      = PCI_ANY_ID,
 889                 .subdevice      = PCI_ANY_ID,
 890                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
 891         },
 892
 893         {
 894                 .vendor         = PCI_VENDOR_ID_ENE,
 895                 .device         = PCI_DEVICE_ID_ENE_CB712_SD,
 896                 .subvendor      = PCI_ANY_ID,
 897                 .subdevice      = PCI_ANY_ID,
 898                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
 899         },
 900
 901         {
 902                 .vendor         = PCI_VENDOR_ID_ENE,
 903                 .device         = PCI_DEVICE_ID_ENE_CB712_SD_2,
 904                 .subvendor      = PCI_ANY_ID,
 905                 .subdevice      = PCI_ANY_ID,
 906                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
 907         },
 908
 909         {
 910                 .vendor         = PCI_VENDOR_ID_ENE,
 911                 .device         = PCI_DEVICE_ID_ENE_CB714_SD,
 912                 .subvendor      = PCI_ANY_ID,
 913                 .subdevice      = PCI_ANY_ID,
 914                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
 915         },
 916
 917         {
 918                 .vendor         = PCI_VENDOR_ID_ENE,
 919                 .device         = PCI_DEVICE_ID_ENE_CB714_SD_2,
 920                 .subvendor      = PCI_ANY_ID,
 921                 .subdevice      = PCI_ANY_ID,
 922                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
 923         },
 924
 925         {
 926                 .vendor         = PCI_VENDOR_ID_MARVELL,
 927                 .device         = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
 928                 .subvendor      = PCI_ANY_ID,
 929                 .subdevice      = PCI_ANY_ID,
 930                 .driver_data    = (kernel_ulong_t)&sdhci_cafe,
 931         },
 932
 933         {
 934                 .vendor         = PCI_VENDOR_ID_JMICRON,
 935                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
 936                 .subvendor      = PCI_ANY_ID,
 937                 .subdevice      = PCI_ANY_ID,
 938                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 939         },
 940
 941         {
 942                 .vendor         = PCI_VENDOR_ID_JMICRON,
 943                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
 944                 .subvendor      = PCI_ANY_ID,
 945                 .subdevice      = PCI_ANY_ID,
 946                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 947         },
 948
 949         {
 950                 .vendor         = PCI_VENDOR_ID_JMICRON,
 951                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_SD,
 952                 .subvendor      = PCI_ANY_ID,
 953                 .subdevice      = PCI_ANY_ID,
 954                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 955         },
 956
 957         {
 958                 .vendor         = PCI_VENDOR_ID_JMICRON,
 959                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
 960                 .subvendor      = PCI_ANY_ID,
 961                 .subdevice      = PCI_ANY_ID,
 962                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 963         },
 964
 965         {
 966                 .vendor         = PCI_VENDOR_ID_SYSKONNECT,
 967                 .device         = 0x8000,
 968                 .subvendor      = PCI_ANY_ID,
 969                 .subdevice      = PCI_ANY_ID,
 970                 .driver_data    = (kernel_ulong_t)&sdhci_syskt,
 971         },
 972
 973         {
 974                 .vendor         = PCI_VENDOR_ID_VIA,
 975                 .device         = 0x95d0,
 976                 .subvendor      = PCI_ANY_ID,
 977                 .subdevice      = PCI_ANY_ID,
 978                 .driver_data    = (kernel_ulong_t)&sdhci_via,
 979         },
 980
 981         {
 982                 .vendor         = PCI_VENDOR_ID_REALTEK,
 983                 .device         = 0x5250,
 984                 .subvendor      = PCI_ANY_ID,
 985                 .subdevice      = PCI_ANY_ID,
 986                 .driver_data    = (kernel_ulong_t)&sdhci_rtsx,
 987         },
 988
 989         {
 990                 .vendor         = PCI_VENDOR_ID_INTEL,
 991                 .device         = PCI_DEVICE_ID_INTEL_QRK_SD,
 992                 .subvendor      = PCI_ANY_ID,
 993                 .subdevice      = PCI_ANY_ID,
 994                 .driver_data    = (kernel_ulong_t)&sdhci_intel_qrk,
 995         },
 996
 997         {
 998                 .vendor         = PCI_VENDOR_ID_INTEL,
 999                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD0,
1000                 .subvendor      = PCI_ANY_ID,
1001                 .subdevice      = PCI_ANY_ID,
1002                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
1003         },
1004
1005         {
1006                 .vendor         = PCI_VENDOR_ID_INTEL,
1007                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD1,
1008                 .subvendor      = PCI_ANY_ID,
1009                 .subdevice      = PCI_ANY_ID,
1010                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
1011         },
1012
1013         {
1014                 .vendor         = PCI_VENDOR_ID_INTEL,
1015                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD2,
1016                 .subvendor      = PCI_ANY_ID,
1017                 .subdevice      = PCI_ANY_ID,
1018                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
1019         },
1020
1021         {
1022                 .vendor         = PCI_VENDOR_ID_INTEL,
1023                 .device         = PCI_DEVICE_ID_INTEL_MFD_SD,
1024                 .subvendor      = PCI_ANY_ID,
1025                 .subdevice      = PCI_ANY_ID,
1026                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
1027         },
1028
1029         {
1030                 .vendor         = PCI_VENDOR_ID_INTEL,
1031                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
1032                 .subvendor      = PCI_ANY_ID,
1033                 .subdevice      = PCI_ANY_ID,
1034                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1035         },
1036
1037         {
1038                 .vendor         = PCI_VENDOR_ID_INTEL,
1039                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
1040                 .subvendor      = PCI_ANY_ID,
1041                 .subdevice      = PCI_ANY_ID,
1042                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1043         },
1044
1045         {
1046                 .vendor         = PCI_VENDOR_ID_INTEL,
1047                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
1048                 .subvendor      = PCI_ANY_ID,
1049                 .subdevice      = PCI_ANY_ID,
1050                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1051         },
1052
1053         {
1054                 .vendor         = PCI_VENDOR_ID_INTEL,
1055                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
1056                 .subvendor      = PCI_ANY_ID,
1057                 .subdevice      = PCI_ANY_ID,
1058                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1059         },
1060
1061         {
1062                 .vendor         = PCI_VENDOR_ID_INTEL,
1063                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
1064                 .subvendor      = PCI_ANY_ID,
1065                 .subdevice      = PCI_ANY_ID,
1066                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
1067         },
1068
1069         {
1070                 .vendor         = PCI_VENDOR_ID_INTEL,
1071                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
1072                 .subvendor      = PCI_ANY_ID,
1073                 .subdevice      = PCI_ANY_ID,
1074                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
1075         },
1076
1077         {
1078                 .vendor         = PCI_VENDOR_ID_INTEL,
1079                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC,
1080                 .subvendor      = PCI_ANY_ID,
1081                 .subdevice      = PCI_ANY_ID,
1082                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1083         },
1084
1085         {
1086                 .vendor         = PCI_VENDOR_ID_INTEL,
1087                 .device         = PCI_DEVICE_ID_INTEL_BYT_SDIO,
1088                 .subvendor      = PCI_ANY_ID,
1089                 .subdevice      = PCI_ANY_ID,
1090                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1091         },
1092
1093         {
1094                 .vendor         = PCI_VENDOR_ID_INTEL,
1095                 .device         = PCI_DEVICE_ID_INTEL_BYT_SD,
1096                 .subvendor      = PCI_ANY_ID,
1097                 .subdevice      = PCI_ANY_ID,
1098                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1099         },
1100
1101         {
1102                 .vendor         = PCI_VENDOR_ID_INTEL,
1103                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC2,
1104                 .subvendor      = PCI_ANY_ID,
1105                 .subdevice      = PCI_ANY_ID,
1106                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1107         },
1108
1109         {
1110                 .vendor         = PCI_VENDOR_ID_INTEL,
1111                 .device         = PCI_DEVICE_ID_INTEL_BSW_EMMC,
1112                 .subvendor      = PCI_ANY_ID,
1113                 .subdevice      = PCI_ANY_ID,
1114                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1115         },
1116
1117         {
1118                 .vendor         = PCI_VENDOR_ID_INTEL,
1119                 .device         = PCI_DEVICE_ID_INTEL_BSW_SDIO,
1120                 .subvendor      = PCI_ANY_ID,
1121                 .subdevice      = PCI_ANY_ID,
1122                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1123         },
1124
1125         {
1126                 .vendor         = PCI_VENDOR_ID_INTEL,
1127                 .device         = PCI_DEVICE_ID_INTEL_BSW_SD,
1128                 .subvendor      = PCI_ANY_ID,
1129                 .subdevice      = PCI_ANY_ID,
1130                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1131         },
1132
1133         {
1134                 .vendor         = PCI_VENDOR_ID_INTEL,
1135                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO0,
1136                 .subvendor      = PCI_ANY_ID,
1137                 .subdevice      = PCI_ANY_ID,
1138                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
1139         },
1140
1141         {
1142                 .vendor         = PCI_VENDOR_ID_INTEL,
1143                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO1,
1144                 .subvendor      = PCI_ANY_ID,
1145                 .subdevice      = PCI_ANY_ID,
1146                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1147         },
1148
1149         {
1150                 .vendor         = PCI_VENDOR_ID_INTEL,
1151                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO2,
1152                 .subvendor      = PCI_ANY_ID,
1153                 .subdevice      = PCI_ANY_ID,
1154                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1155         },
1156
1157         {
1158                 .vendor         = PCI_VENDOR_ID_INTEL,
1159                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC0,
1160                 .subvendor      = PCI_ANY_ID,
1161                 .subdevice      = PCI_ANY_ID,
1162                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1163         },
1164
1165         {
1166                 .vendor         = PCI_VENDOR_ID_INTEL,
1167                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC1,
1168                 .subvendor      = PCI_ANY_ID,
1169                 .subdevice      = PCI_ANY_ID,
1170                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1171         },
1172
1173         {
1174                 .vendor         = PCI_VENDOR_ID_INTEL,
1175                 .device         = PCI_DEVICE_ID_INTEL_MRFLD_MMC,
1176                 .subvendor      = PCI_ANY_ID,
1177                 .subdevice      = PCI_ANY_ID,
1178                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrfld_mmc,
1179         },
1180
1181         {
1182                 .vendor         = PCI_VENDOR_ID_INTEL,
1183                 .device         = PCI_DEVICE_ID_INTEL_SPT_EMMC,
1184                 .subvendor      = PCI_ANY_ID,
1185                 .subdevice      = PCI_ANY_ID,
1186                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1187         },
1188
1189         {
1190                 .vendor         = PCI_VENDOR_ID_INTEL,
1191                 .device         = PCI_DEVICE_ID_INTEL_SPT_SDIO,
1192                 .subvendor      = PCI_ANY_ID,
1193                 .subdevice      = PCI_ANY_ID,
1194                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1195         },
1196
1197         {
1198                 .vendor         = PCI_VENDOR_ID_INTEL,
1199                 .device         = PCI_DEVICE_ID_INTEL_SPT_SD,
1200                 .subvendor      = PCI_ANY_ID,
1201                 .subdevice      = PCI_ANY_ID,
1202                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1203         },
1204
1205         {
1206                 .vendor         = PCI_VENDOR_ID_INTEL,
1207                 .device         = PCI_DEVICE_ID_INTEL_DNV_EMMC,
1208                 .subvendor      = PCI_ANY_ID,
1209                 .subdevice      = PCI_ANY_ID,
1210                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1211         },
1212
1213         {
1214                 .vendor         = PCI_VENDOR_ID_INTEL,
1215                 .device         = PCI_DEVICE_ID_INTEL_BXT_EMMC,
1216                 .subvendor      = PCI_ANY_ID,
1217                 .subdevice      = PCI_ANY_ID,
1218                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1219         },
1220
1221         {
1222                 .vendor         = PCI_VENDOR_ID_INTEL,
1223                 .device         = PCI_DEVICE_ID_INTEL_BXT_SDIO,
1224                 .subvendor      = PCI_ANY_ID,
1225                 .subdevice      = PCI_ANY_ID,
1226                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1227         },
1228
1229         {
1230                 .vendor         = PCI_VENDOR_ID_INTEL,
1231                 .device         = PCI_DEVICE_ID_INTEL_BXT_SD,
1232                 .subvendor      = PCI_ANY_ID,
1233                 .subdevice      = PCI_ANY_ID,
1234                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1235         },
1236
1237         {
1238                 .vendor         = PCI_VENDOR_ID_INTEL,
1239                 .device         = PCI_DEVICE_ID_INTEL_BXTM_EMMC,
1240                 .subvendor      = PCI_ANY_ID,
1241                 .subdevice      = PCI_ANY_ID,
1242                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1243         },
1244
1245         {
1246                 .vendor         = PCI_VENDOR_ID_INTEL,
1247                 .device         = PCI_DEVICE_ID_INTEL_BXTM_SDIO,
1248                 .subvendor      = PCI_ANY_ID,
1249                 .subdevice      = PCI_ANY_ID,
1250                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1251         },
1252
1253         {
1254                 .vendor         = PCI_VENDOR_ID_INTEL,
1255                 .device         = PCI_DEVICE_ID_INTEL_BXTM_SD,
1256                 .subvendor      = PCI_ANY_ID,
1257                 .subdevice      = PCI_ANY_ID,
1258                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1259         },
1260
1261         {
1262                 .vendor         = PCI_VENDOR_ID_INTEL,
1263                 .device         = PCI_DEVICE_ID_INTEL_APL_EMMC,
1264                 .subvendor      = PCI_ANY_ID,
1265                 .subdevice      = PCI_ANY_ID,
1266                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1267         },
1268
1269         {
1270                 .vendor         = PCI_VENDOR_ID_INTEL,
1271                 .device         = PCI_DEVICE_ID_INTEL_APL_SDIO,
1272                 .subvendor      = PCI_ANY_ID,
1273                 .subdevice      = PCI_ANY_ID,
1274                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1275         },
1276
1277         {
1278                 .vendor         = PCI_VENDOR_ID_INTEL,
1279                 .device         = PCI_DEVICE_ID_INTEL_APL_SD,
1280                 .subvendor      = PCI_ANY_ID,
1281                 .subdevice      = PCI_ANY_ID,
1282                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1283         },
1284
1285         {
1286                 .vendor         = PCI_VENDOR_ID_O2,
1287                 .device         = PCI_DEVICE_ID_O2_8120,
1288                 .subvendor      = PCI_ANY_ID,
1289                 .subdevice      = PCI_ANY_ID,
1290                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1291         },
1292
1293         {
1294                 .vendor         = PCI_VENDOR_ID_O2,
1295                 .device         = PCI_DEVICE_ID_O2_8220,
1296                 .subvendor      = PCI_ANY_ID,
1297                 .subdevice      = PCI_ANY_ID,
1298                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1299         },
1300
1301         {
1302                 .vendor         = PCI_VENDOR_ID_O2,
1303                 .device         = PCI_DEVICE_ID_O2_8221,
1304                 .subvendor      = PCI_ANY_ID,
1305                 .subdevice      = PCI_ANY_ID,
1306                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1307         },
1308
1309         {
1310                 .vendor         = PCI_VENDOR_ID_O2,
1311                 .device         = PCI_DEVICE_ID_O2_8320,
1312                 .subvendor      = PCI_ANY_ID,
1313                 .subdevice      = PCI_ANY_ID,
1314                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1315         },
1316
1317         {
1318                 .vendor         = PCI_VENDOR_ID_O2,
1319                 .device         = PCI_DEVICE_ID_O2_8321,
1320                 .subvendor      = PCI_ANY_ID,
1321                 .subdevice      = PCI_ANY_ID,
1322                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1323         },
1324
1325         {
1326                 .vendor         = PCI_VENDOR_ID_O2,
1327                 .device         = PCI_DEVICE_ID_O2_FUJIN2,
1328                 .subvendor      = PCI_ANY_ID,
1329                 .subdevice      = PCI_ANY_ID,
1330                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1331         },
1332
1333         {
1334                 .vendor         = PCI_VENDOR_ID_O2,
1335                 .device         = PCI_DEVICE_ID_O2_SDS0,
1336                 .subvendor      = PCI_ANY_ID,
1337                 .subdevice      = PCI_ANY_ID,
1338                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1339         },
1340
1341         {
1342                 .vendor         = PCI_VENDOR_ID_O2,
1343                 .device         = PCI_DEVICE_ID_O2_SDS1,
1344                 .subvendor      = PCI_ANY_ID,
1345                 .subdevice      = PCI_ANY_ID,
1346                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1347         },
1348
1349         {
1350                 .vendor         = PCI_VENDOR_ID_O2,
1351                 .device         = PCI_DEVICE_ID_O2_SEABIRD0,
1352                 .subvendor      = PCI_ANY_ID,
1353                 .subdevice      = PCI_ANY_ID,
1354                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1355         },
1356
1357         {
1358                 .vendor         = PCI_VENDOR_ID_O2,
1359                 .device         = PCI_DEVICE_ID_O2_SEABIRD1,
1360                 .subvendor      = PCI_ANY_ID,
1361                 .subdevice      = PCI_ANY_ID,
1362                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1363         },
1364         {
1365                 .vendor         = PCI_VENDOR_ID_AMD,
1366                 .device         = PCI_ANY_ID,
1367                 .class          = PCI_CLASS_SYSTEM_SDHCI << 8,
1368                 .class_mask     = 0xFFFF00,
1369                 .subvendor      = PCI_ANY_ID,
1370                 .subdevice      = PCI_ANY_ID,
1371                 .driver_data    = (kernel_ulong_t)&sdhci_amd,
1372         },
1373         {       /* Generic SD host controller */
1374                 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
1375         },
1376
1377         { /* end: all zeroes */ },
1378 };
1379
1380 MODULE_DEVICE_TABLE(pci, pci_ids);
1381
1382 /*****************************************************************************\
1383  *                                                                           *
1384  * SDHCI core callbacks                                                      *
1385  *                                                                           *
1386 \*****************************************************************************/
1387
1388 static int sdhci_pci_enable_dma(struct sdhci_host *host)
1389 {
1390         struct sdhci_pci_slot *slot;
1391         struct pci_dev *pdev;
1392
1393         slot = sdhci_priv(host);
1394         pdev = slot->chip->pdev;
1395
1396         if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
1397                 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1398                 (host->flags & SDHCI_USE_SDMA)) {
1399                 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
1400                         "doesn't fully claim to support it.\n");
1401         }
1402
1403         pci_set_master(pdev);
1404
1405         return 0;
1406 }
1407
1408 static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
1409 {
1410         u8 ctrl;
1411
1412         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1413
1414         switch (width) {
1415         case MMC_BUS_WIDTH_8:
1416                 ctrl |= SDHCI_CTRL_8BITBUS;
1417                 ctrl &= ~SDHCI_CTRL_4BITBUS;
1418                 break;
1419         case MMC_BUS_WIDTH_4:
1420                 ctrl |= SDHCI_CTRL_4BITBUS;
1421                 ctrl &= ~SDHCI_CTRL_8BITBUS;
1422                 break;
1423         default:
1424                 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
1425                 break;
1426         }
1427
1428         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1429 }
1430
1431 static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
1432 {
1433         struct sdhci_pci_slot *slot = sdhci_priv(host);
1434         int rst_n_gpio = slot->rst_n_gpio;
1435
1436         if (!gpio_is_valid(rst_n_gpio))
1437                 return;
1438         gpio_set_value_cansleep(rst_n_gpio, 0);
1439         /* For eMMC, minimum is 1us but give it 10us for good measure */
1440         udelay(10);
1441         gpio_set_value_cansleep(rst_n_gpio, 1);
1442         /* For eMMC, minimum is 200us but give it 300us for good measure */
1443         usleep_range(300, 1000);
1444 }
1445
1446 static void sdhci_pci_hw_reset(struct sdhci_host *host)
1447 {
1448         struct sdhci_pci_slot *slot = sdhci_priv(host);
1449
1450         if (slot->hw_reset)
1451                 slot->hw_reset(host);
1452 }
1453
1454 static int sdhci_pci_select_drive_strength(struct sdhci_host *host,
1455                                            struct mmc_card *card,
1456                                            unsigned int max_dtr, int host_drv,
1457                                            int card_drv, int *drv_type)
1458 {
1459         struct sdhci_pci_slot *slot = sdhci_priv(host);
1460
1461         if (!slot->select_drive_strength)
1462                 return 0;
1463
1464         return slot->select_drive_strength(host, card, max_dtr, host_drv,
1465                                            card_drv, drv_type);
1466 }
1467
1468 static const struct sdhci_ops sdhci_pci_ops = {
1469         .set_clock      = sdhci_set_clock,
1470         .enable_dma     = sdhci_pci_enable_dma,
1471         .set_bus_width  = sdhci_pci_set_bus_width,
1472         .reset          = sdhci_reset,
1473         .set_uhs_signaling = sdhci_set_uhs_signaling,
1474         .hw_reset               = sdhci_pci_hw_reset,
1475         .select_drive_strength  = sdhci_pci_select_drive_strength,
1476 };
1477
1478 /*****************************************************************************\
1479  *                                                                           *
1480  * Suspend/resume                                                            *
1481  *                                                                           *
1482 \*****************************************************************************/
1483
1484 #ifdef CONFIG_PM_SLEEP
1485 static int sdhci_pci_suspend(struct device *dev)
1486 {
1487         struct pci_dev *pdev = to_pci_dev(dev);
1488         struct sdhci_pci_chip *chip;
1489         struct sdhci_pci_slot *slot;
1490         mmc_pm_flag_t slot_pm_flags;
1491         mmc_pm_flag_t pm_flags = 0;
1492         int i, ret;
1493
1494         chip = pci_get_drvdata(pdev);
1495         if (!chip)
1496                 return 0;
1497
1498         for (i = 0; i < chip->num_slots; i++) {
1499                 slot = chip->slots[i];
1500                 if (!slot)
1501                         continue;
1502
1503                 ret = sdhci_suspend_host(slot->host);
1504
1505                 if (ret)
1506                         goto err_pci_suspend;
1507
1508                 slot_pm_flags = slot->host->mmc->pm_flags;
1509                 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1510                         sdhci_enable_irq_wakeups(slot->host);
1511
1512                 pm_flags |= slot_pm_flags;
1513         }
1514
1515         if (chip->fixes && chip->fixes->suspend) {
1516                 ret = chip->fixes->suspend(chip);
1517                 if (ret)
1518                         goto err_pci_suspend;
1519         }
1520
1521         if (pm_flags & MMC_PM_KEEP_POWER) {
1522                 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1523                         device_init_wakeup(dev, true);
1524                 else
1525                         device_init_wakeup(dev, false);
1526         } else
1527                 device_init_wakeup(dev, false);
1528
1529         return 0;
1530
1531 err_pci_suspend:
1532         while (--i >= 0)
1533                 sdhci_resume_host(chip->slots[i]->host);
1534         return ret;
1535 }
1536
1537 static int sdhci_pci_resume(struct device *dev)
1538 {
1539         struct pci_dev *pdev = to_pci_dev(dev);
1540         struct sdhci_pci_chip *chip;
1541         struct sdhci_pci_slot *slot;
1542         int i, ret;
1543
1544         chip = pci_get_drvdata(pdev);
1545         if (!chip)
1546                 return 0;
1547
1548         if (chip->fixes && chip->fixes->resume) {
1549                 ret = chip->fixes->resume(chip);
1550                 if (ret)
1551                         return ret;
1552         }
1553
1554         for (i = 0; i < chip->num_slots; i++) {
1555                 slot = chip->slots[i];
1556                 if (!slot)
1557                         continue;
1558
1559                 ret = sdhci_resume_host(slot->host);
1560                 if (ret)
1561                         return ret;
1562         }
1563
1564         return 0;
1565 }
1566 #endif
1567
1568 #ifdef CONFIG_PM
1569 static int sdhci_pci_runtime_suspend(struct device *dev)
1570 {
1571         struct pci_dev *pdev = to_pci_dev(dev);
1572         struct sdhci_pci_chip *chip;
1573         struct sdhci_pci_slot *slot;
1574         int i, ret;
1575
1576         chip = pci_get_drvdata(pdev);
1577         if (!chip)
1578                 return 0;
1579
1580         for (i = 0; i < chip->num_slots; i++) {
1581                 slot = chip->slots[i];
1582                 if (!slot)
1583                         continue;
1584
1585                 ret = sdhci_runtime_suspend_host(slot->host);
1586
1587                 if (ret)
1588                         goto err_pci_runtime_suspend;
1589         }
1590
1591         if (chip->fixes && chip->fixes->suspend) {
1592                 ret = chip->fixes->suspend(chip);
1593                 if (ret)
1594                         goto err_pci_runtime_suspend;
1595         }
1596
1597         return 0;
1598
1599 err_pci_runtime_suspend:
1600         while (--i >= 0)
1601                 sdhci_runtime_resume_host(chip->slots[i]->host);
1602         return ret;
1603 }
1604
1605 static int sdhci_pci_runtime_resume(struct device *dev)
1606 {
1607         struct pci_dev *pdev = to_pci_dev(dev);
1608         struct sdhci_pci_chip *chip;
1609         struct sdhci_pci_slot *slot;
1610         int i, ret;
1611
1612         chip = pci_get_drvdata(pdev);
1613         if (!chip)
1614                 return 0;
1615
1616         if (chip->fixes && chip->fixes->resume) {
1617                 ret = chip->fixes->resume(chip);
1618                 if (ret)
1619                         return ret;
1620         }
1621
1622         for (i = 0; i < chip->num_slots; i++) {
1623                 slot = chip->slots[i];
1624                 if (!slot)
1625                         continue;
1626
1627                 ret = sdhci_runtime_resume_host(slot->host);
1628                 if (ret)
1629                         return ret;
1630         }
1631
1632         return 0;
1633 }
1634 #endif
1635
1636 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1637         SET_SYSTEM_SLEEP_PM_OPS(sdhci_pci_suspend, sdhci_pci_resume)
1638         SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend,
1639                         sdhci_pci_runtime_resume, NULL)
1640 };
1641
1642 /*****************************************************************************\
1643  *                                                                           *
1644  * Device probing/removal                                                    *
1645  *                                                                           *
1646 \*****************************************************************************/
1647
1648 static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1649         struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1650         int slotno)
1651 {
1652         struct sdhci_pci_slot *slot;
1653         struct sdhci_host *host;
1654         int ret, bar = first_bar + slotno;
1655
1656         if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1657                 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1658                 return ERR_PTR(-ENODEV);
1659         }
1660
1661         if (pci_resource_len(pdev, bar) < 0x100) {
1662                 dev_err(&pdev->dev, "Invalid iomem size. You may "
1663                         "experience problems.\n");
1664         }
1665
1666         if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1667                 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1668                 return ERR_PTR(-ENODEV);
1669         }
1670
1671         if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1672                 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1673                 return ERR_PTR(-ENODEV);
1674         }
1675
1676         host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1677         if (IS_ERR(host)) {
1678                 dev_err(&pdev->dev, "cannot allocate host\n");
1679                 return ERR_CAST(host);
1680         }
1681
1682         slot = sdhci_priv(host);
1683
1684         slot->chip = chip;
1685         slot->host = host;
1686         slot->rst_n_gpio = -EINVAL;
1687         slot->cd_gpio = -EINVAL;
1688         slot->cd_idx = -1;
1689
1690         /* Retrieve platform data if there is any */
1691         if (*sdhci_pci_get_data)
1692                 slot->data = sdhci_pci_get_data(pdev, slotno);
1693
1694         if (slot->data) {
1695                 if (slot->data->setup) {
1696                         ret = slot->data->setup(slot->data);
1697                         if (ret) {
1698                                 dev_err(&pdev->dev, "platform setup failed\n");
1699                                 goto free;
1700                         }
1701                 }
1702                 slot->rst_n_gpio = slot->data->rst_n_gpio;
1703                 slot->cd_gpio = slot->data->cd_gpio;
1704         }
1705
1706         host->hw_name = "PCI";
1707         host->ops = chip->fixes && chip->fixes->ops ?
1708                     chip->fixes->ops :
1709                     &sdhci_pci_ops;
1710         host->quirks = chip->quirks;
1711         host->quirks2 = chip->quirks2;
1712
1713         host->irq = pdev->irq;
1714
1715         ret = pcim_iomap_regions(pdev, BIT(bar), mmc_hostname(host->mmc));
1716         if (ret) {
1717                 dev_err(&pdev->dev, "cannot request region\n");
1718                 goto cleanup;
1719         }
1720
1721         host->ioaddr = pcim_iomap_table(pdev)[bar];
1722
1723         if (chip->fixes && chip->fixes->probe_slot) {
1724                 ret = chip->fixes->probe_slot(slot);
1725                 if (ret)
1726                         goto cleanup;
1727         }
1728
1729         if (gpio_is_valid(slot->rst_n_gpio)) {
1730                 if (!devm_gpio_request(&pdev->dev, slot->rst_n_gpio, "eMMC_reset")) {
1731                         gpio_direction_output(slot->rst_n_gpio, 1);
1732                         slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1733                         slot->hw_reset = sdhci_pci_gpio_hw_reset;
1734                 } else {
1735                         dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1736                         slot->rst_n_gpio = -EINVAL;
1737                 }
1738         }
1739
1740         host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1741         host->mmc->slotno = slotno;
1742         host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1743
1744         if (slot->cd_idx >= 0 &&
1745             mmc_gpiod_request_cd(host->mmc, slot->cd_con_id, slot->cd_idx,
1746                                  slot->cd_override_level, 0, NULL)) {
1747                 dev_warn(&pdev->dev, "failed to setup card detect gpio\n");
1748                 slot->cd_idx = -1;
1749         }
1750
1751         ret = sdhci_add_host(host);
1752         if (ret)
1753                 goto remove;
1754
1755         sdhci_pci_add_own_cd(slot);
1756
1757         /*
1758          * Check if the chip needs a separate GPIO for card detect to wake up
1759          * from runtime suspend.  If it is not there, don't allow runtime PM.
1760          * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
1761          */
1762         if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
1763             !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0)
1764                 chip->allow_runtime_pm = false;
1765
1766         return slot;
1767
1768 remove:
1769         if (chip->fixes && chip->fixes->remove_slot)
1770                 chip->fixes->remove_slot(slot, 0);
1771
1772 cleanup:
1773         if (slot->data && slot->data->cleanup)
1774                 slot->data->cleanup(slot->data);
1775
1776 free:
1777         sdhci_free_host(host);
1778
1779         return ERR_PTR(ret);
1780 }
1781
1782 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1783 {
1784         int dead;
1785         u32 scratch;
1786
1787         sdhci_pci_remove_own_cd(slot);
1788
1789         dead = 0;
1790         scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1791         if (scratch == (u32)-1)
1792                 dead = 1;
1793
1794         sdhci_remove_host(slot->host, dead);
1795
1796         if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1797                 slot->chip->fixes->remove_slot(slot, dead);
1798
1799         if (slot->data && slot->data->cleanup)
1800                 slot->data->cleanup(slot->data);
1801
1802         sdhci_free_host(slot->host);
1803 }
1804
1805 static void sdhci_pci_runtime_pm_allow(struct device *dev)
1806 {
1807         pm_suspend_ignore_children(dev, 1);
1808         pm_runtime_set_autosuspend_delay(dev, 50);
1809         pm_runtime_use_autosuspend(dev);
1810         pm_runtime_allow(dev);
1811         /* Stay active until mmc core scans for a card */
1812         pm_runtime_put_noidle(dev);
1813 }
1814
1815 static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1816 {
1817         pm_runtime_forbid(dev);
1818         pm_runtime_get_noresume(dev);
1819 }
1820
1821 static int sdhci_pci_probe(struct pci_dev *pdev,
1822                                      const struct pci_device_id *ent)
1823 {
1824         struct sdhci_pci_chip *chip;
1825         struct sdhci_pci_slot *slot;
1826
1827         u8 slots, first_bar;
1828         int ret, i;
1829
1830         BUG_ON(pdev == NULL);
1831         BUG_ON(ent == NULL);
1832
1833         dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1834                  (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1835
1836         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1837         if (ret)
1838                 return ret;
1839
1840         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1841         dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1842         if (slots == 0)
1843                 return -ENODEV;
1844
1845         BUG_ON(slots > MAX_SLOTS);
1846
1847         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1848         if (ret)
1849                 return ret;
1850
1851         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1852
1853         if (first_bar > 5) {
1854                 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1855                 return -ENODEV;
1856         }
1857
1858         ret = pcim_enable_device(pdev);
1859         if (ret)
1860                 return ret;
1861
1862         chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
1863         if (!chip)
1864                 return -ENOMEM;
1865
1866         chip->pdev = pdev;
1867         chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1868         if (chip->fixes) {
1869                 chip->quirks = chip->fixes->quirks;
1870                 chip->quirks2 = chip->fixes->quirks2;
1871                 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1872         }
1873         chip->num_slots = slots;
1874
1875         pci_set_drvdata(pdev, chip);
1876
1877         if (chip->fixes && chip->fixes->probe) {
1878                 ret = chip->fixes->probe(chip);
1879                 if (ret)
1880                         return ret;
1881         }
1882
1883         slots = chip->num_slots;        /* Quirk may have changed this */
1884
1885         for (i = 0; i < slots; i++) {
1886                 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1887                 if (IS_ERR(slot)) {
1888                         for (i--; i >= 0; i--)
1889                                 sdhci_pci_remove_slot(chip->slots[i]);
1890                         return PTR_ERR(slot);
1891                 }
1892
1893                 chip->slots[i] = slot;
1894         }
1895
1896         if (chip->allow_runtime_pm)
1897                 sdhci_pci_runtime_pm_allow(&pdev->dev);
1898
1899         return 0;
1900 }
1901
1902 static void sdhci_pci_remove(struct pci_dev *pdev)
1903 {
1904         int i;
1905         struct sdhci_pci_chip *chip = pci_get_drvdata(pdev);
1906
1907         if (chip->allow_runtime_pm)
1908                 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1909
1910         for (i = 0; i < chip->num_slots; i++)
1911                 sdhci_pci_remove_slot(chip->slots[i]);
1912 }
1913
1914 static struct pci_driver sdhci_driver = {
1915         .name =         "sdhci-pci",
1916         .id_table =     pci_ids,
1917         .probe =        sdhci_pci_probe,
1918         .remove =       sdhci_pci_remove,
1919         .driver =       {
1920                 .pm =   &sdhci_pci_pm_ops
1921         },
1922 };
1923
1924 module_pci_driver(sdhci_driver);
1925
1926 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1927 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1928 MODULE_LICENSE("GPL");