drivers/net/ethernet/amd/xgbe/xgbe-drv.c

   1 /*
   2  * AMD 10Gb Ethernet driver
   3  *
   4  * This file is available to you under your choice of the following two
   5  * licenses:
   6  *
   7  * License 1: GPLv2
   8  *
   9  * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
  10  *
  11  * This file is free software; you may copy, redistribute and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation, either version 2 of the License, or (at
  14  * your option) any later version.
  15  *
  16  * This file is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  23  *
  24  * This file incorporates work covered by the following copyright and
  25  * permission notice:
  26  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  27  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  28  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  29  *     and you.
  30  *
  31  *     The Software IS NOT an item of Licensed Software or Licensed Product
  32  *     under any End User Software License Agreement or Agreement for Licensed
  33  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  34  *     granted, free of charge, to any person obtaining a copy of this software
  35  *     annotated with this license and the Software, to deal in the Software
  36  *     without restriction, including without limitation the rights to use,
  37  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  38  *     of the Software, and to permit persons to whom the Software is furnished
  39  *     to do so, subject to the following conditions:
  40  *
  41  *     The above copyright notice and this permission notice shall be included
  42  *     in all copies or substantial portions of the Software.
  43  *
  44  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
  45  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  46  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  47  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
  48  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  49  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  50  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  51  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  52  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  53  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  54  *     THE POSSIBILITY OF SUCH DAMAGE.
  55  *
  56  *
  57  * License 2: Modified BSD
  58  *
  59  * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
  60  * All rights reserved.
  61  *
  62  * Redistribution and use in source and binary forms, with or without
  63  * modification, are permitted provided that the following conditions are met:
  64  *     * Redistributions of source code must retain the above copyright
  65  *       notice, this list of conditions and the following disclaimer.
  66  *     * Redistributions in binary form must reproduce the above copyright
  67  *       notice, this list of conditions and the following disclaimer in the
  68  *       documentation and/or other materials provided with the distribution.
  69  *     * Neither the name of Advanced Micro Devices, Inc. nor the
  70  *       names of its contributors may be used to endorse or promote products
  71  *       derived from this software without specific prior written permission.
  72  *
  73  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  74  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  75  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  76  * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
  77  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  79  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  80  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  81  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  82  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83  *
  84  * This file incorporates work covered by the following copyright and
  85  * permission notice:
  86  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  87  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  88  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  89  *     and you.
  90  *
  91  *     The Software IS NOT an item of Licensed Software or Licensed Product
  92  *     under any End User Software License Agreement or Agreement for Licensed
  93  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  94  *     granted, free of charge, to any person obtaining a copy of this software
  95  *     annotated with this license and the Software, to deal in the Software
  96  *     without restriction, including without limitation the rights to use,
  97  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  98  *     of the Software, and to permit persons to whom the Software is furnished
  99  *     to do so, subject to the following conditions:
 100  *
 101  *     The above copyright notice and this permission notice shall be included
 102  *     in all copies or substantial portions of the Software.
 103  *
 104  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
 105  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 106  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 107  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
 108  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 109  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 110  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 111  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 112  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 113  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 114  *     THE POSSIBILITY OF SUCH DAMAGE.
 115  */
 116
 117 #include <linux/module.h>
 118 #include <linux/spinlock.h>
 119 #include <linux/tcp.h>
 120 #include <linux/if_vlan.h>
 121 #include <linux/interrupt.h>
 122 #include <net/busy_poll.h>
 123 #include <linux/clk.h>
 124 #include <linux/if_ether.h>
 125 #include <linux/net_tstamp.h>
 126 #include <linux/phy.h>
 127 #include <net/vxlan.h>
 128
 129 #include "xgbe.h"
 130 #include "xgbe-common.h"
 131
 132 static unsigned int ecc_sec_info_threshold = 10;
 133 static unsigned int ecc_sec_warn_threshold = 10000;
 134 static unsigned int ecc_sec_period = 600;
 135 static unsigned int ecc_ded_threshold = 2;
 136 static unsigned int ecc_ded_period = 600;
 137
 138 #ifdef CONFIG_AMD_XGBE_HAVE_ECC
 139 /* Only expose the ECC parameters if supported */
 140 module_param(ecc_sec_info_threshold, uint, S_IWUSR | S_IRUGO);
 141 MODULE_PARM_DESC(ecc_sec_info_threshold,
 142                  " ECC corrected error informational threshold setting");
 143
 144 module_param(ecc_sec_warn_threshold, uint, S_IWUSR | S_IRUGO);
 145 MODULE_PARM_DESC(ecc_sec_warn_threshold,
 146                  " ECC corrected error warning threshold setting");
 147
 148 module_param(ecc_sec_period, uint, S_IWUSR | S_IRUGO);
 149 MODULE_PARM_DESC(ecc_sec_period, " ECC corrected error period (in seconds)");
 150
 151 module_param(ecc_ded_threshold, uint, S_IWUSR | S_IRUGO);
 152 MODULE_PARM_DESC(ecc_ded_threshold, " ECC detected error threshold setting");
 153
 154 module_param(ecc_ded_period, uint, S_IWUSR | S_IRUGO);
 155 MODULE_PARM_DESC(ecc_ded_period, " ECC detected error period (in seconds)");
 156 #endif
 157
 158 static int xgbe_one_poll(struct napi_struct *, int);
 159 static int xgbe_all_poll(struct napi_struct *, int);
 160 static void xgbe_stop(struct xgbe_prv_data *);
 161
 162 static void *xgbe_alloc_node(size_t size, int node)
 163 {
 164         void *mem;
 165
 166         mem = kzalloc_node(size, GFP_KERNEL, node);
 167         if (!mem)
 168                 mem = kzalloc(size, GFP_KERNEL);
 169
 170         return mem;
 171 }
 172
 173 static void xgbe_free_channels(struct xgbe_prv_data *pdata)
 174 {
 175         unsigned int i;
 176
 177         for (i = 0; i < ARRAY_SIZE(pdata->channel); i++) {
 178                 if (!pdata->channel[i])
 179                         continue;
 180
 181                 kfree(pdata->channel[i]->rx_ring);
 182                 kfree(pdata->channel[i]->tx_ring);
 183                 kfree(pdata->channel[i]);
 184
 185                 pdata->channel[i] = NULL;
 186         }
 187
 188         pdata->channel_count = 0;
 189 }
 190
 191 static int xgbe_alloc_channels(struct xgbe_prv_data *pdata)
 192 {
 193         struct xgbe_channel *channel;
 194         struct xgbe_ring *ring;
 195         unsigned int count, i;
 196         unsigned int cpu;
 197         int node;
 198
 199         count = max_t(unsigned int, pdata->tx_ring_count, pdata->rx_ring_count);
 200         for (i = 0; i < count; i++) {
 201                 /* Attempt to use a CPU on the node the device is on */
 202                 cpu = cpumask_local_spread(i, dev_to_node(pdata->dev));
 203
 204                 /* Set the allocation node based on the returned CPU */
 205                 node = cpu_to_node(cpu);
 206
 207                 channel = xgbe_alloc_node(sizeof(*channel), node);
 208                 if (!channel)
 209                         goto err_mem;
 210                 pdata->channel[i] = channel;
 211
 212                 snprintf(channel->name, sizeof(channel->name), "channel-%u", i);
 213                 channel->pdata = pdata;
 214                 channel->queue_index = i;
 215                 channel->dma_regs = pdata->xgmac_regs + DMA_CH_BASE +
 216                                     (DMA_CH_INC * i);
 217                 channel->node = node;
 218                 cpumask_set_cpu(cpu, &channel->affinity_mask);
 219
 220                 if (pdata->per_channel_irq)
 221                         channel->dma_irq = pdata->channel_irq[i];
 222
 223                 if (i < pdata->tx_ring_count) {
 224                         ring = xgbe_alloc_node(sizeof(*ring), node);
 225                         if (!ring)
 226                                 goto err_mem;
 227
 228                         spin_lock_init(&ring->lock);
 229                         ring->node = node;
 230
 231                         channel->tx_ring = ring;
 232                 }
 233
 234                 if (i < pdata->rx_ring_count) {
 235                         ring = xgbe_alloc_node(sizeof(*ring), node);
 236                         if (!ring)
 237                                 goto err_mem;
 238
 239                         spin_lock_init(&ring->lock);
 240                         ring->node = node;
 241
 242                         channel->rx_ring = ring;
 243                 }
 244
 245                 netif_dbg(pdata, drv, pdata->netdev,
 246                           "%s: cpu=%u, node=%d\n", channel->name, cpu, node);
 247
 248                 netif_dbg(pdata, drv, pdata->netdev,
 249                           "%s: dma_regs=%p, dma_irq=%d, tx=%p, rx=%p\n",
 250                           channel->name, channel->dma_regs, channel->dma_irq,
 251                           channel->tx_ring, channel->rx_ring);
 252         }
 253
 254         pdata->channel_count = count;
 255
 256         return 0;
 257
 258 err_mem:
 259         xgbe_free_channels(pdata);
 260
 261         return -ENOMEM;
 262 }
 263
 264 static inline unsigned int xgbe_tx_avail_desc(struct xgbe_ring *ring)
 265 {
 266         return (ring->rdesc_count - (ring->cur - ring->dirty));
 267 }
 268
 269 static inline unsigned int xgbe_rx_dirty_desc(struct xgbe_ring *ring)
 270 {
 271         return (ring->cur - ring->dirty);
 272 }
 273
 274 static int xgbe_maybe_stop_tx_queue(struct xgbe_channel *channel,
 275                                     struct xgbe_ring *ring, unsigned int count)
 276 {
 277         struct xgbe_prv_data *pdata = channel->pdata;
 278
 279         if (count > xgbe_tx_avail_desc(ring)) {
 280                 netif_info(pdata, drv, pdata->netdev,
 281                            "Tx queue stopped, not enough descriptors available\n");
 282                 netif_stop_subqueue(pdata->netdev, channel->queue_index);
 283                 ring->tx.queue_stopped = 1;
 284
 285                 /* If we haven't notified the hardware because of xmit_more
 286                  * support, tell it now
 287                  */
 288                 if (ring->tx.xmit_more)
 289                         pdata->hw_if.tx_start_xmit(channel, ring);
 290
 291                 return NETDEV_TX_BUSY;
 292         }
 293
 294         return 0;
 295 }
 296
 297 static int xgbe_calc_rx_buf_size(struct net_device *netdev, unsigned int mtu)
 298 {
 299         unsigned int rx_buf_size;
 300
 301         rx_buf_size = mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
 302         rx_buf_size = clamp_val(rx_buf_size, XGBE_RX_MIN_BUF_SIZE, PAGE_SIZE);
 303
 304         rx_buf_size = (rx_buf_size + XGBE_RX_BUF_ALIGN - 1) &
 305                       ~(XGBE_RX_BUF_ALIGN - 1);
 306
 307         return rx_buf_size;
 308 }
 309
 310 static void xgbe_enable_rx_tx_int(struct xgbe_prv_data *pdata,
 311                                   struct xgbe_channel *channel)
 312 {
 313         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 314         enum xgbe_int int_id;
 315
 316         if (channel->tx_ring && channel->rx_ring)
 317                 int_id = XGMAC_INT_DMA_CH_SR_TI_RI;
 318         else if (channel->tx_ring)
 319                 int_id = XGMAC_INT_DMA_CH_SR_TI;
 320         else if (channel->rx_ring)
 321                 int_id = XGMAC_INT_DMA_CH_SR_RI;
 322         else
 323                 return;
 324
 325         hw_if->enable_int(channel, int_id);
 326 }
 327
 328 static void xgbe_enable_rx_tx_ints(struct xgbe_prv_data *pdata)
 329 {
 330         unsigned int i;
 331
 332         for (i = 0; i < pdata->channel_count; i++)
 333                 xgbe_enable_rx_tx_int(pdata, pdata->channel[i]);
 334 }
 335
 336 static void xgbe_disable_rx_tx_int(struct xgbe_prv_data *pdata,
 337                                    struct xgbe_channel *channel)
 338 {
 339         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 340         enum xgbe_int int_id;
 341
 342         if (channel->tx_ring && channel->rx_ring)
 343                 int_id = XGMAC_INT_DMA_CH_SR_TI_RI;
 344         else if (channel->tx_ring)
 345                 int_id = XGMAC_INT_DMA_CH_SR_TI;
 346         else if (channel->rx_ring)
 347                 int_id = XGMAC_INT_DMA_CH_SR_RI;
 348         else
 349                 return;
 350
 351         hw_if->disable_int(channel, int_id);
 352 }
 353
 354 static void xgbe_disable_rx_tx_ints(struct xgbe_prv_data *pdata)
 355 {
 356         unsigned int i;
 357
 358         for (i = 0; i < pdata->channel_count; i++)
 359                 xgbe_disable_rx_tx_int(pdata, pdata->channel[i]);
 360 }
 361
 362 static bool xgbe_ecc_sec(struct xgbe_prv_data *pdata, unsigned long *period,
 363                          unsigned int *count, const char *area)
 364 {
 365         if (time_before(jiffies, *period)) {
 366                 (*count)++;
 367         } else {
 368                 *period = jiffies + (ecc_sec_period * HZ);
 369                 *count = 1;
 370         }
 371
 372         if (*count > ecc_sec_info_threshold)
 373                 dev_warn_once(pdata->dev,
 374                               "%s ECC corrected errors exceed informational threshold\n",
 375                               area);
 376
 377         if (*count > ecc_sec_warn_threshold) {
 378                 dev_warn_once(pdata->dev,
 379                               "%s ECC corrected errors exceed warning threshold\n",
 380                               area);
 381                 return true;
 382         }
 383
 384         return false;
 385 }
 386
 387 static bool xgbe_ecc_ded(struct xgbe_prv_data *pdata, unsigned long *period,
 388                          unsigned int *count, const char *area)
 389 {
 390         if (time_before(jiffies, *period)) {
 391                 (*count)++;
 392         } else {
 393                 *period = jiffies + (ecc_ded_period * HZ);
 394                 *count = 1;
 395         }
 396
 397         if (*count > ecc_ded_threshold) {
 398                 netdev_alert(pdata->netdev,
 399                              "%s ECC detected errors exceed threshold\n",
 400                              area);
 401                 return true;
 402         }
 403
 404         return false;
 405 }
 406
 407 static void xgbe_ecc_isr_task(unsigned long data)
 408 {
 409         struct xgbe_prv_data *pdata = (struct xgbe_prv_data *)data;
 410         unsigned int ecc_isr;
 411         bool stop = false;
 412
 413         /* Mask status with only the interrupts we care about */
 414         ecc_isr = XP_IOREAD(pdata, XP_ECC_ISR);
 415         ecc_isr &= XP_IOREAD(pdata, XP_ECC_IER);
 416         netif_dbg(pdata, intr, pdata->netdev, "ECC_ISR=%#010x\n", ecc_isr);
 417
 418         if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, TX_DED)) {
 419                 stop |= xgbe_ecc_ded(pdata, &pdata->tx_ded_period,
 420                                      &pdata->tx_ded_count, "TX fifo");
 421         }
 422
 423         if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, RX_DED)) {
 424                 stop |= xgbe_ecc_ded(pdata, &pdata->rx_ded_period,
 425                                      &pdata->rx_ded_count, "RX fifo");
 426         }
 427
 428         if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, DESC_DED)) {
 429                 stop |= xgbe_ecc_ded(pdata, &pdata->desc_ded_period,
 430                                      &pdata->desc_ded_count,
 431                                      "descriptor cache");
 432         }
 433
 434         if (stop) {
 435                 pdata->hw_if.disable_ecc_ded(pdata);
 436                 schedule_work(&pdata->stopdev_work);
 437                 goto out;
 438         }
 439
 440         if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, TX_SEC)) {
 441                 if (xgbe_ecc_sec(pdata, &pdata->tx_sec_period,
 442                                  &pdata->tx_sec_count, "TX fifo"))
 443                         pdata->hw_if.disable_ecc_sec(pdata, XGBE_ECC_SEC_TX);
 444         }
 445
 446         if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, RX_SEC))
 447                 if (xgbe_ecc_sec(pdata, &pdata->rx_sec_period,
 448                                  &pdata->rx_sec_count, "RX fifo"))
 449                         pdata->hw_if.disable_ecc_sec(pdata, XGBE_ECC_SEC_RX);
 450
 451         if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, DESC_SEC))
 452                 if (xgbe_ecc_sec(pdata, &pdata->desc_sec_period,
 453                                  &pdata->desc_sec_count, "descriptor cache"))
 454                         pdata->hw_if.disable_ecc_sec(pdata, XGBE_ECC_SEC_DESC);
 455
 456 out:
 457         /* Clear all ECC interrupts */
 458         XP_IOWRITE(pdata, XP_ECC_ISR, ecc_isr);
 459
 460         /* Reissue interrupt if status is not clear */
 461         if (pdata->vdata->irq_reissue_support)
 462                 XP_IOWRITE(pdata, XP_INT_REISSUE_EN, 1 << 1);
 463 }
 464
 465 static irqreturn_t xgbe_ecc_isr(int irq, void *data)
 466 {
 467         struct xgbe_prv_data *pdata = data;
 468
 469         if (pdata->isr_as_tasklet)
 470                 tasklet_schedule(&pdata->tasklet_ecc);
 471         else
 472                 xgbe_ecc_isr_task((unsigned long)pdata);
 473
 474         return IRQ_HANDLED;
 475 }
 476
 477 static void xgbe_isr_task(unsigned long data)
 478 {
 479         struct xgbe_prv_data *pdata = (struct xgbe_prv_data *)data;
 480         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 481         struct xgbe_channel *channel;
 482         unsigned int dma_isr, dma_ch_isr;
 483         unsigned int mac_isr, mac_tssr, mac_mdioisr;
 484         unsigned int i;
 485
 486         /* The DMA interrupt status register also reports MAC and MTL
 487          * interrupts. So for polling mode, we just need to check for
 488          * this register to be non-zero
 489          */
 490         dma_isr = XGMAC_IOREAD(pdata, DMA_ISR);
 491         if (!dma_isr)
 492                 goto isr_done;
 493
 494         netif_dbg(pdata, intr, pdata->netdev, "DMA_ISR=%#010x\n", dma_isr);
 495
 496         for (i = 0; i < pdata->channel_count; i++) {
 497                 if (!(dma_isr & (1 << i)))
 498                         continue;
 499
 500                 channel = pdata->channel[i];
 501
 502                 dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR);
 503                 netif_dbg(pdata, intr, pdata->netdev, "DMA_CH%u_ISR=%#010x\n",
 504                           i, dma_ch_isr);
 505
 506                 /* The TI or RI interrupt bits may still be set even if using
 507                  * per channel DMA interrupts. Check to be sure those are not
 508                  * enabled before using the private data napi structure.
 509                  */
 510                 if (!pdata->per_channel_irq &&
 511                     (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI) ||
 512                      XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI))) {
 513                         if (napi_schedule_prep(&pdata->napi)) {
 514                                 /* Disable Tx and Rx interrupts */
 515                                 xgbe_disable_rx_tx_ints(pdata);
 516
 517                                 /* Turn on polling */
 518                                 __napi_schedule(&pdata->napi);
 519                         }
 520                 } else {
 521                         /* Don't clear Rx/Tx status if doing per channel DMA
 522                          * interrupts, these will be cleared by the ISR for
 523                          * per channel DMA interrupts.
 524                          */
 525                         XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, TI, 0);
 526                         XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, RI, 0);
 527                 }
 528
 529                 if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RBU))
 530                         pdata->ext_stats.rx_buffer_unavailable++;
 531
 532                 /* Restart the device on a Fatal Bus Error */
 533                 if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE))
 534                         schedule_work(&pdata->restart_work);
 535
 536                 /* Clear interrupt signals */
 537                 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr);
 538         }
 539
 540         if (XGMAC_GET_BITS(dma_isr, DMA_ISR, MACIS)) {
 541                 mac_isr = XGMAC_IOREAD(pdata, MAC_ISR);
 542
 543                 netif_dbg(pdata, intr, pdata->netdev, "MAC_ISR=%#010x\n",
 544                           mac_isr);
 545
 546                 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCTXIS))
 547                         hw_if->tx_mmc_int(pdata);
 548
 549                 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCRXIS))
 550                         hw_if->rx_mmc_int(pdata);
 551
 552                 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, TSIS)) {
 553                         mac_tssr = XGMAC_IOREAD(pdata, MAC_TSSR);
 554
 555                         netif_dbg(pdata, intr, pdata->netdev,
 556                                   "MAC_TSSR=%#010x\n", mac_tssr);
 557
 558                         if (XGMAC_GET_BITS(mac_tssr, MAC_TSSR, TXTSC)) {
 559                                 /* Read Tx Timestamp to clear interrupt */
 560                                 pdata->tx_tstamp =
 561                                         hw_if->get_tx_tstamp(pdata);
 562                                 queue_work(pdata->dev_workqueue,
 563                                            &pdata->tx_tstamp_work);
 564                         }
 565                 }
 566
 567                 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, SMI)) {
 568                         mac_mdioisr = XGMAC_IOREAD(pdata, MAC_MDIOISR);
 569
 570                         netif_dbg(pdata, intr, pdata->netdev,
 571                                   "MAC_MDIOISR=%#010x\n", mac_mdioisr);
 572
 573                         if (XGMAC_GET_BITS(mac_mdioisr, MAC_MDIOISR,
 574                                            SNGLCOMPINT))
 575                                 complete(&pdata->mdio_complete);
 576                 }
 577         }
 578
 579 isr_done:
 580         /* If there is not a separate AN irq, handle it here */
 581         if (pdata->dev_irq == pdata->an_irq)
 582                 pdata->phy_if.an_isr(pdata);
 583
 584         /* If there is not a separate ECC irq, handle it here */
 585         if (pdata->vdata->ecc_support && (pdata->dev_irq == pdata->ecc_irq))
 586                 xgbe_ecc_isr_task((unsigned long)pdata);
 587
 588         /* If there is not a separate I2C irq, handle it here */
 589         if (pdata->vdata->i2c_support && (pdata->dev_irq == pdata->i2c_irq))
 590                 pdata->i2c_if.i2c_isr(pdata);
 591
 592         /* Reissue interrupt if status is not clear */
 593         if (pdata->vdata->irq_reissue_support) {
 594                 unsigned int reissue_mask;
 595
 596                 reissue_mask = 1 << 0;
 597                 if (!pdata->per_channel_irq)
 598                         reissue_mask |= 0xffff << 4;
 599
 600                 XP_IOWRITE(pdata, XP_INT_REISSUE_EN, reissue_mask);
 601         }
 602 }
 603
 604 static irqreturn_t xgbe_isr(int irq, void *data)
 605 {
 606         struct xgbe_prv_data *pdata = data;
 607
 608         if (pdata->isr_as_tasklet)
 609                 tasklet_schedule(&pdata->tasklet_dev);
 610         else
 611                 xgbe_isr_task((unsigned long)pdata);
 612
 613         return IRQ_HANDLED;
 614 }
 615
 616 static irqreturn_t xgbe_dma_isr(int irq, void *data)
 617 {
 618         struct xgbe_channel *channel = data;
 619         struct xgbe_prv_data *pdata = channel->pdata;
 620         unsigned int dma_status;
 621
 622         /* Per channel DMA interrupts are enabled, so we use the per
 623          * channel napi structure and not the private data napi structure
 624          */
 625         if (napi_schedule_prep(&channel->napi)) {
 626                 /* Disable Tx and Rx interrupts */
 627                 if (pdata->channel_irq_mode)
 628                         xgbe_disable_rx_tx_int(pdata, channel);
 629                 else
 630                         disable_irq_nosync(channel->dma_irq);
 631
 632                 /* Turn on polling */
 633                 __napi_schedule_irqoff(&channel->napi);
 634         }
 635
 636         /* Clear Tx/Rx signals */
 637         dma_status = 0;
 638         XGMAC_SET_BITS(dma_status, DMA_CH_SR, TI, 1);
 639         XGMAC_SET_BITS(dma_status, DMA_CH_SR, RI, 1);
 640         XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_status);
 641
 642         return IRQ_HANDLED;
 643 }
 644
 645 static void xgbe_tx_timer(unsigned long data)
 646 {
 647         struct xgbe_channel *channel = (struct xgbe_channel *)data;
 648         struct xgbe_prv_data *pdata = channel->pdata;
 649         struct napi_struct *napi;
 650
 651         DBGPR("-->xgbe_tx_timer\n");
 652
 653         napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi;
 654
 655         if (napi_schedule_prep(napi)) {
 656                 /* Disable Tx and Rx interrupts */
 657                 if (pdata->per_channel_irq)
 658                         if (pdata->channel_irq_mode)
 659                                 xgbe_disable_rx_tx_int(pdata, channel);
 660                         else
 661                                 disable_irq_nosync(channel->dma_irq);
 662                 else
 663                         xgbe_disable_rx_tx_ints(pdata);
 664
 665                 /* Turn on polling */
 666                 __napi_schedule(napi);
 667         }
 668
 669         channel->tx_timer_active = 0;
 670
 671         DBGPR("<--xgbe_tx_timer\n");
 672 }
 673
 674 static void xgbe_service(struct work_struct *work)
 675 {
 676         struct xgbe_prv_data *pdata = container_of(work,
 677                                                    struct xgbe_prv_data,
 678                                                    service_work);
 679
 680         pdata->phy_if.phy_status(pdata);
 681 }
 682
 683 static void xgbe_service_timer(unsigned long data)
 684 {
 685         struct xgbe_prv_data *pdata = (struct xgbe_prv_data *)data;
 686
 687         queue_work(pdata->dev_workqueue, &pdata->service_work);
 688
 689         mod_timer(&pdata->service_timer, jiffies + HZ);
 690 }
 691
 692 static void xgbe_init_timers(struct xgbe_prv_data *pdata)
 693 {
 694         struct xgbe_channel *channel;
 695         unsigned int i;
 696
 697         setup_timer(&pdata->service_timer, xgbe_service_timer,
 698                     (unsigned long)pdata);
 699
 700         for (i = 0; i < pdata->channel_count; i++) {
 701                 channel = pdata->channel[i];
 702                 if (!channel->tx_ring)
 703                         break;
 704
 705                 setup_timer(&channel->tx_timer, xgbe_tx_timer,
 706                             (unsigned long)channel);
 707         }
 708 }
 709
 710 static void xgbe_start_timers(struct xgbe_prv_data *pdata)
 711 {
 712         mod_timer(&pdata->service_timer, jiffies + HZ);
 713 }
 714
 715 static void xgbe_stop_timers(struct xgbe_prv_data *pdata)
 716 {
 717         struct xgbe_channel *channel;
 718         unsigned int i;
 719
 720         del_timer_sync(&pdata->service_timer);
 721
 722         for (i = 0; i < pdata->channel_count; i++) {
 723                 channel = pdata->channel[i];
 724                 if (!channel->tx_ring)
 725                         break;
 726
 727                 /* Deactivate the Tx timer */
 728                 del_timer_sync(&channel->tx_timer);
 729                 channel->tx_timer_active = 0;
 730         }
 731 }
 732
 733 void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)
 734 {
 735         unsigned int mac_hfr0, mac_hfr1, mac_hfr2;
 736         struct xgbe_hw_features *hw_feat = &pdata->hw_feat;
 737
 738         mac_hfr0 = XGMAC_IOREAD(pdata, MAC_HWF0R);
 739         mac_hfr1 = XGMAC_IOREAD(pdata, MAC_HWF1R);
 740         mac_hfr2 = XGMAC_IOREAD(pdata, MAC_HWF2R);
 741
 742         memset(hw_feat, 0, sizeof(*hw_feat));
 743
 744         hw_feat->version = XGMAC_IOREAD(pdata, MAC_VR);
 745
 746         /* Hardware feature register 0 */
 747         hw_feat->gmii        = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, GMIISEL);
 748         hw_feat->vlhash      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, VLHASH);
 749         hw_feat->sma         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SMASEL);
 750         hw_feat->rwk         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RWKSEL);
 751         hw_feat->mgk         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MGKSEL);
 752         hw_feat->mmc         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MMCSEL);
 753         hw_feat->aoe         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, ARPOFFSEL);
 754         hw_feat->ts          = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSEL);
 755         hw_feat->eee         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, EEESEL);
 756         hw_feat->tx_coe      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TXCOESEL);
 757         hw_feat->rx_coe      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RXCOESEL);
 758         hw_feat->addn_mac    = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R,
 759                                               ADDMACADRSEL);
 760         hw_feat->ts_src      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSTSSEL);
 761         hw_feat->sa_vlan_ins = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SAVLANINS);
 762         hw_feat->vxn         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, VXN);
 763
 764         /* Hardware feature register 1 */
 765         hw_feat->rx_fifo_size  = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
 766                                                 RXFIFOSIZE);
 767         hw_feat->tx_fifo_size  = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
 768                                                 TXFIFOSIZE);
 769         hw_feat->adv_ts_hi     = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, ADVTHWORD);
 770         hw_feat->dma_width     = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, ADDR64);
 771         hw_feat->dcb           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DCBEN);
 772         hw_feat->sph           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, SPHEN);
 773         hw_feat->tso           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, TSOEN);
 774         hw_feat->dma_debug     = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DBGMEMA);
 775         hw_feat->rss           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, RSSEN);
 776         hw_feat->tc_cnt        = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, NUMTC);
 777         hw_feat->hash_table_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
 778                                                   HASHTBLSZ);
 779         hw_feat->l3l4_filter_num = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
 780                                                   L3L4FNUM);
 781
 782         /* Hardware feature register 2 */
 783         hw_feat->rx_q_cnt     = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXQCNT);
 784         hw_feat->tx_q_cnt     = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXQCNT);
 785         hw_feat->rx_ch_cnt    = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXCHCNT);
 786         hw_feat->tx_ch_cnt    = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXCHCNT);
 787         hw_feat->pps_out_num  = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, PPSOUTNUM);
 788         hw_feat->aux_snap_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, AUXSNAPNUM);
 789
 790         /* Translate the Hash Table size into actual number */
 791         switch (hw_feat->hash_table_size) {
 792         case 0:
 793                 break;
 794         case 1:
 795                 hw_feat->hash_table_size = 64;
 796                 break;
 797         case 2:
 798                 hw_feat->hash_table_size = 128;
 799                 break;
 800         case 3:
 801                 hw_feat->hash_table_size = 256;
 802                 break;
 803         }
 804
 805         /* Translate the address width setting into actual number */
 806         switch (hw_feat->dma_width) {
 807         case 0:
 808                 hw_feat->dma_width = 32;
 809                 break;
 810         case 1:
 811                 hw_feat->dma_width = 40;
 812                 break;
 813         case 2:
 814                 hw_feat->dma_width = 48;
 815                 break;
 816         default:
 817                 hw_feat->dma_width = 32;
 818         }
 819
 820         /* The Queue, Channel and TC counts are zero based so increment them
 821          * to get the actual number
 822          */
 823         hw_feat->rx_q_cnt++;
 824         hw_feat->tx_q_cnt++;
 825         hw_feat->rx_ch_cnt++;
 826         hw_feat->tx_ch_cnt++;
 827         hw_feat->tc_cnt++;
 828
 829         /* Translate the fifo sizes into actual numbers */
 830         hw_feat->rx_fifo_size = 1 << (hw_feat->rx_fifo_size + 7);
 831         hw_feat->tx_fifo_size = 1 << (hw_feat->tx_fifo_size + 7);
 832
 833         if (netif_msg_probe(pdata)) {
 834                 dev_dbg(pdata->dev, "Hardware features:\n");
 835
 836                 /* Hardware feature register 0 */
 837                 dev_dbg(pdata->dev, "  1GbE support              : %s\n",
 838                         hw_feat->gmii ? "yes" : "no");
 839                 dev_dbg(pdata->dev, "  VLAN hash filter          : %s\n",
 840                         hw_feat->vlhash ? "yes" : "no");
 841                 dev_dbg(pdata->dev, "  MDIO interface            : %s\n",
 842                         hw_feat->sma ? "yes" : "no");
 843                 dev_dbg(pdata->dev, "  Wake-up packet support    : %s\n",
 844                         hw_feat->rwk ? "yes" : "no");
 845                 dev_dbg(pdata->dev, "  Magic packet support      : %s\n",
 846                         hw_feat->mgk ? "yes" : "no");
 847                 dev_dbg(pdata->dev, "  Management counters       : %s\n",
 848                         hw_feat->mmc ? "yes" : "no");
 849                 dev_dbg(pdata->dev, "  ARP offload               : %s\n",
 850                         hw_feat->aoe ? "yes" : "no");
 851                 dev_dbg(pdata->dev, "  IEEE 1588-2008 Timestamp  : %s\n",
 852                         hw_feat->ts ? "yes" : "no");
 853                 dev_dbg(pdata->dev, "  Energy Efficient Ethernet : %s\n",
 854                         hw_feat->eee ? "yes" : "no");
 855                 dev_dbg(pdata->dev, "  TX checksum offload       : %s\n",
 856                         hw_feat->tx_coe ? "yes" : "no");
 857                 dev_dbg(pdata->dev, "  RX checksum offload       : %s\n",
 858                         hw_feat->rx_coe ? "yes" : "no");
 859                 dev_dbg(pdata->dev, "  Additional MAC addresses  : %u\n",
 860                         hw_feat->addn_mac);
 861                 dev_dbg(pdata->dev, "  Timestamp source          : %s\n",
 862                         (hw_feat->ts_src == 1) ? "internal" :
 863                         (hw_feat->ts_src == 2) ? "external" :
 864                         (hw_feat->ts_src == 3) ? "internal/external" : "n/a");
 865                 dev_dbg(pdata->dev, "  SA/VLAN insertion         : %s\n",
 866                         hw_feat->sa_vlan_ins ? "yes" : "no");
 867                 dev_dbg(pdata->dev, "  VXLAN/NVGRE support       : %s\n",
 868                         hw_feat->vxn ? "yes" : "no");
 869
 870                 /* Hardware feature register 1 */
 871                 dev_dbg(pdata->dev, "  RX fifo size              : %u\n",
 872                         hw_feat->rx_fifo_size);
 873                 dev_dbg(pdata->dev, "  TX fifo size              : %u\n",
 874                         hw_feat->tx_fifo_size);
 875                 dev_dbg(pdata->dev, "  IEEE 1588 high word       : %s\n",
 876                         hw_feat->adv_ts_hi ? "yes" : "no");
 877                 dev_dbg(pdata->dev, "  DMA width                 : %u\n",
 878                         hw_feat->dma_width);
 879                 dev_dbg(pdata->dev, "  Data Center Bridging      : %s\n",
 880                         hw_feat->dcb ? "yes" : "no");
 881                 dev_dbg(pdata->dev, "  Split header              : %s\n",
 882                         hw_feat->sph ? "yes" : "no");
 883                 dev_dbg(pdata->dev, "  TCP Segmentation Offload  : %s\n",
 884                         hw_feat->tso ? "yes" : "no");
 885                 dev_dbg(pdata->dev, "  Debug memory interface    : %s\n",
 886                         hw_feat->dma_debug ? "yes" : "no");
 887                 dev_dbg(pdata->dev, "  Receive Side Scaling      : %s\n",
 888                         hw_feat->rss ? "yes" : "no");
 889                 dev_dbg(pdata->dev, "  Traffic Class count       : %u\n",
 890                         hw_feat->tc_cnt);
 891                 dev_dbg(pdata->dev, "  Hash table size           : %u\n",
 892                         hw_feat->hash_table_size);
 893                 dev_dbg(pdata->dev, "  L3/L4 Filters             : %u\n",
 894                         hw_feat->l3l4_filter_num);
 895
 896                 /* Hardware feature register 2 */
 897                 dev_dbg(pdata->dev, "  RX queue count            : %u\n",
 898                         hw_feat->rx_q_cnt);
 899                 dev_dbg(pdata->dev, "  TX queue count            : %u\n",
 900                         hw_feat->tx_q_cnt);
 901                 dev_dbg(pdata->dev, "  RX DMA channel count      : %u\n",
 902                         hw_feat->rx_ch_cnt);
 903                 dev_dbg(pdata->dev, "  TX DMA channel count      : %u\n",
 904                         hw_feat->rx_ch_cnt);
 905                 dev_dbg(pdata->dev, "  PPS outputs               : %u\n",
 906                         hw_feat->pps_out_num);
 907                 dev_dbg(pdata->dev, "  Auxiliary snapshot inputs : %u\n",
 908                         hw_feat->aux_snap_num);
 909         }
 910 }
 911
 912 static void xgbe_disable_vxlan_offloads(struct xgbe_prv_data *pdata)
 913 {
 914         struct net_device *netdev = pdata->netdev;
 915
 916         if (!pdata->vxlan_offloads_set)
 917                 return;
 918
 919         netdev_info(netdev, "disabling VXLAN offloads\n");
 920
 921         netdev->hw_enc_features &= ~(NETIF_F_SG |
 922                                      NETIF_F_IP_CSUM |
 923                                      NETIF_F_IPV6_CSUM |
 924                                      NETIF_F_RXCSUM |
 925                                      NETIF_F_TSO |
 926                                      NETIF_F_TSO6 |
 927                                      NETIF_F_GRO |
 928                                      NETIF_F_GSO_UDP_TUNNEL |
 929                                      NETIF_F_GSO_UDP_TUNNEL_CSUM);
 930
 931         netdev->features &= ~(NETIF_F_GSO_UDP_TUNNEL |
 932                               NETIF_F_GSO_UDP_TUNNEL_CSUM);
 933
 934         pdata->vxlan_offloads_set = 0;
 935 }
 936
 937 static void xgbe_disable_vxlan_hw(struct xgbe_prv_data *pdata)
 938 {
 939         if (!pdata->vxlan_port_set)
 940                 return;
 941
 942         pdata->hw_if.disable_vxlan(pdata);
 943
 944         pdata->vxlan_port_set = 0;
 945         pdata->vxlan_port = 0;
 946 }
 947
 948 static void xgbe_disable_vxlan_accel(struct xgbe_prv_data *pdata)
 949 {
 950         xgbe_disable_vxlan_offloads(pdata);
 951
 952         xgbe_disable_vxlan_hw(pdata);
 953 }
 954
 955 static void xgbe_enable_vxlan_offloads(struct xgbe_prv_data *pdata)
 956 {
 957         struct net_device *netdev = pdata->netdev;
 958
 959         if (pdata->vxlan_offloads_set)
 960                 return;
 961
 962         netdev_info(netdev, "enabling VXLAN offloads\n");
 963
 964         netdev->hw_enc_features |= NETIF_F_SG |
 965                                    NETIF_F_IP_CSUM |
 966                                    NETIF_F_IPV6_CSUM |
 967                                    NETIF_F_RXCSUM |
 968                                    NETIF_F_TSO |
 969                                    NETIF_F_TSO6 |
 970                                    NETIF_F_GRO |
 971                                    pdata->vxlan_features;
 972
 973         netdev->features |= pdata->vxlan_features;
 974
 975         pdata->vxlan_offloads_set = 1;
 976 }
 977
 978 static void xgbe_enable_vxlan_hw(struct xgbe_prv_data *pdata)
 979 {
 980         struct xgbe_vxlan_data *vdata;
 981
 982         if (pdata->vxlan_port_set)
 983                 return;
 984
 985         if (list_empty(&pdata->vxlan_ports))
 986                 return;
 987
 988         vdata = list_first_entry(&pdata->vxlan_ports,
 989                                  struct xgbe_vxlan_data, list);
 990
 991         pdata->vxlan_port_set = 1;
 992         pdata->vxlan_port = be16_to_cpu(vdata->port);
 993
 994         pdata->hw_if.enable_vxlan(pdata);
 995 }
 996
 997 static void xgbe_enable_vxlan_accel(struct xgbe_prv_data *pdata)
 998 {
 999         /* VXLAN acceleration desired? */
1000         if (!pdata->vxlan_features)
1001                 return;
1002
1003         /* VXLAN acceleration possible? */
1004         if (pdata->vxlan_force_disable)
1005                 return;
1006
1007         xgbe_enable_vxlan_hw(pdata);
1008
1009         xgbe_enable_vxlan_offloads(pdata);
1010 }
1011
1012 static void xgbe_reset_vxlan_accel(struct xgbe_prv_data *pdata)
1013 {
1014         xgbe_disable_vxlan_hw(pdata);
1015
1016         if (pdata->vxlan_features)
1017                 xgbe_enable_vxlan_offloads(pdata);
1018
1019         pdata->vxlan_force_disable = 0;
1020 }
1021
1022 static void xgbe_napi_enable(struct xgbe_prv_data *pdata, unsigned int add)
1023 {
1024         struct xgbe_channel *channel;
1025         unsigned int i;
1026
1027         if (pdata->per_channel_irq) {
1028                 for (i = 0; i < pdata->channel_count; i++) {
1029                         channel = pdata->channel[i];
1030                         if (add)
1031                                 netif_napi_add(pdata->netdev, &channel->napi,
1032                                                xgbe_one_poll, NAPI_POLL_WEIGHT);
1033
1034                         napi_enable(&channel->napi);
1035                 }
1036         } else {
1037                 if (add)
1038                         netif_napi_add(pdata->netdev, &pdata->napi,
1039                                        xgbe_all_poll, NAPI_POLL_WEIGHT);
1040
1041                 napi_enable(&pdata->napi);
1042         }
1043 }
1044
1045 static void xgbe_napi_disable(struct xgbe_prv_data *pdata, unsigned int del)
1046 {
1047         struct xgbe_channel *channel;
1048         unsigned int i;
1049
1050         if (pdata->per_channel_irq) {
1051                 for (i = 0; i < pdata->channel_count; i++) {
1052                         channel = pdata->channel[i];
1053                         napi_disable(&channel->napi);
1054
1055                         if (del)
1056                                 netif_napi_del(&channel->napi);
1057                 }
1058         } else {
1059                 napi_disable(&pdata->napi);
1060
1061                 if (del)
1062                         netif_napi_del(&pdata->napi);
1063         }
1064 }
1065
1066 static int xgbe_request_irqs(struct xgbe_prv_data *pdata)
1067 {
1068         struct xgbe_channel *channel;
1069         struct net_device *netdev = pdata->netdev;
1070         unsigned int i;
1071         int ret;
1072
1073         tasklet_init(&pdata->tasklet_dev, xgbe_isr_task, (unsigned long)pdata);
1074         tasklet_init(&pdata->tasklet_ecc, xgbe_ecc_isr_task,
1075                      (unsigned long)pdata);
1076
1077         ret = devm_request_irq(pdata->dev, pdata->dev_irq, xgbe_isr, 0,
1078                                netdev_name(netdev), pdata);
1079         if (ret) {
1080                 netdev_alert(netdev, "error requesting irq %d\n",
1081                              pdata->dev_irq);
1082                 return ret;
1083         }
1084
1085         if (pdata->vdata->ecc_support && (pdata->dev_irq != pdata->ecc_irq)) {
1086                 ret = devm_request_irq(pdata->dev, pdata->ecc_irq, xgbe_ecc_isr,
1087                                        0, pdata->ecc_name, pdata);
1088                 if (ret) {
1089                         netdev_alert(netdev, "error requesting ecc irq %d\n",
1090                                      pdata->ecc_irq);
1091                         goto err_dev_irq;
1092                 }
1093         }
1094
1095         if (!pdata->per_channel_irq)
1096                 return 0;
1097
1098         for (i = 0; i < pdata->channel_count; i++) {
1099                 channel = pdata->channel[i];
1100                 snprintf(channel->dma_irq_name,
1101                          sizeof(channel->dma_irq_name) - 1,
1102                          "%s-TxRx-%u", netdev_name(netdev),
1103                          channel->queue_index);
1104
1105                 ret = devm_request_irq(pdata->dev, channel->dma_irq,
1106                                        xgbe_dma_isr, 0,
1107                                        channel->dma_irq_name, channel);
1108                 if (ret) {
1109                         netdev_alert(netdev, "error requesting irq %d\n",
1110                                      channel->dma_irq);
1111                         goto err_dma_irq;
1112                 }
1113
1114                 irq_set_affinity_hint(channel->dma_irq,
1115                                       &channel->affinity_mask);
1116         }
1117
1118         return 0;
1119
1120 err_dma_irq:
1121         /* Using an unsigned int, 'i' will go to UINT_MAX and exit */
1122         for (i--; i < pdata->channel_count; i--) {
1123                 channel = pdata->channel[i];
1124
1125                 irq_set_affinity_hint(channel->dma_irq, NULL);
1126                 devm_free_irq(pdata->dev, channel->dma_irq, channel);
1127         }
1128
1129         if (pdata->vdata->ecc_support && (pdata->dev_irq != pdata->ecc_irq))
1130                 devm_free_irq(pdata->dev, pdata->ecc_irq, pdata);
1131
1132 err_dev_irq:
1133         devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
1134
1135         return ret;
1136 }
1137
1138 static void xgbe_free_irqs(struct xgbe_prv_data *pdata)
1139 {
1140         struct xgbe_channel *channel;
1141         unsigned int i;
1142
1143         devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
1144
1145         if (pdata->vdata->ecc_support && (pdata->dev_irq != pdata->ecc_irq))
1146                 devm_free_irq(pdata->dev, pdata->ecc_irq, pdata);
1147
1148         if (!pdata->per_channel_irq)
1149                 return;
1150
1151         for (i = 0; i < pdata->channel_count; i++) {
1152                 channel = pdata->channel[i];
1153
1154                 irq_set_affinity_hint(channel->dma_irq, NULL);
1155                 devm_free_irq(pdata->dev, channel->dma_irq, channel);
1156         }
1157 }
1158
1159 void xgbe_init_tx_coalesce(struct xgbe_prv_data *pdata)
1160 {
1161         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1162
1163         DBGPR("-->xgbe_init_tx_coalesce\n");
1164
1165         pdata->tx_usecs = XGMAC_INIT_DMA_TX_USECS;
1166         pdata->tx_frames = XGMAC_INIT_DMA_TX_FRAMES;
1167
1168         hw_if->config_tx_coalesce(pdata);
1169
1170         DBGPR("<--xgbe_init_tx_coalesce\n");
1171 }
1172
1173 void xgbe_init_rx_coalesce(struct xgbe_prv_data *pdata)
1174 {
1175         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1176
1177         DBGPR("-->xgbe_init_rx_coalesce\n");
1178
1179         pdata->rx_riwt = hw_if->usec_to_riwt(pdata, XGMAC_INIT_DMA_RX_USECS);
1180         pdata->rx_usecs = XGMAC_INIT_DMA_RX_USECS;
1181         pdata->rx_frames = XGMAC_INIT_DMA_RX_FRAMES;
1182
1183         hw_if->config_rx_coalesce(pdata);
1184
1185         DBGPR("<--xgbe_init_rx_coalesce\n");
1186 }
1187
1188 static void xgbe_free_tx_data(struct xgbe_prv_data *pdata)
1189 {
1190         struct xgbe_desc_if *desc_if = &pdata->desc_if;
1191         struct xgbe_ring *ring;
1192         struct xgbe_ring_data *rdata;
1193         unsigned int i, j;
1194
1195         DBGPR("-->xgbe_free_tx_data\n");
1196
1197         for (i = 0; i < pdata->channel_count; i++) {
1198                 ring = pdata->channel[i]->tx_ring;
1199                 if (!ring)
1200                         break;
1201
1202                 for (j = 0; j < ring->rdesc_count; j++) {
1203                         rdata = XGBE_GET_DESC_DATA(ring, j);
1204                         desc_if->unmap_rdata(pdata, rdata);
1205                 }
1206         }
1207
1208         DBGPR("<--xgbe_free_tx_data\n");
1209 }
1210
1211 static void xgbe_free_rx_data(struct xgbe_prv_data *pdata)
1212 {
1213         struct xgbe_desc_if *desc_if = &pdata->desc_if;
1214         struct xgbe_ring *ring;
1215         struct xgbe_ring_data *rdata;
1216         unsigned int i, j;
1217
1218         DBGPR("-->xgbe_free_rx_data\n");
1219
1220         for (i = 0; i < pdata->channel_count; i++) {
1221                 ring = pdata->channel[i]->rx_ring;
1222                 if (!ring)
1223                         break;
1224
1225                 for (j = 0; j < ring->rdesc_count; j++) {
1226                         rdata = XGBE_GET_DESC_DATA(ring, j);
1227                         desc_if->unmap_rdata(pdata, rdata);
1228                 }
1229         }
1230
1231         DBGPR("<--xgbe_free_rx_data\n");
1232 }
1233
1234 static int xgbe_phy_reset(struct xgbe_prv_data *pdata)
1235 {
1236         pdata->phy_link = -1;
1237         pdata->phy_speed = SPEED_UNKNOWN;
1238
1239         return pdata->phy_if.phy_reset(pdata);
1240 }
1241
1242 int xgbe_powerdown(struct net_device *netdev, unsigned int caller)
1243 {
1244         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1245         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1246         unsigned long flags;
1247
1248         DBGPR("-->xgbe_powerdown\n");
1249
1250         if (!netif_running(netdev) ||
1251             (caller == XGMAC_IOCTL_CONTEXT && pdata->power_down)) {
1252                 netdev_alert(netdev, "Device is already powered down\n");
1253                 DBGPR("<--xgbe_powerdown\n");
1254                 return -EINVAL;
1255         }
1256
1257         spin_lock_irqsave(&pdata->lock, flags);
1258
1259         if (caller == XGMAC_DRIVER_CONTEXT)
1260                 netif_device_detach(netdev);
1261
1262         netif_tx_stop_all_queues(netdev);
1263
1264         xgbe_stop_timers(pdata);
1265         flush_workqueue(pdata->dev_workqueue);
1266
1267         hw_if->powerdown_tx(pdata);
1268         hw_if->powerdown_rx(pdata);
1269
1270         xgbe_napi_disable(pdata, 0);
1271
1272         pdata->power_down = 1;
1273
1274         spin_unlock_irqrestore(&pdata->lock, flags);
1275
1276         DBGPR("<--xgbe_powerdown\n");
1277
1278         return 0;
1279 }
1280
1281 int xgbe_powerup(struct net_device *netdev, unsigned int caller)
1282 {
1283         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1284         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1285         unsigned long flags;
1286
1287         DBGPR("-->xgbe_powerup\n");
1288
1289         if (!netif_running(netdev) ||
1290             (caller == XGMAC_IOCTL_CONTEXT && !pdata->power_down)) {
1291                 netdev_alert(netdev, "Device is already powered up\n");
1292                 DBGPR("<--xgbe_powerup\n");
1293                 return -EINVAL;
1294         }
1295
1296         spin_lock_irqsave(&pdata->lock, flags);
1297
1298         pdata->power_down = 0;
1299
1300         xgbe_napi_enable(pdata, 0);
1301
1302         hw_if->powerup_tx(pdata);
1303         hw_if->powerup_rx(pdata);
1304
1305         if (caller == XGMAC_DRIVER_CONTEXT)
1306                 netif_device_attach(netdev);
1307
1308         netif_tx_start_all_queues(netdev);
1309
1310         xgbe_start_timers(pdata);
1311
1312         spin_unlock_irqrestore(&pdata->lock, flags);
1313
1314         DBGPR("<--xgbe_powerup\n");
1315
1316         return 0;
1317 }
1318
1319 static int xgbe_start(struct xgbe_prv_data *pdata)
1320 {
1321         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1322         struct xgbe_phy_if *phy_if = &pdata->phy_if;
1323         struct net_device *netdev = pdata->netdev;
1324         int ret;
1325
1326         DBGPR("-->xgbe_start\n");
1327
1328         ret = hw_if->init(pdata);
1329         if (ret)
1330                 return ret;
1331
1332         xgbe_napi_enable(pdata, 1);
1333
1334         ret = xgbe_request_irqs(pdata);
1335         if (ret)
1336                 goto err_napi;
1337
1338         ret = phy_if->phy_start(pdata);
1339         if (ret)
1340                 goto err_irqs;
1341
1342         hw_if->enable_tx(pdata);
1343         hw_if->enable_rx(pdata);
1344
1345         udp_tunnel_get_rx_info(netdev);
1346
1347         netif_tx_start_all_queues(netdev);
1348
1349         xgbe_start_timers(pdata);
1350         queue_work(pdata->dev_workqueue, &pdata->service_work);
1351
1352         clear_bit(XGBE_STOPPED, &pdata->dev_state);
1353
1354         DBGPR("<--xgbe_start\n");
1355
1356         return 0;
1357
1358 err_irqs:
1359         xgbe_free_irqs(pdata);
1360
1361 err_napi:
1362         xgbe_napi_disable(pdata, 1);
1363
1364         hw_if->exit(pdata);
1365
1366         return ret;
1367 }
1368
1369 static void xgbe_stop(struct xgbe_prv_data *pdata)
1370 {
1371         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1372         struct xgbe_phy_if *phy_if = &pdata->phy_if;
1373         struct xgbe_channel *channel;
1374         struct net_device *netdev = pdata->netdev;
1375         struct netdev_queue *txq;
1376         unsigned int i;
1377
1378         DBGPR("-->xgbe_stop\n");
1379
1380         if (test_bit(XGBE_STOPPED, &pdata->dev_state))
1381                 return;
1382
1383         netif_tx_stop_all_queues(netdev);
1384
1385         xgbe_stop_timers(pdata);
1386         flush_workqueue(pdata->dev_workqueue);
1387
1388         xgbe_reset_vxlan_accel(pdata);
1389
1390         hw_if->disable_tx(pdata);
1391         hw_if->disable_rx(pdata);
1392
1393         phy_if->phy_stop(pdata);
1394
1395         xgbe_free_irqs(pdata);
1396
1397         xgbe_napi_disable(pdata, 1);
1398
1399         hw_if->exit(pdata);
1400
1401         for (i = 0; i < pdata->channel_count; i++) {
1402                 channel = pdata->channel[i];
1403                 if (!channel->tx_ring)
1404                         continue;
1405
1406                 txq = netdev_get_tx_queue(netdev, channel->queue_index);
1407                 netdev_tx_reset_queue(txq);
1408         }
1409
1410         set_bit(XGBE_STOPPED, &pdata->dev_state);
1411
1412         DBGPR("<--xgbe_stop\n");
1413 }
1414
1415 static void xgbe_stopdev(struct work_struct *work)
1416 {
1417         struct xgbe_prv_data *pdata = container_of(work,
1418                                                    struct xgbe_prv_data,
1419                                                    stopdev_work);
1420
1421         rtnl_lock();
1422
1423         xgbe_stop(pdata);
1424
1425         xgbe_free_tx_data(pdata);
1426         xgbe_free_rx_data(pdata);
1427
1428         rtnl_unlock();
1429
1430         netdev_alert(pdata->netdev, "device stopped\n");
1431 }
1432
1433 static void xgbe_restart_dev(struct xgbe_prv_data *pdata)
1434 {
1435         DBGPR("-->xgbe_restart_dev\n");
1436
1437         /* If not running, "restart" will happen on open */
1438         if (!netif_running(pdata->netdev))
1439                 return;
1440
1441         xgbe_stop(pdata);
1442
1443         xgbe_free_tx_data(pdata);
1444         xgbe_free_rx_data(pdata);
1445
1446         xgbe_start(pdata);
1447
1448         DBGPR("<--xgbe_restart_dev\n");
1449 }
1450
1451 static void xgbe_restart(struct work_struct *work)
1452 {
1453         struct xgbe_prv_data *pdata = container_of(work,
1454                                                    struct xgbe_prv_data,
1455                                                    restart_work);
1456
1457         rtnl_lock();
1458
1459         xgbe_restart_dev(pdata);
1460
1461         rtnl_unlock();
1462 }
1463
1464 static void xgbe_tx_tstamp(struct work_struct *work)
1465 {
1466         struct xgbe_prv_data *pdata = container_of(work,
1467                                                    struct xgbe_prv_data,
1468                                                    tx_tstamp_work);
1469         struct skb_shared_hwtstamps hwtstamps;
1470         u64 nsec;
1471         unsigned long flags;
1472
1473         spin_lock_irqsave(&pdata->tstamp_lock, flags);
1474         if (!pdata->tx_tstamp_skb)
1475                 goto unlock;
1476
1477         if (pdata->tx_tstamp) {
1478                 nsec = timecounter_cyc2time(&pdata->tstamp_tc,
1479                                             pdata->tx_tstamp);
1480
1481                 memset(&hwtstamps, 0, sizeof(hwtstamps));
1482                 hwtstamps.hwtstamp = ns_to_ktime(nsec);
1483                 skb_tstamp_tx(pdata->tx_tstamp_skb, &hwtstamps);
1484         }
1485
1486         dev_kfree_skb_any(pdata->tx_tstamp_skb);
1487
1488         pdata->tx_tstamp_skb = NULL;
1489
1490 unlock:
1491         spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
1492 }
1493
1494 static int xgbe_get_hwtstamp_settings(struct xgbe_prv_data *pdata,
1495                                       struct ifreq *ifreq)
1496 {
1497         if (copy_to_user(ifreq->ifr_data, &pdata->tstamp_config,
1498                          sizeof(pdata->tstamp_config)))
1499                 return -EFAULT;
1500
1501         return 0;
1502 }
1503
1504 static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata,
1505                                       struct ifreq *ifreq)
1506 {
1507         struct hwtstamp_config config;
1508         unsigned int mac_tscr;
1509
1510         if (copy_from_user(&config, ifreq->ifr_data, sizeof(config)))
1511                 return -EFAULT;
1512
1513         if (config.flags)
1514                 return -EINVAL;
1515
1516         mac_tscr = 0;
1517
1518         switch (config.tx_type) {
1519         case HWTSTAMP_TX_OFF:
1520                 break;
1521
1522         case HWTSTAMP_TX_ON:
1523                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1524                 break;
1525
1526         default:
1527                 return -ERANGE;
1528         }
1529
1530         switch (config.rx_filter) {
1531         case HWTSTAMP_FILTER_NONE:
1532                 break;
1533
1534         case HWTSTAMP_FILTER_NTP_ALL:
1535         case HWTSTAMP_FILTER_ALL:
1536                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1);
1537                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1538                 break;
1539
1540         /* PTP v2, UDP, any kind of event packet */
1541         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1542                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1543         /* PTP v1, UDP, any kind of event packet */
1544         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1545                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1546                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1547                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
1548                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1549                 break;
1550
1551         /* PTP v2, UDP, Sync packet */
1552         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1553                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1554         /* PTP v1, UDP, Sync packet */
1555         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1556                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1557                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1558                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1559                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1560                 break;
1561
1562         /* PTP v2, UDP, Delay_req packet */
1563         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1564                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1565         /* PTP v1, UDP, Delay_req packet */
1566         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1567                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1568                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1569                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1570                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
1571                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1572                 break;
1573
1574         /* 802.AS1, Ethernet, any kind of event packet */
1575         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1576                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
1577                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
1578                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1579                 break;
1580
1581         /* 802.AS1, Ethernet, Sync packet */
1582         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1583                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
1584                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1585                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1586                 break;
1587
1588         /* 802.AS1, Ethernet, Delay_req packet */
1589         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1590                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
1591                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
1592                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1593                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1594                 break;
1595
1596         /* PTP v2/802.AS1, any layer, any kind of event packet */
1597         case HWTSTAMP_FILTER_PTP_V2_EVENT:
1598                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1599                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
1600                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1601                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1602                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
1603                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1604                 break;
1605
1606         /* PTP v2/802.AS1, any layer, Sync packet */
1607         case HWTSTAMP_FILTER_PTP_V2_SYNC:
1608                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1609                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
1610                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1611                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1612                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1613                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1614                 break;
1615
1616         /* PTP v2/802.AS1, any layer, Delay_req packet */
1617         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1618                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1619                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
1620                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1621                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1622                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
1623                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1624                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1625                 break;
1626
1627         default:
1628                 return -ERANGE;
1629         }
1630
1631         pdata->hw_if.config_tstamp(pdata, mac_tscr);
1632
1633         memcpy(&pdata->tstamp_config, &config, sizeof(config));
1634
1635         return 0;
1636 }
1637
1638 static void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata,
1639                                 struct sk_buff *skb,
1640                                 struct xgbe_packet_data *packet)
1641 {
1642         unsigned long flags;
1643
1644         if (XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP)) {
1645                 spin_lock_irqsave(&pdata->tstamp_lock, flags);
1646                 if (pdata->tx_tstamp_skb) {
1647                         /* Another timestamp in progress, ignore this one */
1648                         XGMAC_SET_BITS(packet->attributes,
1649                                        TX_PACKET_ATTRIBUTES, PTP, 0);
1650                 } else {
1651                         pdata->tx_tstamp_skb = skb_get(skb);
1652                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1653                 }
1654                 spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
1655         }
1656
1657         skb_tx_timestamp(skb);
1658 }
1659
1660 static void xgbe_prep_vlan(struct sk_buff *skb, struct xgbe_packet_data *packet)
1661 {
1662         if (skb_vlan_tag_present(skb))
1663                 packet->vlan_ctag = skb_vlan_tag_get(skb);
1664 }
1665
1666 static int xgbe_prep_tso(struct sk_buff *skb, struct xgbe_packet_data *packet)
1667 {
1668         int ret;
1669
1670         if (!XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1671                             TSO_ENABLE))
1672                 return 0;
1673
1674         ret = skb_cow_head(skb, 0);
1675         if (ret)
1676                 return ret;
1677
1678         if (XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, VXLAN)) {
1679                 packet->header_len = skb_inner_transport_offset(skb) +
1680                                      inner_tcp_hdrlen(skb);
1681                 packet->tcp_header_len = inner_tcp_hdrlen(skb);
1682         } else {
1683                 packet->header_len = skb_transport_offset(skb) +
1684                                      tcp_hdrlen(skb);
1685                 packet->tcp_header_len = tcp_hdrlen(skb);
1686         }
1687         packet->tcp_payload_len = skb->len - packet->header_len;
1688         packet->mss = skb_shinfo(skb)->gso_size;
1689
1690         DBGPR("  packet->header_len=%u\n", packet->header_len);
1691         DBGPR("  packet->tcp_header_len=%u, packet->tcp_payload_len=%u\n",
1692               packet->tcp_header_len, packet->tcp_payload_len);
1693         DBGPR("  packet->mss=%u\n", packet->mss);
1694
1695         /* Update the number of packets that will ultimately be transmitted
1696          * along with the extra bytes for each extra packet
1697          */
1698         packet->tx_packets = skb_shinfo(skb)->gso_segs;
1699         packet->tx_bytes += (packet->tx_packets - 1) * packet->header_len;
1700
1701         return 0;
1702 }
1703
1704 static bool xgbe_is_vxlan(struct xgbe_prv_data *pdata, struct sk_buff *skb)
1705 {
1706         struct xgbe_vxlan_data *vdata;
1707
1708         if (pdata->vxlan_force_disable)
1709                 return false;
1710
1711         if (!skb->encapsulation)
1712                 return false;
1713
1714         if (skb->ip_summed != CHECKSUM_PARTIAL)
1715                 return false;
1716
1717         switch (skb->protocol) {
1718         case htons(ETH_P_IP):
1719                 if (ip_hdr(skb)->protocol != IPPROTO_UDP)
1720                         return false;
1721                 break;
1722
1723         case htons(ETH_P_IPV6):
1724                 if (ipv6_hdr(skb)->nexthdr != IPPROTO_UDP)
1725                         return false;
1726                 break;
1727
1728         default:
1729                 return false;
1730         }
1731
1732         /* See if we have the UDP port in our list */
1733         list_for_each_entry(vdata, &pdata->vxlan_ports, list) {
1734                 if ((skb->protocol == htons(ETH_P_IP)) &&
1735                     (vdata->sa_family == AF_INET) &&
1736                     (vdata->port == udp_hdr(skb)->dest))
1737                         return true;
1738                 else if ((skb->protocol == htons(ETH_P_IPV6)) &&
1739                          (vdata->sa_family == AF_INET6) &&
1740                          (vdata->port == udp_hdr(skb)->dest))
1741                         return true;
1742         }
1743
1744         return false;
1745 }
1746
1747 static int xgbe_is_tso(struct sk_buff *skb)
1748 {
1749         if (skb->ip_summed != CHECKSUM_PARTIAL)
1750                 return 0;
1751
1752         if (!skb_is_gso(skb))
1753                 return 0;
1754
1755         DBGPR("  TSO packet to be processed\n");
1756
1757         return 1;
1758 }
1759
1760 static void xgbe_packet_info(struct xgbe_prv_data *pdata,
1761                              struct xgbe_ring *ring, struct sk_buff *skb,
1762                              struct xgbe_packet_data *packet)
1763 {
1764         struct skb_frag_struct *frag;
1765         unsigned int context_desc;
1766         unsigned int len;
1767         unsigned int i;
1768
1769         packet->skb = skb;
1770
1771         context_desc = 0;
1772         packet->rdesc_count = 0;
1773
1774         packet->tx_packets = 1;
1775         packet->tx_bytes = skb->len;
1776
1777         if (xgbe_is_tso(skb)) {
1778                 /* TSO requires an extra descriptor if mss is different */
1779                 if (skb_shinfo(skb)->gso_size != ring->tx.cur_mss) {
1780                         context_desc = 1;
1781                         packet->rdesc_count++;
1782                 }
1783
1784                 /* TSO requires an extra descriptor for TSO header */
1785                 packet->rdesc_count++;
1786
1787                 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1788                                TSO_ENABLE, 1);
1789                 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1790                                CSUM_ENABLE, 1);
1791         } else if (skb->ip_summed == CHECKSUM_PARTIAL)
1792                 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1793                                CSUM_ENABLE, 1);
1794
1795         if (xgbe_is_vxlan(pdata, skb))
1796                 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1797                                VXLAN, 1);
1798
1799         if (skb_vlan_tag_present(skb)) {
1800                 /* VLAN requires an extra descriptor if tag is different */
1801                 if (skb_vlan_tag_get(skb) != ring->tx.cur_vlan_ctag)
1802                         /* We can share with the TSO context descriptor */
1803                         if (!context_desc) {
1804                                 context_desc = 1;
1805                                 packet->rdesc_count++;
1806                         }
1807
1808                 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1809                                VLAN_CTAG, 1);
1810         }
1811
1812         if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
1813             (pdata->tstamp_config.tx_type == HWTSTAMP_TX_ON))
1814                 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1815                                PTP, 1);
1816
1817         for (len = skb_headlen(skb); len;) {
1818                 packet->rdesc_count++;
1819                 len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE);
1820         }
1821
1822         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1823                 frag = &skb_shinfo(skb)->frags[i];
1824                 for (len = skb_frag_size(frag); len; ) {
1825                         packet->rdesc_count++;
1826                         len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE);
1827                 }
1828         }
1829 }
1830
1831 static int xgbe_open(struct net_device *netdev)
1832 {
1833         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1834         struct xgbe_desc_if *desc_if = &pdata->desc_if;
1835         int ret;
1836
1837         DBGPR("-->xgbe_open\n");
1838
1839         /* Create the various names based on netdev name */
1840         snprintf(pdata->an_name, sizeof(pdata->an_name) - 1, "%s-pcs",
1841                  netdev_name(netdev));
1842
1843         snprintf(pdata->ecc_name, sizeof(pdata->ecc_name) - 1, "%s-ecc",
1844                  netdev_name(netdev));
1845
1846         snprintf(pdata->i2c_name, sizeof(pdata->i2c_name) - 1, "%s-i2c",
1847                  netdev_name(netdev));
1848
1849         /* Create workqueues */
1850         pdata->dev_workqueue =
1851                 create_singlethread_workqueue(netdev_name(netdev));
1852         if (!pdata->dev_workqueue) {
1853                 netdev_err(netdev, "device workqueue creation failed\n");
1854                 return -ENOMEM;
1855         }
1856
1857         pdata->an_workqueue =
1858                 create_singlethread_workqueue(pdata->an_name);
1859         if (!pdata->an_workqueue) {
1860                 netdev_err(netdev, "phy workqueue creation failed\n");
1861                 ret = -ENOMEM;
1862                 goto err_dev_wq;
1863         }
1864
1865         /* Reset the phy settings */
1866         ret = xgbe_phy_reset(pdata);
1867         if (ret)
1868                 goto err_an_wq;
1869
1870         /* Enable the clocks */
1871         ret = clk_prepare_enable(pdata->sysclk);
1872         if (ret) {
1873                 netdev_alert(netdev, "dma clk_prepare_enable failed\n");
1874                 goto err_an_wq;
1875         }
1876
1877         ret = clk_prepare_enable(pdata->ptpclk);
1878         if (ret) {
1879                 netdev_alert(netdev, "ptp clk_prepare_enable failed\n");
1880                 goto err_sysclk;
1881         }
1882
1883         /* Calculate the Rx buffer size before allocating rings */
1884         ret = xgbe_calc_rx_buf_size(netdev, netdev->mtu);
1885         if (ret < 0)
1886                 goto err_ptpclk;
1887         pdata->rx_buf_size = ret;
1888
1889         /* Allocate the channel and ring structures */
1890         ret = xgbe_alloc_channels(pdata);
1891         if (ret)
1892                 goto err_ptpclk;
1893
1894         /* Allocate the ring descriptors and buffers */
1895         ret = desc_if->alloc_ring_resources(pdata);
1896         if (ret)
1897                 goto err_channels;
1898
1899         INIT_WORK(&pdata->service_work, xgbe_service);
1900         INIT_WORK(&pdata->restart_work, xgbe_restart);
1901         INIT_WORK(&pdata->stopdev_work, xgbe_stopdev);
1902         INIT_WORK(&pdata->tx_tstamp_work, xgbe_tx_tstamp);
1903         xgbe_init_timers(pdata);
1904
1905         ret = xgbe_start(pdata);
1906         if (ret)
1907                 goto err_rings;
1908
1909         clear_bit(XGBE_DOWN, &pdata->dev_state);
1910
1911         DBGPR("<--xgbe_open\n");
1912
1913         return 0;
1914
1915 err_rings:
1916         desc_if->free_ring_resources(pdata);
1917
1918 err_channels:
1919         xgbe_free_channels(pdata);
1920
1921 err_ptpclk:
1922         clk_disable_unprepare(pdata->ptpclk);
1923
1924 err_sysclk:
1925         clk_disable_unprepare(pdata->sysclk);
1926
1927 err_an_wq:
1928         destroy_workqueue(pdata->an_workqueue);
1929
1930 err_dev_wq:
1931         destroy_workqueue(pdata->dev_workqueue);
1932
1933         return ret;
1934 }
1935
1936 static int xgbe_close(struct net_device *netdev)
1937 {
1938         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1939         struct xgbe_desc_if *desc_if = &pdata->desc_if;
1940
1941         DBGPR("-->xgbe_close\n");
1942
1943         /* Stop the device */
1944         xgbe_stop(pdata);
1945
1946         /* Free the ring descriptors and buffers */
1947         desc_if->free_ring_resources(pdata);
1948
1949         /* Free the channel and ring structures */
1950         xgbe_free_channels(pdata);
1951
1952         /* Disable the clocks */
1953         clk_disable_unprepare(pdata->ptpclk);
1954         clk_disable_unprepare(pdata->sysclk);
1955
1956         flush_workqueue(pdata->an_workqueue);
1957         destroy_workqueue(pdata->an_workqueue);
1958
1959         flush_workqueue(pdata->dev_workqueue);
1960         destroy_workqueue(pdata->dev_workqueue);
1961
1962         set_bit(XGBE_DOWN, &pdata->dev_state);
1963
1964         DBGPR("<--xgbe_close\n");
1965
1966         return 0;
1967 }
1968
1969 static netdev_tx_t xgbe_xmit(struct sk_buff *skb, struct net_device *netdev)
1970 {
1971         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1972         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1973         struct xgbe_desc_if *desc_if = &pdata->desc_if;
1974         struct xgbe_channel *channel;
1975         struct xgbe_ring *ring;
1976         struct xgbe_packet_data *packet;
1977         struct netdev_queue *txq;
1978         netdev_tx_t ret;
1979
1980         DBGPR("-->xgbe_xmit: skb->len = %d\n", skb->len);
1981
1982         channel = pdata->channel[skb->queue_mapping];
1983         txq = netdev_get_tx_queue(netdev, channel->queue_index);
1984         ring = channel->tx_ring;
1985         packet = &ring->packet_data;
1986
1987         ret = NETDEV_TX_OK;
1988
1989         if (skb->len == 0) {
1990                 netif_err(pdata, tx_err, netdev,
1991                           "empty skb received from stack\n");
1992                 dev_kfree_skb_any(skb);
1993                 goto tx_netdev_return;
1994         }
1995
1996         /* Calculate preliminary packet info */
1997         memset(packet, 0, sizeof(*packet));
1998         xgbe_packet_info(pdata, ring, skb, packet);
1999
2000         /* Check that there are enough descriptors available */
2001         ret = xgbe_maybe_stop_tx_queue(channel, ring, packet->rdesc_count);
2002         if (ret)
2003                 goto tx_netdev_return;
2004
2005         ret = xgbe_prep_tso(skb, packet);
2006         if (ret) {
2007                 netif_err(pdata, tx_err, netdev,
2008                           "error processing TSO packet\n");
2009                 dev_kfree_skb_any(skb);
2010                 goto tx_netdev_return;
2011         }
2012         xgbe_prep_vlan(skb, packet);
2013
2014         if (!desc_if->map_tx_skb(channel, skb)) {
2015                 dev_kfree_skb_any(skb);
2016                 goto tx_netdev_return;
2017         }
2018
2019         xgbe_prep_tx_tstamp(pdata, skb, packet);
2020
2021         /* Report on the actual number of bytes (to be) sent */
2022         netdev_tx_sent_queue(txq, packet->tx_bytes);
2023
2024         /* Configure required descriptor fields for transmission */
2025         hw_if->dev_xmit(channel);
2026
2027         if (netif_msg_pktdata(pdata))
2028                 xgbe_print_pkt(netdev, skb, true);
2029
2030         /* Stop the queue in advance if there may not be enough descriptors */
2031         xgbe_maybe_stop_tx_queue(channel, ring, XGBE_TX_MAX_DESCS);
2032
2033         ret = NETDEV_TX_OK;
2034
2035 tx_netdev_return:
2036         return ret;
2037 }
2038
2039 static void xgbe_set_rx_mode(struct net_device *netdev)
2040 {
2041         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2042         struct xgbe_hw_if *hw_if = &pdata->hw_if;
2043
2044         DBGPR("-->xgbe_set_rx_mode\n");
2045
2046         hw_if->config_rx_mode(pdata);
2047
2048         DBGPR("<--xgbe_set_rx_mode\n");
2049 }
2050
2051 static int xgbe_set_mac_address(struct net_device *netdev, void *addr)
2052 {
2053         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2054         struct xgbe_hw_if *hw_if = &pdata->hw_if;
2055         struct sockaddr *saddr = addr;
2056
2057         DBGPR("-->xgbe_set_mac_address\n");
2058
2059         if (!is_valid_ether_addr(saddr->sa_data))
2060                 return -EADDRNOTAVAIL;
2061
2062         memcpy(netdev->dev_addr, saddr->sa_data, netdev->addr_len);
2063
2064         hw_if->set_mac_address(pdata, netdev->dev_addr);
2065
2066         DBGPR("<--xgbe_set_mac_address\n");
2067
2068         return 0;
2069 }
2070
2071 static int xgbe_ioctl(struct net_device *netdev, struct ifreq *ifreq, int cmd)
2072 {
2073         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2074         int ret;
2075
2076         switch (cmd) {
2077         case SIOCGHWTSTAMP:
2078                 ret = xgbe_get_hwtstamp_settings(pdata, ifreq);
2079                 break;
2080
2081         case SIOCSHWTSTAMP:
2082                 ret = xgbe_set_hwtstamp_settings(pdata, ifreq);
2083                 break;
2084
2085         default:
2086                 ret = -EOPNOTSUPP;
2087         }
2088
2089         return ret;
2090 }
2091
2092 static int xgbe_change_mtu(struct net_device *netdev, int mtu)
2093 {
2094         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2095         int ret;
2096
2097         DBGPR("-->xgbe_change_mtu\n");
2098
2099         ret = xgbe_calc_rx_buf_size(netdev, mtu);
2100         if (ret < 0)
2101                 return ret;
2102
2103         pdata->rx_buf_size = ret;
2104         netdev->mtu = mtu;
2105
2106         xgbe_restart_dev(pdata);
2107
2108         DBGPR("<--xgbe_change_mtu\n");
2109
2110         return 0;
2111 }
2112
2113 static void xgbe_tx_timeout(struct net_device *netdev)
2114 {
2115         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2116
2117         netdev_warn(netdev, "tx timeout, device restarting\n");
2118         schedule_work(&pdata->restart_work);
2119 }
2120
2121 static void xgbe_get_stats64(struct net_device *netdev,
2122                              struct rtnl_link_stats64 *s)
2123 {
2124         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2125         struct xgbe_mmc_stats *pstats = &pdata->mmc_stats;
2126
2127         DBGPR("-->%s\n", __func__);
2128
2129         pdata->hw_if.read_mmc_stats(pdata);
2130
2131         s->rx_packets = pstats->rxframecount_gb;
2132         s->rx_bytes = pstats->rxoctetcount_gb;
2133         s->rx_errors = pstats->rxframecount_gb -
2134                        pstats->rxbroadcastframes_g -
2135                        pstats->rxmulticastframes_g -
2136                        pstats->rxunicastframes_g;
2137         s->multicast = pstats->rxmulticastframes_g;
2138         s->rx_length_errors = pstats->rxlengtherror;
2139         s->rx_crc_errors = pstats->rxcrcerror;
2140         s->rx_fifo_errors = pstats->rxfifooverflow;
2141
2142         s->tx_packets = pstats->txframecount_gb;
2143         s->tx_bytes = pstats->txoctetcount_gb;
2144         s->tx_errors = pstats->txframecount_gb - pstats->txframecount_g;
2145         s->tx_dropped = netdev->stats.tx_dropped;
2146
2147         DBGPR("<--%s\n", __func__);
2148 }
2149
2150 static int xgbe_vlan_rx_add_vid(struct net_device *netdev, __be16 proto,
2151                                 u16 vid)
2152 {
2153         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2154         struct xgbe_hw_if *hw_if = &pdata->hw_if;
2155
2156         DBGPR("-->%s\n", __func__);
2157
2158         set_bit(vid, pdata->active_vlans);
2159         hw_if->update_vlan_hash_table(pdata);
2160
2161         DBGPR("<--%s\n", __func__);
2162
2163         return 0;
2164 }
2165
2166 static int xgbe_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto,
2167                                  u16 vid)
2168 {
2169         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2170         struct xgbe_hw_if *hw_if = &pdata->hw_if;
2171
2172         DBGPR("-->%s\n", __func__);
2173
2174         clear_bit(vid, pdata->active_vlans);
2175         hw_if->update_vlan_hash_table(pdata);
2176
2177         DBGPR("<--%s\n", __func__);
2178
2179         return 0;
2180 }
2181
2182 #ifdef CONFIG_NET_POLL_CONTROLLER
2183 static void xgbe_poll_controller(struct net_device *netdev)
2184 {
2185         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2186         struct xgbe_channel *channel;
2187         unsigned int i;
2188
2189         DBGPR("-->xgbe_poll_controller\n");
2190
2191         if (pdata->per_channel_irq) {
2192                 for (i = 0; i < pdata->channel_count; i++) {
2193                         channel = pdata->channel[i];
2194                         xgbe_dma_isr(channel->dma_irq, channel);
2195                 }
2196         } else {
2197                 disable_irq(pdata->dev_irq);
2198                 xgbe_isr(pdata->dev_irq, pdata);
2199                 enable_irq(pdata->dev_irq);
2200         }
2201
2202         DBGPR("<--xgbe_poll_controller\n");
2203 }
2204 #endif /* End CONFIG_NET_POLL_CONTROLLER */
2205
2206 static int xgbe_setup_tc(struct net_device *netdev, enum tc_setup_type type,
2207                          void *type_data)
2208 {
2209         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2210         struct tc_mqprio_qopt *mqprio = type_data;
2211         u8 tc;
2212
2213         if (type != TC_SETUP_MQPRIO)
2214                 return -EOPNOTSUPP;
2215
2216         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
2217         tc = mqprio->num_tc;
2218
2219         if (tc > pdata->hw_feat.tc_cnt)
2220                 return -EINVAL;
2221
2222         pdata->num_tcs = tc;
2223         pdata->hw_if.config_tc(pdata);
2224
2225         return 0;
2226 }
2227
2228 static netdev_features_t xgbe_fix_features(struct net_device *netdev,
2229                                            netdev_features_t features)
2230 {
2231         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2232         netdev_features_t vxlan_base, vxlan_mask;
2233
2234         vxlan_base = NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RX_UDP_TUNNEL_PORT;
2235         vxlan_mask = vxlan_base | NETIF_F_GSO_UDP_TUNNEL_CSUM;
2236
2237         pdata->vxlan_features = features & vxlan_mask;
2238
2239         /* Only fix VXLAN-related features */
2240         if (!pdata->vxlan_features)
2241                 return features;
2242
2243         /* If VXLAN isn't supported then clear any features:
2244          *   This is needed because NETIF_F_RX_UDP_TUNNEL_PORT gets
2245          *   automatically set if ndo_udp_tunnel_add is set.
2246          */
2247         if (!pdata->hw_feat.vxn)
2248                 return features & ~vxlan_mask;
2249
2250         /* VXLAN CSUM requires VXLAN base */
2251         if ((features & NETIF_F_GSO_UDP_TUNNEL_CSUM) &&
2252             !(features & NETIF_F_GSO_UDP_TUNNEL)) {
2253                 netdev_notice(netdev,
2254                               "forcing tx udp tunnel support\n");
2255                 features |= NETIF_F_GSO_UDP_TUNNEL;
2256         }
2257
2258         /* Can't do one without doing the other */
2259         if ((features & vxlan_base) != vxlan_base) {
2260                 netdev_notice(netdev,
2261                               "forcing both tx and rx udp tunnel support\n");
2262                 features |= vxlan_base;
2263         }
2264
2265         if (features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) {
2266                 if (!(features & NETIF_F_GSO_UDP_TUNNEL_CSUM)) {
2267                         netdev_notice(netdev,
2268                                       "forcing tx udp tunnel checksumming on\n");
2269                         features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
2270                 }
2271         } else {
2272                 if (features & NETIF_F_GSO_UDP_TUNNEL_CSUM) {
2273                         netdev_notice(netdev,
2274                                       "forcing tx udp tunnel checksumming off\n");
2275                         features &= ~NETIF_F_GSO_UDP_TUNNEL_CSUM;
2276                 }
2277         }
2278
2279         pdata->vxlan_features = features & vxlan_mask;
2280
2281         /* Adjust UDP Tunnel based on current state */
2282         if (pdata->vxlan_force_disable) {
2283                 netdev_notice(netdev,
2284                               "VXLAN acceleration disabled, turning off udp tunnel features\n");
2285                 features &= ~vxlan_mask;
2286         }
2287
2288         return features;
2289 }
2290
2291 static int xgbe_set_features(struct net_device *netdev,
2292                              netdev_features_t features)
2293 {
2294         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2295         struct xgbe_hw_if *hw_if = &pdata->hw_if;
2296         netdev_features_t rxhash, rxcsum, rxvlan, rxvlan_filter;
2297         netdev_features_t udp_tunnel;
2298         int ret = 0;
2299
2300         rxhash = pdata->netdev_features & NETIF_F_RXHASH;
2301         rxcsum = pdata->netdev_features & NETIF_F_RXCSUM;
2302         rxvlan = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_RX;
2303         rxvlan_filter = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_FILTER;
2304         udp_tunnel = pdata->netdev_features & NETIF_F_GSO_UDP_TUNNEL;
2305
2306         if ((features & NETIF_F_RXHASH) && !rxhash)
2307                 ret = hw_if->enable_rss(pdata);
2308         else if (!(features & NETIF_F_RXHASH) && rxhash)
2309                 ret = hw_if->disable_rss(pdata);
2310         if (ret)
2311                 return ret;
2312
2313         if ((features & NETIF_F_RXCSUM) && !rxcsum)
2314                 hw_if->enable_rx_csum(pdata);
2315         else if (!(features & NETIF_F_RXCSUM) && rxcsum)
2316                 hw_if->disable_rx_csum(pdata);
2317
2318         if ((features & NETIF_F_HW_VLAN_CTAG_RX) && !rxvlan)
2319                 hw_if->enable_rx_vlan_stripping(pdata);
2320         else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) && rxvlan)
2321                 hw_if->disable_rx_vlan_stripping(pdata);
2322
2323         if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && !rxvlan_filter)
2324                 hw_if->enable_rx_vlan_filtering(pdata);
2325         else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && rxvlan_filter)
2326                 hw_if->disable_rx_vlan_filtering(pdata);
2327
2328         if ((features & NETIF_F_GSO_UDP_TUNNEL) && !udp_tunnel)
2329                 xgbe_enable_vxlan_accel(pdata);
2330         else if (!(features & NETIF_F_GSO_UDP_TUNNEL) && udp_tunnel)
2331                 xgbe_disable_vxlan_accel(pdata);
2332
2333         pdata->netdev_features = features;
2334
2335         DBGPR("<--xgbe_set_features\n");
2336
2337         return 0;
2338 }
2339
2340 static void xgbe_udp_tunnel_add(struct net_device *netdev,
2341                                 struct udp_tunnel_info *ti)
2342 {
2343         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2344         struct xgbe_vxlan_data *vdata;
2345
2346         if (!pdata->hw_feat.vxn)
2347                 return;
2348
2349         if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
2350                 return;
2351
2352         pdata->vxlan_port_count++;
2353
2354         netif_dbg(pdata, drv, netdev,
2355                   "adding VXLAN tunnel, family=%hx/port=%hx\n",
2356                   ti->sa_family, be16_to_cpu(ti->port));
2357
2358         if (pdata->vxlan_force_disable)
2359                 return;
2360
2361         vdata = kzalloc(sizeof(*vdata), GFP_ATOMIC);
2362         if (!vdata) {
2363                 /* Can no longer properly track VXLAN ports */
2364                 pdata->vxlan_force_disable = 1;
2365                 netif_dbg(pdata, drv, netdev,
2366                           "internal error, disabling VXLAN accelerations\n");
2367
2368                 xgbe_disable_vxlan_accel(pdata);
2369
2370                 return;
2371         }
2372         vdata->sa_family = ti->sa_family;
2373         vdata->port = ti->port;
2374
2375         list_add_tail(&vdata->list, &pdata->vxlan_ports);
2376
2377         /* First port added? */
2378         if (pdata->vxlan_port_count == 1) {
2379                 xgbe_enable_vxlan_accel(pdata);
2380
2381                 return;
2382         }
2383 }
2384
2385 static void xgbe_udp_tunnel_del(struct net_device *netdev,
2386                                 struct udp_tunnel_info *ti)
2387 {
2388         struct xgbe_prv_data *pdata = netdev_priv(netdev);
2389         struct xgbe_vxlan_data *vdata;
2390
2391         if (!pdata->hw_feat.vxn)
2392                 return;
2393
2394         if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
2395                 return;
2396
2397         netif_dbg(pdata, drv, netdev,
2398                   "deleting VXLAN tunnel, family=%hx/port=%hx\n",
2399                   ti->sa_family, be16_to_cpu(ti->port));
2400
2401         /* Don't need safe version since loop terminates with deletion */
2402         list_for_each_entry(vdata, &pdata->vxlan_ports, list) {
2403                 if (vdata->sa_family != ti->sa_family)
2404                         continue;
2405
2406                 if (vdata->port != ti->port)
2407                         continue;
2408
2409                 list_del(&vdata->list);
2410                 kfree(vdata);
2411
2412                 break;
2413         }
2414
2415         pdata->vxlan_port_count--;
2416         if (!pdata->vxlan_port_count) {
2417                 xgbe_reset_vxlan_accel(pdata);
2418
2419                 return;
2420         }
2421
2422         if (pdata->vxlan_force_disable)
2423                 return;
2424
2425         /* See if VXLAN tunnel id needs to be changed */
2426         vdata = list_first_entry(&pdata->vxlan_ports,
2427                                  struct xgbe_vxlan_data, list);
2428         if (pdata->vxlan_port == be16_to_cpu(vdata->port))
2429                 return;
2430
2431         pdata->vxlan_port = be16_to_cpu(vdata->port);
2432         pdata->hw_if.set_vxlan_id(pdata);
2433 }
2434
2435 static netdev_features_t xgbe_features_check(struct sk_buff *skb,
2436                                              struct net_device *netdev,
2437                                              netdev_features_t features)
2438 {
2439         features = vlan_features_check(skb, features);
2440         features = vxlan_features_check(skb, features);
2441
2442         return features;
2443 }
2444
2445 static const struct net_device_ops xgbe_netdev_ops = {
2446         .ndo_open               = xgbe_open,
2447         .ndo_stop               = xgbe_close,
2448         .ndo_start_xmit         = xgbe_xmit,
2449         .ndo_set_rx_mode        = xgbe_set_rx_mode,
2450         .ndo_set_mac_address    = xgbe_set_mac_address,
2451         .ndo_validate_addr      = eth_validate_addr,
2452         .ndo_do_ioctl           = xgbe_ioctl,
2453         .ndo_change_mtu         = xgbe_change_mtu,
2454         .ndo_tx_timeout         = xgbe_tx_timeout,
2455         .ndo_get_stats64        = xgbe_get_stats64,
2456         .ndo_vlan_rx_add_vid    = xgbe_vlan_rx_add_vid,
2457         .ndo_vlan_rx_kill_vid   = xgbe_vlan_rx_kill_vid,
2458 #ifdef CONFIG_NET_POLL_CONTROLLER
2459         .ndo_poll_controller    = xgbe_poll_controller,
2460 #endif
2461         .ndo_setup_tc           = xgbe_setup_tc,
2462         .ndo_fix_features       = xgbe_fix_features,
2463         .ndo_set_features       = xgbe_set_features,
2464         .ndo_udp_tunnel_add     = xgbe_udp_tunnel_add,
2465         .ndo_udp_tunnel_del     = xgbe_udp_tunnel_del,
2466         .ndo_features_check     = xgbe_features_check,
2467 };
2468
2469 const struct net_device_ops *xgbe_get_netdev_ops(void)
2470 {
2471         return &xgbe_netdev_ops;
2472 }
2473
2474 static void xgbe_rx_refresh(struct xgbe_channel *channel)
2475 {
2476         struct xgbe_prv_data *pdata = channel->pdata;
2477         struct xgbe_hw_if *hw_if = &pdata->hw_if;
2478         struct xgbe_desc_if *desc_if = &pdata->desc_if;
2479         struct xgbe_ring *ring = channel->rx_ring;
2480         struct xgbe_ring_data *rdata;
2481
2482         while (ring->dirty != ring->cur) {
2483                 rdata = XGBE_GET_DESC_DATA(ring, ring->dirty);
2484
2485                 /* Reset rdata values */
2486                 desc_if->unmap_rdata(pdata, rdata);
2487
2488                 if (desc_if->map_rx_buffer(pdata, ring, rdata))
2489                         break;
2490
2491                 hw_if->rx_desc_reset(pdata, rdata, ring->dirty);
2492
2493                 ring->dirty++;
2494         }
2495
2496         /* Make sure everything is written before the register write */
2497         wmb();
2498
2499         /* Update the Rx Tail Pointer Register with address of
2500          * the last cleaned entry */
2501         rdata = XGBE_GET_DESC_DATA(ring, ring->dirty - 1);
2502         XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO,
2503                           lower_32_bits(rdata->rdesc_dma));
2504 }
2505
2506 static struct sk_buff *xgbe_create_skb(struct xgbe_prv_data *pdata,
2507                                        struct napi_struct *napi,
2508                                        struct xgbe_ring_data *rdata,
2509                                        unsigned int len)
2510 {
2511         struct sk_buff *skb;
2512         u8 *packet;
2513
2514         skb = napi_alloc_skb(napi, rdata->rx.hdr.dma_len);
2515         if (!skb)
2516                 return NULL;
2517
2518         /* Pull in the header buffer which may contain just the header
2519          * or the header plus data
2520          */
2521         dma_sync_single_range_for_cpu(pdata->dev, rdata->rx.hdr.dma_base,
2522                                       rdata->rx.hdr.dma_off,
2523                                       rdata->rx.hdr.dma_len, DMA_FROM_DEVICE);
2524
2525         packet = page_address(rdata->rx.hdr.pa.pages) +
2526                  rdata->rx.hdr.pa.pages_offset;
2527         skb_copy_to_linear_data(skb, packet, len);
2528         skb_put(skb, len);
2529
2530         return skb;
2531 }
2532
2533 static unsigned int xgbe_rx_buf1_len(struct xgbe_ring_data *rdata,
2534                                      struct xgbe_packet_data *packet)
2535 {
2536         /* Always zero if not the first descriptor */
2537         if (!XGMAC_GET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, FIRST))
2538                 return 0;
2539
2540         /* First descriptor with split header, return header length */
2541         if (rdata->rx.hdr_len)
2542                 return rdata->rx.hdr_len;
2543
2544         /* First descriptor but not the last descriptor and no split header,
2545          * so the full buffer was used
2546          */
2547         if (!XGMAC_GET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, LAST))
2548                 return rdata->rx.hdr.dma_len;
2549
2550         /* First descriptor and last descriptor and no split header, so
2551          * calculate how much of the buffer was used
2552          */
2553         return min_t(unsigned int, rdata->rx.hdr.dma_len, rdata->rx.len);
2554 }
2555
2556 static unsigned int xgbe_rx_buf2_len(struct xgbe_ring_data *rdata,
2557                                      struct xgbe_packet_data *packet,
2558                                      unsigned int len)
2559 {
2560         /* Always the full buffer if not the last descriptor */
2561         if (!XGMAC_GET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, LAST))
2562                 return rdata->rx.buf.dma_len;
2563
2564         /* Last descriptor so calculate how much of the buffer was used
2565          * for the last bit of data
2566          */
2567         return rdata->rx.len - len;
2568 }
2569
2570 static int xgbe_tx_poll(struct xgbe_channel *channel)
2571 {
2572         struct xgbe_prv_data *pdata = channel->pdata;
2573         struct xgbe_hw_if *hw_if = &pdata->hw_if;
2574         struct xgbe_desc_if *desc_if = &pdata->desc_if;
2575         struct xgbe_ring *ring = channel->tx_ring;
2576         struct xgbe_ring_data *rdata;
2577         struct xgbe_ring_desc *rdesc;
2578         struct net_device *netdev = pdata->netdev;
2579         struct netdev_queue *txq;
2580         int processed = 0;
2581         unsigned int tx_packets = 0, tx_bytes = 0;
2582         unsigned int cur;
2583
2584         DBGPR("-->xgbe_tx_poll\n");
2585
2586         /* Nothing to do if there isn't a Tx ring for this channel */
2587         if (!ring)
2588                 return 0;
2589
2590         cur = ring->cur;
2591
2592         /* Be sure we get ring->cur before accessing descriptor data */
2593         smp_rmb();
2594
2595         txq = netdev_get_tx_queue(netdev, channel->queue_index);
2596
2597         while ((processed < XGBE_TX_DESC_MAX_PROC) &&
2598                (ring->dirty != cur)) {
2599                 rdata = XGBE_GET_DESC_DATA(ring, ring->dirty);
2600                 rdesc = rdata->rdesc;
2601
2602                 if (!hw_if->tx_complete(rdesc))
2603                         break;
2604
2605                 /* Make sure descriptor fields are read after reading the OWN
2606                  * bit */
2607                 dma_rmb();
2608
2609                 if (netif_msg_tx_done(pdata))
2610                         xgbe_dump_tx_desc(pdata, ring, ring->dirty, 1, 0);
2611
2612                 if (hw_if->is_last_desc(rdesc)) {
2613                         tx_packets += rdata->tx.packets;
2614                         tx_bytes += rdata->tx.bytes;
2615                 }
2616
2617                 /* Free the SKB and reset the descriptor for re-use */
2618                 desc_if->unmap_rdata(pdata, rdata);
2619                 hw_if->tx_desc_reset(rdata);
2620
2621                 processed++;
2622                 ring->dirty++;
2623         }
2624
2625         if (!processed)
2626                 return 0;
2627
2628         netdev_tx_completed_queue(txq, tx_packets, tx_bytes);
2629
2630         if ((ring->tx.queue_stopped == 1) &&
2631             (xgbe_tx_avail_desc(ring) > XGBE_TX_DESC_MIN_FREE)) {
2632                 ring->tx.queue_stopped = 0;
2633                 netif_tx_wake_queue(txq);
2634         }
2635
2636         DBGPR("<--xgbe_tx_poll: processed=%d\n", processed);
2637
2638         return processed;
2639 }
2640
2641 static int xgbe_rx_poll(struct xgbe_channel *channel, int budget)
2642 {
2643         struct xgbe_prv_data *pdata = channel->pdata;
2644         struct xgbe_hw_if *hw_if = &pdata->hw_if;
2645         struct xgbe_ring *ring = channel->rx_ring;
2646         struct xgbe_ring_data *rdata;
2647         struct xgbe_packet_data *packet;
2648         struct net_device *netdev = pdata->netdev;
2649         struct napi_struct *napi;
2650         struct sk_buff *skb;
2651         struct skb_shared_hwtstamps *hwtstamps;
2652         unsigned int last, error, context_next, context;
2653         unsigned int len, buf1_len, buf2_len, max_len;
2654         unsigned int received = 0;
2655         int packet_count = 0;
2656
2657         DBGPR("-->xgbe_rx_poll: budget=%d\n", budget);
2658
2659         /* Nothing to do if there isn't a Rx ring for this channel */
2660         if (!ring)
2661                 return 0;
2662
2663         last = 0;
2664         context_next = 0;
2665
2666         napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi;
2667
2668         rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
2669         packet = &ring->packet_data;
2670         while (packet_count < budget) {
2671                 DBGPR("  cur = %d\n", ring->cur);
2672
2673                 /* First time in loop see if we need to restore state */
2674                 if (!received && rdata->state_saved) {
2675                         skb = rdata->state.skb;
2676                         error = rdata->state.error;
2677                         len = rdata->state.len;
2678                 } else {
2679                         memset(packet, 0, sizeof(*packet));
2680                         skb = NULL;
2681                         error = 0;
2682                         len = 0;
2683                 }
2684
2685 read_again:
2686                 rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
2687
2688                 if (xgbe_rx_dirty_desc(ring) > (XGBE_RX_DESC_CNT >> 3))
2689                         xgbe_rx_refresh(channel);
2690
2691                 if (hw_if->dev_read(channel))
2692                         break;
2693
2694                 received++;
2695                 ring->cur++;
2696
2697                 last = XGMAC_GET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,
2698                                       LAST);
2699                 context_next = XGMAC_GET_BITS(packet->attributes,
2700                                               RX_PACKET_ATTRIBUTES,
2701                                               CONTEXT_NEXT);
2702                 context = XGMAC_GET_BITS(packet->attributes,
2703                                          RX_PACKET_ATTRIBUTES,
2704                                          CONTEXT);
2705
2706                 /* Earlier error, just drain the remaining data */
2707                 if ((!last || context_next) && error)
2708                         goto read_again;
2709
2710                 if (error || packet->errors) {
2711                         if (packet->errors)
2712                                 netif_err(pdata, rx_err, netdev,
2713                                           "error in received packet\n");
2714                         dev_kfree_skb(skb);
2715                         goto next_packet;
2716                 }
2717
2718                 if (!context) {
2719                         /* Get the data length in the descriptor buffers */
2720                         buf1_len = xgbe_rx_buf1_len(rdata, packet);
2721                         len += buf1_len;
2722                         buf2_len = xgbe_rx_buf2_len(rdata, packet, len);
2723                         len += buf2_len;
2724
2725                         if (buf2_len > rdata->rx.buf.dma_len) {
2726                                 /* Hardware inconsistency within the descriptors
2727                                  * that has resulted in a length underflow.
2728                                  */
2729                                 error = 1;
2730                                 goto skip_data;
2731                         }
2732
2733                         if (!skb) {
2734                                 skb = xgbe_create_skb(pdata, napi, rdata,
2735                                                       buf1_len);
2736                                 if (!skb) {
2737                                         error = 1;
2738                                         goto skip_data;
2739                                 }
2740                         }
2741
2742                         if (buf2_len) {
2743                                 dma_sync_single_range_for_cpu(pdata->dev,
2744                                                         rdata->rx.buf.dma_base,
2745                                                         rdata->rx.buf.dma_off,
2746                                                         rdata->rx.buf.dma_len,
2747                                                         DMA_FROM_DEVICE);
2748
2749                                 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
2750                                                 rdata->rx.buf.pa.pages,
2751                                                 rdata->rx.buf.pa.pages_offset,
2752                                                 buf2_len,
2753                                                 rdata->rx.buf.dma_len);
2754                                 rdata->rx.buf.pa.pages = NULL;
2755                         }
2756                 }
2757
2758 skip_data:
2759                 if (!last || context_next)
2760                         goto read_again;
2761
2762                 if (!skb || error) {
2763                         dev_kfree_skb(skb);
2764                         goto next_packet;
2765                 }
2766
2767                 /* Be sure we don't exceed the configured MTU */
2768                 max_len = netdev->mtu + ETH_HLEN;
2769                 if (!(netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
2770                     (skb->protocol == htons(ETH_P_8021Q)))
2771                         max_len += VLAN_HLEN;
2772
2773                 if (skb->len > max_len) {
2774                         netif_err(pdata, rx_err, netdev,
2775                                   "packet length exceeds configured MTU\n");
2776                         dev_kfree_skb(skb);
2777                         goto next_packet;
2778                 }
2779
2780                 if (netif_msg_pktdata(pdata))
2781                         xgbe_print_pkt(netdev, skb, false);
2782
2783                 skb_checksum_none_assert(skb);
2784                 if (XGMAC_GET_BITS(packet->attributes,
2785                                    RX_PACKET_ATTRIBUTES, CSUM_DONE))
2786                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2787
2788                 if (XGMAC_GET_BITS(packet->attributes,
2789                                    RX_PACKET_ATTRIBUTES, TNP)) {
2790                         skb->encapsulation = 1;
2791
2792                         if (XGMAC_GET_BITS(packet->attributes,
2793                                            RX_PACKET_ATTRIBUTES, TNPCSUM_DONE))
2794                                 skb->csum_level = 1;
2795                 }
2796
2797                 if (XGMAC_GET_BITS(packet->attributes,
2798                                    RX_PACKET_ATTRIBUTES, VLAN_CTAG))
2799                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2800                                                packet->vlan_ctag);
2801
2802                 if (XGMAC_GET_BITS(packet->attributes,
2803                                    RX_PACKET_ATTRIBUTES, RX_TSTAMP)) {
2804                         u64 nsec;
2805
2806                         nsec = timecounter_cyc2time(&pdata->tstamp_tc,
2807                                                     packet->rx_tstamp);
2808                         hwtstamps = skb_hwtstamps(skb);
2809                         hwtstamps->hwtstamp = ns_to_ktime(nsec);
2810                 }
2811
2812                 if (XGMAC_GET_BITS(packet->attributes,
2813                                    RX_PACKET_ATTRIBUTES, RSS_HASH))
2814                         skb_set_hash(skb, packet->rss_hash,
2815                                      packet->rss_hash_type);
2816
2817                 skb->dev = netdev;
2818                 skb->protocol = eth_type_trans(skb, netdev);
2819                 skb_record_rx_queue(skb, channel->queue_index);
2820
2821                 napi_gro_receive(napi, skb);
2822
2823 next_packet:
2824                 packet_count++;
2825         }
2826
2827         /* Check if we need to save state before leaving */
2828         if (received && (!last || context_next)) {
2829                 rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
2830                 rdata->state_saved = 1;
2831                 rdata->state.skb = skb;
2832                 rdata->state.len = len;
2833                 rdata->state.error = error;
2834         }
2835
2836         DBGPR("<--xgbe_rx_poll: packet_count = %d\n", packet_count);
2837
2838         return packet_count;
2839 }
2840
2841 static int xgbe_one_poll(struct napi_struct *napi, int budget)
2842 {
2843         struct xgbe_channel *channel = container_of(napi, struct xgbe_channel,
2844                                                     napi);
2845         struct xgbe_prv_data *pdata = channel->pdata;
2846         int processed = 0;
2847
2848         DBGPR("-->xgbe_one_poll: budget=%d\n", budget);
2849
2850         /* Cleanup Tx ring first */
2851         xgbe_tx_poll(channel);
2852
2853         /* Process Rx ring next */
2854         processed = xgbe_rx_poll(channel, budget);
2855
2856         /* If we processed everything, we are done */
2857         if ((processed < budget) && napi_complete_done(napi, processed)) {
2858                 /* Enable Tx and Rx interrupts */
2859                 if (pdata->channel_irq_mode)
2860                         xgbe_enable_rx_tx_int(pdata, channel);
2861                 else
2862                         enable_irq(channel->dma_irq);
2863         }
2864
2865         DBGPR("<--xgbe_one_poll: received = %d\n", processed);
2866
2867         return processed;
2868 }
2869
2870 static int xgbe_all_poll(struct napi_struct *napi, int budget)
2871 {
2872         struct xgbe_prv_data *pdata = container_of(napi, struct xgbe_prv_data,
2873                                                    napi);
2874         struct xgbe_channel *channel;
2875         int ring_budget;
2876         int processed, last_processed;
2877         unsigned int i;
2878
2879         DBGPR("-->xgbe_all_poll: budget=%d\n", budget);
2880
2881         processed = 0;
2882         ring_budget = budget / pdata->rx_ring_count;
2883         do {
2884                 last_processed = processed;
2885
2886                 for (i = 0; i < pdata->channel_count; i++) {
2887                         channel = pdata->channel[i];
2888
2889                         /* Cleanup Tx ring first */
2890                         xgbe_tx_poll(channel);
2891
2892                         /* Process Rx ring next */
2893                         if (ring_budget > (budget - processed))
2894                                 ring_budget = budget - processed;
2895                         processed += xgbe_rx_poll(channel, ring_budget);
2896                 }
2897         } while ((processed < budget) && (processed != last_processed));
2898
2899         /* If we processed everything, we are done */
2900         if ((processed < budget) && napi_complete_done(napi, processed)) {
2901                 /* Enable Tx and Rx interrupts */
2902                 xgbe_enable_rx_tx_ints(pdata);
2903         }
2904
2905         DBGPR("<--xgbe_all_poll: received = %d\n", processed);
2906
2907         return processed;
2908 }
2909
2910 void xgbe_dump_tx_desc(struct xgbe_prv_data *pdata, struct xgbe_ring *ring,
2911                        unsigned int idx, unsigned int count, unsigned int flag)
2912 {
2913         struct xgbe_ring_data *rdata;
2914         struct xgbe_ring_desc *rdesc;
2915
2916         while (count--) {
2917                 rdata = XGBE_GET_DESC_DATA(ring, idx);
2918                 rdesc = rdata->rdesc;
2919                 netdev_dbg(pdata->netdev,
2920                            "TX_NORMAL_DESC[%d %s] = %08x:%08x:%08x:%08x\n", idx,
2921                            (flag == 1) ? "QUEUED FOR TX" : "TX BY DEVICE",
2922                            le32_to_cpu(rdesc->desc0),
2923                            le32_to_cpu(rdesc->desc1),
2924                            le32_to_cpu(rdesc->desc2),
2925                            le32_to_cpu(rdesc->desc3));
2926                 idx++;
2927         }
2928 }
2929
2930 void xgbe_dump_rx_desc(struct xgbe_prv_data *pdata, struct xgbe_ring *ring,
2931                        unsigned int idx)
2932 {
2933         struct xgbe_ring_data *rdata;
2934         struct xgbe_ring_desc *rdesc;
2935
2936         rdata = XGBE_GET_DESC_DATA(ring, idx);
2937         rdesc = rdata->rdesc;
2938         netdev_dbg(pdata->netdev,
2939                    "RX_NORMAL_DESC[%d RX BY DEVICE] = %08x:%08x:%08x:%08x\n",
2940                    idx, le32_to_cpu(rdesc->desc0), le32_to_cpu(rdesc->desc1),
2941                    le32_to_cpu(rdesc->desc2), le32_to_cpu(rdesc->desc3));
2942 }
2943
2944 void xgbe_print_pkt(struct net_device *netdev, struct sk_buff *skb, bool tx_rx)
2945 {
2946         struct ethhdr *eth = (struct ethhdr *)skb->data;
2947         unsigned char *buf = skb->data;
2948         unsigned char buffer[128];
2949         unsigned int i, j;
2950
2951         netdev_dbg(netdev, "\n************** SKB dump ****************\n");
2952
2953         netdev_dbg(netdev, "%s packet of %d bytes\n",
2954                    (tx_rx ? "TX" : "RX"), skb->len);
2955
2956         netdev_dbg(netdev, "Dst MAC addr: %pM\n", eth->h_dest);
2957         netdev_dbg(netdev, "Src MAC addr: %pM\n", eth->h_source);
2958         netdev_dbg(netdev, "Protocol: %#06hx\n", ntohs(eth->h_proto));
2959
2960         for (i = 0, j = 0; i < skb->len;) {
2961                 j += snprintf(buffer + j, sizeof(buffer) - j, "%02hhx",
2962                               buf[i++]);
2963
2964                 if ((i % 32) == 0) {
2965                         netdev_dbg(netdev, "  %#06x: %s\n", i - 32, buffer);
2966                         j = 0;
2967                 } else if ((i % 16) == 0) {
2968                         buffer[j++] = ' ';
2969                         buffer[j++] = ' ';
2970                 } else if ((i % 4) == 0) {
2971                         buffer[j++] = ' ';
2972                 }
2973         }
2974         if (i % 32)
2975                 netdev_dbg(netdev, "  %#06x: %s\n", i - (i % 32), buffer);
2976
2977         netdev_dbg(netdev, "\n************** SKB dump ****************\n");
2978 }