drivers/net/ethernet/broadcom/bcmsysport.c

   1 /*
   2  * Broadcom BCM7xxx System Port Ethernet MAC driver
   3  *
   4  * Copyright (C) 2014 Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/of.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_mdio.h>
  23 #include <linux/phy.h>
  24 #include <linux/phy_fixed.h>
  25 #include <net/ip.h>
  26 #include <net/ipv6.h>
  27
  28 #include "bcmsysport.h"
  29
  30 /* I/O accessors register helpers */
  31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
  32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off)  \
  33 {                                                                       \
  34         u32 reg = __raw_readl(priv->base + offset + off);               \
  35         return reg;                                                     \
  36 }                                                                       \
  37 static inline void name##_writel(struct bcm_sysport_priv *priv,         \
  38                                   u32 val, u32 off)                     \
  39 {                                                                       \
  40         __raw_writel(val, priv->base + offset + off);                   \
  41 }                                                                       \
  42
  43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
  44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
  45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
  46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
  47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
  48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
  49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
  50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
  51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
  52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
  53
  54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
  55  * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
  56   */
  57 #define BCM_SYSPORT_INTR_L2(which)      \
  58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
  59                                                 u32 mask)               \
  60 {                                                                       \
  61         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
  62         priv->irq##which##_mask &= ~(mask);                             \
  63 }                                                                       \
  64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
  65                                                 u32 mask)               \
  66 {                                                                       \
  67         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
  68         priv->irq##which##_mask |= (mask);                              \
  69 }                                                                       \
  70
  71 BCM_SYSPORT_INTR_L2(0)
  72 BCM_SYSPORT_INTR_L2(1)
  73
  74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
  75  * nanoseconds), so keep the check for 64-bits explicit here to save
  76  * one register write per-packet on 32-bits platforms.
  77  */
  78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
  79                                      void __iomem *d,
  80                                      dma_addr_t addr)
  81 {
  82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
  83         __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
  84                      d + DESC_ADDR_HI_STATUS_LEN);
  85 #endif
  86         __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
  87 }
  88
  89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
  90                                              struct dma_desc *desc,
  91                                              unsigned int port)
  92 {
  93         /* Ports are latched, so write upper address first */
  94         tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
  95         tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
  96 }
  97
  98 /* Ethtool operations */
  99 static int bcm_sysport_set_settings(struct net_device *dev,
 100                                     struct ethtool_cmd *cmd)
 101 {
 102         struct bcm_sysport_priv *priv = netdev_priv(dev);
 103
 104         if (!netif_running(dev))
 105                 return -EINVAL;
 106
 107         return phy_ethtool_sset(priv->phydev, cmd);
 108 }
 109
 110 static int bcm_sysport_get_settings(struct net_device *dev,
 111                                     struct ethtool_cmd *cmd)
 112 {
 113         struct bcm_sysport_priv *priv = netdev_priv(dev);
 114
 115         if (!netif_running(dev))
 116                 return -EINVAL;
 117
 118         return phy_ethtool_gset(priv->phydev, cmd);
 119 }
 120
 121 static int bcm_sysport_set_rx_csum(struct net_device *dev,
 122                                    netdev_features_t wanted)
 123 {
 124         struct bcm_sysport_priv *priv = netdev_priv(dev);
 125         u32 reg;
 126
 127         priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
 128         reg = rxchk_readl(priv, RXCHK_CONTROL);
 129         /* Clear L2 header checks, which would prevent BPDUs
 130          * from being received.
 131          */
 132         reg &= ~RXCHK_L2_HDR_DIS;
 133         if (priv->rx_chk_en)
 134                 reg |= RXCHK_EN;
 135         else
 136                 reg &= ~RXCHK_EN;
 137
 138         /* If UniMAC forwards CRC, we need to skip over it to get
 139          * a valid CHK bit to be set in the per-packet status word
 140          */
 141         if (priv->rx_chk_en && priv->crc_fwd)
 142                 reg |= RXCHK_SKIP_FCS;
 143         else
 144                 reg &= ~RXCHK_SKIP_FCS;
 145
 146         /* If Broadcom tags are enabled (e.g: using a switch), make
 147          * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
 148          * tag after the Ethernet MAC Source Address.
 149          */
 150         if (netdev_uses_dsa(dev))
 151                 reg |= RXCHK_BRCM_TAG_EN;
 152         else
 153                 reg &= ~RXCHK_BRCM_TAG_EN;
 154
 155         rxchk_writel(priv, reg, RXCHK_CONTROL);
 156
 157         return 0;
 158 }
 159
 160 static int bcm_sysport_set_tx_csum(struct net_device *dev,
 161                                    netdev_features_t wanted)
 162 {
 163         struct bcm_sysport_priv *priv = netdev_priv(dev);
 164         u32 reg;
 165
 166         /* Hardware transmit checksum requires us to enable the Transmit status
 167          * block prepended to the packet contents
 168          */
 169         priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
 170         reg = tdma_readl(priv, TDMA_CONTROL);
 171         if (priv->tsb_en)
 172                 reg |= TSB_EN;
 173         else
 174                 reg &= ~TSB_EN;
 175         tdma_writel(priv, reg, TDMA_CONTROL);
 176
 177         return 0;
 178 }
 179
 180 static int bcm_sysport_set_features(struct net_device *dev,
 181                                     netdev_features_t features)
 182 {
 183         netdev_features_t changed = features ^ dev->features;
 184         netdev_features_t wanted = dev->wanted_features;
 185         int ret = 0;
 186
 187         if (changed & NETIF_F_RXCSUM)
 188                 ret = bcm_sysport_set_rx_csum(dev, wanted);
 189         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
 190                 ret = bcm_sysport_set_tx_csum(dev, wanted);
 191
 192         return ret;
 193 }
 194
 195 /* Hardware counters must be kept in sync because the order/offset
 196  * is important here (order in structure declaration = order in hardware)
 197  */
 198 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
 199         /* general stats */
 200         STAT_NETDEV(rx_packets),
 201         STAT_NETDEV(tx_packets),
 202         STAT_NETDEV(rx_bytes),
 203         STAT_NETDEV(tx_bytes),
 204         STAT_NETDEV(rx_errors),
 205         STAT_NETDEV(tx_errors),
 206         STAT_NETDEV(rx_dropped),
 207         STAT_NETDEV(tx_dropped),
 208         STAT_NETDEV(multicast),
 209         /* UniMAC RSV counters */
 210         STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
 211         STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
 212         STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
 213         STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
 214         STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
 215         STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
 216         STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
 217         STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
 218         STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
 219         STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
 220         STAT_MIB_RX("rx_pkts", mib.rx.pkt),
 221         STAT_MIB_RX("rx_bytes", mib.rx.bytes),
 222         STAT_MIB_RX("rx_multicast", mib.rx.mca),
 223         STAT_MIB_RX("rx_broadcast", mib.rx.bca),
 224         STAT_MIB_RX("rx_fcs", mib.rx.fcs),
 225         STAT_MIB_RX("rx_control", mib.rx.cf),
 226         STAT_MIB_RX("rx_pause", mib.rx.pf),
 227         STAT_MIB_RX("rx_unknown", mib.rx.uo),
 228         STAT_MIB_RX("rx_align", mib.rx.aln),
 229         STAT_MIB_RX("rx_outrange", mib.rx.flr),
 230         STAT_MIB_RX("rx_code", mib.rx.cde),
 231         STAT_MIB_RX("rx_carrier", mib.rx.fcr),
 232         STAT_MIB_RX("rx_oversize", mib.rx.ovr),
 233         STAT_MIB_RX("rx_jabber", mib.rx.jbr),
 234         STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
 235         STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
 236         STAT_MIB_RX("rx_unicast", mib.rx.uc),
 237         STAT_MIB_RX("rx_ppp", mib.rx.ppp),
 238         STAT_MIB_RX("rx_crc", mib.rx.rcrc),
 239         /* UniMAC TSV counters */
 240         STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
 241         STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
 242         STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
 243         STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
 244         STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
 245         STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
 246         STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
 247         STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
 248         STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
 249         STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
 250         STAT_MIB_TX("tx_pkts", mib.tx.pkts),
 251         STAT_MIB_TX("tx_multicast", mib.tx.mca),
 252         STAT_MIB_TX("tx_broadcast", mib.tx.bca),
 253         STAT_MIB_TX("tx_pause", mib.tx.pf),
 254         STAT_MIB_TX("tx_control", mib.tx.cf),
 255         STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
 256         STAT_MIB_TX("tx_oversize", mib.tx.ovr),
 257         STAT_MIB_TX("tx_defer", mib.tx.drf),
 258         STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
 259         STAT_MIB_TX("tx_single_col", mib.tx.scl),
 260         STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
 261         STAT_MIB_TX("tx_late_col", mib.tx.lcl),
 262         STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
 263         STAT_MIB_TX("tx_frags", mib.tx.frg),
 264         STAT_MIB_TX("tx_total_col", mib.tx.ncl),
 265         STAT_MIB_TX("tx_jabber", mib.tx.jbr),
 266         STAT_MIB_TX("tx_bytes", mib.tx.bytes),
 267         STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
 268         STAT_MIB_TX("tx_unicast", mib.tx.uc),
 269         /* UniMAC RUNT counters */
 270         STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
 271         STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
 272         STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
 273         STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
 274         /* RXCHK misc statistics */
 275         STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
 276         STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
 277                    RXCHK_OTHER_DISC_CNTR),
 278         /* RBUF misc statistics */
 279         STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
 280         STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
 281         STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
 282         STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
 283         STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
 284 };
 285
 286 #define BCM_SYSPORT_STATS_LEN   ARRAY_SIZE(bcm_sysport_gstrings_stats)
 287
 288 static void bcm_sysport_get_drvinfo(struct net_device *dev,
 289                                     struct ethtool_drvinfo *info)
 290 {
 291         strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
 292         strlcpy(info->version, "0.1", sizeof(info->version));
 293         strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
 294 }
 295
 296 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
 297 {
 298         struct bcm_sysport_priv *priv = netdev_priv(dev);
 299
 300         return priv->msg_enable;
 301 }
 302
 303 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
 304 {
 305         struct bcm_sysport_priv *priv = netdev_priv(dev);
 306
 307         priv->msg_enable = enable;
 308 }
 309
 310 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
 311 {
 312         switch (string_set) {
 313         case ETH_SS_STATS:
 314                 return BCM_SYSPORT_STATS_LEN;
 315         default:
 316                 return -EOPNOTSUPP;
 317         }
 318 }
 319
 320 static void bcm_sysport_get_strings(struct net_device *dev,
 321                                     u32 stringset, u8 *data)
 322 {
 323         int i;
 324
 325         switch (stringset) {
 326         case ETH_SS_STATS:
 327                 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 328                         memcpy(data + i * ETH_GSTRING_LEN,
 329                                bcm_sysport_gstrings_stats[i].stat_string,
 330                                ETH_GSTRING_LEN);
 331                 }
 332                 break;
 333         default:
 334                 break;
 335         }
 336 }
 337
 338 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
 339 {
 340         int i, j = 0;
 341
 342         for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 343                 const struct bcm_sysport_stats *s;
 344                 u8 offset = 0;
 345                 u32 val = 0;
 346                 char *p;
 347
 348                 s = &bcm_sysport_gstrings_stats[i];
 349                 switch (s->type) {
 350                 case BCM_SYSPORT_STAT_NETDEV:
 351                 case BCM_SYSPORT_STAT_SOFT:
 352                         continue;
 353                 case BCM_SYSPORT_STAT_MIB_RX:
 354                 case BCM_SYSPORT_STAT_MIB_TX:
 355                 case BCM_SYSPORT_STAT_RUNT:
 356                         if (s->type != BCM_SYSPORT_STAT_MIB_RX)
 357                                 offset = UMAC_MIB_STAT_OFFSET;
 358                         val = umac_readl(priv, UMAC_MIB_START + j + offset);
 359                         break;
 360                 case BCM_SYSPORT_STAT_RXCHK:
 361                         val = rxchk_readl(priv, s->reg_offset);
 362                         if (val == ~0)
 363                                 rxchk_writel(priv, 0, s->reg_offset);
 364                         break;
 365                 case BCM_SYSPORT_STAT_RBUF:
 366                         val = rbuf_readl(priv, s->reg_offset);
 367                         if (val == ~0)
 368                                 rbuf_writel(priv, 0, s->reg_offset);
 369                         break;
 370                 }
 371
 372                 j += s->stat_sizeof;
 373                 p = (char *)priv + s->stat_offset;
 374                 *(u32 *)p = val;
 375         }
 376
 377         netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
 378 }
 379
 380 static void bcm_sysport_get_stats(struct net_device *dev,
 381                                   struct ethtool_stats *stats, u64 *data)
 382 {
 383         struct bcm_sysport_priv *priv = netdev_priv(dev);
 384         int i;
 385
 386         if (netif_running(dev))
 387                 bcm_sysport_update_mib_counters(priv);
 388
 389         for (i =  0; i < BCM_SYSPORT_STATS_LEN; i++) {
 390                 const struct bcm_sysport_stats *s;
 391                 char *p;
 392
 393                 s = &bcm_sysport_gstrings_stats[i];
 394                 if (s->type == BCM_SYSPORT_STAT_NETDEV)
 395                         p = (char *)&dev->stats;
 396                 else
 397                         p = (char *)priv;
 398                 p += s->stat_offset;
 399                 data[i] = *(unsigned long *)p;
 400         }
 401 }
 402
 403 static void bcm_sysport_get_wol(struct net_device *dev,
 404                                 struct ethtool_wolinfo *wol)
 405 {
 406         struct bcm_sysport_priv *priv = netdev_priv(dev);
 407
 408         wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 409         wol->wolopts = priv->wolopts;
 410
 411         if (!(priv->wolopts & WAKE_MAGICSECURE))
 412                 return;
 413
 414         memcpy(wol->sopass, priv->sopass, sizeof(priv->sopass));
 415 }
 416
 417 static int bcm_sysport_set_wol(struct net_device *dev,
 418                                struct ethtool_wolinfo *wol)
 419 {
 420         struct bcm_sysport_priv *priv = netdev_priv(dev);
 421         struct device *kdev = &priv->pdev->dev;
 422         u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 423
 424         if (!device_can_wakeup(kdev))
 425                 return -ENOTSUPP;
 426
 427         if (wol->wolopts & ~supported)
 428                 return -EINVAL;
 429
 430         if (wol->wolopts & WAKE_MAGICSECURE)
 431                 memcpy(priv->sopass, wol->sopass, sizeof(priv->sopass));
 432
 433         /* Flag the device and relevant IRQ as wakeup capable */
 434         if (wol->wolopts) {
 435                 device_set_wakeup_enable(kdev, 1);
 436                 if (priv->wol_irq_disabled)
 437                         enable_irq_wake(priv->wol_irq);
 438                 priv->wol_irq_disabled = 0;
 439         } else {
 440                 device_set_wakeup_enable(kdev, 0);
 441                 /* Avoid unbalanced disable_irq_wake calls */
 442                 if (!priv->wol_irq_disabled)
 443                         disable_irq_wake(priv->wol_irq);
 444                 priv->wol_irq_disabled = 1;
 445         }
 446
 447         priv->wolopts = wol->wolopts;
 448
 449         return 0;
 450 }
 451
 452 static int bcm_sysport_get_coalesce(struct net_device *dev,
 453                                     struct ethtool_coalesce *ec)
 454 {
 455         struct bcm_sysport_priv *priv = netdev_priv(dev);
 456         u32 reg;
 457
 458         reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
 459
 460         ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
 461         ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
 462
 463         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 464
 465         ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
 466         ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
 467
 468         return 0;
 469 }
 470
 471 static int bcm_sysport_set_coalesce(struct net_device *dev,
 472                                     struct ethtool_coalesce *ec)
 473 {
 474         struct bcm_sysport_priv *priv = netdev_priv(dev);
 475         unsigned int i;
 476         u32 reg;
 477
 478         /* Base system clock is 125Mhz, DMA timeout is this reference clock
 479          * divided by 1024, which yield roughly 8.192 us, our maximum value has
 480          * to fit in the RING_TIMEOUT_MASK (16 bits).
 481          */
 482         if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
 483             ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
 484             ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
 485             ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
 486                 return -EINVAL;
 487
 488         if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
 489             (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0))
 490                 return -EINVAL;
 491
 492         for (i = 0; i < dev->num_tx_queues; i++) {
 493                 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(i));
 494                 reg &= ~(RING_INTR_THRESH_MASK |
 495                          RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
 496                 reg |= ec->tx_max_coalesced_frames;
 497                 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
 498                          RING_TIMEOUT_SHIFT;
 499                 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(i));
 500         }
 501
 502         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 503         reg &= ~(RDMA_INTR_THRESH_MASK |
 504                  RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
 505         reg |= ec->rx_max_coalesced_frames;
 506         reg |= DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000, 8192) <<
 507                             RDMA_TIMEOUT_SHIFT;
 508         rdma_writel(priv, reg, RDMA_MBDONE_INTR);
 509
 510         return 0;
 511 }
 512
 513 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
 514 {
 515         dev_kfree_skb_any(cb->skb);
 516         cb->skb = NULL;
 517         dma_unmap_addr_set(cb, dma_addr, 0);
 518 }
 519
 520 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
 521                                              struct bcm_sysport_cb *cb)
 522 {
 523         struct device *kdev = &priv->pdev->dev;
 524         struct net_device *ndev = priv->netdev;
 525         struct sk_buff *skb, *rx_skb;
 526         dma_addr_t mapping;
 527
 528         /* Allocate a new SKB for a new packet */
 529         skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH,
 530                                  GFP_ATOMIC | __GFP_NOWARN);
 531         if (!skb) {
 532                 priv->mib.alloc_rx_buff_failed++;
 533                 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 534                 return NULL;
 535         }
 536
 537         mapping = dma_map_single(kdev, skb->data,
 538                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 539         if (dma_mapping_error(kdev, mapping)) {
 540                 priv->mib.rx_dma_failed++;
 541                 dev_kfree_skb_any(skb);
 542                 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
 543                 return NULL;
 544         }
 545
 546         /* Grab the current SKB on the ring */
 547         rx_skb = cb->skb;
 548         if (likely(rx_skb))
 549                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 550                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 551
 552         /* Put the new SKB on the ring */
 553         cb->skb = skb;
 554         dma_unmap_addr_set(cb, dma_addr, mapping);
 555         dma_desc_set_addr(priv, cb->bd_addr, mapping);
 556
 557         netif_dbg(priv, rx_status, ndev, "RX refill\n");
 558
 559         /* Return the current SKB to the caller */
 560         return rx_skb;
 561 }
 562
 563 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
 564 {
 565         struct bcm_sysport_cb *cb;
 566         struct sk_buff *skb;
 567         unsigned int i;
 568
 569         for (i = 0; i < priv->num_rx_bds; i++) {
 570                 cb = &priv->rx_cbs[i];
 571                 skb = bcm_sysport_rx_refill(priv, cb);
 572                 if (skb)
 573                         dev_kfree_skb(skb);
 574                 if (!cb->skb)
 575                         return -ENOMEM;
 576         }
 577
 578         return 0;
 579 }
 580
 581 /* Poll the hardware for up to budget packets to process */
 582 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
 583                                         unsigned int budget)
 584 {
 585         struct net_device *ndev = priv->netdev;
 586         unsigned int processed = 0, to_process;
 587         struct bcm_sysport_cb *cb;
 588         struct sk_buff *skb;
 589         unsigned int p_index;
 590         u16 len, status;
 591         struct bcm_rsb *rsb;
 592
 593         /* Determine how much we should process since last call */
 594         p_index = rdma_readl(priv, RDMA_PROD_INDEX);
 595         p_index &= RDMA_PROD_INDEX_MASK;
 596
 597         if (p_index < priv->rx_c_index)
 598                 to_process = (RDMA_CONS_INDEX_MASK + 1) -
 599                         priv->rx_c_index + p_index;
 600         else
 601                 to_process = p_index - priv->rx_c_index;
 602
 603         netif_dbg(priv, rx_status, ndev,
 604                   "p_index=%d rx_c_index=%d to_process=%d\n",
 605                   p_index, priv->rx_c_index, to_process);
 606
 607         while ((processed < to_process) && (processed < budget)) {
 608                 cb = &priv->rx_cbs[priv->rx_read_ptr];
 609                 skb = bcm_sysport_rx_refill(priv, cb);
 610
 611
 612                 /* We do not have a backing SKB, so we do not a corresponding
 613                  * DMA mapping for this incoming packet since
 614                  * bcm_sysport_rx_refill always either has both skb and mapping
 615                  * or none.
 616                  */
 617                 if (unlikely(!skb)) {
 618                         netif_err(priv, rx_err, ndev, "out of memory!\n");
 619                         ndev->stats.rx_dropped++;
 620                         ndev->stats.rx_errors++;
 621                         goto next;
 622                 }
 623
 624                 /* Extract the Receive Status Block prepended */
 625                 rsb = (struct bcm_rsb *)skb->data;
 626                 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
 627                 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
 628                           DESC_STATUS_MASK;
 629
 630                 netif_dbg(priv, rx_status, ndev,
 631                           "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
 632                           p_index, priv->rx_c_index, priv->rx_read_ptr,
 633                           len, status);
 634
 635                 if (unlikely(len > RX_BUF_LENGTH)) {
 636                         netif_err(priv, rx_status, ndev, "oversized packet\n");
 637                         ndev->stats.rx_length_errors++;
 638                         ndev->stats.rx_errors++;
 639                         dev_kfree_skb_any(skb);
 640                         goto next;
 641                 }
 642
 643                 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
 644                         netif_err(priv, rx_status, ndev, "fragmented packet!\n");
 645                         ndev->stats.rx_dropped++;
 646                         ndev->stats.rx_errors++;
 647                         dev_kfree_skb_any(skb);
 648                         goto next;
 649                 }
 650
 651                 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
 652                         netif_err(priv, rx_err, ndev, "error packet\n");
 653                         if (status & RX_STATUS_OVFLOW)
 654                                 ndev->stats.rx_over_errors++;
 655                         ndev->stats.rx_dropped++;
 656                         ndev->stats.rx_errors++;
 657                         dev_kfree_skb_any(skb);
 658                         goto next;
 659                 }
 660
 661                 skb_put(skb, len);
 662
 663                 /* Hardware validated our checksum */
 664                 if (likely(status & DESC_L4_CSUM))
 665                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 666
 667                 /* Hardware pre-pends packets with 2bytes before Ethernet
 668                  * header plus we have the Receive Status Block, strip off all
 669                  * of this from the SKB.
 670                  */
 671                 skb_pull(skb, sizeof(*rsb) + 2);
 672                 len -= (sizeof(*rsb) + 2);
 673
 674                 /* UniMAC may forward CRC */
 675                 if (priv->crc_fwd) {
 676                         skb_trim(skb, len - ETH_FCS_LEN);
 677                         len -= ETH_FCS_LEN;
 678                 }
 679
 680                 skb->protocol = eth_type_trans(skb, ndev);
 681                 ndev->stats.rx_packets++;
 682                 ndev->stats.rx_bytes += len;
 683
 684                 napi_gro_receive(&priv->napi, skb);
 685 next:
 686                 processed++;
 687                 priv->rx_read_ptr++;
 688
 689                 if (priv->rx_read_ptr == priv->num_rx_bds)
 690                         priv->rx_read_ptr = 0;
 691         }
 692
 693         return processed;
 694 }
 695
 696 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
 697                                        struct bcm_sysport_cb *cb,
 698                                        unsigned int *bytes_compl,
 699                                        unsigned int *pkts_compl)
 700 {
 701         struct device *kdev = &priv->pdev->dev;
 702         struct net_device *ndev = priv->netdev;
 703
 704         if (cb->skb) {
 705                 ndev->stats.tx_bytes += cb->skb->len;
 706                 *bytes_compl += cb->skb->len;
 707                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 708                                  dma_unmap_len(cb, dma_len),
 709                                  DMA_TO_DEVICE);
 710                 ndev->stats.tx_packets++;
 711                 (*pkts_compl)++;
 712                 bcm_sysport_free_cb(cb);
 713         /* SKB fragment */
 714         } else if (dma_unmap_addr(cb, dma_addr)) {
 715                 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
 716                 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
 717                                dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
 718                 dma_unmap_addr_set(cb, dma_addr, 0);
 719         }
 720 }
 721
 722 /* Reclaim queued SKBs for transmission completion, lockless version */
 723 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 724                                              struct bcm_sysport_tx_ring *ring)
 725 {
 726         struct net_device *ndev = priv->netdev;
 727         unsigned int pkts_compl = 0, bytes_compl = 0;
 728         unsigned int txbds_processed = 0;
 729         struct bcm_sysport_cb *cb;
 730         unsigned int txbds_ready;
 731         unsigned int c_index;
 732         u32 hw_ind;
 733
 734         /* Compute how many descriptors have been processed since last call */
 735         hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
 736         c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
 737         txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
 738
 739         netif_dbg(priv, tx_done, ndev,
 740                   "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n",
 741                   ring->index, ring->c_index, c_index, txbds_ready);
 742
 743         while (txbds_processed < txbds_ready) {
 744                 cb = &ring->cbs[ring->clean_index];
 745                 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
 746
 747                 ring->desc_count++;
 748                 txbds_processed++;
 749
 750                 if (likely(ring->clean_index < ring->size - 1))
 751                         ring->clean_index++;
 752                 else
 753                         ring->clean_index = 0;
 754         }
 755
 756         ring->c_index = c_index;
 757
 758         netif_dbg(priv, tx_done, ndev,
 759                   "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
 760                   ring->index, ring->c_index, pkts_compl, bytes_compl);
 761
 762         return pkts_compl;
 763 }
 764
 765 /* Locked version of the per-ring TX reclaim routine */
 766 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 767                                            struct bcm_sysport_tx_ring *ring)
 768 {
 769         struct netdev_queue *txq;
 770         unsigned int released;
 771         unsigned long flags;
 772
 773         txq = netdev_get_tx_queue(priv->netdev, ring->index);
 774
 775         spin_lock_irqsave(&ring->lock, flags);
 776         released = __bcm_sysport_tx_reclaim(priv, ring);
 777         if (released)
 778                 netif_tx_wake_queue(txq);
 779
 780         spin_unlock_irqrestore(&ring->lock, flags);
 781
 782         return released;
 783 }
 784
 785 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
 786 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
 787                                  struct bcm_sysport_tx_ring *ring)
 788 {
 789         unsigned long flags;
 790
 791         spin_lock_irqsave(&ring->lock, flags);
 792         __bcm_sysport_tx_reclaim(priv, ring);
 793         spin_unlock_irqrestore(&ring->lock, flags);
 794 }
 795
 796 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
 797 {
 798         struct bcm_sysport_tx_ring *ring =
 799                 container_of(napi, struct bcm_sysport_tx_ring, napi);
 800         unsigned int work_done = 0;
 801
 802         work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
 803
 804         if (work_done == 0) {
 805                 napi_complete(napi);
 806                 /* re-enable TX interrupt */
 807                 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
 808
 809                 return 0;
 810         }
 811
 812         return budget;
 813 }
 814
 815 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
 816 {
 817         unsigned int q;
 818
 819         for (q = 0; q < priv->netdev->num_tx_queues; q++)
 820                 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
 821 }
 822
 823 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
 824 {
 825         struct bcm_sysport_priv *priv =
 826                 container_of(napi, struct bcm_sysport_priv, napi);
 827         unsigned int work_done = 0;
 828
 829         work_done = bcm_sysport_desc_rx(priv, budget);
 830
 831         priv->rx_c_index += work_done;
 832         priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
 833         rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
 834
 835         if (work_done < budget) {
 836                 napi_complete(napi);
 837                 /* re-enable RX interrupts */
 838                 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
 839         }
 840
 841         return work_done;
 842 }
 843
 844 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
 845 {
 846         u32 reg;
 847
 848         /* Clear the MagicPacket detection logic */
 849         reg = umac_readl(priv, UMAC_MPD_CTRL);
 850         reg &= ~MPD_EN;
 851         umac_writel(priv, reg, UMAC_MPD_CTRL);
 852
 853         reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS);
 854         if (reg & INTRL2_0_MPD)
 855                 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n");
 856
 857         if (reg & INTRL2_0_BRCM_MATCH_TAG) {
 858                 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) &
 859                                   RXCHK_BRCM_TAG_MATCH_MASK;
 860                 netdev_info(priv->netdev,
 861                             "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg);
 862         }
 863
 864         netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
 865 }
 866
 867 /* RX and misc interrupt routine */
 868 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
 869 {
 870         struct net_device *dev = dev_id;
 871         struct bcm_sysport_priv *priv = netdev_priv(dev);
 872
 873         priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
 874                           ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
 875         intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
 876
 877         if (unlikely(priv->irq0_stat == 0)) {
 878                 netdev_warn(priv->netdev, "spurious RX interrupt\n");
 879                 return IRQ_NONE;
 880         }
 881
 882         if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
 883                 if (likely(napi_schedule_prep(&priv->napi))) {
 884                         /* disable RX interrupts */
 885                         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
 886                         __napi_schedule(&priv->napi);
 887                 }
 888         }
 889
 890         /* TX ring is full, perform a full reclaim since we do not know
 891          * which one would trigger this interrupt
 892          */
 893         if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
 894                 bcm_sysport_tx_reclaim_all(priv);
 895
 896         return IRQ_HANDLED;
 897 }
 898
 899 /* TX interrupt service routine */
 900 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
 901 {
 902         struct net_device *dev = dev_id;
 903         struct bcm_sysport_priv *priv = netdev_priv(dev);
 904         struct bcm_sysport_tx_ring *txr;
 905         unsigned int ring;
 906
 907         priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
 908                                 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
 909         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
 910
 911         if (unlikely(priv->irq1_stat == 0)) {
 912                 netdev_warn(priv->netdev, "spurious TX interrupt\n");
 913                 return IRQ_NONE;
 914         }
 915
 916         for (ring = 0; ring < dev->num_tx_queues; ring++) {
 917                 if (!(priv->irq1_stat & BIT(ring)))
 918                         continue;
 919
 920                 txr = &priv->tx_rings[ring];
 921
 922                 if (likely(napi_schedule_prep(&txr->napi))) {
 923                         intrl2_1_mask_set(priv, BIT(ring));
 924                         __napi_schedule(&txr->napi);
 925                 }
 926         }
 927
 928         return IRQ_HANDLED;
 929 }
 930
 931 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
 932 {
 933         struct bcm_sysport_priv *priv = dev_id;
 934
 935         pm_wakeup_event(&priv->pdev->dev, 0);
 936
 937         return IRQ_HANDLED;
 938 }
 939
 940 #ifdef CONFIG_NET_POLL_CONTROLLER
 941 static void bcm_sysport_poll_controller(struct net_device *dev)
 942 {
 943         struct bcm_sysport_priv *priv = netdev_priv(dev);
 944
 945         disable_irq(priv->irq0);
 946         bcm_sysport_rx_isr(priv->irq0, priv);
 947         enable_irq(priv->irq0);
 948
 949         disable_irq(priv->irq1);
 950         bcm_sysport_tx_isr(priv->irq1, priv);
 951         enable_irq(priv->irq1);
 952 }
 953 #endif
 954
 955 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
 956                                               struct net_device *dev)
 957 {
 958         struct sk_buff *nskb;
 959         struct bcm_tsb *tsb;
 960         u32 csum_info;
 961         u8 ip_proto;
 962         u16 csum_start;
 963         u16 ip_ver;
 964
 965         /* Re-allocate SKB if needed */
 966         if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
 967                 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
 968                 dev_kfree_skb(skb);
 969                 if (!nskb) {
 970                         dev->stats.tx_errors++;
 971                         dev->stats.tx_dropped++;
 972                         return NULL;
 973                 }
 974                 skb = nskb;
 975         }
 976
 977         tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
 978         /* Zero-out TSB by default */
 979         memset(tsb, 0, sizeof(*tsb));
 980
 981         if (skb->ip_summed == CHECKSUM_PARTIAL) {
 982                 ip_ver = htons(skb->protocol);
 983                 switch (ip_ver) {
 984                 case ETH_P_IP:
 985                         ip_proto = ip_hdr(skb)->protocol;
 986                         break;
 987                 case ETH_P_IPV6:
 988                         ip_proto = ipv6_hdr(skb)->nexthdr;
 989                         break;
 990                 default:
 991                         return skb;
 992                 }
 993
 994                 /* Get the checksum offset and the L4 (transport) offset */
 995                 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
 996                 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
 997                 csum_info |= (csum_start << L4_PTR_SHIFT);
 998
 999                 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
1000                         csum_info |= L4_LENGTH_VALID;
1001                         if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
1002                                 csum_info |= L4_UDP;
1003                 } else {
1004                         csum_info = 0;
1005                 }
1006
1007                 tsb->l4_ptr_dest_map = csum_info;
1008         }
1009
1010         return skb;
1011 }
1012
1013 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1014                                     struct net_device *dev)
1015 {
1016         struct bcm_sysport_priv *priv = netdev_priv(dev);
1017         struct device *kdev = &priv->pdev->dev;
1018         struct bcm_sysport_tx_ring *ring;
1019         struct bcm_sysport_cb *cb;
1020         struct netdev_queue *txq;
1021         struct dma_desc *desc;
1022         unsigned int skb_len;
1023         unsigned long flags;
1024         dma_addr_t mapping;
1025         u32 len_status;
1026         u16 queue;
1027         int ret;
1028
1029         queue = skb_get_queue_mapping(skb);
1030         txq = netdev_get_tx_queue(dev, queue);
1031         ring = &priv->tx_rings[queue];
1032
1033         /* lock against tx reclaim in BH context and TX ring full interrupt */
1034         spin_lock_irqsave(&ring->lock, flags);
1035         if (unlikely(ring->desc_count == 0)) {
1036                 netif_tx_stop_queue(txq);
1037                 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1038                 ret = NETDEV_TX_BUSY;
1039                 goto out;
1040         }
1041
1042         /* The Ethernet switch we are interfaced with needs packets to be at
1043          * least 64 bytes (including FCS) otherwise they will be discarded when
1044          * they enter the switch port logic. When Broadcom tags are enabled, we
1045          * need to make sure that packets are at least 68 bytes
1046          * (including FCS and tag) because the length verification is done after
1047          * the Broadcom tag is stripped off the ingress packet.
1048          */
1049         if (skb_put_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
1050                 ret = NETDEV_TX_OK;
1051                 goto out;
1052         }
1053
1054         /* Insert TSB and checksum infos */
1055         if (priv->tsb_en) {
1056                 skb = bcm_sysport_insert_tsb(skb, dev);
1057                 if (!skb) {
1058                         ret = NETDEV_TX_OK;
1059                         goto out;
1060                 }
1061         }
1062
1063         skb_len = skb->len;
1064
1065         mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1066         if (dma_mapping_error(kdev, mapping)) {
1067                 priv->mib.tx_dma_failed++;
1068                 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1069                           skb->data, skb_len);
1070                 ret = NETDEV_TX_OK;
1071                 goto out;
1072         }
1073
1074         /* Remember the SKB for future freeing */
1075         cb = &ring->cbs[ring->curr_desc];
1076         cb->skb = skb;
1077         dma_unmap_addr_set(cb, dma_addr, mapping);
1078         dma_unmap_len_set(cb, dma_len, skb_len);
1079
1080         /* Fetch a descriptor entry from our pool */
1081         desc = ring->desc_cpu;
1082
1083         desc->addr_lo = lower_32_bits(mapping);
1084         len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1085         len_status |= (skb_len << DESC_LEN_SHIFT);
1086         len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1087                        DESC_STATUS_SHIFT;
1088         if (skb->ip_summed == CHECKSUM_PARTIAL)
1089                 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1090
1091         ring->curr_desc++;
1092         if (ring->curr_desc == ring->size)
1093                 ring->curr_desc = 0;
1094         ring->desc_count--;
1095
1096         /* Ensure write completion of the descriptor status/length
1097          * in DRAM before the System Port WRITE_PORT register latches
1098          * the value
1099          */
1100         wmb();
1101         desc->addr_status_len = len_status;
1102         wmb();
1103
1104         /* Write this descriptor address to the RING write port */
1105         tdma_port_write_desc_addr(priv, desc, ring->index);
1106
1107         /* Check ring space and update SW control flow */
1108         if (ring->desc_count == 0)
1109                 netif_tx_stop_queue(txq);
1110
1111         netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1112                   ring->index, ring->desc_count, ring->curr_desc);
1113
1114         ret = NETDEV_TX_OK;
1115 out:
1116         spin_unlock_irqrestore(&ring->lock, flags);
1117         return ret;
1118 }
1119
1120 static void bcm_sysport_tx_timeout(struct net_device *dev)
1121 {
1122         netdev_warn(dev, "transmit timeout!\n");
1123
1124         dev->trans_start = jiffies;
1125         dev->stats.tx_errors++;
1126
1127         netif_tx_wake_all_queues(dev);
1128 }
1129
1130 /* phylib adjust link callback */
1131 static void bcm_sysport_adj_link(struct net_device *dev)
1132 {
1133         struct bcm_sysport_priv *priv = netdev_priv(dev);
1134         struct phy_device *phydev = priv->phydev;
1135         unsigned int changed = 0;
1136         u32 cmd_bits = 0, reg;
1137
1138         if (priv->old_link != phydev->link) {
1139                 changed = 1;
1140                 priv->old_link = phydev->link;
1141         }
1142
1143         if (priv->old_duplex != phydev->duplex) {
1144                 changed = 1;
1145                 priv->old_duplex = phydev->duplex;
1146         }
1147
1148         switch (phydev->speed) {
1149         case SPEED_2500:
1150                 cmd_bits = CMD_SPEED_2500;
1151                 break;
1152         case SPEED_1000:
1153                 cmd_bits = CMD_SPEED_1000;
1154                 break;
1155         case SPEED_100:
1156                 cmd_bits = CMD_SPEED_100;
1157                 break;
1158         case SPEED_10:
1159                 cmd_bits = CMD_SPEED_10;
1160                 break;
1161         default:
1162                 break;
1163         }
1164         cmd_bits <<= CMD_SPEED_SHIFT;
1165
1166         if (phydev->duplex == DUPLEX_HALF)
1167                 cmd_bits |= CMD_HD_EN;
1168
1169         if (priv->old_pause != phydev->pause) {
1170                 changed = 1;
1171                 priv->old_pause = phydev->pause;
1172         }
1173
1174         if (!phydev->pause)
1175                 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1176
1177         if (!changed)
1178                 return;
1179
1180         if (phydev->link) {
1181                 reg = umac_readl(priv, UMAC_CMD);
1182                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1183                         CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1184                         CMD_TX_PAUSE_IGNORE);
1185                 reg |= cmd_bits;
1186                 umac_writel(priv, reg, UMAC_CMD);
1187         }
1188
1189         phy_print_status(priv->phydev);
1190 }
1191
1192 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1193                                     unsigned int index)
1194 {
1195         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1196         struct device *kdev = &priv->pdev->dev;
1197         size_t size;
1198         void *p;
1199         u32 reg;
1200
1201         /* Simple descriptors partitioning for now */
1202         size = 256;
1203
1204         /* We just need one DMA descriptor which is DMA-able, since writing to
1205          * the port will allocate a new descriptor in its internal linked-list
1206          */
1207         p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1208                                 GFP_KERNEL);
1209         if (!p) {
1210                 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1211                 return -ENOMEM;
1212         }
1213
1214         ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1215         if (!ring->cbs) {
1216                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1217                 return -ENOMEM;
1218         }
1219
1220         /* Initialize SW view of the ring */
1221         spin_lock_init(&ring->lock);
1222         ring->priv = priv;
1223         netif_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1224         ring->index = index;
1225         ring->size = size;
1226         ring->clean_index = 0;
1227         ring->alloc_size = ring->size;
1228         ring->desc_cpu = p;
1229         ring->desc_count = ring->size;
1230         ring->curr_desc = 0;
1231
1232         /* Initialize HW ring */
1233         tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1234         tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1235         tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1236         tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1237         tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1238         tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1239
1240         /* Program the number of descriptors as MAX_THRESHOLD and half of
1241          * its size for the hysteresis trigger
1242          */
1243         tdma_writel(priv, ring->size |
1244                         1 << RING_HYST_THRESH_SHIFT,
1245                         TDMA_DESC_RING_MAX_HYST(index));
1246
1247         /* Enable the ring queue in the arbiter */
1248         reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1249         reg |= (1 << index);
1250         tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1251
1252         napi_enable(&ring->napi);
1253
1254         netif_dbg(priv, hw, priv->netdev,
1255                   "TDMA cfg, size=%d, desc_cpu=%p\n",
1256                   ring->size, ring->desc_cpu);
1257
1258         return 0;
1259 }
1260
1261 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1262                                      unsigned int index)
1263 {
1264         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1265         struct device *kdev = &priv->pdev->dev;
1266         u32 reg;
1267
1268         /* Caller should stop the TDMA engine */
1269         reg = tdma_readl(priv, TDMA_STATUS);
1270         if (!(reg & TDMA_DISABLED))
1271                 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1272
1273         /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1274          * fail, so by checking this pointer we know whether the TX ring was
1275          * fully initialized or not.
1276          */
1277         if (!ring->cbs)
1278                 return;
1279
1280         napi_disable(&ring->napi);
1281         netif_napi_del(&ring->napi);
1282
1283         bcm_sysport_tx_clean(priv, ring);
1284
1285         kfree(ring->cbs);
1286         ring->cbs = NULL;
1287
1288         if (ring->desc_dma) {
1289                 dma_free_coherent(kdev, sizeof(struct dma_desc),
1290                                   ring->desc_cpu, ring->desc_dma);
1291                 ring->desc_dma = 0;
1292         }
1293         ring->size = 0;
1294         ring->alloc_size = 0;
1295
1296         netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1297 }
1298
1299 /* RDMA helper */
1300 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1301                                   unsigned int enable)
1302 {
1303         unsigned int timeout = 1000;
1304         u32 reg;
1305
1306         reg = rdma_readl(priv, RDMA_CONTROL);
1307         if (enable)
1308                 reg |= RDMA_EN;
1309         else
1310                 reg &= ~RDMA_EN;
1311         rdma_writel(priv, reg, RDMA_CONTROL);
1312
1313         /* Poll for RMDA disabling completion */
1314         do {
1315                 reg = rdma_readl(priv, RDMA_STATUS);
1316                 if (!!(reg & RDMA_DISABLED) == !enable)
1317                         return 0;
1318                 usleep_range(1000, 2000);
1319         } while (timeout-- > 0);
1320
1321         netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1322
1323         return -ETIMEDOUT;
1324 }
1325
1326 /* TDMA helper */
1327 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1328                                   unsigned int enable)
1329 {
1330         unsigned int timeout = 1000;
1331         u32 reg;
1332
1333         reg = tdma_readl(priv, TDMA_CONTROL);
1334         if (enable)
1335                 reg |= TDMA_EN;
1336         else
1337                 reg &= ~TDMA_EN;
1338         tdma_writel(priv, reg, TDMA_CONTROL);
1339
1340         /* Poll for TMDA disabling completion */
1341         do {
1342                 reg = tdma_readl(priv, TDMA_STATUS);
1343                 if (!!(reg & TDMA_DISABLED) == !enable)
1344                         return 0;
1345
1346                 usleep_range(1000, 2000);
1347         } while (timeout-- > 0);
1348
1349         netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1350
1351         return -ETIMEDOUT;
1352 }
1353
1354 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1355 {
1356         struct bcm_sysport_cb *cb;
1357         u32 reg;
1358         int ret;
1359         int i;
1360
1361         /* Initialize SW view of the RX ring */
1362         priv->num_rx_bds = NUM_RX_DESC;
1363         priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1364         priv->rx_c_index = 0;
1365         priv->rx_read_ptr = 0;
1366         priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1367                                 GFP_KERNEL);
1368         if (!priv->rx_cbs) {
1369                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1370                 return -ENOMEM;
1371         }
1372
1373         for (i = 0; i < priv->num_rx_bds; i++) {
1374                 cb = priv->rx_cbs + i;
1375                 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1376         }
1377
1378         ret = bcm_sysport_alloc_rx_bufs(priv);
1379         if (ret) {
1380                 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1381                 return ret;
1382         }
1383
1384         /* Initialize HW, ensure RDMA is disabled */
1385         reg = rdma_readl(priv, RDMA_STATUS);
1386         if (!(reg & RDMA_DISABLED))
1387                 rdma_enable_set(priv, 0);
1388
1389         rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1390         rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1391         rdma_writel(priv, 0, RDMA_PROD_INDEX);
1392         rdma_writel(priv, 0, RDMA_CONS_INDEX);
1393         rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1394                           RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1395         /* Operate the queue in ring mode */
1396         rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1397         rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1398         rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1399         rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1400
1401         rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1402
1403         netif_dbg(priv, hw, priv->netdev,
1404                   "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1405                   priv->num_rx_bds, priv->rx_bds);
1406
1407         return 0;
1408 }
1409
1410 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1411 {
1412         struct bcm_sysport_cb *cb;
1413         unsigned int i;
1414         u32 reg;
1415
1416         /* Caller should ensure RDMA is disabled */
1417         reg = rdma_readl(priv, RDMA_STATUS);
1418         if (!(reg & RDMA_DISABLED))
1419                 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1420
1421         for (i = 0; i < priv->num_rx_bds; i++) {
1422                 cb = &priv->rx_cbs[i];
1423                 if (dma_unmap_addr(cb, dma_addr))
1424                         dma_unmap_single(&priv->pdev->dev,
1425                                          dma_unmap_addr(cb, dma_addr),
1426                                          RX_BUF_LENGTH, DMA_FROM_DEVICE);
1427                 bcm_sysport_free_cb(cb);
1428         }
1429
1430         kfree(priv->rx_cbs);
1431         priv->rx_cbs = NULL;
1432
1433         netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1434 }
1435
1436 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1437 {
1438         struct bcm_sysport_priv *priv = netdev_priv(dev);
1439         u32 reg;
1440
1441         reg = umac_readl(priv, UMAC_CMD);
1442         if (dev->flags & IFF_PROMISC)
1443                 reg |= CMD_PROMISC;
1444         else
1445                 reg &= ~CMD_PROMISC;
1446         umac_writel(priv, reg, UMAC_CMD);
1447
1448         /* No support for ALLMULTI */
1449         if (dev->flags & IFF_ALLMULTI)
1450                 return;
1451 }
1452
1453 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1454                                    u32 mask, unsigned int enable)
1455 {
1456         u32 reg;
1457
1458         reg = umac_readl(priv, UMAC_CMD);
1459         if (enable)
1460                 reg |= mask;
1461         else
1462                 reg &= ~mask;
1463         umac_writel(priv, reg, UMAC_CMD);
1464
1465         /* UniMAC stops on a packet boundary, wait for a full-sized packet
1466          * to be processed (1 msec).
1467          */
1468         if (enable == 0)
1469                 usleep_range(1000, 2000);
1470 }
1471
1472 static inline void umac_reset(struct bcm_sysport_priv *priv)
1473 {
1474         u32 reg;
1475
1476         reg = umac_readl(priv, UMAC_CMD);
1477         reg |= CMD_SW_RESET;
1478         umac_writel(priv, reg, UMAC_CMD);
1479         udelay(10);
1480         reg = umac_readl(priv, UMAC_CMD);
1481         reg &= ~CMD_SW_RESET;
1482         umac_writel(priv, reg, UMAC_CMD);
1483 }
1484
1485 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1486                              unsigned char *addr)
1487 {
1488         umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1489                         (addr[2] << 8) | addr[3], UMAC_MAC0);
1490         umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1491 }
1492
1493 static void topctrl_flush(struct bcm_sysport_priv *priv)
1494 {
1495         topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1496         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1497         mdelay(1);
1498         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1499         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1500 }
1501
1502 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1503 {
1504         struct bcm_sysport_priv *priv = netdev_priv(dev);
1505         struct sockaddr *addr = p;
1506
1507         if (!is_valid_ether_addr(addr->sa_data))
1508                 return -EINVAL;
1509
1510         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1511
1512         /* interface is disabled, changes to MAC will be reflected on next
1513          * open call
1514          */
1515         if (!netif_running(dev))
1516                 return 0;
1517
1518         umac_set_hw_addr(priv, dev->dev_addr);
1519
1520         return 0;
1521 }
1522
1523 static void bcm_sysport_netif_start(struct net_device *dev)
1524 {
1525         struct bcm_sysport_priv *priv = netdev_priv(dev);
1526
1527         /* Enable NAPI */
1528         napi_enable(&priv->napi);
1529
1530         /* Enable RX interrupt and TX ring full interrupt */
1531         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1532
1533         phy_start(priv->phydev);
1534
1535         /* Enable TX interrupts for the 32 TXQs */
1536         intrl2_1_mask_clear(priv, 0xffffffff);
1537
1538         /* Last call before we start the real business */
1539         netif_tx_start_all_queues(dev);
1540 }
1541
1542 static void rbuf_init(struct bcm_sysport_priv *priv)
1543 {
1544         u32 reg;
1545
1546         reg = rbuf_readl(priv, RBUF_CONTROL);
1547         reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1548         rbuf_writel(priv, reg, RBUF_CONTROL);
1549 }
1550
1551 static int bcm_sysport_open(struct net_device *dev)
1552 {
1553         struct bcm_sysport_priv *priv = netdev_priv(dev);
1554         unsigned int i;
1555         int ret;
1556
1557         /* Reset UniMAC */
1558         umac_reset(priv);
1559
1560         /* Flush TX and RX FIFOs at TOPCTRL level */
1561         topctrl_flush(priv);
1562
1563         /* Disable the UniMAC RX/TX */
1564         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1565
1566         /* Enable RBUF 2bytes alignment and Receive Status Block */
1567         rbuf_init(priv);
1568
1569         /* Set maximum frame length */
1570         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1571
1572         /* Set MAC address */
1573         umac_set_hw_addr(priv, dev->dev_addr);
1574
1575         /* Read CRC forward */
1576         priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1577
1578         priv->phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1579                                         0, priv->phy_interface);
1580         if (!priv->phydev) {
1581                 netdev_err(dev, "could not attach to PHY\n");
1582                 return -ENODEV;
1583         }
1584
1585         /* Reset house keeping link status */
1586         priv->old_duplex = -1;
1587         priv->old_link = -1;
1588         priv->old_pause = -1;
1589
1590         /* mask all interrupts and request them */
1591         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1592         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1593         intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1594         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1595         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1596         intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1597
1598         ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1599         if (ret) {
1600                 netdev_err(dev, "failed to request RX interrupt\n");
1601                 goto out_phy_disconnect;
1602         }
1603
1604         ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1605         if (ret) {
1606                 netdev_err(dev, "failed to request TX interrupt\n");
1607                 goto out_free_irq0;
1608         }
1609
1610         /* Initialize both hardware and software ring */
1611         for (i = 0; i < dev->num_tx_queues; i++) {
1612                 ret = bcm_sysport_init_tx_ring(priv, i);
1613                 if (ret) {
1614                         netdev_err(dev, "failed to initialize TX ring %d\n",
1615                                    i);
1616                         goto out_free_tx_ring;
1617                 }
1618         }
1619
1620         /* Initialize linked-list */
1621         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1622
1623         /* Initialize RX ring */
1624         ret = bcm_sysport_init_rx_ring(priv);
1625         if (ret) {
1626                 netdev_err(dev, "failed to initialize RX ring\n");
1627                 goto out_free_rx_ring;
1628         }
1629
1630         /* Turn on RDMA */
1631         ret = rdma_enable_set(priv, 1);
1632         if (ret)
1633                 goto out_free_rx_ring;
1634
1635         /* Turn on TDMA */
1636         ret = tdma_enable_set(priv, 1);
1637         if (ret)
1638                 goto out_clear_rx_int;
1639
1640         /* Turn on UniMAC TX/RX */
1641         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1642
1643         bcm_sysport_netif_start(dev);
1644
1645         return 0;
1646
1647 out_clear_rx_int:
1648         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1649 out_free_rx_ring:
1650         bcm_sysport_fini_rx_ring(priv);
1651 out_free_tx_ring:
1652         for (i = 0; i < dev->num_tx_queues; i++)
1653                 bcm_sysport_fini_tx_ring(priv, i);
1654         free_irq(priv->irq1, dev);
1655 out_free_irq0:
1656         free_irq(priv->irq0, dev);
1657 out_phy_disconnect:
1658         phy_disconnect(priv->phydev);
1659         return ret;
1660 }
1661
1662 static void bcm_sysport_netif_stop(struct net_device *dev)
1663 {
1664         struct bcm_sysport_priv *priv = netdev_priv(dev);
1665
1666         /* stop all software from updating hardware */
1667         netif_tx_stop_all_queues(dev);
1668         napi_disable(&priv->napi);
1669         phy_stop(priv->phydev);
1670
1671         /* mask all interrupts */
1672         intrl2_0_mask_set(priv, 0xffffffff);
1673         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1674         intrl2_1_mask_set(priv, 0xffffffff);
1675         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1676 }
1677
1678 static int bcm_sysport_stop(struct net_device *dev)
1679 {
1680         struct bcm_sysport_priv *priv = netdev_priv(dev);
1681         unsigned int i;
1682         int ret;
1683
1684         bcm_sysport_netif_stop(dev);
1685
1686         /* Disable UniMAC RX */
1687         umac_enable_set(priv, CMD_RX_EN, 0);
1688
1689         ret = tdma_enable_set(priv, 0);
1690         if (ret) {
1691                 netdev_err(dev, "timeout disabling RDMA\n");
1692                 return ret;
1693         }
1694
1695         /* Wait for a maximum packet size to be drained */
1696         usleep_range(2000, 3000);
1697
1698         ret = rdma_enable_set(priv, 0);
1699         if (ret) {
1700                 netdev_err(dev, "timeout disabling TDMA\n");
1701                 return ret;
1702         }
1703
1704         /* Disable UniMAC TX */
1705         umac_enable_set(priv, CMD_TX_EN, 0);
1706
1707         /* Free RX/TX rings SW structures */
1708         for (i = 0; i < dev->num_tx_queues; i++)
1709                 bcm_sysport_fini_tx_ring(priv, i);
1710         bcm_sysport_fini_rx_ring(priv);
1711
1712         free_irq(priv->irq0, dev);
1713         free_irq(priv->irq1, dev);
1714
1715         /* Disconnect from PHY */
1716         phy_disconnect(priv->phydev);
1717
1718         return 0;
1719 }
1720
1721 static struct ethtool_ops bcm_sysport_ethtool_ops = {
1722         .get_settings           = bcm_sysport_get_settings,
1723         .set_settings           = bcm_sysport_set_settings,
1724         .get_drvinfo            = bcm_sysport_get_drvinfo,
1725         .get_msglevel           = bcm_sysport_get_msglvl,
1726         .set_msglevel           = bcm_sysport_set_msglvl,
1727         .get_link               = ethtool_op_get_link,
1728         .get_strings            = bcm_sysport_get_strings,
1729         .get_ethtool_stats      = bcm_sysport_get_stats,
1730         .get_sset_count         = bcm_sysport_get_sset_count,
1731         .get_wol                = bcm_sysport_get_wol,
1732         .set_wol                = bcm_sysport_set_wol,
1733         .get_coalesce           = bcm_sysport_get_coalesce,
1734         .set_coalesce           = bcm_sysport_set_coalesce,
1735 };
1736
1737 static const struct net_device_ops bcm_sysport_netdev_ops = {
1738         .ndo_start_xmit         = bcm_sysport_xmit,
1739         .ndo_tx_timeout         = bcm_sysport_tx_timeout,
1740         .ndo_open               = bcm_sysport_open,
1741         .ndo_stop               = bcm_sysport_stop,
1742         .ndo_set_features       = bcm_sysport_set_features,
1743         .ndo_set_rx_mode        = bcm_sysport_set_rx_mode,
1744         .ndo_set_mac_address    = bcm_sysport_change_mac,
1745 #ifdef CONFIG_NET_POLL_CONTROLLER
1746         .ndo_poll_controller    = bcm_sysport_poll_controller,
1747 #endif
1748 };
1749
1750 #define REV_FMT "v%2x.%02x"
1751
1752 static int bcm_sysport_probe(struct platform_device *pdev)
1753 {
1754         struct bcm_sysport_priv *priv;
1755         struct device_node *dn;
1756         struct net_device *dev;
1757         const void *macaddr;
1758         struct resource *r;
1759         u32 txq, rxq;
1760         int ret;
1761
1762         dn = pdev->dev.of_node;
1763         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1764
1765         /* Read the Transmit/Receive Queue properties */
1766         if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1767                 txq = TDMA_NUM_RINGS;
1768         if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1769                 rxq = 1;
1770
1771         dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1772         if (!dev)
1773                 return -ENOMEM;
1774
1775         /* Initialize private members */
1776         priv = netdev_priv(dev);
1777
1778         priv->irq0 = platform_get_irq(pdev, 0);
1779         priv->irq1 = platform_get_irq(pdev, 1);
1780         priv->wol_irq = platform_get_irq(pdev, 2);
1781         if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1782                 dev_err(&pdev->dev, "invalid interrupts\n");
1783                 ret = -EINVAL;
1784                 goto err;
1785         }
1786
1787         priv->base = devm_ioremap_resource(&pdev->dev, r);
1788         if (IS_ERR(priv->base)) {
1789                 ret = PTR_ERR(priv->base);
1790                 goto err;
1791         }
1792
1793         priv->netdev = dev;
1794         priv->pdev = pdev;
1795
1796         priv->phy_interface = of_get_phy_mode(dn);
1797         /* Default to GMII interface mode */
1798         if ((int)priv->phy_interface < 0)
1799                 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1800
1801         /* In the case of a fixed PHY, the DT node associated
1802          * to the PHY is the Ethernet MAC DT node.
1803          */
1804         if (of_phy_is_fixed_link(dn)) {
1805                 ret = of_phy_register_fixed_link(dn);
1806                 if (ret) {
1807                         dev_err(&pdev->dev, "failed to register fixed PHY\n");
1808                         goto err;
1809                 }
1810
1811                 priv->phy_dn = dn;
1812         }
1813
1814         /* Initialize netdevice members */
1815         macaddr = of_get_mac_address(dn);
1816         if (!macaddr || !is_valid_ether_addr(macaddr)) {
1817                 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1818                 eth_hw_addr_random(dev);
1819         } else {
1820                 ether_addr_copy(dev->dev_addr, macaddr);
1821         }
1822
1823         SET_NETDEV_DEV(dev, &pdev->dev);
1824         dev_set_drvdata(&pdev->dev, dev);
1825         dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1826         dev->netdev_ops = &bcm_sysport_netdev_ops;
1827         netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1828
1829         /* HW supported features, none enabled by default */
1830         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1831                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1832
1833         /* Request the WOL interrupt and advertise suspend if available */
1834         priv->wol_irq_disabled = 1;
1835         ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1836                                bcm_sysport_wol_isr, 0, dev->name, priv);
1837         if (!ret)
1838                 device_set_wakeup_capable(&pdev->dev, 1);
1839
1840         /* Set the needed headroom once and for all */
1841         BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1842         dev->needed_headroom += sizeof(struct bcm_tsb);
1843
1844         /* libphy will adjust the link state accordingly */
1845         netif_carrier_off(dev);
1846
1847         ret = register_netdev(dev);
1848         if (ret) {
1849                 dev_err(&pdev->dev, "failed to register net_device\n");
1850                 goto err;
1851         }
1852
1853         priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1854         dev_info(&pdev->dev,
1855                  "Broadcom SYSTEMPORT" REV_FMT
1856                  " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1857                  (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1858                  priv->base, priv->irq0, priv->irq1, txq, rxq);
1859
1860         return 0;
1861 err:
1862         free_netdev(dev);
1863         return ret;
1864 }
1865
1866 static int bcm_sysport_remove(struct platform_device *pdev)
1867 {
1868         struct net_device *dev = dev_get_drvdata(&pdev->dev);
1869
1870         /* Not much to do, ndo_close has been called
1871          * and we use managed allocations
1872          */
1873         unregister_netdev(dev);
1874         free_netdev(dev);
1875         dev_set_drvdata(&pdev->dev, NULL);
1876
1877         return 0;
1878 }
1879
1880 #ifdef CONFIG_PM_SLEEP
1881 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1882 {
1883         struct net_device *ndev = priv->netdev;
1884         unsigned int timeout = 1000;
1885         u32 reg;
1886
1887         reg = umac_readl(priv, UMAC_MPD_CTRL);
1888         reg |= MPD_EN;
1889         reg &= ~PSW_EN;
1890         if (priv->wolopts & WAKE_MAGICSECURE) {
1891                 /* Program the SecureOn password */
1892                 umac_writel(priv, get_unaligned_be16(&priv->sopass[0]),
1893                             UMAC_PSW_MS);
1894                 umac_writel(priv, get_unaligned_be32(&priv->sopass[2]),
1895                             UMAC_PSW_LS);
1896                 reg |= PSW_EN;
1897         }
1898         umac_writel(priv, reg, UMAC_MPD_CTRL);
1899
1900         /* Make sure RBUF entered WoL mode as result */
1901         do {
1902                 reg = rbuf_readl(priv, RBUF_STATUS);
1903                 if (reg & RBUF_WOL_MODE)
1904                         break;
1905
1906                 udelay(10);
1907         } while (timeout-- > 0);
1908
1909         /* Do not leave the UniMAC RBUF matching only MPD packets */
1910         if (!timeout) {
1911                 reg = umac_readl(priv, UMAC_MPD_CTRL);
1912                 reg &= ~MPD_EN;
1913                 umac_writel(priv, reg, UMAC_MPD_CTRL);
1914                 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1915                 return -ETIMEDOUT;
1916         }
1917
1918         /* UniMAC receive needs to be turned on */
1919         umac_enable_set(priv, CMD_RX_EN, 1);
1920
1921         netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1922
1923         return 0;
1924 }
1925
1926 static int bcm_sysport_suspend(struct device *d)
1927 {
1928         struct net_device *dev = dev_get_drvdata(d);
1929         struct bcm_sysport_priv *priv = netdev_priv(dev);
1930         unsigned int i;
1931         int ret = 0;
1932         u32 reg;
1933
1934         if (!netif_running(dev))
1935                 return 0;
1936
1937         bcm_sysport_netif_stop(dev);
1938
1939         phy_suspend(priv->phydev);
1940
1941         netif_device_detach(dev);
1942
1943         /* Disable UniMAC RX */
1944         umac_enable_set(priv, CMD_RX_EN, 0);
1945
1946         ret = rdma_enable_set(priv, 0);
1947         if (ret) {
1948                 netdev_err(dev, "RDMA timeout!\n");
1949                 return ret;
1950         }
1951
1952         /* Disable RXCHK if enabled */
1953         if (priv->rx_chk_en) {
1954                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1955                 reg &= ~RXCHK_EN;
1956                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1957         }
1958
1959         /* Flush RX pipe */
1960         if (!priv->wolopts)
1961                 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1962
1963         ret = tdma_enable_set(priv, 0);
1964         if (ret) {
1965                 netdev_err(dev, "TDMA timeout!\n");
1966                 return ret;
1967         }
1968
1969         /* Wait for a packet boundary */
1970         usleep_range(2000, 3000);
1971
1972         umac_enable_set(priv, CMD_TX_EN, 0);
1973
1974         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1975
1976         /* Free RX/TX rings SW structures */
1977         for (i = 0; i < dev->num_tx_queues; i++)
1978                 bcm_sysport_fini_tx_ring(priv, i);
1979         bcm_sysport_fini_rx_ring(priv);
1980
1981         /* Get prepared for Wake-on-LAN */
1982         if (device_may_wakeup(d) && priv->wolopts)
1983                 ret = bcm_sysport_suspend_to_wol(priv);
1984
1985         return ret;
1986 }
1987
1988 static int bcm_sysport_resume(struct device *d)
1989 {
1990         struct net_device *dev = dev_get_drvdata(d);
1991         struct bcm_sysport_priv *priv = netdev_priv(dev);
1992         unsigned int i;
1993         u32 reg;
1994         int ret;
1995
1996         if (!netif_running(dev))
1997                 return 0;
1998
1999         umac_reset(priv);
2000
2001         /* Disable the UniMAC RX/TX */
2002         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
2003
2004         /* We may have been suspended and never received a WOL event that
2005          * would turn off MPD detection, take care of that now
2006          */
2007         bcm_sysport_resume_from_wol(priv);
2008
2009         /* Initialize both hardware and software ring */
2010         for (i = 0; i < dev->num_tx_queues; i++) {
2011                 ret = bcm_sysport_init_tx_ring(priv, i);
2012                 if (ret) {
2013                         netdev_err(dev, "failed to initialize TX ring %d\n",
2014                                    i);
2015                         goto out_free_tx_rings;
2016                 }
2017         }
2018
2019         /* Initialize linked-list */
2020         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2021
2022         /* Initialize RX ring */
2023         ret = bcm_sysport_init_rx_ring(priv);
2024         if (ret) {
2025                 netdev_err(dev, "failed to initialize RX ring\n");
2026                 goto out_free_rx_ring;
2027         }
2028
2029         netif_device_attach(dev);
2030
2031         /* RX pipe enable */
2032         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2033
2034         ret = rdma_enable_set(priv, 1);
2035         if (ret) {
2036                 netdev_err(dev, "failed to enable RDMA\n");
2037                 goto out_free_rx_ring;
2038         }
2039
2040         /* Enable rxhck */
2041         if (priv->rx_chk_en) {
2042                 reg = rxchk_readl(priv, RXCHK_CONTROL);
2043                 reg |= RXCHK_EN;
2044                 rxchk_writel(priv, reg, RXCHK_CONTROL);
2045         }
2046
2047         rbuf_init(priv);
2048
2049         /* Set maximum frame length */
2050         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2051
2052         /* Set MAC address */
2053         umac_set_hw_addr(priv, dev->dev_addr);
2054
2055         umac_enable_set(priv, CMD_RX_EN, 1);
2056
2057         /* TX pipe enable */
2058         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2059
2060         umac_enable_set(priv, CMD_TX_EN, 1);
2061
2062         ret = tdma_enable_set(priv, 1);
2063         if (ret) {
2064                 netdev_err(dev, "TDMA timeout!\n");
2065                 goto out_free_rx_ring;
2066         }
2067
2068         phy_resume(priv->phydev);
2069
2070         bcm_sysport_netif_start(dev);
2071
2072         return 0;
2073
2074 out_free_rx_ring:
2075         bcm_sysport_fini_rx_ring(priv);
2076 out_free_tx_rings:
2077         for (i = 0; i < dev->num_tx_queues; i++)
2078                 bcm_sysport_fini_tx_ring(priv, i);
2079         return ret;
2080 }
2081 #endif
2082
2083 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2084                 bcm_sysport_suspend, bcm_sysport_resume);
2085
2086 static const struct of_device_id bcm_sysport_of_match[] = {
2087         { .compatible = "brcm,systemport-v1.00" },
2088         { .compatible = "brcm,systemport" },
2089         { /* sentinel */ }
2090 };
2091 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2092
2093 static struct platform_driver bcm_sysport_driver = {
2094         .probe  = bcm_sysport_probe,
2095         .remove = bcm_sysport_remove,
2096         .driver =  {
2097                 .name = "brcm-systemport",
2098                 .of_match_table = bcm_sysport_of_match,
2099                 .pm = &bcm_sysport_pm_ops,
2100         },
2101 };
2102 module_platform_driver(bcm_sysport_driver);
2103
2104 MODULE_AUTHOR("Broadcom Corporation");
2105 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2106 MODULE_ALIAS("platform:brcm-systemport");
2107 MODULE_LICENSE("GPL");