GNU Linux-libre 4.9.309-gnu1
[releases.git] / drivers / net / ethernet / broadcom / bcmsysport.c
1 /*
2  * Broadcom BCM7xxx System Port Ethernet MAC driver
3  *
4  * Copyright (C) 2014 Broadcom Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
12
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
20 #include <linux/of.h>
21 #include <linux/of_net.h>
22 #include <linux/of_mdio.h>
23 #include <linux/phy.h>
24 #include <linux/phy_fixed.h>
25 #include <net/ip.h>
26 #include <net/ipv6.h>
27
28 #include "bcmsysport.h"
29
30 /* I/O accessors register helpers */
31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off)  \
33 {                                                                       \
34         u32 reg = __raw_readl(priv->base + offset + off);               \
35         return reg;                                                     \
36 }                                                                       \
37 static inline void name##_writel(struct bcm_sysport_priv *priv,         \
38                                   u32 val, u32 off)                     \
39 {                                                                       \
40         __raw_writel(val, priv->base + offset + off);                   \
41 }                                                                       \
42
43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
53
54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
55  * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
56   */
57 #define BCM_SYSPORT_INTR_L2(which)      \
58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
59                                                 u32 mask)               \
60 {                                                                       \
61         priv->irq##which##_mask &= ~(mask);                             \
62         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
63 }                                                                       \
64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
65                                                 u32 mask)               \
66 {                                                                       \
67         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
68         priv->irq##which##_mask |= (mask);                              \
69 }                                                                       \
70
71 BCM_SYSPORT_INTR_L2(0)
72 BCM_SYSPORT_INTR_L2(1)
73
74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
75  * nanoseconds), so keep the check for 64-bits explicit here to save
76  * one register write per-packet on 32-bits platforms.
77  */
78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
79                                      void __iomem *d,
80                                      dma_addr_t addr)
81 {
82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
83         __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
84                      d + DESC_ADDR_HI_STATUS_LEN);
85 #endif
86         __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
87 }
88
89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
90                                              struct dma_desc *desc,
91                                              unsigned int port)
92 {
93         unsigned long desc_flags;
94
95         /* Ports are latched, so write upper address first */
96         spin_lock_irqsave(&priv->desc_lock, desc_flags);
97         tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
98         tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
99         spin_unlock_irqrestore(&priv->desc_lock, desc_flags);
100 }
101
102 /* Ethtool operations */
103 static int bcm_sysport_set_rx_csum(struct net_device *dev,
104                                    netdev_features_t wanted)
105 {
106         struct bcm_sysport_priv *priv = netdev_priv(dev);
107         u32 reg;
108
109         priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
110         reg = rxchk_readl(priv, RXCHK_CONTROL);
111         /* Clear L2 header checks, which would prevent BPDUs
112          * from being received.
113          */
114         reg &= ~RXCHK_L2_HDR_DIS;
115         if (priv->rx_chk_en)
116                 reg |= RXCHK_EN;
117         else
118                 reg &= ~RXCHK_EN;
119
120         /* If UniMAC forwards CRC, we need to skip over it to get
121          * a valid CHK bit to be set in the per-packet status word
122          */
123         if (priv->rx_chk_en && priv->crc_fwd)
124                 reg |= RXCHK_SKIP_FCS;
125         else
126                 reg &= ~RXCHK_SKIP_FCS;
127
128         /* If Broadcom tags are enabled (e.g: using a switch), make
129          * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
130          * tag after the Ethernet MAC Source Address.
131          */
132         if (netdev_uses_dsa(dev))
133                 reg |= RXCHK_BRCM_TAG_EN;
134         else
135                 reg &= ~RXCHK_BRCM_TAG_EN;
136
137         rxchk_writel(priv, reg, RXCHK_CONTROL);
138
139         return 0;
140 }
141
142 static int bcm_sysport_set_tx_csum(struct net_device *dev,
143                                    netdev_features_t wanted)
144 {
145         struct bcm_sysport_priv *priv = netdev_priv(dev);
146         u32 reg;
147
148         /* Hardware transmit checksum requires us to enable the Transmit status
149          * block prepended to the packet contents
150          */
151         priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
152         reg = tdma_readl(priv, TDMA_CONTROL);
153         if (priv->tsb_en)
154                 reg |= TSB_EN;
155         else
156                 reg &= ~TSB_EN;
157         tdma_writel(priv, reg, TDMA_CONTROL);
158
159         return 0;
160 }
161
162 static int bcm_sysport_set_features(struct net_device *dev,
163                                     netdev_features_t features)
164 {
165         netdev_features_t changed = features ^ dev->features;
166         netdev_features_t wanted = dev->wanted_features;
167         int ret = 0;
168
169         if (changed & NETIF_F_RXCSUM)
170                 ret = bcm_sysport_set_rx_csum(dev, wanted);
171         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
172                 ret = bcm_sysport_set_tx_csum(dev, wanted);
173
174         return ret;
175 }
176
177 /* Hardware counters must be kept in sync because the order/offset
178  * is important here (order in structure declaration = order in hardware)
179  */
180 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
181         /* general stats */
182         STAT_NETDEV(rx_packets),
183         STAT_NETDEV(tx_packets),
184         STAT_NETDEV(rx_bytes),
185         STAT_NETDEV(tx_bytes),
186         STAT_NETDEV(rx_errors),
187         STAT_NETDEV(tx_errors),
188         STAT_NETDEV(rx_dropped),
189         STAT_NETDEV(tx_dropped),
190         STAT_NETDEV(multicast),
191         /* UniMAC RSV counters */
192         STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
193         STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
194         STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
195         STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
196         STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
197         STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
198         STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
199         STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
200         STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
201         STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
202         STAT_MIB_RX("rx_pkts", mib.rx.pkt),
203         STAT_MIB_RX("rx_bytes", mib.rx.bytes),
204         STAT_MIB_RX("rx_multicast", mib.rx.mca),
205         STAT_MIB_RX("rx_broadcast", mib.rx.bca),
206         STAT_MIB_RX("rx_fcs", mib.rx.fcs),
207         STAT_MIB_RX("rx_control", mib.rx.cf),
208         STAT_MIB_RX("rx_pause", mib.rx.pf),
209         STAT_MIB_RX("rx_unknown", mib.rx.uo),
210         STAT_MIB_RX("rx_align", mib.rx.aln),
211         STAT_MIB_RX("rx_outrange", mib.rx.flr),
212         STAT_MIB_RX("rx_code", mib.rx.cde),
213         STAT_MIB_RX("rx_carrier", mib.rx.fcr),
214         STAT_MIB_RX("rx_oversize", mib.rx.ovr),
215         STAT_MIB_RX("rx_jabber", mib.rx.jbr),
216         STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
217         STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
218         STAT_MIB_RX("rx_unicast", mib.rx.uc),
219         STAT_MIB_RX("rx_ppp", mib.rx.ppp),
220         STAT_MIB_RX("rx_crc", mib.rx.rcrc),
221         /* UniMAC TSV counters */
222         STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
223         STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
224         STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
225         STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
226         STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
227         STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
228         STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
229         STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
230         STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
231         STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
232         STAT_MIB_TX("tx_pkts", mib.tx.pkts),
233         STAT_MIB_TX("tx_multicast", mib.tx.mca),
234         STAT_MIB_TX("tx_broadcast", mib.tx.bca),
235         STAT_MIB_TX("tx_pause", mib.tx.pf),
236         STAT_MIB_TX("tx_control", mib.tx.cf),
237         STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
238         STAT_MIB_TX("tx_oversize", mib.tx.ovr),
239         STAT_MIB_TX("tx_defer", mib.tx.drf),
240         STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
241         STAT_MIB_TX("tx_single_col", mib.tx.scl),
242         STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
243         STAT_MIB_TX("tx_late_col", mib.tx.lcl),
244         STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
245         STAT_MIB_TX("tx_frags", mib.tx.frg),
246         STAT_MIB_TX("tx_total_col", mib.tx.ncl),
247         STAT_MIB_TX("tx_jabber", mib.tx.jbr),
248         STAT_MIB_TX("tx_bytes", mib.tx.bytes),
249         STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
250         STAT_MIB_TX("tx_unicast", mib.tx.uc),
251         /* UniMAC RUNT counters */
252         STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
253         STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
254         STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
255         STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
256         /* RXCHK misc statistics */
257         STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
258         STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
259                    RXCHK_OTHER_DISC_CNTR),
260         /* RBUF misc statistics */
261         STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
262         STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
263         STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
264         STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
265         STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
266 };
267
268 #define BCM_SYSPORT_STATS_LEN   ARRAY_SIZE(bcm_sysport_gstrings_stats)
269
270 static void bcm_sysport_get_drvinfo(struct net_device *dev,
271                                     struct ethtool_drvinfo *info)
272 {
273         strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
274         strlcpy(info->version, "0.1", sizeof(info->version));
275         strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
276 }
277
278 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
279 {
280         struct bcm_sysport_priv *priv = netdev_priv(dev);
281
282         return priv->msg_enable;
283 }
284
285 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
286 {
287         struct bcm_sysport_priv *priv = netdev_priv(dev);
288
289         priv->msg_enable = enable;
290 }
291
292 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
293 {
294         switch (string_set) {
295         case ETH_SS_STATS:
296                 return BCM_SYSPORT_STATS_LEN;
297         default:
298                 return -EOPNOTSUPP;
299         }
300 }
301
302 static void bcm_sysport_get_strings(struct net_device *dev,
303                                     u32 stringset, u8 *data)
304 {
305         int i;
306
307         switch (stringset) {
308         case ETH_SS_STATS:
309                 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
310                         memcpy(data + i * ETH_GSTRING_LEN,
311                                bcm_sysport_gstrings_stats[i].stat_string,
312                                ETH_GSTRING_LEN);
313                 }
314                 break;
315         default:
316                 break;
317         }
318 }
319
320 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
321 {
322         int i, j = 0;
323
324         for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
325                 const struct bcm_sysport_stats *s;
326                 u8 offset = 0;
327                 u32 val = 0;
328                 char *p;
329
330                 s = &bcm_sysport_gstrings_stats[i];
331                 switch (s->type) {
332                 case BCM_SYSPORT_STAT_NETDEV:
333                 case BCM_SYSPORT_STAT_SOFT:
334                         continue;
335                 case BCM_SYSPORT_STAT_MIB_RX:
336                 case BCM_SYSPORT_STAT_MIB_TX:
337                 case BCM_SYSPORT_STAT_RUNT:
338                         if (s->type != BCM_SYSPORT_STAT_MIB_RX)
339                                 offset = UMAC_MIB_STAT_OFFSET;
340                         val = umac_readl(priv, UMAC_MIB_START + j + offset);
341                         break;
342                 case BCM_SYSPORT_STAT_RXCHK:
343                         val = rxchk_readl(priv, s->reg_offset);
344                         if (val == ~0)
345                                 rxchk_writel(priv, 0, s->reg_offset);
346                         break;
347                 case BCM_SYSPORT_STAT_RBUF:
348                         val = rbuf_readl(priv, s->reg_offset);
349                         if (val == ~0)
350                                 rbuf_writel(priv, 0, s->reg_offset);
351                         break;
352                 }
353
354                 j += s->stat_sizeof;
355                 p = (char *)priv + s->stat_offset;
356                 *(u32 *)p = val;
357         }
358
359         netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
360 }
361
362 static void bcm_sysport_get_stats(struct net_device *dev,
363                                   struct ethtool_stats *stats, u64 *data)
364 {
365         struct bcm_sysport_priv *priv = netdev_priv(dev);
366         int i;
367
368         if (netif_running(dev))
369                 bcm_sysport_update_mib_counters(priv);
370
371         for (i =  0; i < BCM_SYSPORT_STATS_LEN; i++) {
372                 const struct bcm_sysport_stats *s;
373                 char *p;
374
375                 s = &bcm_sysport_gstrings_stats[i];
376                 if (s->type == BCM_SYSPORT_STAT_NETDEV)
377                         p = (char *)&dev->stats;
378                 else
379                         p = (char *)priv;
380                 p += s->stat_offset;
381                 data[i] = *(unsigned long *)p;
382         }
383 }
384
385 static void bcm_sysport_get_wol(struct net_device *dev,
386                                 struct ethtool_wolinfo *wol)
387 {
388         struct bcm_sysport_priv *priv = netdev_priv(dev);
389
390         wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
391         wol->wolopts = priv->wolopts;
392
393         if (!(priv->wolopts & WAKE_MAGICSECURE))
394                 return;
395
396         memcpy(wol->sopass, priv->sopass, sizeof(priv->sopass));
397 }
398
399 static int bcm_sysport_set_wol(struct net_device *dev,
400                                struct ethtool_wolinfo *wol)
401 {
402         struct bcm_sysport_priv *priv = netdev_priv(dev);
403         struct device *kdev = &priv->pdev->dev;
404         u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
405
406         if (!device_can_wakeup(kdev))
407                 return -ENOTSUPP;
408
409         if (wol->wolopts & ~supported)
410                 return -EINVAL;
411
412         if (wol->wolopts & WAKE_MAGICSECURE)
413                 memcpy(priv->sopass, wol->sopass, sizeof(priv->sopass));
414
415         /* Flag the device and relevant IRQ as wakeup capable */
416         if (wol->wolopts) {
417                 device_set_wakeup_enable(kdev, 1);
418                 if (priv->wol_irq_disabled)
419                         enable_irq_wake(priv->wol_irq);
420                 priv->wol_irq_disabled = 0;
421         } else {
422                 device_set_wakeup_enable(kdev, 0);
423                 /* Avoid unbalanced disable_irq_wake calls */
424                 if (!priv->wol_irq_disabled)
425                         disable_irq_wake(priv->wol_irq);
426                 priv->wol_irq_disabled = 1;
427         }
428
429         priv->wolopts = wol->wolopts;
430
431         return 0;
432 }
433
434 static int bcm_sysport_get_coalesce(struct net_device *dev,
435                                     struct ethtool_coalesce *ec)
436 {
437         struct bcm_sysport_priv *priv = netdev_priv(dev);
438         u32 reg;
439
440         reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
441
442         ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
443         ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
444
445         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
446
447         ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
448         ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
449
450         return 0;
451 }
452
453 static int bcm_sysport_set_coalesce(struct net_device *dev,
454                                     struct ethtool_coalesce *ec)
455 {
456         struct bcm_sysport_priv *priv = netdev_priv(dev);
457         unsigned int i;
458         u32 reg;
459
460         /* Base system clock is 125Mhz, DMA timeout is this reference clock
461          * divided by 1024, which yield roughly 8.192 us, our maximum value has
462          * to fit in the RING_TIMEOUT_MASK (16 bits).
463          */
464         if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
465             ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
466             ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
467             ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
468                 return -EINVAL;
469
470         if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
471             (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0))
472                 return -EINVAL;
473
474         for (i = 0; i < dev->num_tx_queues; i++) {
475                 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(i));
476                 reg &= ~(RING_INTR_THRESH_MASK |
477                          RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
478                 reg |= ec->tx_max_coalesced_frames;
479                 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
480                          RING_TIMEOUT_SHIFT;
481                 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(i));
482         }
483
484         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
485         reg &= ~(RDMA_INTR_THRESH_MASK |
486                  RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
487         reg |= ec->rx_max_coalesced_frames;
488         reg |= DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000, 8192) <<
489                             RDMA_TIMEOUT_SHIFT;
490         rdma_writel(priv, reg, RDMA_MBDONE_INTR);
491
492         return 0;
493 }
494
495 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
496 {
497         dev_kfree_skb_any(cb->skb);
498         cb->skb = NULL;
499         dma_unmap_addr_set(cb, dma_addr, 0);
500 }
501
502 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
503                                              struct bcm_sysport_cb *cb)
504 {
505         struct device *kdev = &priv->pdev->dev;
506         struct net_device *ndev = priv->netdev;
507         struct sk_buff *skb, *rx_skb;
508         dma_addr_t mapping;
509
510         /* Allocate a new SKB for a new packet */
511         skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH,
512                                  GFP_ATOMIC | __GFP_NOWARN);
513         if (!skb) {
514                 priv->mib.alloc_rx_buff_failed++;
515                 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
516                 return NULL;
517         }
518
519         mapping = dma_map_single(kdev, skb->data,
520                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
521         if (dma_mapping_error(kdev, mapping)) {
522                 priv->mib.rx_dma_failed++;
523                 dev_kfree_skb_any(skb);
524                 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
525                 return NULL;
526         }
527
528         /* Grab the current SKB on the ring */
529         rx_skb = cb->skb;
530         if (likely(rx_skb))
531                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
532                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
533
534         /* Put the new SKB on the ring */
535         cb->skb = skb;
536         dma_unmap_addr_set(cb, dma_addr, mapping);
537         dma_desc_set_addr(priv, cb->bd_addr, mapping);
538
539         netif_dbg(priv, rx_status, ndev, "RX refill\n");
540
541         /* Return the current SKB to the caller */
542         return rx_skb;
543 }
544
545 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
546 {
547         struct bcm_sysport_cb *cb;
548         struct sk_buff *skb;
549         unsigned int i;
550
551         for (i = 0; i < priv->num_rx_bds; i++) {
552                 cb = &priv->rx_cbs[i];
553                 skb = bcm_sysport_rx_refill(priv, cb);
554                 if (skb)
555                         dev_kfree_skb(skb);
556                 if (!cb->skb)
557                         return -ENOMEM;
558         }
559
560         return 0;
561 }
562
563 /* Poll the hardware for up to budget packets to process */
564 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
565                                         unsigned int budget)
566 {
567         struct net_device *ndev = priv->netdev;
568         unsigned int processed = 0, to_process;
569         struct bcm_sysport_cb *cb;
570         struct sk_buff *skb;
571         unsigned int p_index;
572         u16 len, status;
573         struct bcm_rsb *rsb;
574
575         /* Determine how much we should process since last call */
576         p_index = rdma_readl(priv, RDMA_PROD_INDEX);
577         p_index &= RDMA_PROD_INDEX_MASK;
578
579         if (p_index < priv->rx_c_index)
580                 to_process = (RDMA_CONS_INDEX_MASK + 1) -
581                         priv->rx_c_index + p_index;
582         else
583                 to_process = p_index - priv->rx_c_index;
584
585         netif_dbg(priv, rx_status, ndev,
586                   "p_index=%d rx_c_index=%d to_process=%d\n",
587                   p_index, priv->rx_c_index, to_process);
588
589         while ((processed < to_process) && (processed < budget)) {
590                 cb = &priv->rx_cbs[priv->rx_read_ptr];
591                 skb = bcm_sysport_rx_refill(priv, cb);
592
593
594                 /* We do not have a backing SKB, so we do not a corresponding
595                  * DMA mapping for this incoming packet since
596                  * bcm_sysport_rx_refill always either has both skb and mapping
597                  * or none.
598                  */
599                 if (unlikely(!skb)) {
600                         netif_err(priv, rx_err, ndev, "out of memory!\n");
601                         ndev->stats.rx_dropped++;
602                         ndev->stats.rx_errors++;
603                         goto next;
604                 }
605
606                 /* Extract the Receive Status Block prepended */
607                 rsb = (struct bcm_rsb *)skb->data;
608                 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
609                 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
610                           DESC_STATUS_MASK;
611
612                 netif_dbg(priv, rx_status, ndev,
613                           "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
614                           p_index, priv->rx_c_index, priv->rx_read_ptr,
615                           len, status);
616
617                 if (unlikely(len > RX_BUF_LENGTH)) {
618                         netif_err(priv, rx_status, ndev, "oversized packet\n");
619                         ndev->stats.rx_length_errors++;
620                         ndev->stats.rx_errors++;
621                         dev_kfree_skb_any(skb);
622                         goto next;
623                 }
624
625                 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
626                         netif_err(priv, rx_status, ndev, "fragmented packet!\n");
627                         ndev->stats.rx_dropped++;
628                         ndev->stats.rx_errors++;
629                         dev_kfree_skb_any(skb);
630                         goto next;
631                 }
632
633                 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
634                         netif_err(priv, rx_err, ndev, "error packet\n");
635                         if (status & RX_STATUS_OVFLOW)
636                                 ndev->stats.rx_over_errors++;
637                         ndev->stats.rx_dropped++;
638                         ndev->stats.rx_errors++;
639                         dev_kfree_skb_any(skb);
640                         goto next;
641                 }
642
643                 skb_put(skb, len);
644
645                 /* Hardware validated our checksum */
646                 if (likely(status & DESC_L4_CSUM))
647                         skb->ip_summed = CHECKSUM_UNNECESSARY;
648
649                 /* Hardware pre-pends packets with 2bytes before Ethernet
650                  * header plus we have the Receive Status Block, strip off all
651                  * of this from the SKB.
652                  */
653                 skb_pull(skb, sizeof(*rsb) + 2);
654                 len -= (sizeof(*rsb) + 2);
655
656                 /* UniMAC may forward CRC */
657                 if (priv->crc_fwd) {
658                         skb_trim(skb, len - ETH_FCS_LEN);
659                         len -= ETH_FCS_LEN;
660                 }
661
662                 skb->protocol = eth_type_trans(skb, ndev);
663                 ndev->stats.rx_packets++;
664                 ndev->stats.rx_bytes += len;
665
666                 napi_gro_receive(&priv->napi, skb);
667 next:
668                 processed++;
669                 priv->rx_read_ptr++;
670
671                 if (priv->rx_read_ptr == priv->num_rx_bds)
672                         priv->rx_read_ptr = 0;
673         }
674
675         return processed;
676 }
677
678 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
679                                        struct bcm_sysport_cb *cb,
680                                        unsigned int *bytes_compl,
681                                        unsigned int *pkts_compl)
682 {
683         struct device *kdev = &priv->pdev->dev;
684         struct net_device *ndev = priv->netdev;
685
686         if (cb->skb) {
687                 ndev->stats.tx_bytes += cb->skb->len;
688                 *bytes_compl += cb->skb->len;
689                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
690                                  dma_unmap_len(cb, dma_len),
691                                  DMA_TO_DEVICE);
692                 ndev->stats.tx_packets++;
693                 (*pkts_compl)++;
694                 bcm_sysport_free_cb(cb);
695         /* SKB fragment */
696         } else if (dma_unmap_addr(cb, dma_addr)) {
697                 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
698                 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
699                                dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
700                 dma_unmap_addr_set(cb, dma_addr, 0);
701         }
702 }
703
704 /* Reclaim queued SKBs for transmission completion, lockless version */
705 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
706                                              struct bcm_sysport_tx_ring *ring)
707 {
708         struct net_device *ndev = priv->netdev;
709         unsigned int pkts_compl = 0, bytes_compl = 0;
710         unsigned int txbds_processed = 0;
711         struct bcm_sysport_cb *cb;
712         unsigned int txbds_ready;
713         unsigned int c_index;
714         u32 hw_ind;
715
716         /* Compute how many descriptors have been processed since last call */
717         hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
718         c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
719         txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
720
721         netif_dbg(priv, tx_done, ndev,
722                   "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n",
723                   ring->index, ring->c_index, c_index, txbds_ready);
724
725         while (txbds_processed < txbds_ready) {
726                 cb = &ring->cbs[ring->clean_index];
727                 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
728
729                 ring->desc_count++;
730                 txbds_processed++;
731
732                 if (likely(ring->clean_index < ring->size - 1))
733                         ring->clean_index++;
734                 else
735                         ring->clean_index = 0;
736         }
737
738         ring->c_index = c_index;
739
740         netif_dbg(priv, tx_done, ndev,
741                   "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
742                   ring->index, ring->c_index, pkts_compl, bytes_compl);
743
744         return pkts_compl;
745 }
746
747 /* Locked version of the per-ring TX reclaim routine */
748 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
749                                            struct bcm_sysport_tx_ring *ring)
750 {
751         struct netdev_queue *txq;
752         unsigned int released;
753         unsigned long flags;
754
755         txq = netdev_get_tx_queue(priv->netdev, ring->index);
756
757         spin_lock_irqsave(&ring->lock, flags);
758         released = __bcm_sysport_tx_reclaim(priv, ring);
759         if (released)
760                 netif_tx_wake_queue(txq);
761
762         spin_unlock_irqrestore(&ring->lock, flags);
763
764         return released;
765 }
766
767 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
768 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
769                                  struct bcm_sysport_tx_ring *ring)
770 {
771         unsigned long flags;
772
773         spin_lock_irqsave(&ring->lock, flags);
774         __bcm_sysport_tx_reclaim(priv, ring);
775         spin_unlock_irqrestore(&ring->lock, flags);
776 }
777
778 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
779 {
780         struct bcm_sysport_tx_ring *ring =
781                 container_of(napi, struct bcm_sysport_tx_ring, napi);
782         unsigned int work_done = 0;
783
784         work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
785
786         if (work_done == 0) {
787                 napi_complete(napi);
788                 /* re-enable TX interrupt */
789                 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
790
791                 return 0;
792         }
793
794         return budget;
795 }
796
797 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
798 {
799         unsigned int q;
800
801         for (q = 0; q < priv->netdev->num_tx_queues; q++)
802                 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
803 }
804
805 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
806 {
807         struct bcm_sysport_priv *priv =
808                 container_of(napi, struct bcm_sysport_priv, napi);
809         unsigned int work_done = 0;
810
811         work_done = bcm_sysport_desc_rx(priv, budget);
812
813         priv->rx_c_index += work_done;
814         priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
815         rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
816
817         if (work_done < budget) {
818                 napi_complete_done(napi, work_done);
819                 /* re-enable RX interrupts */
820                 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
821         }
822
823         return work_done;
824 }
825
826 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
827 {
828         u32 reg;
829
830         /* Clear the MagicPacket detection logic */
831         reg = umac_readl(priv, UMAC_MPD_CTRL);
832         reg &= ~MPD_EN;
833         umac_writel(priv, reg, UMAC_MPD_CTRL);
834
835         reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS);
836         if (reg & INTRL2_0_MPD)
837                 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n");
838
839         if (reg & INTRL2_0_BRCM_MATCH_TAG) {
840                 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) &
841                                   RXCHK_BRCM_TAG_MATCH_MASK;
842                 netdev_info(priv->netdev,
843                             "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg);
844         }
845
846         netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
847 }
848
849 /* RX and misc interrupt routine */
850 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
851 {
852         struct net_device *dev = dev_id;
853         struct bcm_sysport_priv *priv = netdev_priv(dev);
854
855         priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
856                           ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
857         intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
858
859         if (unlikely(priv->irq0_stat == 0)) {
860                 netdev_warn(priv->netdev, "spurious RX interrupt\n");
861                 return IRQ_NONE;
862         }
863
864         if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
865                 if (likely(napi_schedule_prep(&priv->napi))) {
866                         /* disable RX interrupts */
867                         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
868                         __napi_schedule_irqoff(&priv->napi);
869                 }
870         }
871
872         /* TX ring is full, perform a full reclaim since we do not know
873          * which one would trigger this interrupt
874          */
875         if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
876                 bcm_sysport_tx_reclaim_all(priv);
877
878         return IRQ_HANDLED;
879 }
880
881 /* TX interrupt service routine */
882 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
883 {
884         struct net_device *dev = dev_id;
885         struct bcm_sysport_priv *priv = netdev_priv(dev);
886         struct bcm_sysport_tx_ring *txr;
887         unsigned int ring;
888
889         priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
890                                 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
891         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
892
893         if (unlikely(priv->irq1_stat == 0)) {
894                 netdev_warn(priv->netdev, "spurious TX interrupt\n");
895                 return IRQ_NONE;
896         }
897
898         for (ring = 0; ring < dev->num_tx_queues; ring++) {
899                 if (!(priv->irq1_stat & BIT(ring)))
900                         continue;
901
902                 txr = &priv->tx_rings[ring];
903
904                 if (likely(napi_schedule_prep(&txr->napi))) {
905                         intrl2_1_mask_set(priv, BIT(ring));
906                         __napi_schedule_irqoff(&txr->napi);
907                 }
908         }
909
910         return IRQ_HANDLED;
911 }
912
913 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
914 {
915         struct bcm_sysport_priv *priv = dev_id;
916
917         pm_wakeup_event(&priv->pdev->dev, 0);
918
919         return IRQ_HANDLED;
920 }
921
922 #ifdef CONFIG_NET_POLL_CONTROLLER
923 static void bcm_sysport_poll_controller(struct net_device *dev)
924 {
925         struct bcm_sysport_priv *priv = netdev_priv(dev);
926
927         disable_irq(priv->irq0);
928         bcm_sysport_rx_isr(priv->irq0, priv);
929         enable_irq(priv->irq0);
930
931         disable_irq(priv->irq1);
932         bcm_sysport_tx_isr(priv->irq1, priv);
933         enable_irq(priv->irq1);
934 }
935 #endif
936
937 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
938                                               struct net_device *dev)
939 {
940         struct sk_buff *nskb;
941         struct bcm_tsb *tsb;
942         u32 csum_info;
943         u8 ip_proto;
944         u16 csum_start;
945         u16 ip_ver;
946
947         /* Re-allocate SKB if needed */
948         if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
949                 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
950                 dev_kfree_skb(skb);
951                 if (!nskb) {
952                         dev->stats.tx_errors++;
953                         dev->stats.tx_dropped++;
954                         return NULL;
955                 }
956                 skb = nskb;
957         }
958
959         tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
960         /* Zero-out TSB by default */
961         memset(tsb, 0, sizeof(*tsb));
962
963         if (skb->ip_summed == CHECKSUM_PARTIAL) {
964                 ip_ver = htons(skb->protocol);
965                 switch (ip_ver) {
966                 case ETH_P_IP:
967                         ip_proto = ip_hdr(skb)->protocol;
968                         break;
969                 case ETH_P_IPV6:
970                         ip_proto = ipv6_hdr(skb)->nexthdr;
971                         break;
972                 default:
973                         return skb;
974                 }
975
976                 /* Get the checksum offset and the L4 (transport) offset */
977                 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
978                 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
979                 csum_info |= (csum_start << L4_PTR_SHIFT);
980
981                 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
982                         csum_info |= L4_LENGTH_VALID;
983                         if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
984                                 csum_info |= L4_UDP;
985                 } else {
986                         csum_info = 0;
987                 }
988
989                 tsb->l4_ptr_dest_map = csum_info;
990         }
991
992         return skb;
993 }
994
995 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
996                                     struct net_device *dev)
997 {
998         struct bcm_sysport_priv *priv = netdev_priv(dev);
999         struct device *kdev = &priv->pdev->dev;
1000         struct bcm_sysport_tx_ring *ring;
1001         struct bcm_sysport_cb *cb;
1002         struct netdev_queue *txq;
1003         struct dma_desc *desc;
1004         unsigned int skb_len;
1005         unsigned long flags;
1006         dma_addr_t mapping;
1007         u32 len_status;
1008         u16 queue;
1009         int ret;
1010
1011         queue = skb_get_queue_mapping(skb);
1012         txq = netdev_get_tx_queue(dev, queue);
1013         ring = &priv->tx_rings[queue];
1014
1015         /* lock against tx reclaim in BH context and TX ring full interrupt */
1016         spin_lock_irqsave(&ring->lock, flags);
1017         if (unlikely(ring->desc_count == 0)) {
1018                 netif_tx_stop_queue(txq);
1019                 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1020                 ret = NETDEV_TX_BUSY;
1021                 goto out;
1022         }
1023
1024         /* The Ethernet switch we are interfaced with needs packets to be at
1025          * least 64 bytes (including FCS) otherwise they will be discarded when
1026          * they enter the switch port logic. When Broadcom tags are enabled, we
1027          * need to make sure that packets are at least 68 bytes
1028          * (including FCS and tag) because the length verification is done after
1029          * the Broadcom tag is stripped off the ingress packet.
1030          */
1031         if (skb_put_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
1032                 ret = NETDEV_TX_OK;
1033                 goto out;
1034         }
1035
1036         /* Insert TSB and checksum infos */
1037         if (priv->tsb_en) {
1038                 skb = bcm_sysport_insert_tsb(skb, dev);
1039                 if (!skb) {
1040                         ret = NETDEV_TX_OK;
1041                         goto out;
1042                 }
1043         }
1044
1045         skb_len = skb->len;
1046
1047         mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1048         if (dma_mapping_error(kdev, mapping)) {
1049                 priv->mib.tx_dma_failed++;
1050                 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1051                           skb->data, skb_len);
1052                 ret = NETDEV_TX_OK;
1053                 goto out;
1054         }
1055
1056         /* Remember the SKB for future freeing */
1057         cb = &ring->cbs[ring->curr_desc];
1058         cb->skb = skb;
1059         dma_unmap_addr_set(cb, dma_addr, mapping);
1060         dma_unmap_len_set(cb, dma_len, skb_len);
1061
1062         /* Fetch a descriptor entry from our pool */
1063         desc = ring->desc_cpu;
1064
1065         desc->addr_lo = lower_32_bits(mapping);
1066         len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1067         len_status |= (skb_len << DESC_LEN_SHIFT);
1068         len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1069                        DESC_STATUS_SHIFT;
1070         if (skb->ip_summed == CHECKSUM_PARTIAL)
1071                 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1072
1073         ring->curr_desc++;
1074         if (ring->curr_desc == ring->size)
1075                 ring->curr_desc = 0;
1076         ring->desc_count--;
1077
1078         /* Ensure write completion of the descriptor status/length
1079          * in DRAM before the System Port WRITE_PORT register latches
1080          * the value
1081          */
1082         wmb();
1083         desc->addr_status_len = len_status;
1084         wmb();
1085
1086         /* Write this descriptor address to the RING write port */
1087         tdma_port_write_desc_addr(priv, desc, ring->index);
1088
1089         /* Check ring space and update SW control flow */
1090         if (ring->desc_count == 0)
1091                 netif_tx_stop_queue(txq);
1092
1093         netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1094                   ring->index, ring->desc_count, ring->curr_desc);
1095
1096         ret = NETDEV_TX_OK;
1097 out:
1098         spin_unlock_irqrestore(&ring->lock, flags);
1099         return ret;
1100 }
1101
1102 static void bcm_sysport_tx_timeout(struct net_device *dev)
1103 {
1104         netdev_warn(dev, "transmit timeout!\n");
1105
1106         netif_trans_update(dev);
1107         dev->stats.tx_errors++;
1108
1109         netif_tx_wake_all_queues(dev);
1110 }
1111
1112 /* phylib adjust link callback */
1113 static void bcm_sysport_adj_link(struct net_device *dev)
1114 {
1115         struct bcm_sysport_priv *priv = netdev_priv(dev);
1116         struct phy_device *phydev = dev->phydev;
1117         unsigned int changed = 0;
1118         u32 cmd_bits = 0, reg;
1119
1120         if (priv->old_link != phydev->link) {
1121                 changed = 1;
1122                 priv->old_link = phydev->link;
1123         }
1124
1125         if (priv->old_duplex != phydev->duplex) {
1126                 changed = 1;
1127                 priv->old_duplex = phydev->duplex;
1128         }
1129
1130         switch (phydev->speed) {
1131         case SPEED_2500:
1132                 cmd_bits = CMD_SPEED_2500;
1133                 break;
1134         case SPEED_1000:
1135                 cmd_bits = CMD_SPEED_1000;
1136                 break;
1137         case SPEED_100:
1138                 cmd_bits = CMD_SPEED_100;
1139                 break;
1140         case SPEED_10:
1141                 cmd_bits = CMD_SPEED_10;
1142                 break;
1143         default:
1144                 break;
1145         }
1146         cmd_bits <<= CMD_SPEED_SHIFT;
1147
1148         if (phydev->duplex == DUPLEX_HALF)
1149                 cmd_bits |= CMD_HD_EN;
1150
1151         if (priv->old_pause != phydev->pause) {
1152                 changed = 1;
1153                 priv->old_pause = phydev->pause;
1154         }
1155
1156         if (!phydev->pause)
1157                 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1158
1159         if (!changed)
1160                 return;
1161
1162         if (phydev->link) {
1163                 reg = umac_readl(priv, UMAC_CMD);
1164                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1165                         CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1166                         CMD_TX_PAUSE_IGNORE);
1167                 reg |= cmd_bits;
1168                 umac_writel(priv, reg, UMAC_CMD);
1169         }
1170
1171         phy_print_status(phydev);
1172 }
1173
1174 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1175                                     unsigned int index)
1176 {
1177         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1178         struct device *kdev = &priv->pdev->dev;
1179         size_t size;
1180         void *p;
1181         u32 reg;
1182
1183         /* Simple descriptors partitioning for now */
1184         size = 256;
1185
1186         /* We just need one DMA descriptor which is DMA-able, since writing to
1187          * the port will allocate a new descriptor in its internal linked-list
1188          */
1189         p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1190                                 GFP_KERNEL);
1191         if (!p) {
1192                 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1193                 return -ENOMEM;
1194         }
1195
1196         ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1197         if (!ring->cbs) {
1198                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1199                 return -ENOMEM;
1200         }
1201
1202         /* Initialize SW view of the ring */
1203         spin_lock_init(&ring->lock);
1204         ring->priv = priv;
1205         netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1206         ring->index = index;
1207         ring->size = size;
1208         ring->clean_index = 0;
1209         ring->alloc_size = ring->size;
1210         ring->desc_cpu = p;
1211         ring->desc_count = ring->size;
1212         ring->curr_desc = 0;
1213
1214         /* Initialize HW ring */
1215         tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1216         tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1217         tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1218         tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1219         tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1220         tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1221
1222         /* Program the number of descriptors as MAX_THRESHOLD and half of
1223          * its size for the hysteresis trigger
1224          */
1225         tdma_writel(priv, ring->size |
1226                         1 << RING_HYST_THRESH_SHIFT,
1227                         TDMA_DESC_RING_MAX_HYST(index));
1228
1229         /* Enable the ring queue in the arbiter */
1230         reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1231         reg |= (1 << index);
1232         tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1233
1234         napi_enable(&ring->napi);
1235
1236         netif_dbg(priv, hw, priv->netdev,
1237                   "TDMA cfg, size=%d, desc_cpu=%p\n",
1238                   ring->size, ring->desc_cpu);
1239
1240         return 0;
1241 }
1242
1243 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1244                                      unsigned int index)
1245 {
1246         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1247         struct device *kdev = &priv->pdev->dev;
1248         u32 reg;
1249
1250         /* Caller should stop the TDMA engine */
1251         reg = tdma_readl(priv, TDMA_STATUS);
1252         if (!(reg & TDMA_DISABLED))
1253                 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1254
1255         /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1256          * fail, so by checking this pointer we know whether the TX ring was
1257          * fully initialized or not.
1258          */
1259         if (!ring->cbs)
1260                 return;
1261
1262         napi_disable(&ring->napi);
1263         netif_napi_del(&ring->napi);
1264
1265         bcm_sysport_tx_clean(priv, ring);
1266
1267         kfree(ring->cbs);
1268         ring->cbs = NULL;
1269
1270         if (ring->desc_dma) {
1271                 dma_free_coherent(kdev, sizeof(struct dma_desc),
1272                                   ring->desc_cpu, ring->desc_dma);
1273                 ring->desc_dma = 0;
1274         }
1275         ring->size = 0;
1276         ring->alloc_size = 0;
1277
1278         netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1279 }
1280
1281 /* RDMA helper */
1282 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1283                                   unsigned int enable)
1284 {
1285         unsigned int timeout = 1000;
1286         u32 reg;
1287
1288         reg = rdma_readl(priv, RDMA_CONTROL);
1289         if (enable)
1290                 reg |= RDMA_EN;
1291         else
1292                 reg &= ~RDMA_EN;
1293         rdma_writel(priv, reg, RDMA_CONTROL);
1294
1295         /* Poll for RMDA disabling completion */
1296         do {
1297                 reg = rdma_readl(priv, RDMA_STATUS);
1298                 if (!!(reg & RDMA_DISABLED) == !enable)
1299                         return 0;
1300                 usleep_range(1000, 2000);
1301         } while (timeout-- > 0);
1302
1303         netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1304
1305         return -ETIMEDOUT;
1306 }
1307
1308 /* TDMA helper */
1309 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1310                                   unsigned int enable)
1311 {
1312         unsigned int timeout = 1000;
1313         u32 reg;
1314
1315         reg = tdma_readl(priv, TDMA_CONTROL);
1316         if (enable)
1317                 reg |= TDMA_EN;
1318         else
1319                 reg &= ~TDMA_EN;
1320         tdma_writel(priv, reg, TDMA_CONTROL);
1321
1322         /* Poll for TMDA disabling completion */
1323         do {
1324                 reg = tdma_readl(priv, TDMA_STATUS);
1325                 if (!!(reg & TDMA_DISABLED) == !enable)
1326                         return 0;
1327
1328                 usleep_range(1000, 2000);
1329         } while (timeout-- > 0);
1330
1331         netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1332
1333         return -ETIMEDOUT;
1334 }
1335
1336 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1337 {
1338         struct bcm_sysport_cb *cb;
1339         u32 reg;
1340         int ret;
1341         int i;
1342
1343         /* Initialize SW view of the RX ring */
1344         priv->num_rx_bds = NUM_RX_DESC;
1345         priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1346         priv->rx_c_index = 0;
1347         priv->rx_read_ptr = 0;
1348         priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1349                                 GFP_KERNEL);
1350         if (!priv->rx_cbs) {
1351                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1352                 return -ENOMEM;
1353         }
1354
1355         for (i = 0; i < priv->num_rx_bds; i++) {
1356                 cb = priv->rx_cbs + i;
1357                 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1358         }
1359
1360         ret = bcm_sysport_alloc_rx_bufs(priv);
1361         if (ret) {
1362                 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1363                 return ret;
1364         }
1365
1366         /* Initialize HW, ensure RDMA is disabled */
1367         reg = rdma_readl(priv, RDMA_STATUS);
1368         if (!(reg & RDMA_DISABLED))
1369                 rdma_enable_set(priv, 0);
1370
1371         rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1372         rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1373         rdma_writel(priv, 0, RDMA_PROD_INDEX);
1374         rdma_writel(priv, 0, RDMA_CONS_INDEX);
1375         rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1376                           RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1377         /* Operate the queue in ring mode */
1378         rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1379         rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1380         rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1381         rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1382
1383         rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1384
1385         netif_dbg(priv, hw, priv->netdev,
1386                   "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1387                   priv->num_rx_bds, priv->rx_bds);
1388
1389         return 0;
1390 }
1391
1392 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1393 {
1394         struct bcm_sysport_cb *cb;
1395         unsigned int i;
1396         u32 reg;
1397
1398         /* Caller should ensure RDMA is disabled */
1399         reg = rdma_readl(priv, RDMA_STATUS);
1400         if (!(reg & RDMA_DISABLED))
1401                 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1402
1403         for (i = 0; i < priv->num_rx_bds; i++) {
1404                 cb = &priv->rx_cbs[i];
1405                 if (dma_unmap_addr(cb, dma_addr))
1406                         dma_unmap_single(&priv->pdev->dev,
1407                                          dma_unmap_addr(cb, dma_addr),
1408                                          RX_BUF_LENGTH, DMA_FROM_DEVICE);
1409                 bcm_sysport_free_cb(cb);
1410         }
1411
1412         kfree(priv->rx_cbs);
1413         priv->rx_cbs = NULL;
1414
1415         netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1416 }
1417
1418 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1419 {
1420         struct bcm_sysport_priv *priv = netdev_priv(dev);
1421         u32 reg;
1422
1423         reg = umac_readl(priv, UMAC_CMD);
1424         if (dev->flags & IFF_PROMISC)
1425                 reg |= CMD_PROMISC;
1426         else
1427                 reg &= ~CMD_PROMISC;
1428         umac_writel(priv, reg, UMAC_CMD);
1429
1430         /* No support for ALLMULTI */
1431         if (dev->flags & IFF_ALLMULTI)
1432                 return;
1433 }
1434
1435 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1436                                    u32 mask, unsigned int enable)
1437 {
1438         u32 reg;
1439
1440         reg = umac_readl(priv, UMAC_CMD);
1441         if (enable)
1442                 reg |= mask;
1443         else
1444                 reg &= ~mask;
1445         umac_writel(priv, reg, UMAC_CMD);
1446
1447         /* UniMAC stops on a packet boundary, wait for a full-sized packet
1448          * to be processed (1 msec).
1449          */
1450         if (enable == 0)
1451                 usleep_range(1000, 2000);
1452 }
1453
1454 static inline void umac_reset(struct bcm_sysport_priv *priv)
1455 {
1456         u32 reg;
1457
1458         reg = umac_readl(priv, UMAC_CMD);
1459         reg |= CMD_SW_RESET;
1460         umac_writel(priv, reg, UMAC_CMD);
1461         udelay(10);
1462         reg = umac_readl(priv, UMAC_CMD);
1463         reg &= ~CMD_SW_RESET;
1464         umac_writel(priv, reg, UMAC_CMD);
1465 }
1466
1467 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1468                              unsigned char *addr)
1469 {
1470         umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1471                         (addr[2] << 8) | addr[3], UMAC_MAC0);
1472         umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1473 }
1474
1475 static void topctrl_flush(struct bcm_sysport_priv *priv)
1476 {
1477         topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1478         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1479         mdelay(1);
1480         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1481         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1482 }
1483
1484 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1485 {
1486         struct bcm_sysport_priv *priv = netdev_priv(dev);
1487         struct sockaddr *addr = p;
1488
1489         if (!is_valid_ether_addr(addr->sa_data))
1490                 return -EINVAL;
1491
1492         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1493
1494         /* interface is disabled, changes to MAC will be reflected on next
1495          * open call
1496          */
1497         if (!netif_running(dev))
1498                 return 0;
1499
1500         umac_set_hw_addr(priv, dev->dev_addr);
1501
1502         return 0;
1503 }
1504
1505 static void bcm_sysport_netif_start(struct net_device *dev)
1506 {
1507         struct bcm_sysport_priv *priv = netdev_priv(dev);
1508
1509         /* Enable NAPI */
1510         napi_enable(&priv->napi);
1511
1512         /* Enable RX interrupt and TX ring full interrupt */
1513         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1514
1515         phy_start(dev->phydev);
1516
1517         /* Enable TX interrupts for the 32 TXQs */
1518         intrl2_1_mask_clear(priv, 0xffffffff);
1519
1520         /* Last call before we start the real business */
1521         netif_tx_start_all_queues(dev);
1522 }
1523
1524 static void rbuf_init(struct bcm_sysport_priv *priv)
1525 {
1526         u32 reg;
1527
1528         reg = rbuf_readl(priv, RBUF_CONTROL);
1529         reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1530         rbuf_writel(priv, reg, RBUF_CONTROL);
1531 }
1532
1533 static int bcm_sysport_open(struct net_device *dev)
1534 {
1535         struct bcm_sysport_priv *priv = netdev_priv(dev);
1536         struct phy_device *phydev;
1537         unsigned int i;
1538         int ret;
1539
1540         /* Reset UniMAC */
1541         umac_reset(priv);
1542
1543         /* Flush TX and RX FIFOs at TOPCTRL level */
1544         topctrl_flush(priv);
1545
1546         /* Disable the UniMAC RX/TX */
1547         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1548
1549         /* Enable RBUF 2bytes alignment and Receive Status Block */
1550         rbuf_init(priv);
1551
1552         /* Set maximum frame length */
1553         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1554
1555         /* Set MAC address */
1556         umac_set_hw_addr(priv, dev->dev_addr);
1557
1558         /* Read CRC forward */
1559         priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1560
1561         phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1562                                 0, priv->phy_interface);
1563         if (!phydev) {
1564                 netdev_err(dev, "could not attach to PHY\n");
1565                 return -ENODEV;
1566         }
1567
1568         /* Reset house keeping link status */
1569         priv->old_duplex = -1;
1570         priv->old_link = -1;
1571         priv->old_pause = -1;
1572
1573         /* mask all interrupts and request them */
1574         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1575         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1576         intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1577         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1578         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1579         intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1580
1581         ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1582         if (ret) {
1583                 netdev_err(dev, "failed to request RX interrupt\n");
1584                 goto out_phy_disconnect;
1585         }
1586
1587         ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1588         if (ret) {
1589                 netdev_err(dev, "failed to request TX interrupt\n");
1590                 goto out_free_irq0;
1591         }
1592
1593         /* Initialize both hardware and software ring */
1594         spin_lock_init(&priv->desc_lock);
1595         for (i = 0; i < dev->num_tx_queues; i++) {
1596                 ret = bcm_sysport_init_tx_ring(priv, i);
1597                 if (ret) {
1598                         netdev_err(dev, "failed to initialize TX ring %d\n",
1599                                    i);
1600                         goto out_free_tx_ring;
1601                 }
1602         }
1603
1604         /* Initialize linked-list */
1605         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1606
1607         /* Initialize RX ring */
1608         ret = bcm_sysport_init_rx_ring(priv);
1609         if (ret) {
1610                 netdev_err(dev, "failed to initialize RX ring\n");
1611                 goto out_free_rx_ring;
1612         }
1613
1614         /* Turn on RDMA */
1615         ret = rdma_enable_set(priv, 1);
1616         if (ret)
1617                 goto out_free_rx_ring;
1618
1619         /* Turn on TDMA */
1620         ret = tdma_enable_set(priv, 1);
1621         if (ret)
1622                 goto out_clear_rx_int;
1623
1624         /* Turn on UniMAC TX/RX */
1625         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1626
1627         bcm_sysport_netif_start(dev);
1628
1629         return 0;
1630
1631 out_clear_rx_int:
1632         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1633 out_free_rx_ring:
1634         bcm_sysport_fini_rx_ring(priv);
1635 out_free_tx_ring:
1636         for (i = 0; i < dev->num_tx_queues; i++)
1637                 bcm_sysport_fini_tx_ring(priv, i);
1638         free_irq(priv->irq1, dev);
1639 out_free_irq0:
1640         free_irq(priv->irq0, dev);
1641 out_phy_disconnect:
1642         phy_disconnect(phydev);
1643         return ret;
1644 }
1645
1646 static void bcm_sysport_netif_stop(struct net_device *dev)
1647 {
1648         struct bcm_sysport_priv *priv = netdev_priv(dev);
1649
1650         /* stop all software from updating hardware */
1651         netif_tx_stop_all_queues(dev);
1652         napi_disable(&priv->napi);
1653         phy_stop(dev->phydev);
1654
1655         /* mask all interrupts */
1656         intrl2_0_mask_set(priv, 0xffffffff);
1657         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1658         intrl2_1_mask_set(priv, 0xffffffff);
1659         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1660 }
1661
1662 static int bcm_sysport_stop(struct net_device *dev)
1663 {
1664         struct bcm_sysport_priv *priv = netdev_priv(dev);
1665         unsigned int i;
1666         int ret;
1667
1668         bcm_sysport_netif_stop(dev);
1669
1670         /* Disable UniMAC RX */
1671         umac_enable_set(priv, CMD_RX_EN, 0);
1672
1673         ret = tdma_enable_set(priv, 0);
1674         if (ret) {
1675                 netdev_err(dev, "timeout disabling RDMA\n");
1676                 return ret;
1677         }
1678
1679         /* Wait for a maximum packet size to be drained */
1680         usleep_range(2000, 3000);
1681
1682         ret = rdma_enable_set(priv, 0);
1683         if (ret) {
1684                 netdev_err(dev, "timeout disabling TDMA\n");
1685                 return ret;
1686         }
1687
1688         /* Disable UniMAC TX */
1689         umac_enable_set(priv, CMD_TX_EN, 0);
1690
1691         /* Free RX/TX rings SW structures */
1692         for (i = 0; i < dev->num_tx_queues; i++)
1693                 bcm_sysport_fini_tx_ring(priv, i);
1694         bcm_sysport_fini_rx_ring(priv);
1695
1696         free_irq(priv->irq0, dev);
1697         free_irq(priv->irq1, dev);
1698
1699         /* Disconnect from PHY */
1700         phy_disconnect(dev->phydev);
1701
1702         return 0;
1703 }
1704
1705 static const struct ethtool_ops bcm_sysport_ethtool_ops = {
1706         .get_drvinfo            = bcm_sysport_get_drvinfo,
1707         .get_msglevel           = bcm_sysport_get_msglvl,
1708         .set_msglevel           = bcm_sysport_set_msglvl,
1709         .get_link               = ethtool_op_get_link,
1710         .get_strings            = bcm_sysport_get_strings,
1711         .get_ethtool_stats      = bcm_sysport_get_stats,
1712         .get_sset_count         = bcm_sysport_get_sset_count,
1713         .get_wol                = bcm_sysport_get_wol,
1714         .set_wol                = bcm_sysport_set_wol,
1715         .get_coalesce           = bcm_sysport_get_coalesce,
1716         .set_coalesce           = bcm_sysport_set_coalesce,
1717         .get_link_ksettings     = phy_ethtool_get_link_ksettings,
1718         .set_link_ksettings     = phy_ethtool_set_link_ksettings,
1719 };
1720
1721 static const struct net_device_ops bcm_sysport_netdev_ops = {
1722         .ndo_start_xmit         = bcm_sysport_xmit,
1723         .ndo_tx_timeout         = bcm_sysport_tx_timeout,
1724         .ndo_open               = bcm_sysport_open,
1725         .ndo_stop               = bcm_sysport_stop,
1726         .ndo_set_features       = bcm_sysport_set_features,
1727         .ndo_set_rx_mode        = bcm_sysport_set_rx_mode,
1728         .ndo_set_mac_address    = bcm_sysport_change_mac,
1729 #ifdef CONFIG_NET_POLL_CONTROLLER
1730         .ndo_poll_controller    = bcm_sysport_poll_controller,
1731 #endif
1732 };
1733
1734 #define REV_FMT "v%2x.%02x"
1735
1736 static int bcm_sysport_probe(struct platform_device *pdev)
1737 {
1738         struct bcm_sysport_priv *priv;
1739         struct device_node *dn;
1740         struct net_device *dev;
1741         const void *macaddr;
1742         struct resource *r;
1743         u32 txq, rxq;
1744         int ret;
1745
1746         dn = pdev->dev.of_node;
1747         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1748
1749         /* Read the Transmit/Receive Queue properties */
1750         if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1751                 txq = TDMA_NUM_RINGS;
1752         if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1753                 rxq = 1;
1754
1755         dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1756         if (!dev)
1757                 return -ENOMEM;
1758
1759         /* Initialize private members */
1760         priv = netdev_priv(dev);
1761
1762         priv->irq0 = platform_get_irq(pdev, 0);
1763         priv->irq1 = platform_get_irq(pdev, 1);
1764         priv->wol_irq = platform_get_irq(pdev, 2);
1765         if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1766                 dev_err(&pdev->dev, "invalid interrupts\n");
1767                 ret = -EINVAL;
1768                 goto err_free_netdev;
1769         }
1770
1771         priv->base = devm_ioremap_resource(&pdev->dev, r);
1772         if (IS_ERR(priv->base)) {
1773                 ret = PTR_ERR(priv->base);
1774                 goto err_free_netdev;
1775         }
1776
1777         priv->netdev = dev;
1778         priv->pdev = pdev;
1779
1780         priv->phy_interface = of_get_phy_mode(dn);
1781         /* Default to GMII interface mode */
1782         if ((int)priv->phy_interface < 0)
1783                 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1784
1785         /* In the case of a fixed PHY, the DT node associated
1786          * to the PHY is the Ethernet MAC DT node.
1787          */
1788         if (of_phy_is_fixed_link(dn)) {
1789                 ret = of_phy_register_fixed_link(dn);
1790                 if (ret) {
1791                         dev_err(&pdev->dev, "failed to register fixed PHY\n");
1792                         goto err_free_netdev;
1793                 }
1794
1795                 priv->phy_dn = dn;
1796         }
1797
1798         /* Initialize netdevice members */
1799         macaddr = of_get_mac_address(dn);
1800         if (!macaddr || !is_valid_ether_addr(macaddr)) {
1801                 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1802                 eth_hw_addr_random(dev);
1803         } else {
1804                 ether_addr_copy(dev->dev_addr, macaddr);
1805         }
1806
1807         SET_NETDEV_DEV(dev, &pdev->dev);
1808         dev_set_drvdata(&pdev->dev, dev);
1809         dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1810         dev->netdev_ops = &bcm_sysport_netdev_ops;
1811         netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1812
1813         /* HW supported features, none enabled by default */
1814         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1815                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1816
1817         /* Request the WOL interrupt and advertise suspend if available */
1818         priv->wol_irq_disabled = 1;
1819         ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1820                                bcm_sysport_wol_isr, 0, dev->name, priv);
1821         if (!ret)
1822                 device_set_wakeup_capable(&pdev->dev, 1);
1823
1824         /* Set the needed headroom once and for all */
1825         BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1826         dev->needed_headroom += sizeof(struct bcm_tsb);
1827
1828         /* libphy will adjust the link state accordingly */
1829         netif_carrier_off(dev);
1830
1831         ret = register_netdev(dev);
1832         if (ret) {
1833                 dev_err(&pdev->dev, "failed to register net_device\n");
1834                 goto err_deregister_fixed_link;
1835         }
1836
1837         priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1838         dev_info(&pdev->dev,
1839                  "Broadcom SYSTEMPORT" REV_FMT
1840                  " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1841                  (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1842                  priv->base, priv->irq0, priv->irq1, txq, rxq);
1843
1844         return 0;
1845
1846 err_deregister_fixed_link:
1847         if (of_phy_is_fixed_link(dn))
1848                 of_phy_deregister_fixed_link(dn);
1849 err_free_netdev:
1850         free_netdev(dev);
1851         return ret;
1852 }
1853
1854 static int bcm_sysport_remove(struct platform_device *pdev)
1855 {
1856         struct net_device *dev = dev_get_drvdata(&pdev->dev);
1857         struct device_node *dn = pdev->dev.of_node;
1858
1859         /* Not much to do, ndo_close has been called
1860          * and we use managed allocations
1861          */
1862         unregister_netdev(dev);
1863         if (of_phy_is_fixed_link(dn))
1864                 of_phy_deregister_fixed_link(dn);
1865         free_netdev(dev);
1866         dev_set_drvdata(&pdev->dev, NULL);
1867
1868         return 0;
1869 }
1870
1871 #ifdef CONFIG_PM_SLEEP
1872 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1873 {
1874         struct net_device *ndev = priv->netdev;
1875         unsigned int timeout = 1000;
1876         u32 reg;
1877
1878         reg = umac_readl(priv, UMAC_MPD_CTRL);
1879         reg |= MPD_EN;
1880         reg &= ~PSW_EN;
1881         if (priv->wolopts & WAKE_MAGICSECURE) {
1882                 /* Program the SecureOn password */
1883                 umac_writel(priv, get_unaligned_be16(&priv->sopass[0]),
1884                             UMAC_PSW_MS);
1885                 umac_writel(priv, get_unaligned_be32(&priv->sopass[2]),
1886                             UMAC_PSW_LS);
1887                 reg |= PSW_EN;
1888         }
1889         umac_writel(priv, reg, UMAC_MPD_CTRL);
1890
1891         /* Make sure RBUF entered WoL mode as result */
1892         do {
1893                 reg = rbuf_readl(priv, RBUF_STATUS);
1894                 if (reg & RBUF_WOL_MODE)
1895                         break;
1896
1897                 udelay(10);
1898         } while (timeout-- > 0);
1899
1900         /* Do not leave the UniMAC RBUF matching only MPD packets */
1901         if (!timeout) {
1902                 reg = umac_readl(priv, UMAC_MPD_CTRL);
1903                 reg &= ~MPD_EN;
1904                 umac_writel(priv, reg, UMAC_MPD_CTRL);
1905                 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1906                 return -ETIMEDOUT;
1907         }
1908
1909         /* UniMAC receive needs to be turned on */
1910         umac_enable_set(priv, CMD_RX_EN, 1);
1911
1912         netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1913
1914         return 0;
1915 }
1916
1917 static int bcm_sysport_suspend(struct device *d)
1918 {
1919         struct net_device *dev = dev_get_drvdata(d);
1920         struct bcm_sysport_priv *priv = netdev_priv(dev);
1921         unsigned int i;
1922         int ret = 0;
1923         u32 reg;
1924
1925         if (!netif_running(dev))
1926                 return 0;
1927
1928         bcm_sysport_netif_stop(dev);
1929
1930         phy_suspend(dev->phydev);
1931
1932         netif_device_detach(dev);
1933
1934         /* Disable UniMAC RX */
1935         umac_enable_set(priv, CMD_RX_EN, 0);
1936
1937         ret = rdma_enable_set(priv, 0);
1938         if (ret) {
1939                 netdev_err(dev, "RDMA timeout!\n");
1940                 return ret;
1941         }
1942
1943         /* Disable RXCHK if enabled */
1944         if (priv->rx_chk_en) {
1945                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1946                 reg &= ~RXCHK_EN;
1947                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1948         }
1949
1950         /* Flush RX pipe */
1951         if (!priv->wolopts)
1952                 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1953
1954         ret = tdma_enable_set(priv, 0);
1955         if (ret) {
1956                 netdev_err(dev, "TDMA timeout!\n");
1957                 return ret;
1958         }
1959
1960         /* Wait for a packet boundary */
1961         usleep_range(2000, 3000);
1962
1963         umac_enable_set(priv, CMD_TX_EN, 0);
1964
1965         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1966
1967         /* Free RX/TX rings SW structures */
1968         for (i = 0; i < dev->num_tx_queues; i++)
1969                 bcm_sysport_fini_tx_ring(priv, i);
1970         bcm_sysport_fini_rx_ring(priv);
1971
1972         /* Get prepared for Wake-on-LAN */
1973         if (device_may_wakeup(d) && priv->wolopts)
1974                 ret = bcm_sysport_suspend_to_wol(priv);
1975
1976         return ret;
1977 }
1978
1979 static int bcm_sysport_resume(struct device *d)
1980 {
1981         struct net_device *dev = dev_get_drvdata(d);
1982         struct bcm_sysport_priv *priv = netdev_priv(dev);
1983         unsigned int i;
1984         u32 reg;
1985         int ret;
1986
1987         if (!netif_running(dev))
1988                 return 0;
1989
1990         umac_reset(priv);
1991
1992         /* Disable the UniMAC RX/TX */
1993         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1994
1995         /* We may have been suspended and never received a WOL event that
1996          * would turn off MPD detection, take care of that now
1997          */
1998         bcm_sysport_resume_from_wol(priv);
1999
2000         /* Initialize both hardware and software ring */
2001         for (i = 0; i < dev->num_tx_queues; i++) {
2002                 ret = bcm_sysport_init_tx_ring(priv, i);
2003                 if (ret) {
2004                         netdev_err(dev, "failed to initialize TX ring %d\n",
2005                                    i);
2006                         goto out_free_tx_rings;
2007                 }
2008         }
2009
2010         /* Initialize linked-list */
2011         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2012
2013         /* Initialize RX ring */
2014         ret = bcm_sysport_init_rx_ring(priv);
2015         if (ret) {
2016                 netdev_err(dev, "failed to initialize RX ring\n");
2017                 goto out_free_rx_ring;
2018         }
2019
2020         netif_device_attach(dev);
2021
2022         /* RX pipe enable */
2023         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2024
2025         ret = rdma_enable_set(priv, 1);
2026         if (ret) {
2027                 netdev_err(dev, "failed to enable RDMA\n");
2028                 goto out_free_rx_ring;
2029         }
2030
2031         /* Enable rxhck */
2032         if (priv->rx_chk_en) {
2033                 reg = rxchk_readl(priv, RXCHK_CONTROL);
2034                 reg |= RXCHK_EN;
2035                 rxchk_writel(priv, reg, RXCHK_CONTROL);
2036         }
2037
2038         rbuf_init(priv);
2039
2040         /* Set maximum frame length */
2041         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2042
2043         /* Set MAC address */
2044         umac_set_hw_addr(priv, dev->dev_addr);
2045
2046         umac_enable_set(priv, CMD_RX_EN, 1);
2047
2048         /* TX pipe enable */
2049         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2050
2051         umac_enable_set(priv, CMD_TX_EN, 1);
2052
2053         ret = tdma_enable_set(priv, 1);
2054         if (ret) {
2055                 netdev_err(dev, "TDMA timeout!\n");
2056                 goto out_free_rx_ring;
2057         }
2058
2059         phy_resume(dev->phydev);
2060
2061         bcm_sysport_netif_start(dev);
2062
2063         return 0;
2064
2065 out_free_rx_ring:
2066         bcm_sysport_fini_rx_ring(priv);
2067 out_free_tx_rings:
2068         for (i = 0; i < dev->num_tx_queues; i++)
2069                 bcm_sysport_fini_tx_ring(priv, i);
2070         return ret;
2071 }
2072 #endif
2073
2074 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2075                 bcm_sysport_suspend, bcm_sysport_resume);
2076
2077 static const struct of_device_id bcm_sysport_of_match[] = {
2078         { .compatible = "brcm,systemport-v1.00" },
2079         { .compatible = "brcm,systemport" },
2080         { /* sentinel */ }
2081 };
2082 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2083
2084 static struct platform_driver bcm_sysport_driver = {
2085         .probe  = bcm_sysport_probe,
2086         .remove = bcm_sysport_remove,
2087         .driver =  {
2088                 .name = "brcm-systemport",
2089                 .of_match_table = bcm_sysport_of_match,
2090                 .pm = &bcm_sysport_pm_ops,
2091         },
2092 };
2093 module_platform_driver(bcm_sysport_driver);
2094
2095 MODULE_AUTHOR("Broadcom Corporation");
2096 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2097 MODULE_ALIAS("platform:brcm-systemport");
2098 MODULE_LICENSE("GPL");