1 /* Broadcom NetXtreme-C/E network driver.
3 * Copyright (c) 2014-2016 Broadcom Corporation
4 * Copyright (c) 2016-2017 Broadcom Limited
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation.
11 #include <linux/ctype.h>
12 #include <linux/stringify.h>
13 #include <linux/ethtool.h>
14 #include <linux/interrupt.h>
15 #include <linux/pci.h>
16 #include <linux/etherdevice.h>
17 #include <linux/crc32.h>
18 #include <linux/firmware.h>
19 #include <linux/utsname.h>
20 #include <linux/time.h>
24 #include "bnxt_ethtool.h"
25 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
26 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
27 #include "bnxt_coredump.h"
28 #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
29 #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
30 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
32 static u32 bnxt_get_msglevel(struct net_device *dev)
34 struct bnxt *bp = netdev_priv(dev);
36 return bp->msg_enable;
39 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
41 struct bnxt *bp = netdev_priv(dev);
43 bp->msg_enable = value;
46 static int bnxt_get_coalesce(struct net_device *dev,
47 struct ethtool_coalesce *coal)
49 struct bnxt *bp = netdev_priv(dev);
50 struct bnxt_coal *hw_coal;
53 memset(coal, 0, sizeof(*coal));
55 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
57 hw_coal = &bp->rx_coal;
58 mult = hw_coal->bufs_per_record;
59 coal->rx_coalesce_usecs = hw_coal->coal_ticks;
60 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
61 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
62 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
64 hw_coal = &bp->tx_coal;
65 mult = hw_coal->bufs_per_record;
66 coal->tx_coalesce_usecs = hw_coal->coal_ticks;
67 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
68 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
69 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
71 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
76 static int bnxt_set_coalesce(struct net_device *dev,
77 struct ethtool_coalesce *coal)
79 struct bnxt *bp = netdev_priv(dev);
80 bool update_stats = false;
81 struct bnxt_coal *hw_coal;
85 if (coal->use_adaptive_rx_coalesce) {
86 bp->flags |= BNXT_FLAG_DIM;
88 if (bp->flags & BNXT_FLAG_DIM) {
89 bp->flags &= ~(BNXT_FLAG_DIM);
94 hw_coal = &bp->rx_coal;
95 mult = hw_coal->bufs_per_record;
96 hw_coal->coal_ticks = coal->rx_coalesce_usecs;
97 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
98 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
99 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
101 hw_coal = &bp->tx_coal;
102 mult = hw_coal->bufs_per_record;
103 hw_coal->coal_ticks = coal->tx_coalesce_usecs;
104 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
105 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
106 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
108 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
109 u32 stats_ticks = coal->stats_block_coalesce_usecs;
111 /* Allow 0, which means disable. */
113 stats_ticks = clamp_t(u32, stats_ticks,
114 BNXT_MIN_STATS_COAL_TICKS,
115 BNXT_MAX_STATS_COAL_TICKS);
116 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
117 bp->stats_coal_ticks = stats_ticks;
118 if (bp->stats_coal_ticks)
119 bp->current_interval =
120 bp->stats_coal_ticks * HZ / 1000000;
122 bp->current_interval = BNXT_TIMER_INTERVAL;
127 if (netif_running(dev)) {
129 rc = bnxt_close_nic(bp, true, false);
131 rc = bnxt_open_nic(bp, true, false);
133 rc = bnxt_hwrm_set_coal(bp);
140 #define BNXT_NUM_STATS 21
142 #define BNXT_RX_STATS_ENTRY(counter) \
143 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
145 #define BNXT_TX_STATS_ENTRY(counter) \
146 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
148 #define BNXT_RX_STATS_EXT_ENTRY(counter) \
149 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
158 char string[ETH_GSTRING_LEN];
159 } bnxt_sw_func_stats[] = {
160 {0, "rx_total_discard_pkts"},
161 {0, "tx_total_discard_pkts"},
164 static const struct {
166 char string[ETH_GSTRING_LEN];
167 } bnxt_port_stats_arr[] = {
168 BNXT_RX_STATS_ENTRY(rx_64b_frames),
169 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
170 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
171 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
172 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
173 BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames),
174 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
175 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
176 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
177 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
178 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
179 BNXT_RX_STATS_ENTRY(rx_total_frames),
180 BNXT_RX_STATS_ENTRY(rx_ucast_frames),
181 BNXT_RX_STATS_ENTRY(rx_mcast_frames),
182 BNXT_RX_STATS_ENTRY(rx_bcast_frames),
183 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
184 BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
185 BNXT_RX_STATS_ENTRY(rx_pause_frames),
186 BNXT_RX_STATS_ENTRY(rx_pfc_frames),
187 BNXT_RX_STATS_ENTRY(rx_align_err_frames),
188 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
189 BNXT_RX_STATS_ENTRY(rx_jbr_frames),
190 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
191 BNXT_RX_STATS_ENTRY(rx_tagged_frames),
192 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
193 BNXT_RX_STATS_ENTRY(rx_good_frames),
194 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
195 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
196 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
197 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
198 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
199 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
200 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
201 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
202 BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
203 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
204 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
205 BNXT_RX_STATS_ENTRY(rx_bytes),
206 BNXT_RX_STATS_ENTRY(rx_runt_bytes),
207 BNXT_RX_STATS_ENTRY(rx_runt_frames),
208 BNXT_RX_STATS_ENTRY(rx_stat_discard),
209 BNXT_RX_STATS_ENTRY(rx_stat_err),
211 BNXT_TX_STATS_ENTRY(tx_64b_frames),
212 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
213 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
214 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
215 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
216 BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames),
217 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
218 BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames),
219 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
220 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
221 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
222 BNXT_TX_STATS_ENTRY(tx_good_frames),
223 BNXT_TX_STATS_ENTRY(tx_total_frames),
224 BNXT_TX_STATS_ENTRY(tx_ucast_frames),
225 BNXT_TX_STATS_ENTRY(tx_mcast_frames),
226 BNXT_TX_STATS_ENTRY(tx_bcast_frames),
227 BNXT_TX_STATS_ENTRY(tx_pause_frames),
228 BNXT_TX_STATS_ENTRY(tx_pfc_frames),
229 BNXT_TX_STATS_ENTRY(tx_jabber_frames),
230 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
231 BNXT_TX_STATS_ENTRY(tx_err),
232 BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
233 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
234 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
235 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
236 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
237 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
238 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
239 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
240 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
241 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
242 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
243 BNXT_TX_STATS_ENTRY(tx_total_collisions),
244 BNXT_TX_STATS_ENTRY(tx_bytes),
245 BNXT_TX_STATS_ENTRY(tx_xthol_frames),
246 BNXT_TX_STATS_ENTRY(tx_stat_discard),
247 BNXT_TX_STATS_ENTRY(tx_stat_error),
250 static const struct {
252 char string[ETH_GSTRING_LEN];
253 } bnxt_port_stats_ext_arr[] = {
254 BNXT_RX_STATS_EXT_ENTRY(link_down_events),
255 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
256 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
257 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
258 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
261 #define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats)
262 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
263 #define BNXT_NUM_PORT_STATS_EXT ARRAY_SIZE(bnxt_port_stats_ext_arr)
265 static int bnxt_get_num_stats(struct bnxt *bp)
267 int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
269 num_stats += BNXT_NUM_SW_FUNC_STATS;
271 if (bp->flags & BNXT_FLAG_PORT_STATS)
272 num_stats += BNXT_NUM_PORT_STATS;
274 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT)
275 num_stats += BNXT_NUM_PORT_STATS_EXT;
280 static int bnxt_get_sset_count(struct net_device *dev, int sset)
282 struct bnxt *bp = netdev_priv(dev);
286 return bnxt_get_num_stats(bp);
290 return bp->num_tests;
296 static void bnxt_get_ethtool_stats(struct net_device *dev,
297 struct ethtool_stats *stats, u64 *buf)
300 struct bnxt *bp = netdev_priv(dev);
301 u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
306 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++)
307 bnxt_sw_func_stats[i].counter = 0;
309 for (i = 0; i < bp->cp_nr_rings; i++) {
310 struct bnxt_napi *bnapi = bp->bnapi[i];
311 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
312 __le64 *hw_stats = (__le64 *)cpr->hw_stats;
315 for (k = 0; k < stat_fields; j++, k++)
316 buf[j] = le64_to_cpu(hw_stats[k]);
317 buf[j++] = cpr->rx_l4_csum_errors;
319 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter +=
320 le64_to_cpu(cpr->hw_stats->rx_discard_pkts);
321 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter +=
322 le64_to_cpu(cpr->hw_stats->tx_discard_pkts);
325 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++)
326 buf[j] = bnxt_sw_func_stats[i].counter;
328 if (bp->flags & BNXT_FLAG_PORT_STATS) {
329 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
331 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
332 buf[j] = le64_to_cpu(*(port_stats +
333 bnxt_port_stats_arr[i].offset));
336 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
337 __le64 *port_stats_ext = (__le64 *)bp->hw_rx_port_stats_ext;
339 for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++, j++) {
340 buf[j] = le64_to_cpu(*(port_stats_ext +
341 bnxt_port_stats_ext_arr[i].offset));
346 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
348 struct bnxt *bp = netdev_priv(dev);
352 /* The number of strings must match BNXT_NUM_STATS defined above. */
354 for (i = 0; i < bp->cp_nr_rings; i++) {
355 sprintf(buf, "[%d]: rx_ucast_packets", i);
356 buf += ETH_GSTRING_LEN;
357 sprintf(buf, "[%d]: rx_mcast_packets", i);
358 buf += ETH_GSTRING_LEN;
359 sprintf(buf, "[%d]: rx_bcast_packets", i);
360 buf += ETH_GSTRING_LEN;
361 sprintf(buf, "[%d]: rx_discards", i);
362 buf += ETH_GSTRING_LEN;
363 sprintf(buf, "[%d]: rx_drops", i);
364 buf += ETH_GSTRING_LEN;
365 sprintf(buf, "[%d]: rx_ucast_bytes", i);
366 buf += ETH_GSTRING_LEN;
367 sprintf(buf, "[%d]: rx_mcast_bytes", i);
368 buf += ETH_GSTRING_LEN;
369 sprintf(buf, "[%d]: rx_bcast_bytes", i);
370 buf += ETH_GSTRING_LEN;
371 sprintf(buf, "[%d]: tx_ucast_packets", i);
372 buf += ETH_GSTRING_LEN;
373 sprintf(buf, "[%d]: tx_mcast_packets", i);
374 buf += ETH_GSTRING_LEN;
375 sprintf(buf, "[%d]: tx_bcast_packets", i);
376 buf += ETH_GSTRING_LEN;
377 sprintf(buf, "[%d]: tx_discards", i);
378 buf += ETH_GSTRING_LEN;
379 sprintf(buf, "[%d]: tx_drops", i);
380 buf += ETH_GSTRING_LEN;
381 sprintf(buf, "[%d]: tx_ucast_bytes", i);
382 buf += ETH_GSTRING_LEN;
383 sprintf(buf, "[%d]: tx_mcast_bytes", i);
384 buf += ETH_GSTRING_LEN;
385 sprintf(buf, "[%d]: tx_bcast_bytes", i);
386 buf += ETH_GSTRING_LEN;
387 sprintf(buf, "[%d]: tpa_packets", i);
388 buf += ETH_GSTRING_LEN;
389 sprintf(buf, "[%d]: tpa_bytes", i);
390 buf += ETH_GSTRING_LEN;
391 sprintf(buf, "[%d]: tpa_events", i);
392 buf += ETH_GSTRING_LEN;
393 sprintf(buf, "[%d]: tpa_aborts", i);
394 buf += ETH_GSTRING_LEN;
395 sprintf(buf, "[%d]: rx_l4_csum_errors", i);
396 buf += ETH_GSTRING_LEN;
398 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) {
399 strcpy(buf, bnxt_sw_func_stats[i].string);
400 buf += ETH_GSTRING_LEN;
403 if (bp->flags & BNXT_FLAG_PORT_STATS) {
404 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
405 strcpy(buf, bnxt_port_stats_arr[i].string);
406 buf += ETH_GSTRING_LEN;
409 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
410 for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++) {
411 strcpy(buf, bnxt_port_stats_ext_arr[i].string);
412 buf += ETH_GSTRING_LEN;
418 memcpy(buf, bp->test_info->string,
419 bp->num_tests * ETH_GSTRING_LEN);
422 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
428 static void bnxt_get_ringparam(struct net_device *dev,
429 struct ethtool_ringparam *ering)
431 struct bnxt *bp = netdev_priv(dev);
433 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
434 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
435 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
437 ering->rx_pending = bp->rx_ring_size;
438 ering->rx_jumbo_pending = bp->rx_agg_ring_size;
439 ering->tx_pending = bp->tx_ring_size;
442 static int bnxt_set_ringparam(struct net_device *dev,
443 struct ethtool_ringparam *ering)
445 struct bnxt *bp = netdev_priv(dev);
447 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
448 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
449 (ering->tx_pending < BNXT_MIN_TX_DESC_CNT))
452 if (netif_running(dev))
453 bnxt_close_nic(bp, false, false);
455 bp->rx_ring_size = ering->rx_pending;
456 bp->tx_ring_size = ering->tx_pending;
457 bnxt_set_ring_params(bp);
459 if (netif_running(dev))
460 return bnxt_open_nic(bp, false, false);
465 static void bnxt_get_channels(struct net_device *dev,
466 struct ethtool_channels *channel)
468 struct bnxt *bp = netdev_priv(dev);
469 struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
470 int max_rx_rings, max_tx_rings, tcs;
471 int max_tx_sch_inputs;
473 /* Get the most up-to-date max_tx_sch_inputs. */
474 if (netif_running(dev) && BNXT_NEW_RM(bp))
475 bnxt_hwrm_func_resc_qcaps(bp, false);
476 max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
478 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
479 if (max_tx_sch_inputs)
480 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
481 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
483 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
487 if (max_tx_sch_inputs)
488 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
490 tcs = netdev_get_num_tc(dev);
494 channel->max_rx = max_rx_rings;
495 channel->max_tx = max_tx_rings;
496 channel->max_other = 0;
497 if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
498 channel->combined_count = bp->rx_nr_rings;
499 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
500 channel->combined_count--;
502 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
503 channel->rx_count = bp->rx_nr_rings;
504 channel->tx_count = bp->tx_nr_rings_per_tc;
509 static int bnxt_set_channels(struct net_device *dev,
510 struct ethtool_channels *channel)
512 struct bnxt *bp = netdev_priv(dev);
513 int req_tx_rings, req_rx_rings, tcs;
518 if (channel->other_count)
521 if (!channel->combined_count &&
522 (!channel->rx_count || !channel->tx_count))
525 if (channel->combined_count &&
526 (channel->rx_count || channel->tx_count))
529 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
533 if (channel->combined_count)
536 tcs = netdev_get_num_tc(dev);
538 req_tx_rings = sh ? channel->combined_count : channel->tx_count;
539 req_rx_rings = sh ? channel->combined_count : channel->rx_count;
540 if (bp->tx_nr_rings_xdp) {
542 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
545 tx_xdp = req_rx_rings;
547 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
549 netdev_warn(dev, "Unable to allocate the requested rings\n");
553 if (netif_running(dev)) {
555 /* TODO CHIMP_FW: Send message to all VF's
559 rc = bnxt_close_nic(bp, true, false);
561 netdev_err(bp->dev, "Set channel failure rc :%x\n",
568 bp->flags |= BNXT_FLAG_SHARED_RINGS;
569 bp->rx_nr_rings = channel->combined_count;
570 bp->tx_nr_rings_per_tc = channel->combined_count;
572 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
573 bp->rx_nr_rings = channel->rx_count;
574 bp->tx_nr_rings_per_tc = channel->tx_count;
576 bp->tx_nr_rings_xdp = tx_xdp;
577 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
579 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
581 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
582 bp->tx_nr_rings + bp->rx_nr_rings;
584 bp->num_stat_ctxs = bp->cp_nr_rings;
586 /* After changing number of rx channels, update NTUPLE feature. */
587 netdev_update_features(dev);
588 if (netif_running(dev)) {
589 rc = bnxt_open_nic(bp, true, false);
590 if ((!rc) && BNXT_PF(bp)) {
591 /* TODO CHIMP_FW: Send message to all VF's
596 rc = bnxt_reserve_rings(bp);
602 #ifdef CONFIG_RFS_ACCEL
603 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
608 cmd->data = bp->ntp_fltr_count;
609 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
610 struct hlist_head *head;
611 struct bnxt_ntuple_filter *fltr;
613 head = &bp->ntp_fltr_hash_tbl[i];
615 hlist_for_each_entry_rcu(fltr, head, hash) {
616 if (j == cmd->rule_cnt)
618 rule_locs[j++] = fltr->sw_id;
621 if (j == cmd->rule_cnt)
628 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
630 struct ethtool_rx_flow_spec *fs =
631 (struct ethtool_rx_flow_spec *)&cmd->fs;
632 struct bnxt_ntuple_filter *fltr;
633 struct flow_keys *fkeys;
636 if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
639 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
640 struct hlist_head *head;
642 head = &bp->ntp_fltr_hash_tbl[i];
644 hlist_for_each_entry_rcu(fltr, head, hash) {
645 if (fltr->sw_id == fs->location)
653 fkeys = &fltr->fkeys;
654 if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
655 if (fkeys->basic.ip_proto == IPPROTO_TCP)
656 fs->flow_type = TCP_V4_FLOW;
657 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
658 fs->flow_type = UDP_V4_FLOW;
662 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
663 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
665 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
666 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
668 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
669 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
671 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
672 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
676 if (fkeys->basic.ip_proto == IPPROTO_TCP)
677 fs->flow_type = TCP_V6_FLOW;
678 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
679 fs->flow_type = UDP_V6_FLOW;
683 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
684 fkeys->addrs.v6addrs.src;
685 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
686 fkeys->addrs.v6addrs.dst;
687 for (i = 0; i < 4; i++) {
688 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
689 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
691 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
692 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
694 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
695 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
698 fs->ring_cookie = fltr->rxq;
708 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
710 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
711 return RXH_IP_SRC | RXH_IP_DST;
715 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
717 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
718 return RXH_IP_SRC | RXH_IP_DST;
722 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
725 switch (cmd->flow_type) {
727 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
728 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
729 RXH_L4_B_0_1 | RXH_L4_B_2_3;
730 cmd->data |= get_ethtool_ipv4_rss(bp);
733 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
734 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
735 RXH_L4_B_0_1 | RXH_L4_B_2_3;
742 cmd->data |= get_ethtool_ipv4_rss(bp);
746 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
747 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
748 RXH_L4_B_0_1 | RXH_L4_B_2_3;
749 cmd->data |= get_ethtool_ipv6_rss(bp);
752 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
753 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
754 RXH_L4_B_0_1 | RXH_L4_B_2_3;
761 cmd->data |= get_ethtool_ipv6_rss(bp);
767 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
768 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
770 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
772 u32 rss_hash_cfg = bp->rss_hash_cfg;
775 if (cmd->data == RXH_4TUPLE)
777 else if (cmd->data == RXH_2TUPLE)
784 if (cmd->flow_type == TCP_V4_FLOW) {
785 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
787 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
788 } else if (cmd->flow_type == UDP_V4_FLOW) {
789 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
791 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
793 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
794 } else if (cmd->flow_type == TCP_V6_FLOW) {
795 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
797 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
798 } else if (cmd->flow_type == UDP_V6_FLOW) {
799 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
801 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
803 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
804 } else if (tuple == 4) {
808 switch (cmd->flow_type) {
817 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
819 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
830 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
832 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
836 if (bp->rss_hash_cfg == rss_hash_cfg)
839 bp->rss_hash_cfg = rss_hash_cfg;
840 if (netif_running(bp->dev)) {
841 bnxt_close_nic(bp, false, false);
842 rc = bnxt_open_nic(bp, false, false);
847 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
850 struct bnxt *bp = netdev_priv(dev);
854 #ifdef CONFIG_RFS_ACCEL
855 case ETHTOOL_GRXRINGS:
856 cmd->data = bp->rx_nr_rings;
859 case ETHTOOL_GRXCLSRLCNT:
860 cmd->rule_cnt = bp->ntp_fltr_count;
861 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
864 case ETHTOOL_GRXCLSRLALL:
865 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
868 case ETHTOOL_GRXCLSRULE:
869 rc = bnxt_grxclsrule(bp, cmd);
874 rc = bnxt_grxfh(bp, cmd);
885 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
887 struct bnxt *bp = netdev_priv(dev);
892 rc = bnxt_srxfh(bp, cmd);
902 static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
904 return HW_HASH_INDEX_SIZE;
907 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
909 return HW_HASH_KEY_SIZE;
912 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
915 struct bnxt *bp = netdev_priv(dev);
916 struct bnxt_vnic_info *vnic;
920 *hfunc = ETH_RSS_HASH_TOP;
925 vnic = &bp->vnic_info[0];
926 if (indir && vnic->rss_table) {
927 for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
928 indir[i] = le16_to_cpu(vnic->rss_table[i]);
931 if (key && vnic->rss_hash_key)
932 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
937 static void bnxt_get_drvinfo(struct net_device *dev,
938 struct ethtool_drvinfo *info)
940 struct bnxt *bp = netdev_priv(dev);
942 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
943 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
944 strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
945 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
946 info->n_stats = bnxt_get_num_stats(bp);
947 info->testinfo_len = bp->num_tests;
948 /* TODO CHIMP_FW: eeprom dump details */
949 info->eedump_len = 0;
950 /* TODO CHIMP FW: reg dump details */
951 info->regdump_len = 0;
954 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
956 struct bnxt *bp = netdev_priv(dev);
960 memset(&wol->sopass, 0, sizeof(wol->sopass));
961 if (bp->flags & BNXT_FLAG_WOL_CAP) {
962 wol->supported = WAKE_MAGIC;
964 wol->wolopts = WAKE_MAGIC;
968 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
970 struct bnxt *bp = netdev_priv(dev);
972 if (wol->wolopts & ~WAKE_MAGIC)
975 if (wol->wolopts & WAKE_MAGIC) {
976 if (!(bp->flags & BNXT_FLAG_WOL_CAP))
979 if (bnxt_hwrm_alloc_wol_fltr(bp))
985 if (bnxt_hwrm_free_wol_fltr(bp))
993 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
997 /* TODO: support 25GB, 40GB, 50GB with different cable type */
998 /* set the advertised speeds */
999 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
1000 speed_mask |= ADVERTISED_100baseT_Full;
1001 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
1002 speed_mask |= ADVERTISED_1000baseT_Full;
1003 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
1004 speed_mask |= ADVERTISED_2500baseX_Full;
1005 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
1006 speed_mask |= ADVERTISED_10000baseT_Full;
1007 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1008 speed_mask |= ADVERTISED_40000baseCR4_Full;
1010 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
1011 speed_mask |= ADVERTISED_Pause;
1012 else if (fw_pause & BNXT_LINK_PAUSE_TX)
1013 speed_mask |= ADVERTISED_Asym_Pause;
1014 else if (fw_pause & BNXT_LINK_PAUSE_RX)
1015 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
1020 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
1022 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
1023 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1025 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
1026 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1028 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
1029 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1031 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
1032 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1033 25000baseCR_Full); \
1034 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
1035 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1036 40000baseCR4_Full);\
1037 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
1038 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1039 50000baseCR2_Full);\
1040 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \
1041 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1042 100000baseCR4_Full);\
1043 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
1044 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1046 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
1047 ethtool_link_ksettings_add_link_mode( \
1048 lk_ksettings, name, Asym_Pause);\
1049 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
1050 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1055 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
1057 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1059 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1061 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
1062 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1063 1000baseT_Full) || \
1064 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1066 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
1067 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1069 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
1070 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1071 25000baseCR_Full)) \
1072 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
1073 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1074 40000baseCR4_Full)) \
1075 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
1076 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1077 50000baseCR2_Full)) \
1078 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
1079 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1080 100000baseCR4_Full)) \
1081 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \
1084 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
1085 struct ethtool_link_ksettings *lk_ksettings)
1087 u16 fw_speeds = link_info->advertising;
1090 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1091 fw_pause = link_info->auto_pause_setting;
1093 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
1096 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
1097 struct ethtool_link_ksettings *lk_ksettings)
1099 u16 fw_speeds = link_info->lp_auto_link_speeds;
1102 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1103 fw_pause = link_info->lp_pause;
1105 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
1109 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
1110 struct ethtool_link_ksettings *lk_ksettings)
1112 u16 fw_speeds = link_info->support_speeds;
1114 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
1116 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1117 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1120 if (link_info->support_auto_speeds)
1121 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1125 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
1127 switch (fw_link_speed) {
1128 case BNXT_LINK_SPEED_100MB:
1130 case BNXT_LINK_SPEED_1GB:
1132 case BNXT_LINK_SPEED_2_5GB:
1134 case BNXT_LINK_SPEED_10GB:
1136 case BNXT_LINK_SPEED_20GB:
1138 case BNXT_LINK_SPEED_25GB:
1140 case BNXT_LINK_SPEED_40GB:
1142 case BNXT_LINK_SPEED_50GB:
1144 case BNXT_LINK_SPEED_100GB:
1145 return SPEED_100000;
1147 return SPEED_UNKNOWN;
1151 static int bnxt_get_link_ksettings(struct net_device *dev,
1152 struct ethtool_link_ksettings *lk_ksettings)
1154 struct bnxt *bp = netdev_priv(dev);
1155 struct bnxt_link_info *link_info = &bp->link_info;
1156 struct ethtool_link_settings *base = &lk_ksettings->base;
1159 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
1160 mutex_lock(&bp->link_lock);
1161 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
1163 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
1164 if (link_info->autoneg) {
1165 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
1166 ethtool_link_ksettings_add_link_mode(lk_ksettings,
1167 advertising, Autoneg);
1168 base->autoneg = AUTONEG_ENABLE;
1169 if (link_info->phy_link_status == BNXT_LINK_LINK)
1170 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
1171 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1172 if (!netif_carrier_ok(dev))
1173 base->duplex = DUPLEX_UNKNOWN;
1174 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1175 base->duplex = DUPLEX_FULL;
1177 base->duplex = DUPLEX_HALF;
1179 base->autoneg = AUTONEG_DISABLE;
1181 bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
1182 base->duplex = DUPLEX_HALF;
1183 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
1184 base->duplex = DUPLEX_FULL;
1186 base->speed = ethtool_speed;
1188 base->port = PORT_NONE;
1189 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1190 base->port = PORT_TP;
1191 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1193 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1196 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1198 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1201 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
1202 base->port = PORT_DA;
1203 else if (link_info->media_type ==
1204 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
1205 base->port = PORT_FIBRE;
1207 base->phy_address = link_info->phy_addr;
1208 mutex_unlock(&bp->link_lock);
1213 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
1215 struct bnxt *bp = netdev_priv(dev);
1216 struct bnxt_link_info *link_info = &bp->link_info;
1217 u16 support_spds = link_info->support_speeds;
1220 switch (ethtool_speed) {
1222 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1223 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
1226 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1227 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
1230 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1231 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
1234 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1235 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
1238 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1239 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
1242 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1243 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
1246 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1247 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
1250 if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1251 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
1254 if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
1255 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
1258 netdev_err(dev, "unsupported speed!\n");
1264 u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
1266 u16 fw_speed_mask = 0;
1268 /* only support autoneg at speed 100, 1000, and 10000 */
1269 if (advertising & (ADVERTISED_100baseT_Full |
1270 ADVERTISED_100baseT_Half)) {
1271 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1273 if (advertising & (ADVERTISED_1000baseT_Full |
1274 ADVERTISED_1000baseT_Half)) {
1275 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1277 if (advertising & ADVERTISED_10000baseT_Full)
1278 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1280 if (advertising & ADVERTISED_40000baseCR4_Full)
1281 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1283 return fw_speed_mask;
1286 static int bnxt_set_link_ksettings(struct net_device *dev,
1287 const struct ethtool_link_ksettings *lk_ksettings)
1289 struct bnxt *bp = netdev_priv(dev);
1290 struct bnxt_link_info *link_info = &bp->link_info;
1291 const struct ethtool_link_settings *base = &lk_ksettings->base;
1292 bool set_pause = false;
1293 u16 fw_advertising = 0;
1297 if (!BNXT_SINGLE_PF(bp))
1300 mutex_lock(&bp->link_lock);
1301 if (base->autoneg == AUTONEG_ENABLE) {
1302 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
1304 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1305 if (!fw_advertising)
1306 link_info->advertising = link_info->support_auto_speeds;
1308 link_info->advertising = fw_advertising;
1309 /* any change to autoneg will cause link change, therefore the
1310 * driver should put back the original pause setting in autoneg
1315 u8 phy_type = link_info->phy_type;
1317 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
1318 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1319 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1320 netdev_err(dev, "10GBase-T devices must autoneg\n");
1322 goto set_setting_exit;
1324 if (base->duplex == DUPLEX_HALF) {
1325 netdev_err(dev, "HALF DUPLEX is not supported!\n");
1327 goto set_setting_exit;
1329 speed = base->speed;
1330 fw_speed = bnxt_get_fw_speed(dev, speed);
1333 goto set_setting_exit;
1335 link_info->req_link_speed = fw_speed;
1336 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
1337 link_info->autoneg = 0;
1338 link_info->advertising = 0;
1341 if (netif_running(dev))
1342 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
1345 mutex_unlock(&bp->link_lock);
1349 static void bnxt_get_pauseparam(struct net_device *dev,
1350 struct ethtool_pauseparam *epause)
1352 struct bnxt *bp = netdev_priv(dev);
1353 struct bnxt_link_info *link_info = &bp->link_info;
1357 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
1358 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
1359 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
1362 static int bnxt_set_pauseparam(struct net_device *dev,
1363 struct ethtool_pauseparam *epause)
1366 struct bnxt *bp = netdev_priv(dev);
1367 struct bnxt_link_info *link_info = &bp->link_info;
1369 if (!BNXT_SINGLE_PF(bp))
1372 mutex_lock(&bp->link_lock);
1373 if (epause->autoneg) {
1374 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
1379 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
1380 link_info->req_flow_ctrl = 0;
1382 /* when transition from auto pause to force pause,
1383 * force a link change
1385 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1386 link_info->force_link_chng = true;
1387 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
1388 link_info->req_flow_ctrl = 0;
1390 if (epause->rx_pause)
1391 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
1393 if (epause->tx_pause)
1394 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
1396 if (netif_running(dev))
1397 rc = bnxt_hwrm_set_pause(bp);
1400 mutex_unlock(&bp->link_lock);
1404 static u32 bnxt_get_link(struct net_device *dev)
1406 struct bnxt *bp = netdev_priv(dev);
1408 /* TODO: handle MF, VF, driver close case */
1409 return bp->link_info.link_up;
1412 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1413 u16 ext, u16 *index, u32 *item_length,
1416 static int bnxt_flash_nvram(struct net_device *dev,
1424 struct bnxt *bp = netdev_priv(dev);
1426 struct hwrm_nvm_write_input req = {0};
1427 dma_addr_t dma_handle;
1430 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1432 req.dir_type = cpu_to_le16(dir_type);
1433 req.dir_ordinal = cpu_to_le16(dir_ordinal);
1434 req.dir_ext = cpu_to_le16(dir_ext);
1435 req.dir_attr = cpu_to_le16(dir_attr);
1436 req.dir_data_length = cpu_to_le32(data_len);
1438 kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1441 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1442 (unsigned)data_len);
1445 memcpy(kmem, data, data_len);
1446 req.host_src_addr = cpu_to_le64(dma_handle);
1448 rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1449 dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1451 if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1453 "PF does not have admin privileges to flash the device\n");
1461 static int bnxt_firmware_reset(struct net_device *dev,
1464 struct hwrm_fw_reset_input req = {0};
1465 struct bnxt *bp = netdev_priv(dev);
1468 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1470 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1471 /* (e.g. when firmware isn't already running) */
1473 case BNX_DIR_TYPE_CHIMP_PATCH:
1474 case BNX_DIR_TYPE_BOOTCODE:
1475 case BNX_DIR_TYPE_BOOTCODE_2:
1476 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1477 /* Self-reset ChiMP upon next PCIe reset: */
1478 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1480 case BNX_DIR_TYPE_APE_FW:
1481 case BNX_DIR_TYPE_APE_PATCH:
1482 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
1483 /* Self-reset APE upon next PCIe reset: */
1484 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1486 case BNX_DIR_TYPE_KONG_FW:
1487 case BNX_DIR_TYPE_KONG_PATCH:
1488 req.embedded_proc_type =
1489 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1491 case BNX_DIR_TYPE_BONO_FW:
1492 case BNX_DIR_TYPE_BONO_PATCH:
1493 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1495 case BNXT_FW_RESET_CHIP:
1496 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP;
1497 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP;
1499 case BNXT_FW_RESET_AP:
1500 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP;
1506 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1507 if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1509 "PF does not have admin privileges to reset the device\n");
1517 static int bnxt_flash_firmware(struct net_device *dev,
1526 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1529 case BNX_DIR_TYPE_BOOTCODE:
1530 case BNX_DIR_TYPE_BOOTCODE_2:
1531 code_type = CODE_BOOT;
1533 case BNX_DIR_TYPE_CHIMP_PATCH:
1534 code_type = CODE_CHIMP_PATCH;
1536 case BNX_DIR_TYPE_APE_FW:
1537 code_type = CODE_MCTP_PASSTHRU;
1539 case BNX_DIR_TYPE_APE_PATCH:
1540 code_type = CODE_APE_PATCH;
1542 case BNX_DIR_TYPE_KONG_FW:
1543 code_type = CODE_KONG_FW;
1545 case BNX_DIR_TYPE_KONG_PATCH:
1546 code_type = CODE_KONG_PATCH;
1548 case BNX_DIR_TYPE_BONO_FW:
1549 code_type = CODE_BONO_FW;
1551 case BNX_DIR_TYPE_BONO_PATCH:
1552 code_type = CODE_BONO_PATCH;
1555 netdev_err(dev, "Unsupported directory entry type: %u\n",
1559 if (fw_size < sizeof(struct bnxt_fw_header)) {
1560 netdev_err(dev, "Invalid firmware file size: %u\n",
1561 (unsigned int)fw_size);
1564 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
1565 netdev_err(dev, "Invalid firmware signature: %08X\n",
1566 le32_to_cpu(header->signature));
1569 if (header->code_type != code_type) {
1570 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
1571 code_type, header->code_type);
1574 if (header->device != DEVICE_CUMULUS_FAMILY) {
1575 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
1576 DEVICE_CUMULUS_FAMILY, header->device);
1579 /* Confirm the CRC32 checksum of the file: */
1580 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1581 sizeof(stored_crc)));
1582 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1583 if (calculated_crc != stored_crc) {
1584 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
1585 (unsigned long)stored_crc,
1586 (unsigned long)calculated_crc);
1589 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1590 0, 0, fw_data, fw_size);
1591 if (rc == 0) /* Firmware update successful */
1592 rc = bnxt_firmware_reset(dev, dir_type);
1597 static int bnxt_flash_microcode(struct net_device *dev,
1602 struct bnxt_ucode_trailer *trailer;
1607 if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
1608 netdev_err(dev, "Invalid microcode file size: %u\n",
1609 (unsigned int)fw_size);
1612 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
1614 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
1615 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
1616 le32_to_cpu(trailer->sig));
1619 if (le16_to_cpu(trailer->dir_type) != dir_type) {
1620 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
1621 dir_type, le16_to_cpu(trailer->dir_type));
1624 if (le16_to_cpu(trailer->trailer_length) <
1625 sizeof(struct bnxt_ucode_trailer)) {
1626 netdev_err(dev, "Invalid microcode trailer length: %d\n",
1627 le16_to_cpu(trailer->trailer_length));
1631 /* Confirm the CRC32 checksum of the file: */
1632 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1633 sizeof(stored_crc)));
1634 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1635 if (calculated_crc != stored_crc) {
1637 "CRC32 (%08lX) does not match calculated: %08lX\n",
1638 (unsigned long)stored_crc,
1639 (unsigned long)calculated_crc);
1642 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1643 0, 0, fw_data, fw_size);
1648 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
1651 case BNX_DIR_TYPE_CHIMP_PATCH:
1652 case BNX_DIR_TYPE_BOOTCODE:
1653 case BNX_DIR_TYPE_BOOTCODE_2:
1654 case BNX_DIR_TYPE_APE_FW:
1655 case BNX_DIR_TYPE_APE_PATCH:
1656 case BNX_DIR_TYPE_KONG_FW:
1657 case BNX_DIR_TYPE_KONG_PATCH:
1658 case BNX_DIR_TYPE_BONO_FW:
1659 case BNX_DIR_TYPE_BONO_PATCH:
1666 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
1669 case BNX_DIR_TYPE_AVS:
1670 case BNX_DIR_TYPE_EXP_ROM_MBA:
1671 case BNX_DIR_TYPE_PCIE:
1672 case BNX_DIR_TYPE_TSCF_UCODE:
1673 case BNX_DIR_TYPE_EXT_PHY:
1674 case BNX_DIR_TYPE_CCM:
1675 case BNX_DIR_TYPE_ISCSI_BOOT:
1676 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
1677 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
1684 static bool bnxt_dir_type_is_executable(u16 dir_type)
1686 return bnxt_dir_type_is_ape_bin_format(dir_type) ||
1687 bnxt_dir_type_is_other_exec_format(dir_type);
1690 static int bnxt_flash_firmware_from_file(struct net_device *dev,
1692 const char *filename)
1694 const struct firmware *fw;
1697 rc = request_firmware(&fw, filename, &dev->dev);
1699 netdev_err(dev, "Error %d requesting firmware file: %s\n",
1703 if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
1704 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
1705 else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
1706 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
1708 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1709 0, 0, fw->data, fw->size);
1710 release_firmware(fw);
1714 static int bnxt_flash_package_from_file(struct net_device *dev,
1715 char *filename, u32 install_type)
1717 struct bnxt *bp = netdev_priv(dev);
1718 struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
1719 struct hwrm_nvm_install_update_input install = {0};
1720 const struct firmware *fw;
1721 int rc, hwrm_err = 0;
1725 bnxt_hwrm_fw_set_time(bp);
1727 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
1728 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1729 &index, &item_len, NULL) != 0) {
1730 netdev_err(dev, "PKG update area not created in nvram\n");
1734 rc = request_firmware(&fw, filename, &dev->dev);
1736 netdev_err(dev, "PKG error %d requesting file: %s\n",
1741 if (fw->size > item_len) {
1742 netdev_err(dev, "PKG insufficient update area in nvram: %lu",
1743 (unsigned long)fw->size);
1746 dma_addr_t dma_handle;
1748 struct hwrm_nvm_modify_input modify = {0};
1750 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
1752 modify.dir_idx = cpu_to_le16(index);
1753 modify.len = cpu_to_le32(fw->size);
1755 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
1756 &dma_handle, GFP_KERNEL);
1759 "dma_alloc_coherent failure, length = %u\n",
1760 (unsigned int)fw->size);
1763 memcpy(kmem, fw->data, fw->size);
1764 modify.host_src_addr = cpu_to_le64(dma_handle);
1766 hwrm_err = hwrm_send_message(bp, &modify,
1768 FLASH_PACKAGE_TIMEOUT);
1769 dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
1773 release_firmware(fw);
1777 if ((install_type & 0xffff) == 0)
1778 install_type >>= 16;
1779 bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
1780 install.install_type = cpu_to_le32(install_type);
1782 mutex_lock(&bp->hwrm_cmd_lock);
1783 hwrm_err = _hwrm_send_message(bp, &install, sizeof(install),
1784 INSTALL_PACKAGE_TIMEOUT);
1786 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
1788 if (resp->error_code && error_code ==
1789 NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
1790 install.flags |= cpu_to_le16(
1791 NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
1792 hwrm_err = _hwrm_send_message(bp, &install,
1794 INSTALL_PACKAGE_TIMEOUT);
1797 goto flash_pkg_exit;
1801 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
1802 (s8)resp->result, (int)resp->problem_item);
1806 mutex_unlock(&bp->hwrm_cmd_lock);
1808 if (hwrm_err == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1810 "PF does not have admin privileges to flash the device\n");
1812 } else if (hwrm_err) {
1818 static int bnxt_flash_device(struct net_device *dev,
1819 struct ethtool_flash *flash)
1821 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
1822 netdev_err(dev, "flashdev not supported from a virtual function\n");
1826 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
1827 flash->region > 0xffff)
1828 return bnxt_flash_package_from_file(dev, flash->data,
1831 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
1834 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
1836 struct bnxt *bp = netdev_priv(dev);
1838 struct hwrm_nvm_get_dir_info_input req = {0};
1839 struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
1841 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
1843 mutex_lock(&bp->hwrm_cmd_lock);
1844 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1846 *entries = le32_to_cpu(output->entries);
1847 *length = le32_to_cpu(output->entry_length);
1849 mutex_unlock(&bp->hwrm_cmd_lock);
1853 static int bnxt_get_eeprom_len(struct net_device *dev)
1855 struct bnxt *bp = netdev_priv(dev);
1860 /* The -1 return value allows the entire 32-bit range of offsets to be
1861 * passed via the ethtool command-line utility.
1866 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
1868 struct bnxt *bp = netdev_priv(dev);
1874 dma_addr_t dma_handle;
1875 struct hwrm_nvm_get_dir_entries_input req = {0};
1877 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
1881 if (!dir_entries || !entry_length)
1884 /* Insert 2 bytes of directory info (count and size of entries) */
1888 *data++ = dir_entries;
1889 *data++ = entry_length;
1891 memset(data, 0xff, len);
1893 buflen = dir_entries * entry_length;
1894 buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
1897 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1901 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
1902 req.host_dest_addr = cpu_to_le64(dma_handle);
1903 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1905 memcpy(data, buf, len > buflen ? buflen : len);
1906 dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
1910 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
1911 u32 length, u8 *data)
1913 struct bnxt *bp = netdev_priv(dev);
1916 dma_addr_t dma_handle;
1917 struct hwrm_nvm_read_input req = {0};
1922 buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
1925 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1929 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
1930 req.host_dest_addr = cpu_to_le64(dma_handle);
1931 req.dir_idx = cpu_to_le16(index);
1932 req.offset = cpu_to_le32(offset);
1933 req.len = cpu_to_le32(length);
1935 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1937 memcpy(data, buf, length);
1938 dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
1942 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1943 u16 ext, u16 *index, u32 *item_length,
1946 struct bnxt *bp = netdev_priv(dev);
1948 struct hwrm_nvm_find_dir_entry_input req = {0};
1949 struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
1951 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
1954 req.dir_type = cpu_to_le16(type);
1955 req.dir_ordinal = cpu_to_le16(ordinal);
1956 req.dir_ext = cpu_to_le16(ext);
1957 req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
1958 mutex_lock(&bp->hwrm_cmd_lock);
1959 rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1962 *index = le16_to_cpu(output->dir_idx);
1964 *item_length = le32_to_cpu(output->dir_item_length);
1966 *data_length = le32_to_cpu(output->dir_data_length);
1968 mutex_unlock(&bp->hwrm_cmd_lock);
1972 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
1974 char *retval = NULL;
1981 /* null-terminate the log data (removing last '\n'): */
1982 data[datalen - 1] = 0;
1983 for (p = data; *p != 0; p++) {
1986 while (*p != 0 && *p != '\n') {
1988 while (*p != 0 && *p != '\t' && *p != '\n')
1990 if (field == desired_field)
2005 static void bnxt_get_pkgver(struct net_device *dev)
2007 struct bnxt *bp = netdev_priv(dev);
2014 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
2015 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
2016 &index, NULL, &pkglen) != 0)
2019 pkgbuf = kzalloc(pkglen, GFP_KERNEL);
2021 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
2026 if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf))
2029 pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
2031 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
2032 len = strlen(bp->fw_ver_str);
2033 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
2040 static int bnxt_get_eeprom(struct net_device *dev,
2041 struct ethtool_eeprom *eeprom,
2047 if (eeprom->offset == 0) /* special offset value to get directory */
2048 return bnxt_get_nvram_directory(dev, eeprom->len, data);
2050 index = eeprom->offset >> 24;
2051 offset = eeprom->offset & 0xffffff;
2054 netdev_err(dev, "unsupported index value: %d\n", index);
2058 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
2061 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
2063 struct bnxt *bp = netdev_priv(dev);
2064 struct hwrm_nvm_erase_dir_entry_input req = {0};
2066 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
2067 req.dir_idx = cpu_to_le16(index);
2068 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2071 static int bnxt_set_eeprom(struct net_device *dev,
2072 struct ethtool_eeprom *eeprom,
2075 struct bnxt *bp = netdev_priv(dev);
2077 u16 type, ext, ordinal, attr;
2080 netdev_err(dev, "NVM write not supported from a virtual function\n");
2084 type = eeprom->magic >> 16;
2086 if (type == 0xffff) { /* special value for directory operations */
2087 index = eeprom->magic & 0xff;
2088 dir_op = eeprom->magic >> 8;
2092 case 0x0e: /* erase */
2093 if (eeprom->offset != ~eeprom->magic)
2095 return bnxt_erase_nvram_directory(dev, index - 1);
2101 /* Create or re-write an NVM item: */
2102 if (bnxt_dir_type_is_executable(type) == true)
2104 ext = eeprom->magic & 0xffff;
2105 ordinal = eeprom->offset >> 16;
2106 attr = eeprom->offset & 0xffff;
2108 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
2112 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
2114 struct bnxt *bp = netdev_priv(dev);
2115 struct ethtool_eee *eee = &bp->eee;
2116 struct bnxt_link_info *link_info = &bp->link_info;
2120 if (!BNXT_SINGLE_PF(bp))
2123 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2126 mutex_lock(&bp->link_lock);
2127 advertising = _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
2128 if (!edata->eee_enabled)
2131 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2132 netdev_warn(dev, "EEE requires autoneg\n");
2136 if (edata->tx_lpi_enabled) {
2137 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
2138 edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
2139 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
2140 bp->lpi_tmr_lo, bp->lpi_tmr_hi);
2143 } else if (!bp->lpi_tmr_hi) {
2144 edata->tx_lpi_timer = eee->tx_lpi_timer;
2147 if (!edata->advertised) {
2148 edata->advertised = advertising & eee->supported;
2149 } else if (edata->advertised & ~advertising) {
2150 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
2151 edata->advertised, advertising);
2156 eee->advertised = edata->advertised;
2157 eee->tx_lpi_enabled = edata->tx_lpi_enabled;
2158 eee->tx_lpi_timer = edata->tx_lpi_timer;
2160 eee->eee_enabled = edata->eee_enabled;
2162 if (netif_running(dev))
2163 rc = bnxt_hwrm_set_link_setting(bp, false, true);
2166 mutex_unlock(&bp->link_lock);
2170 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
2172 struct bnxt *bp = netdev_priv(dev);
2174 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2178 if (!bp->eee.eee_enabled) {
2179 /* Preserve tx_lpi_timer so that the last value will be used
2180 * by default when it is re-enabled.
2182 edata->advertised = 0;
2183 edata->tx_lpi_enabled = 0;
2186 if (!bp->eee.eee_active)
2187 edata->lp_advertised = 0;
2192 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
2193 u16 page_number, u16 start_addr,
2194 u16 data_length, u8 *buf)
2196 struct hwrm_port_phy_i2c_read_input req = {0};
2197 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2198 int rc, byte_offset = 0;
2200 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2201 req.i2c_slave_addr = i2c_addr;
2202 req.page_number = cpu_to_le16(page_number);
2203 req.port_id = cpu_to_le16(bp->pf.port_id);
2207 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
2208 data_length -= xfer_size;
2209 req.page_offset = cpu_to_le16(start_addr + byte_offset);
2210 req.data_length = xfer_size;
2211 req.enables = cpu_to_le32(start_addr + byte_offset ?
2212 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
2213 mutex_lock(&bp->hwrm_cmd_lock);
2214 rc = _hwrm_send_message(bp, &req, sizeof(req),
2217 memcpy(buf + byte_offset, output->data, xfer_size);
2218 mutex_unlock(&bp->hwrm_cmd_lock);
2219 byte_offset += xfer_size;
2220 } while (!rc && data_length > 0);
2225 static int bnxt_get_module_info(struct net_device *dev,
2226 struct ethtool_modinfo *modinfo)
2228 u8 data[SFF_DIAG_SUPPORT_OFFSET + 1];
2229 struct bnxt *bp = netdev_priv(dev);
2232 /* No point in going further if phy status indicates
2233 * module is not inserted or if it is powered down or
2234 * if it is of type 10GBase-T
2236 if (bp->link_info.module_status >
2237 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
2240 /* This feature is not supported in older firmware versions */
2241 if (bp->hwrm_spec_code < 0x10202)
2244 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0,
2245 SFF_DIAG_SUPPORT_OFFSET + 1,
2248 u8 module_id = data[0];
2249 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET];
2251 switch (module_id) {
2252 case SFF_MODULE_ID_SFP:
2253 modinfo->type = ETH_MODULE_SFF_8472;
2254 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2255 if (!diag_supported)
2256 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2258 case SFF_MODULE_ID_QSFP:
2259 case SFF_MODULE_ID_QSFP_PLUS:
2260 modinfo->type = ETH_MODULE_SFF_8436;
2261 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2263 case SFF_MODULE_ID_QSFP28:
2264 modinfo->type = ETH_MODULE_SFF_8636;
2265 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2275 static int bnxt_get_module_eeprom(struct net_device *dev,
2276 struct ethtool_eeprom *eeprom,
2279 struct bnxt *bp = netdev_priv(dev);
2280 u16 start = eeprom->offset, length = eeprom->len;
2283 memset(data, 0, eeprom->len);
2285 /* Read A0 portion of the EEPROM */
2286 if (start < ETH_MODULE_SFF_8436_LEN) {
2287 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2288 length = ETH_MODULE_SFF_8436_LEN - start;
2289 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2290 start, length, data);
2295 length = eeprom->len - length;
2298 /* Read A2 portion of the EEPROM */
2300 start -= ETH_MODULE_SFF_8436_LEN;
2301 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 0,
2302 start, length, data);
2307 static int bnxt_nway_reset(struct net_device *dev)
2311 struct bnxt *bp = netdev_priv(dev);
2312 struct bnxt_link_info *link_info = &bp->link_info;
2314 if (!BNXT_SINGLE_PF(bp))
2317 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
2320 if (netif_running(dev))
2321 rc = bnxt_hwrm_set_link_setting(bp, true, false);
2326 static int bnxt_set_phys_id(struct net_device *dev,
2327 enum ethtool_phys_id_state state)
2329 struct hwrm_port_led_cfg_input req = {0};
2330 struct bnxt *bp = netdev_priv(dev);
2331 struct bnxt_pf_info *pf = &bp->pf;
2332 struct bnxt_led_cfg *led_cfg;
2337 if (!bp->num_leds || BNXT_VF(bp))
2340 if (state == ETHTOOL_ID_ACTIVE) {
2341 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
2342 duration = cpu_to_le16(500);
2343 } else if (state == ETHTOOL_ID_INACTIVE) {
2344 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
2345 duration = cpu_to_le16(0);
2349 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
2350 req.port_id = cpu_to_le16(pf->port_id);
2351 req.num_leds = bp->num_leds;
2352 led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
2353 for (i = 0; i < bp->num_leds; i++, led_cfg++) {
2354 req.enables |= BNXT_LED_DFLT_ENABLES(i);
2355 led_cfg->led_id = bp->leds[i].led_id;
2356 led_cfg->led_state = led_state;
2357 led_cfg->led_blink_on = duration;
2358 led_cfg->led_blink_off = duration;
2359 led_cfg->led_group_id = bp->leds[i].led_group_id;
2361 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2367 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
2369 struct hwrm_selftest_irq_input req = {0};
2371 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
2372 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2375 static int bnxt_test_irq(struct bnxt *bp)
2379 for (i = 0; i < bp->cp_nr_rings; i++) {
2380 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
2383 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
2390 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
2392 struct hwrm_port_mac_cfg_input req = {0};
2394 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
2396 req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
2398 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
2400 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
2401 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2404 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds)
2406 struct hwrm_port_phy_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
2407 struct hwrm_port_phy_qcaps_input req = {0};
2410 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_QCAPS, -1, -1);
2411 mutex_lock(&bp->hwrm_cmd_lock);
2412 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2414 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode);
2416 mutex_unlock(&bp->hwrm_cmd_lock);
2420 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
2421 struct hwrm_port_phy_cfg_input *req)
2423 struct bnxt_link_info *link_info = &bp->link_info;
2428 if (!link_info->autoneg)
2431 rc = bnxt_query_force_speeds(bp, &fw_advertising);
2435 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2436 if (netif_carrier_ok(bp->dev))
2437 fw_speed = bp->link_info.link_speed;
2438 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
2439 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
2440 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
2441 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
2442 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
2443 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
2444 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
2445 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
2447 req->force_link_speed = cpu_to_le16(fw_speed);
2448 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
2449 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
2450 rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
2452 req->force_link_speed = cpu_to_le16(0);
2456 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext)
2458 struct hwrm_port_phy_cfg_input req = {0};
2460 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
2463 bnxt_disable_an_for_lpbk(bp, &req);
2465 req.lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL;
2467 req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
2469 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
2471 req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
2472 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2475 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi,
2476 u32 raw_cons, int pkt_size)
2478 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
2479 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
2480 struct bnxt_sw_rx_bd *rx_buf;
2481 struct rx_cmp *rxcmp;
2487 cp_cons = RING_CMP(raw_cons);
2488 rxcmp = (struct rx_cmp *)
2489 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
2490 cons = rxcmp->rx_cmp_opaque;
2491 rx_buf = &rxr->rx_buf_ring[cons];
2492 data = rx_buf->data_ptr;
2493 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
2494 if (len != pkt_size)
2497 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
2500 for ( ; i < pkt_size; i++) {
2501 if (data[i] != (u8)(i & 0xff))
2507 static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size)
2509 struct bnxt_napi *bnapi = bp->bnapi[0];
2510 struct bnxt_cp_ring_info *cpr;
2511 struct tx_cmp *txcmp;
2517 cpr = &bnapi->cp_ring;
2518 raw_cons = cpr->cp_raw_cons;
2519 for (i = 0; i < 200; i++) {
2520 cons = RING_CMP(raw_cons);
2521 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
2523 if (!TX_CMP_VALID(txcmp, raw_cons)) {
2528 /* The valid test of the entry must be done first before
2529 * reading any further.
2532 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
2533 rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size);
2534 raw_cons = NEXT_RAW_CMP(raw_cons);
2535 raw_cons = NEXT_RAW_CMP(raw_cons);
2538 raw_cons = NEXT_RAW_CMP(raw_cons);
2540 cpr->cp_raw_cons = raw_cons;
2544 static int bnxt_run_loopback(struct bnxt *bp)
2546 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
2547 int pkt_size, i = 0;
2548 struct sk_buff *skb;
2553 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
2554 skb = netdev_alloc_skb(bp->dev, pkt_size);
2557 data = skb_put(skb, pkt_size);
2558 eth_broadcast_addr(data);
2560 ether_addr_copy(&data[i], bp->dev->dev_addr);
2562 for ( ; i < pkt_size; i++)
2563 data[i] = (u8)(i & 0xff);
2565 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
2567 if (dma_mapping_error(&bp->pdev->dev, map)) {
2571 bnxt_xmit_xdp(bp, txr, map, pkt_size, 0);
2573 /* Sync BD data before updating doorbell */
2576 bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod);
2577 rc = bnxt_poll_loopback(bp, pkt_size);
2579 dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
2584 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
2586 struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
2587 struct hwrm_selftest_exec_input req = {0};
2590 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
2591 mutex_lock(&bp->hwrm_cmd_lock);
2592 resp->test_success = 0;
2593 req.flags = test_mask;
2594 rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
2595 *test_results = resp->test_success;
2596 mutex_unlock(&bp->hwrm_cmd_lock);
2600 #define BNXT_DRV_TESTS 4
2601 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS)
2602 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1)
2603 #define BNXT_EXTLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2)
2604 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 3)
2606 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
2609 struct bnxt *bp = netdev_priv(dev);
2610 bool do_ext_lpbk = false;
2611 bool offline = false;
2612 u8 test_results = 0;
2616 if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
2618 memset(buf, 0, sizeof(u64) * bp->num_tests);
2619 if (!netif_running(dev)) {
2620 etest->flags |= ETH_TEST_FL_FAILED;
2624 if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) &&
2625 (bp->test_info->flags & BNXT_TEST_FL_EXT_LPBK))
2628 if (etest->flags & ETH_TEST_FL_OFFLINE) {
2629 if (bp->pf.active_vfs) {
2630 etest->flags |= ETH_TEST_FL_FAILED;
2631 netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
2637 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2638 u8 bit_val = 1 << i;
2640 if (!(bp->test_info->offline_mask & bit_val))
2641 test_mask |= bit_val;
2643 test_mask |= bit_val;
2646 bnxt_run_fw_tests(bp, test_mask, &test_results);
2648 rc = bnxt_close_nic(bp, false, false);
2651 bnxt_run_fw_tests(bp, test_mask, &test_results);
2653 buf[BNXT_MACLPBK_TEST_IDX] = 1;
2654 bnxt_hwrm_mac_loopback(bp, true);
2656 rc = bnxt_half_open_nic(bp);
2658 bnxt_hwrm_mac_loopback(bp, false);
2659 etest->flags |= ETH_TEST_FL_FAILED;
2662 if (bnxt_run_loopback(bp))
2663 etest->flags |= ETH_TEST_FL_FAILED;
2665 buf[BNXT_MACLPBK_TEST_IDX] = 0;
2667 bnxt_hwrm_mac_loopback(bp, false);
2668 bnxt_hwrm_phy_loopback(bp, true, false);
2670 if (bnxt_run_loopback(bp)) {
2671 buf[BNXT_PHYLPBK_TEST_IDX] = 1;
2672 etest->flags |= ETH_TEST_FL_FAILED;
2675 etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE;
2676 bnxt_hwrm_phy_loopback(bp, true, true);
2678 if (bnxt_run_loopback(bp)) {
2679 buf[BNXT_EXTLPBK_TEST_IDX] = 1;
2680 etest->flags |= ETH_TEST_FL_FAILED;
2683 bnxt_hwrm_phy_loopback(bp, false, false);
2684 bnxt_half_close_nic(bp);
2685 rc = bnxt_open_nic(bp, false, true);
2687 if (rc || bnxt_test_irq(bp)) {
2688 buf[BNXT_IRQ_TEST_IDX] = 1;
2689 etest->flags |= ETH_TEST_FL_FAILED;
2691 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2692 u8 bit_val = 1 << i;
2694 if ((test_mask & bit_val) && !(test_results & bit_val)) {
2696 etest->flags |= ETH_TEST_FL_FAILED;
2701 static int bnxt_reset(struct net_device *dev, u32 *flags)
2703 struct bnxt *bp = netdev_priv(dev);
2707 netdev_err(dev, "Reset is not supported from a VF\n");
2711 if (pci_vfs_assigned(bp->pdev)) {
2713 "Reset not allowed when VFs are assigned to VMs\n");
2717 if (*flags == ETH_RESET_ALL) {
2718 /* This feature is not supported in older firmware versions */
2719 if (bp->hwrm_spec_code < 0x10803)
2722 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP);
2724 netdev_info(dev, "Reset request successful. Reload driver to complete reset\n");
2727 } else if (*flags == ETH_RESET_AP) {
2728 /* This feature is not supported in older firmware versions */
2729 if (bp->hwrm_spec_code < 0x10803)
2732 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_AP);
2734 netdev_info(dev, "Reset Application Processor request successful.\n");
2744 static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg, int msg_len,
2745 struct bnxt_hwrm_dbg_dma_info *info)
2747 struct hwrm_dbg_cmn_output *cmn_resp = bp->hwrm_cmd_resp_addr;
2748 struct hwrm_dbg_cmn_input *cmn_req = msg;
2749 __le16 *seq_ptr = msg + info->seq_off;
2750 u16 seq = 0, len, segs_off;
2751 void *resp = cmn_resp;
2752 dma_addr_t dma_handle;
2756 dma_buf = dma_alloc_coherent(&bp->pdev->dev, info->dma_len, &dma_handle,
2761 segs_off = offsetof(struct hwrm_dbg_coredump_list_output,
2763 cmn_req->host_dest_addr = cpu_to_le64(dma_handle);
2764 cmn_req->host_buf_len = cpu_to_le32(info->dma_len);
2765 mutex_lock(&bp->hwrm_cmd_lock);
2767 *seq_ptr = cpu_to_le16(seq);
2768 rc = _hwrm_send_message(bp, msg, msg_len, HWRM_CMD_TIMEOUT);
2772 len = le16_to_cpu(*((__le16 *)(resp + info->data_len_off)));
2774 cmn_req->req_type == cpu_to_le16(HWRM_DBG_COREDUMP_LIST)) {
2775 info->segs = le16_to_cpu(*((__le16 *)(resp +
2782 info->dest_buf_size = info->segs *
2783 sizeof(struct coredump_segment_record);
2784 info->dest_buf = kmalloc(info->dest_buf_size,
2786 if (!info->dest_buf) {
2792 if (info->dest_buf) {
2793 if ((info->seg_start + off + len) <=
2794 BNXT_COREDUMP_BUF_LEN(info->buf_len)) {
2795 memcpy(info->dest_buf + off, dma_buf, len);
2802 if (cmn_req->req_type ==
2803 cpu_to_le16(HWRM_DBG_COREDUMP_RETRIEVE))
2804 info->dest_buf_size += len;
2806 if (!(cmn_resp->flags & HWRM_DBG_CMN_FLAGS_MORE))
2812 mutex_unlock(&bp->hwrm_cmd_lock);
2813 dma_free_coherent(&bp->pdev->dev, info->dma_len, dma_buf, dma_handle);
2817 static int bnxt_hwrm_dbg_coredump_list(struct bnxt *bp,
2818 struct bnxt_coredump *coredump)
2820 struct hwrm_dbg_coredump_list_input req = {0};
2821 struct bnxt_hwrm_dbg_dma_info info = {NULL};
2824 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_LIST, -1, -1);
2826 info.dma_len = COREDUMP_LIST_BUF_LEN;
2827 info.seq_off = offsetof(struct hwrm_dbg_coredump_list_input, seq_no);
2828 info.data_len_off = offsetof(struct hwrm_dbg_coredump_list_output,
2831 rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
2833 coredump->data = info.dest_buf;
2834 coredump->data_size = info.dest_buf_size;
2835 coredump->total_segs = info.segs;
2840 static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 component_id,
2843 struct hwrm_dbg_coredump_initiate_input req = {0};
2845 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_INITIATE, -1, -1);
2846 req.component_id = cpu_to_le16(component_id);
2847 req.segment_id = cpu_to_le16(segment_id);
2849 return hwrm_send_message(bp, &req, sizeof(req), HWRM_COREDUMP_TIMEOUT);
2852 static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt *bp, u16 component_id,
2853 u16 segment_id, u32 *seg_len,
2854 void *buf, u32 buf_len, u32 offset)
2856 struct hwrm_dbg_coredump_retrieve_input req = {0};
2857 struct bnxt_hwrm_dbg_dma_info info = {NULL};
2860 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_RETRIEVE, -1, -1);
2861 req.component_id = cpu_to_le16(component_id);
2862 req.segment_id = cpu_to_le16(segment_id);
2864 info.dma_len = COREDUMP_RETRIEVE_BUF_LEN;
2865 info.seq_off = offsetof(struct hwrm_dbg_coredump_retrieve_input,
2867 info.data_len_off = offsetof(struct hwrm_dbg_coredump_retrieve_output,
2870 info.dest_buf = buf + offset;
2871 info.buf_len = buf_len;
2872 info.seg_start = offset;
2875 rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
2877 *seg_len = info.dest_buf_size;
2883 bnxt_fill_coredump_seg_hdr(struct bnxt *bp,
2884 struct bnxt_coredump_segment_hdr *seg_hdr,
2885 struct coredump_segment_record *seg_rec, u32 seg_len,
2886 int status, u32 duration, u32 instance)
2888 memset(seg_hdr, 0, sizeof(*seg_hdr));
2889 memcpy(seg_hdr->signature, "sEgM", 4);
2891 seg_hdr->component_id = (__force __le32)seg_rec->component_id;
2892 seg_hdr->segment_id = (__force __le32)seg_rec->segment_id;
2893 seg_hdr->low_version = seg_rec->version_low;
2894 seg_hdr->high_version = seg_rec->version_hi;
2896 /* For hwrm_ver_get response Component id = 2
2897 * and Segment id = 0
2899 seg_hdr->component_id = cpu_to_le32(2);
2900 seg_hdr->segment_id = 0;
2902 seg_hdr->function_id = cpu_to_le16(bp->pdev->devfn);
2903 seg_hdr->length = cpu_to_le32(seg_len);
2904 seg_hdr->status = cpu_to_le32(status);
2905 seg_hdr->duration = cpu_to_le32(duration);
2906 seg_hdr->data_offset = cpu_to_le32(sizeof(*seg_hdr));
2907 seg_hdr->instance = cpu_to_le32(instance);
2911 bnxt_fill_coredump_record(struct bnxt *bp, struct bnxt_coredump_record *record,
2912 time64_t start, s16 start_utc, u16 total_segs,
2915 time64_t end = ktime_get_real_seconds();
2916 u32 os_ver_major = 0, os_ver_minor = 0;
2919 time64_to_tm(start, 0, &tm);
2920 memset(record, 0, sizeof(*record));
2921 memcpy(record->signature, "cOrE", 4);
2923 record->low_version = 0;
2924 record->high_version = 1;
2925 record->asic_state = 0;
2926 strlcpy(record->system_name, utsname()->nodename,
2927 sizeof(record->system_name));
2928 record->year = cpu_to_le16(tm.tm_year + 1900);
2929 record->month = cpu_to_le16(tm.tm_mon + 1);
2930 record->day = cpu_to_le16(tm.tm_mday);
2931 record->hour = cpu_to_le16(tm.tm_hour);
2932 record->minute = cpu_to_le16(tm.tm_min);
2933 record->second = cpu_to_le16(tm.tm_sec);
2934 record->utc_bias = cpu_to_le16(start_utc);
2935 strcpy(record->commandline, "ethtool -w");
2936 record->total_segments = cpu_to_le32(total_segs);
2938 sscanf(utsname()->release, "%u.%u", &os_ver_major, &os_ver_minor);
2939 record->os_ver_major = cpu_to_le32(os_ver_major);
2940 record->os_ver_minor = cpu_to_le32(os_ver_minor);
2942 strlcpy(record->os_name, utsname()->sysname, 32);
2943 time64_to_tm(end, 0, &tm);
2944 record->end_year = cpu_to_le16(tm.tm_year + 1900);
2945 record->end_month = cpu_to_le16(tm.tm_mon + 1);
2946 record->end_day = cpu_to_le16(tm.tm_mday);
2947 record->end_hour = cpu_to_le16(tm.tm_hour);
2948 record->end_minute = cpu_to_le16(tm.tm_min);
2949 record->end_second = cpu_to_le16(tm.tm_sec);
2950 record->end_utc_bias = cpu_to_le16(sys_tz.tz_minuteswest * 60);
2951 record->asic_id1 = cpu_to_le32(bp->chip_num << 16 |
2952 bp->ver_resp.chip_rev << 8 |
2953 bp->ver_resp.chip_metal);
2954 record->asic_id2 = 0;
2955 record->coredump_status = cpu_to_le32(status);
2956 record->ioctl_low_version = 0;
2957 record->ioctl_high_version = 0;
2960 static int bnxt_get_coredump(struct bnxt *bp, void *buf, u32 *dump_len)
2962 u32 ver_get_resp_len = sizeof(struct hwrm_ver_get_output);
2963 u32 offset = 0, seg_hdr_len, seg_record_len, buf_len = 0;
2964 struct coredump_segment_record *seg_record = NULL;
2965 struct bnxt_coredump_segment_hdr seg_hdr;
2966 struct bnxt_coredump coredump = {NULL};
2967 time64_t start_time;
2972 buf_len = *dump_len;
2974 start_time = ktime_get_real_seconds();
2975 start_utc = sys_tz.tz_minuteswest * 60;
2976 seg_hdr_len = sizeof(seg_hdr);
2978 /* First segment should be hwrm_ver_get response */
2979 *dump_len = seg_hdr_len + ver_get_resp_len;
2981 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, NULL, ver_get_resp_len,
2983 memcpy(buf + offset, &seg_hdr, seg_hdr_len);
2984 offset += seg_hdr_len;
2985 memcpy(buf + offset, &bp->ver_resp, ver_get_resp_len);
2986 offset += ver_get_resp_len;
2989 rc = bnxt_hwrm_dbg_coredump_list(bp, &coredump);
2991 netdev_err(bp->dev, "Failed to get coredump segment list\n");
2995 *dump_len += seg_hdr_len * coredump.total_segs;
2997 seg_record = (struct coredump_segment_record *)coredump.data;
2998 seg_record_len = sizeof(*seg_record);
3000 for (i = 0; i < coredump.total_segs; i++) {
3001 u16 comp_id = le16_to_cpu(seg_record->component_id);
3002 u16 seg_id = le16_to_cpu(seg_record->segment_id);
3003 u32 duration = 0, seg_len = 0;
3004 unsigned long start, end;
3006 if (buf && ((offset + seg_hdr_len) >
3007 BNXT_COREDUMP_BUF_LEN(buf_len))) {
3014 rc = bnxt_hwrm_dbg_coredump_initiate(bp, comp_id, seg_id);
3017 "Failed to initiate coredump for seg = %d\n",
3018 seg_record->segment_id);
3022 /* Write segment data into the buffer */
3023 rc = bnxt_hwrm_dbg_coredump_retrieve(bp, comp_id, seg_id,
3024 &seg_len, buf, buf_len,
3025 offset + seg_hdr_len);
3026 if (rc && rc == -ENOBUFS)
3030 "Failed to retrieve coredump for seg = %d\n",
3031 seg_record->segment_id);
3035 duration = jiffies_to_msecs(end - start);
3036 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, seg_record, seg_len,
3040 /* Write segment header into the buffer */
3041 memcpy(buf + offset, &seg_hdr, seg_hdr_len);
3042 offset += seg_hdr_len + seg_len;
3045 *dump_len += seg_len;
3047 (struct coredump_segment_record *)((u8 *)seg_record +
3053 bnxt_fill_coredump_record(bp, buf + offset, start_time,
3054 start_utc, coredump.total_segs + 1,
3056 kfree(coredump.data);
3057 *dump_len += sizeof(struct bnxt_coredump_record);
3059 netdev_err(bp->dev, "Firmware returned large coredump buffer");
3063 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump)
3065 struct bnxt *bp = netdev_priv(dev);
3067 if (bp->hwrm_spec_code < 0x10801)
3070 dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 |
3071 bp->ver_resp.hwrm_fw_min_8b << 16 |
3072 bp->ver_resp.hwrm_fw_bld_8b << 8 |
3073 bp->ver_resp.hwrm_fw_rsvd_8b;
3075 return bnxt_get_coredump(bp, NULL, &dump->len);
3078 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump,
3081 struct bnxt *bp = netdev_priv(dev);
3083 if (bp->hwrm_spec_code < 0x10801)
3086 memset(buf, 0, dump->len);
3088 return bnxt_get_coredump(bp, buf, &dump->len);
3091 void bnxt_ethtool_init(struct bnxt *bp)
3093 struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
3094 struct hwrm_selftest_qlist_input req = {0};
3095 struct bnxt_test_info *test_info;
3096 struct net_device *dev = bp->dev;
3099 bnxt_get_pkgver(dev);
3101 if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
3104 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
3105 mutex_lock(&bp->hwrm_cmd_lock);
3106 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3108 goto ethtool_init_exit;
3110 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
3112 goto ethtool_init_exit;
3114 bp->test_info = test_info;
3115 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
3116 if (bp->num_tests > BNXT_MAX_TEST)
3117 bp->num_tests = BNXT_MAX_TEST;
3119 test_info->offline_mask = resp->offline_tests;
3120 test_info->timeout = le16_to_cpu(resp->test_timeout);
3121 if (!test_info->timeout)
3122 test_info->timeout = HWRM_CMD_TIMEOUT;
3123 for (i = 0; i < bp->num_tests; i++) {
3124 char *str = test_info->string[i];
3125 char *fw_str = resp->test0_name + i * 32;
3127 if (i == BNXT_MACLPBK_TEST_IDX) {
3128 strcpy(str, "Mac loopback test (offline)");
3129 } else if (i == BNXT_PHYLPBK_TEST_IDX) {
3130 strcpy(str, "Phy loopback test (offline)");
3131 } else if (i == BNXT_EXTLPBK_TEST_IDX) {
3132 strcpy(str, "Ext loopback test (offline)");
3133 } else if (i == BNXT_IRQ_TEST_IDX) {
3134 strcpy(str, "Interrupt_test (offline)");
3136 strlcpy(str, fw_str, ETH_GSTRING_LEN);
3137 strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
3138 if (test_info->offline_mask & (1 << i))
3139 strncat(str, " (offline)",
3140 ETH_GSTRING_LEN - strlen(str));
3142 strncat(str, " (online)",
3143 ETH_GSTRING_LEN - strlen(str));
3148 mutex_unlock(&bp->hwrm_cmd_lock);
3151 void bnxt_ethtool_free(struct bnxt *bp)
3153 kfree(bp->test_info);
3154 bp->test_info = NULL;
3157 const struct ethtool_ops bnxt_ethtool_ops = {
3158 .get_link_ksettings = bnxt_get_link_ksettings,
3159 .set_link_ksettings = bnxt_set_link_ksettings,
3160 .get_pauseparam = bnxt_get_pauseparam,
3161 .set_pauseparam = bnxt_set_pauseparam,
3162 .get_drvinfo = bnxt_get_drvinfo,
3163 .get_wol = bnxt_get_wol,
3164 .set_wol = bnxt_set_wol,
3165 .get_coalesce = bnxt_get_coalesce,
3166 .set_coalesce = bnxt_set_coalesce,
3167 .get_msglevel = bnxt_get_msglevel,
3168 .set_msglevel = bnxt_set_msglevel,
3169 .get_sset_count = bnxt_get_sset_count,
3170 .get_strings = bnxt_get_strings,
3171 .get_ethtool_stats = bnxt_get_ethtool_stats,
3172 .set_ringparam = bnxt_set_ringparam,
3173 .get_ringparam = bnxt_get_ringparam,
3174 .get_channels = bnxt_get_channels,
3175 .set_channels = bnxt_set_channels,
3176 .get_rxnfc = bnxt_get_rxnfc,
3177 .set_rxnfc = bnxt_set_rxnfc,
3178 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
3179 .get_rxfh_key_size = bnxt_get_rxfh_key_size,
3180 .get_rxfh = bnxt_get_rxfh,
3181 .flash_device = bnxt_flash_device,
3182 .get_eeprom_len = bnxt_get_eeprom_len,
3183 .get_eeprom = bnxt_get_eeprom,
3184 .set_eeprom = bnxt_set_eeprom,
3185 .get_link = bnxt_get_link,
3186 .get_eee = bnxt_get_eee,
3187 .set_eee = bnxt_set_eee,
3188 .get_module_info = bnxt_get_module_info,
3189 .get_module_eeprom = bnxt_get_module_eeprom,
3190 .nway_reset = bnxt_nway_reset,
3191 .set_phys_id = bnxt_set_phys_id,
3192 .self_test = bnxt_self_test,
3193 .reset = bnxt_reset,
3194 .get_dump_flag = bnxt_get_dump_flag,
3195 .get_dump_data = bnxt_get_dump_data,