2 * Copyright (C) 2015 Cavium, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
9 #include <linux/module.h>
10 #include <linux/interrupt.h>
11 #include <linux/pci.h>
12 #include <linux/netdevice.h>
13 #include <linux/if_vlan.h>
14 #include <linux/etherdevice.h>
15 #include <linux/ethtool.h>
16 #include <linux/log2.h>
17 #include <linux/prefetch.h>
18 #include <linux/irq.h>
19 #include <linux/iommu.h>
20 #include <linux/bpf.h>
21 #include <linux/bpf_trace.h>
22 #include <linux/filter.h>
23 #include <linux/net_tstamp.h>
24 #include <linux/workqueue.h>
28 #include "nicvf_queues.h"
29 #include "thunder_bgx.h"
30 #include "../common/cavium_ptp.h"
32 #define DRV_NAME "nicvf"
33 #define DRV_VERSION "1.0"
35 /* NOTE: Packets bigger than 1530 are split across multiple pages and XDP needs
36 * the buffer to be contiguous. Allow XDP to be set up only if we don't exceed
37 * this value, keeping headroom for the 14 byte Ethernet header and two
38 * VLAN tags (for QinQ)
40 #define MAX_XDP_MTU (1530 - ETH_HLEN - VLAN_HLEN * 2)
42 /* Supported devices */
43 static const struct pci_device_id nicvf_id_table[] = {
44 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
45 PCI_DEVICE_ID_THUNDER_NIC_VF,
47 PCI_SUBSYS_DEVID_88XX_NIC_VF) },
48 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
49 PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF,
51 PCI_SUBSYS_DEVID_88XX_PASS1_NIC_VF) },
52 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
53 PCI_DEVICE_ID_THUNDER_NIC_VF,
55 PCI_SUBSYS_DEVID_81XX_NIC_VF) },
56 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
57 PCI_DEVICE_ID_THUNDER_NIC_VF,
59 PCI_SUBSYS_DEVID_83XX_NIC_VF) },
60 { 0, } /* end of table */
63 MODULE_AUTHOR("Sunil Goutham");
64 MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver");
65 MODULE_LICENSE("GPL v2");
66 MODULE_VERSION(DRV_VERSION);
67 MODULE_DEVICE_TABLE(pci, nicvf_id_table);
69 static int debug = 0x00;
70 module_param(debug, int, 0644);
71 MODULE_PARM_DESC(debug, "Debug message level bitmap");
73 static int cpi_alg = CPI_ALG_NONE;
74 module_param(cpi_alg, int, 0444);
75 MODULE_PARM_DESC(cpi_alg,
76 "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)");
78 /* workqueue for handling kernel ndo_set_rx_mode() calls */
79 static struct workqueue_struct *nicvf_rx_mode_wq;
81 static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx)
84 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS);
89 /* The Cavium ThunderX network controller can *only* be found in SoCs
90 * containing the ThunderX ARM64 CPU implementation. All accesses to the device
91 * registers on this platform are implicitly strongly ordered with respect
92 * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use
93 * with no memory barriers in this driver. The readq()/writeq() functions add
94 * explicit ordering operation which in this case are redundant, and only
98 /* Register read/write APIs */
99 void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val)
101 writeq_relaxed(val, nic->reg_base + offset);
104 u64 nicvf_reg_read(struct nicvf *nic, u64 offset)
106 return readq_relaxed(nic->reg_base + offset);
109 void nicvf_queue_reg_write(struct nicvf *nic, u64 offset,
112 void __iomem *addr = nic->reg_base + offset;
114 writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT));
117 u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx)
119 void __iomem *addr = nic->reg_base + offset;
121 return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT));
124 /* VF -> PF mailbox communication */
125 static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx)
127 u64 *msg = (u64 *)mbx;
129 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]);
130 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]);
133 int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx)
135 int timeout = NIC_MBOX_MSG_TIMEOUT;
138 nic->pf_acked = false;
139 nic->pf_nacked = false;
141 nicvf_write_to_mbx(nic, mbx);
143 /* Wait for previous message to be acked, timeout 2sec */
144 while (!nic->pf_acked) {
145 if (nic->pf_nacked) {
146 netdev_err(nic->netdev,
147 "PF NACK to mbox msg 0x%02x from VF%d\n",
148 (mbx->msg.msg & 0xFF), nic->vf_id);
156 netdev_err(nic->netdev,
157 "PF didn't ACK to mbox msg 0x%02x from VF%d\n",
158 (mbx->msg.msg & 0xFF), nic->vf_id);
165 /* Checks if VF is able to comminicate with PF
166 * and also gets the VNIC number this VF is associated to.
168 static int nicvf_check_pf_ready(struct nicvf *nic)
170 union nic_mbx mbx = {};
172 mbx.msg.msg = NIC_MBOX_MSG_READY;
173 if (nicvf_send_msg_to_pf(nic, &mbx)) {
174 netdev_err(nic->netdev,
175 "PF didn't respond to READY msg\n");
182 static void nicvf_send_cfg_done(struct nicvf *nic)
184 union nic_mbx mbx = {};
186 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
187 if (nicvf_send_msg_to_pf(nic, &mbx)) {
188 netdev_err(nic->netdev,
189 "PF didn't respond to CFG DONE msg\n");
193 static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx)
196 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats;
198 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats;
201 static void nicvf_handle_mbx_intr(struct nicvf *nic)
203 union nic_mbx mbx = {};
208 mbx_addr = NIC_VF_PF_MAILBOX_0_1;
209 mbx_data = (u64 *)&mbx;
211 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) {
212 *mbx_data = nicvf_reg_read(nic, mbx_addr);
214 mbx_addr += sizeof(u64);
217 netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg);
218 switch (mbx.msg.msg) {
219 case NIC_MBOX_MSG_READY:
220 nic->pf_acked = true;
221 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F;
222 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F;
223 nic->node = mbx.nic_cfg.node_id;
224 if (!nic->set_mac_pending)
225 ether_addr_copy(nic->netdev->dev_addr,
226 mbx.nic_cfg.mac_addr);
227 nic->sqs_mode = mbx.nic_cfg.sqs_mode;
228 nic->loopback_supported = mbx.nic_cfg.loopback_supported;
229 nic->link_up = false;
233 case NIC_MBOX_MSG_ACK:
234 nic->pf_acked = true;
236 case NIC_MBOX_MSG_NACK:
237 nic->pf_nacked = true;
239 case NIC_MBOX_MSG_RSS_SIZE:
240 nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size;
241 nic->pf_acked = true;
243 case NIC_MBOX_MSG_BGX_STATS:
244 nicvf_read_bgx_stats(nic, &mbx.bgx_stats);
245 nic->pf_acked = true;
247 case NIC_MBOX_MSG_BGX_LINK_CHANGE:
248 nic->pf_acked = true;
249 nic->link_up = mbx.link_status.link_up;
250 nic->duplex = mbx.link_status.duplex;
251 nic->speed = mbx.link_status.speed;
252 nic->mac_type = mbx.link_status.mac_type;
254 netdev_info(nic->netdev, "Link is Up %d Mbps %s duplex\n",
256 nic->duplex == DUPLEX_FULL ?
258 netif_carrier_on(nic->netdev);
259 netif_tx_start_all_queues(nic->netdev);
261 netdev_info(nic->netdev, "Link is Down\n");
262 netif_carrier_off(nic->netdev);
263 netif_tx_stop_all_queues(nic->netdev);
266 case NIC_MBOX_MSG_ALLOC_SQS:
267 nic->sqs_count = mbx.sqs_alloc.qs_count;
268 nic->pf_acked = true;
270 case NIC_MBOX_MSG_SNICVF_PTR:
271 /* Primary VF: make note of secondary VF's pointer
272 * to be used while packet transmission.
274 nic->snicvf[mbx.nicvf.sqs_id] =
275 (struct nicvf *)mbx.nicvf.nicvf;
276 nic->pf_acked = true;
278 case NIC_MBOX_MSG_PNICVF_PTR:
279 /* Secondary VF/Qset: make note of primary VF's pointer
280 * to be used while packet reception, to handover packet
281 * to primary VF's netdev.
283 nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf;
284 nic->pf_acked = true;
286 case NIC_MBOX_MSG_PFC:
287 nic->pfc.autoneg = mbx.pfc.autoneg;
288 nic->pfc.fc_rx = mbx.pfc.fc_rx;
289 nic->pfc.fc_tx = mbx.pfc.fc_tx;
290 nic->pf_acked = true;
293 netdev_err(nic->netdev,
294 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg);
297 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0);
300 static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev)
302 union nic_mbx mbx = {};
304 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
305 mbx.mac.vf_id = nic->vf_id;
306 ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr);
308 return nicvf_send_msg_to_pf(nic, &mbx);
311 static void nicvf_config_cpi(struct nicvf *nic)
313 union nic_mbx mbx = {};
315 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG;
316 mbx.cpi_cfg.vf_id = nic->vf_id;
317 mbx.cpi_cfg.cpi_alg = nic->cpi_alg;
318 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt;
320 nicvf_send_msg_to_pf(nic, &mbx);
323 static void nicvf_get_rss_size(struct nicvf *nic)
325 union nic_mbx mbx = {};
327 mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE;
328 mbx.rss_size.vf_id = nic->vf_id;
329 nicvf_send_msg_to_pf(nic, &mbx);
332 void nicvf_config_rss(struct nicvf *nic)
334 union nic_mbx mbx = {};
335 struct nicvf_rss_info *rss = &nic->rss_info;
336 int ind_tbl_len = rss->rss_size;
339 mbx.rss_cfg.vf_id = nic->vf_id;
340 mbx.rss_cfg.hash_bits = rss->hash_bits;
341 while (ind_tbl_len) {
342 mbx.rss_cfg.tbl_offset = nextq;
343 mbx.rss_cfg.tbl_len = min(ind_tbl_len,
344 RSS_IND_TBL_LEN_PER_MBX_MSG);
345 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ?
346 NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG;
348 for (i = 0; i < mbx.rss_cfg.tbl_len; i++)
349 mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++];
351 nicvf_send_msg_to_pf(nic, &mbx);
353 ind_tbl_len -= mbx.rss_cfg.tbl_len;
357 void nicvf_set_rss_key(struct nicvf *nic)
359 struct nicvf_rss_info *rss = &nic->rss_info;
360 u64 key_addr = NIC_VNIC_RSS_KEY_0_4;
363 for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) {
364 nicvf_reg_write(nic, key_addr, rss->key[idx]);
365 key_addr += sizeof(u64);
369 static int nicvf_rss_init(struct nicvf *nic)
371 struct nicvf_rss_info *rss = &nic->rss_info;
374 nicvf_get_rss_size(nic);
376 if (cpi_alg != CPI_ALG_NONE) {
384 netdev_rss_key_fill(rss->key, RSS_HASH_KEY_SIZE * sizeof(u64));
385 nicvf_set_rss_key(nic);
387 rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA;
388 nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg);
390 rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size));
392 for (idx = 0; idx < rss->rss_size; idx++)
393 rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx,
395 nicvf_config_rss(nic);
399 /* Request PF to allocate additional Qsets */
400 static void nicvf_request_sqs(struct nicvf *nic)
402 union nic_mbx mbx = {};
404 int sqs_count = nic->sqs_count;
405 int rx_queues = 0, tx_queues = 0;
407 /* Only primary VF should request */
408 if (nic->sqs_mode || !nic->sqs_count)
411 mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS;
412 mbx.sqs_alloc.vf_id = nic->vf_id;
413 mbx.sqs_alloc.qs_count = nic->sqs_count;
414 if (nicvf_send_msg_to_pf(nic, &mbx)) {
415 /* No response from PF */
420 /* Return if no Secondary Qsets available */
424 if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS)
425 rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS;
427 tx_queues = nic->tx_queues + nic->xdp_tx_queues;
428 if (tx_queues > MAX_SND_QUEUES_PER_QS)
429 tx_queues = tx_queues - MAX_SND_QUEUES_PER_QS;
431 /* Set no of Rx/Tx queues in each of the SQsets */
432 for (sqs = 0; sqs < nic->sqs_count; sqs++) {
433 mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR;
434 mbx.nicvf.vf_id = nic->vf_id;
435 mbx.nicvf.sqs_id = sqs;
436 nicvf_send_msg_to_pf(nic, &mbx);
438 nic->snicvf[sqs]->sqs_id = sqs;
439 if (rx_queues > MAX_RCV_QUEUES_PER_QS) {
440 nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS;
441 rx_queues -= MAX_RCV_QUEUES_PER_QS;
443 nic->snicvf[sqs]->qs->rq_cnt = rx_queues;
447 if (tx_queues > MAX_SND_QUEUES_PER_QS) {
448 nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS;
449 tx_queues -= MAX_SND_QUEUES_PER_QS;
451 nic->snicvf[sqs]->qs->sq_cnt = tx_queues;
455 nic->snicvf[sqs]->qs->cq_cnt =
456 max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt);
458 /* Initialize secondary Qset's queues and its interrupts */
459 nicvf_open(nic->snicvf[sqs]->netdev);
462 /* Update stack with actual Rx/Tx queue count allocated */
463 if (sqs_count != nic->sqs_count)
464 nicvf_set_real_num_queues(nic->netdev,
465 nic->tx_queues, nic->rx_queues);
468 /* Send this Qset's nicvf pointer to PF.
469 * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs
470 * so that packets received by these Qsets can use primary VF's netdev
472 static void nicvf_send_vf_struct(struct nicvf *nic)
474 union nic_mbx mbx = {};
476 mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR;
477 mbx.nicvf.sqs_mode = nic->sqs_mode;
478 mbx.nicvf.nicvf = (u64)nic;
479 nicvf_send_msg_to_pf(nic, &mbx);
482 static void nicvf_get_primary_vf_struct(struct nicvf *nic)
484 union nic_mbx mbx = {};
486 mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR;
487 nicvf_send_msg_to_pf(nic, &mbx);
490 int nicvf_set_real_num_queues(struct net_device *netdev,
491 int tx_queues, int rx_queues)
495 err = netif_set_real_num_tx_queues(netdev, tx_queues);
498 "Failed to set no of Tx queues: %d\n", tx_queues);
502 err = netif_set_real_num_rx_queues(netdev, rx_queues);
505 "Failed to set no of Rx queues: %d\n", rx_queues);
509 static int nicvf_init_resources(struct nicvf *nic)
514 nicvf_qset_config(nic, true);
516 /* Initialize queues and HW for data transfer */
517 err = nicvf_config_data_transfer(nic, true);
519 netdev_err(nic->netdev,
520 "Failed to alloc/config VF's QSet resources\n");
527 static inline bool nicvf_xdp_rx(struct nicvf *nic, struct bpf_prog *prog,
528 struct cqe_rx_t *cqe_rx, struct snd_queue *sq,
529 struct rcv_queue *rq, struct sk_buff **skb)
535 u64 dma_addr, cpu_addr;
538 /* Retrieve packet buffer's DMA address and length */
539 len = *((u16 *)((void *)cqe_rx + (3 * sizeof(u64))));
540 dma_addr = *((u64 *)((void *)cqe_rx + (7 * sizeof(u64))));
542 cpu_addr = nicvf_iova_to_phys(nic, dma_addr);
545 cpu_addr = (u64)phys_to_virt(cpu_addr);
546 page = virt_to_page((void *)cpu_addr);
548 xdp.data_hard_start = page_address(page);
549 xdp.data = (void *)cpu_addr;
550 xdp_set_data_meta_invalid(&xdp);
551 xdp.data_end = xdp.data + len;
552 xdp.rxq = &rq->xdp_rxq;
553 orig_data = xdp.data;
556 action = bpf_prog_run_xdp(prog, &xdp);
559 len = xdp.data_end - xdp.data;
560 /* Check if XDP program has changed headers */
561 if (orig_data != xdp.data) {
562 offset = orig_data - xdp.data;
568 /* Check if it's a recycled page, if not
569 * unmap the DMA mapping.
571 * Recycled page holds an extra reference.
573 if (page_ref_count(page) == 1) {
574 dma_addr &= PAGE_MASK;
575 dma_unmap_page_attrs(&nic->pdev->dev, dma_addr,
576 RCV_FRAG_LEN + XDP_PACKET_HEADROOM,
578 DMA_ATTR_SKIP_CPU_SYNC);
581 /* Build SKB and pass on packet to network stack */
582 *skb = build_skb(xdp.data,
583 RCV_FRAG_LEN - cqe_rx->align_pad + offset);
590 nicvf_xdp_sq_append_pkt(nic, sq, (u64)xdp.data, dma_addr, len);
593 bpf_warn_invalid_xdp_action(action);
596 trace_xdp_exception(nic->netdev, prog, action);
599 /* Check if it's a recycled page, if not
600 * unmap the DMA mapping.
602 * Recycled page holds an extra reference.
604 if (page_ref_count(page) == 1) {
605 dma_addr &= PAGE_MASK;
606 dma_unmap_page_attrs(&nic->pdev->dev, dma_addr,
607 RCV_FRAG_LEN + XDP_PACKET_HEADROOM,
609 DMA_ATTR_SKIP_CPU_SYNC);
617 static void nicvf_snd_ptp_handler(struct net_device *netdev,
618 struct cqe_send_t *cqe_tx)
620 struct nicvf *nic = netdev_priv(netdev);
621 struct skb_shared_hwtstamps ts;
626 /* Sync for 'ptp_skb' */
629 /* New timestamp request can be queued now */
630 atomic_set(&nic->tx_ptp_skbs, 0);
632 /* Check for timestamp requested skb */
636 /* Check if timestamping is timedout, which is set to 10us */
637 if (cqe_tx->send_status == CQ_TX_ERROP_TSTMP_TIMEOUT ||
638 cqe_tx->send_status == CQ_TX_ERROP_TSTMP_CONFLICT)
641 /* Get the timestamp */
642 memset(&ts, 0, sizeof(ts));
643 ns = cavium_ptp_tstamp2time(nic->ptp_clock, cqe_tx->ptp_timestamp);
644 ts.hwtstamp = ns_to_ktime(ns);
645 skb_tstamp_tx(nic->ptp_skb, &ts);
648 /* Free the original skb */
649 dev_kfree_skb_any(nic->ptp_skb);
655 static void nicvf_snd_pkt_handler(struct net_device *netdev,
656 struct cqe_send_t *cqe_tx,
657 int budget, int *subdesc_cnt,
658 unsigned int *tx_pkts, unsigned int *tx_bytes)
660 struct sk_buff *skb = NULL;
662 struct nicvf *nic = netdev_priv(netdev);
663 struct snd_queue *sq;
664 struct sq_hdr_subdesc *hdr;
665 struct sq_hdr_subdesc *tso_sqe;
667 sq = &nic->qs->sq[cqe_tx->sq_idx];
669 hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr);
670 if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER)
673 /* Check for errors */
674 if (cqe_tx->send_status)
675 nicvf_check_cqe_tx_errs(nic->pnicvf, cqe_tx);
677 /* Is this a XDP designated Tx queue */
679 page = (struct page *)sq->xdp_page[cqe_tx->sqe_ptr];
680 /* Check if it's recycled page or else unmap DMA mapping */
681 if (page && (page_ref_count(page) == 1))
682 nicvf_unmap_sndq_buffers(nic, sq, cqe_tx->sqe_ptr,
685 /* Release page reference for recycling */
688 sq->xdp_page[cqe_tx->sqe_ptr] = (u64)NULL;
689 *subdesc_cnt += hdr->subdesc_cnt + 1;
693 skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr];
695 /* Check for dummy descriptor used for HW TSO offload on 88xx */
696 if (hdr->dont_send) {
697 /* Get actual TSO descriptors and free them */
699 (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, hdr->rsvd2);
700 nicvf_unmap_sndq_buffers(nic, sq, hdr->rsvd2,
701 tso_sqe->subdesc_cnt);
702 *subdesc_cnt += tso_sqe->subdesc_cnt + 1;
704 nicvf_unmap_sndq_buffers(nic, sq, cqe_tx->sqe_ptr,
707 *subdesc_cnt += hdr->subdesc_cnt + 1;
710 *tx_bytes += skb->len;
711 /* If timestamp is requested for this skb, don't free it */
712 if (skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS &&
713 !nic->pnicvf->ptp_skb)
714 nic->pnicvf->ptp_skb = skb;
716 napi_consume_skb(skb, budget);
717 sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
719 /* In case of SW TSO on 88xx, only last segment will have
720 * a SKB attached, so just free SQEs here.
723 *subdesc_cnt += hdr->subdesc_cnt + 1;
727 static inline void nicvf_set_rxhash(struct net_device *netdev,
728 struct cqe_rx_t *cqe_rx,
734 if (!(netdev->features & NETIF_F_RXHASH))
737 switch (cqe_rx->rss_alg) {
740 hash_type = PKT_HASH_TYPE_L4;
741 hash = cqe_rx->rss_tag;
744 hash_type = PKT_HASH_TYPE_L3;
745 hash = cqe_rx->rss_tag;
748 hash_type = PKT_HASH_TYPE_NONE;
752 skb_set_hash(skb, hash, hash_type);
755 static inline void nicvf_set_rxtstamp(struct nicvf *nic, struct sk_buff *skb)
759 if (!nic->ptp_clock || !nic->hw_rx_tstamp)
762 /* The first 8 bytes is the timestamp */
763 ns = cavium_ptp_tstamp2time(nic->ptp_clock,
764 be64_to_cpu(*(__be64 *)skb->data));
765 skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns);
770 static void nicvf_rcv_pkt_handler(struct net_device *netdev,
771 struct napi_struct *napi,
772 struct cqe_rx_t *cqe_rx,
773 struct snd_queue *sq, struct rcv_queue *rq)
775 struct sk_buff *skb = NULL;
776 struct nicvf *nic = netdev_priv(netdev);
777 struct nicvf *snic = nic;
781 rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx);
784 /* Use primary VF's 'nicvf' struct */
786 netdev = nic->netdev;
789 /* Check for errors */
790 if (cqe_rx->err_level || cqe_rx->err_opcode) {
791 err = nicvf_check_cqe_rx_errs(nic, cqe_rx);
792 if (err && !cqe_rx->rb_cnt)
796 /* For XDP, ignore pkts spanning multiple pages */
797 if (nic->xdp_prog && (cqe_rx->rb_cnt == 1)) {
798 /* Packet consumed by XDP */
799 if (nicvf_xdp_rx(snic, nic->xdp_prog, cqe_rx, sq, rq, &skb))
802 skb = nicvf_get_rcv_skb(snic, cqe_rx,
803 nic->xdp_prog ? true : false);
809 if (netif_msg_pktdata(nic)) {
810 netdev_info(nic->netdev, "skb 0x%p, len=%d\n", skb, skb->len);
811 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
812 skb->data, skb->len, true);
815 /* If error packet, drop it here */
817 dev_kfree_skb_any(skb);
821 nicvf_set_rxtstamp(nic, skb);
822 nicvf_set_rxhash(netdev, cqe_rx, skb);
824 skb_record_rx_queue(skb, rq_idx);
825 if (netdev->hw_features & NETIF_F_RXCSUM) {
826 /* HW by default verifies TCP/UDP/SCTP checksums */
827 skb->ip_summed = CHECKSUM_UNNECESSARY;
829 skb_checksum_none_assert(skb);
832 skb->protocol = eth_type_trans(skb, netdev);
834 /* Check for stripped VLAN */
835 if (cqe_rx->vlan_found && cqe_rx->vlan_stripped)
836 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
837 ntohs((__force __be16)cqe_rx->vlan_tci));
839 if (napi && (netdev->features & NETIF_F_GRO))
840 napi_gro_receive(napi, skb);
842 netif_receive_skb(skb);
845 static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
846 struct napi_struct *napi, int budget)
848 int processed_cqe, work_done = 0, tx_done = 0;
849 int cqe_count, cqe_head;
851 struct nicvf *nic = netdev_priv(netdev);
852 struct queue_set *qs = nic->qs;
853 struct cmp_queue *cq = &qs->cq[cq_idx];
854 struct cqe_rx_t *cq_desc;
855 struct netdev_queue *txq;
856 struct snd_queue *sq = &qs->sq[cq_idx];
857 struct rcv_queue *rq = &qs->rq[cq_idx];
858 unsigned int tx_pkts = 0, tx_bytes = 0, txq_idx;
860 spin_lock_bh(&cq->lock);
863 /* Get no of valid CQ entries to process */
864 cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx);
865 cqe_count &= CQ_CQE_COUNT;
869 /* Get head of the valid CQ entries */
870 cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9;
873 while (processed_cqe < cqe_count) {
874 /* Get the CQ descriptor */
875 cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
877 cqe_head &= (cq->dmem.q_len - 1);
878 /* Initiate prefetch for next descriptor */
879 prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head));
881 if ((work_done >= budget) && napi &&
882 (cq_desc->cqe_type != CQE_TYPE_SEND)) {
886 switch (cq_desc->cqe_type) {
888 nicvf_rcv_pkt_handler(netdev, napi, cq_desc, sq, rq);
892 nicvf_snd_pkt_handler(netdev, (void *)cq_desc,
893 budget, &subdesc_cnt,
894 &tx_pkts, &tx_bytes);
897 case CQE_TYPE_SEND_PTP:
898 nicvf_snd_ptp_handler(netdev, (void *)cq_desc);
900 case CQE_TYPE_INVALID:
901 case CQE_TYPE_RX_SPLIT:
902 case CQE_TYPE_RX_TCP:
909 /* Ring doorbell to inform H/W to reuse processed CQEs */
910 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
911 cq_idx, processed_cqe);
913 if ((work_done < budget) && napi)
917 /* Update SQ's descriptor free count */
919 nicvf_put_sq_desc(sq, subdesc_cnt);
921 txq_idx = nicvf_netdev_qidx(nic, cq_idx);
922 /* Handle XDP TX queues */
923 if (nic->pnicvf->xdp_prog) {
924 if (txq_idx < nic->pnicvf->xdp_tx_queues) {
925 nicvf_xdp_sq_doorbell(nic, sq, cq_idx);
929 txq_idx -= nic->pnicvf->xdp_tx_queues;
932 /* Wakeup TXQ if its stopped earlier due to SQ full */
934 (atomic_read(&sq->free_cnt) >= MIN_SQ_DESC_PER_PKT_XMIT)) {
935 netdev = nic->pnicvf->netdev;
936 txq = netdev_get_tx_queue(netdev, txq_idx);
938 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
940 /* To read updated queue and carrier status */
942 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
943 netif_tx_wake_queue(txq);
945 this_cpu_inc(nic->drv_stats->txq_wake);
946 netif_warn(nic, tx_err, netdev,
947 "Transmit queue wakeup SQ%d\n", txq_idx);
952 spin_unlock_bh(&cq->lock);
956 static int nicvf_poll(struct napi_struct *napi, int budget)
960 struct net_device *netdev = napi->dev;
961 struct nicvf *nic = netdev_priv(netdev);
962 struct nicvf_cq_poll *cq;
964 cq = container_of(napi, struct nicvf_cq_poll, napi);
965 work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget);
967 if (work_done < budget) {
968 /* Slow packet rate, exit polling */
969 napi_complete_done(napi, work_done);
970 /* Re-enable interrupts */
971 cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD,
973 nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
974 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD,
975 cq->cq_idx, cq_head);
976 nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
981 /* Qset error interrupt handler
983 * As of now only CQ errors are handled
985 static void nicvf_handle_qs_err(unsigned long data)
987 struct nicvf *nic = (struct nicvf *)data;
988 struct queue_set *qs = nic->qs;
992 netif_tx_disable(nic->netdev);
994 /* Check if it is CQ err */
995 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
996 status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS,
998 if (!(status & CQ_ERR_MASK))
1000 /* Process already queued CQEs and reconfig CQ */
1001 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1002 nicvf_sq_disable(nic, qidx);
1003 nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0);
1004 nicvf_cmp_queue_config(nic, qs, qidx, true);
1005 nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx);
1006 nicvf_sq_enable(nic, &qs->sq[qidx], qidx);
1008 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
1011 netif_tx_start_all_queues(nic->netdev);
1012 /* Re-enable Qset error interrupt */
1013 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
1016 static void nicvf_dump_intr_status(struct nicvf *nic)
1018 netif_info(nic, intr, nic->netdev, "interrupt status 0x%llx\n",
1019 nicvf_reg_read(nic, NIC_VF_INT));
1022 static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq)
1024 struct nicvf *nic = (struct nicvf *)nicvf_irq;
1027 nicvf_dump_intr_status(nic);
1029 intr = nicvf_reg_read(nic, NIC_VF_INT);
1030 /* Check for spurious interrupt */
1031 if (!(intr & NICVF_INTR_MBOX_MASK))
1034 nicvf_handle_mbx_intr(nic);
1039 static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq)
1041 struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq;
1042 struct nicvf *nic = cq_poll->nicvf;
1043 int qidx = cq_poll->cq_idx;
1045 nicvf_dump_intr_status(nic);
1047 /* Disable interrupts */
1048 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1051 napi_schedule_irqoff(&cq_poll->napi);
1053 /* Clear interrupt */
1054 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1059 static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq)
1061 struct nicvf *nic = (struct nicvf *)nicvf_irq;
1065 nicvf_dump_intr_status(nic);
1067 /* Disable RBDR interrupt and schedule softirq */
1068 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) {
1069 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx))
1071 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1072 tasklet_hi_schedule(&nic->rbdr_task);
1073 /* Clear interrupt */
1074 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1080 static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq)
1082 struct nicvf *nic = (struct nicvf *)nicvf_irq;
1084 nicvf_dump_intr_status(nic);
1086 /* Disable Qset err interrupt and schedule softirq */
1087 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1088 tasklet_hi_schedule(&nic->qs_err_task);
1089 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1094 static void nicvf_set_irq_affinity(struct nicvf *nic)
1098 for (vec = 0; vec < nic->num_vec; vec++) {
1099 if (!nic->irq_allocated[vec])
1102 if (!zalloc_cpumask_var(&nic->affinity_mask[vec], GFP_KERNEL))
1105 if (vec < NICVF_INTR_ID_SQ)
1106 /* Leave CPU0 for RBDR and other interrupts */
1107 cpu = nicvf_netdev_qidx(nic, vec) + 1;
1111 cpumask_set_cpu(cpumask_local_spread(cpu, nic->node),
1112 nic->affinity_mask[vec]);
1113 irq_set_affinity_hint(pci_irq_vector(nic->pdev, vec),
1114 nic->affinity_mask[vec]);
1118 static int nicvf_register_interrupts(struct nicvf *nic)
1122 for_each_cq_irq(irq)
1123 sprintf(nic->irq_name[irq], "%s-rxtx-%d",
1124 nic->pnicvf->netdev->name,
1125 nicvf_netdev_qidx(nic, irq));
1127 for_each_sq_irq(irq)
1128 sprintf(nic->irq_name[irq], "%s-sq-%d",
1129 nic->pnicvf->netdev->name,
1130 nicvf_netdev_qidx(nic, irq - NICVF_INTR_ID_SQ));
1132 for_each_rbdr_irq(irq)
1133 sprintf(nic->irq_name[irq], "%s-rbdr-%d",
1134 nic->pnicvf->netdev->name,
1135 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
1137 /* Register CQ interrupts */
1138 for (irq = 0; irq < nic->qs->cq_cnt; irq++) {
1139 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1141 0, nic->irq_name[irq], nic->napi[irq]);
1144 nic->irq_allocated[irq] = true;
1147 /* Register RBDR interrupt */
1148 for (irq = NICVF_INTR_ID_RBDR;
1149 irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) {
1150 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1151 nicvf_rbdr_intr_handler,
1152 0, nic->irq_name[irq], nic);
1155 nic->irq_allocated[irq] = true;
1158 /* Register QS error interrupt */
1159 sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR], "%s-qset-err-%d",
1160 nic->pnicvf->netdev->name,
1161 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
1162 irq = NICVF_INTR_ID_QS_ERR;
1163 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1164 nicvf_qs_err_intr_handler,
1165 0, nic->irq_name[irq], nic);
1169 nic->irq_allocated[irq] = true;
1171 /* Set IRQ affinities */
1172 nicvf_set_irq_affinity(nic);
1176 netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq);
1181 static void nicvf_unregister_interrupts(struct nicvf *nic)
1183 struct pci_dev *pdev = nic->pdev;
1186 /* Free registered interrupts */
1187 for (irq = 0; irq < nic->num_vec; irq++) {
1188 if (!nic->irq_allocated[irq])
1191 irq_set_affinity_hint(pci_irq_vector(pdev, irq), NULL);
1192 free_cpumask_var(nic->affinity_mask[irq]);
1194 if (irq < NICVF_INTR_ID_SQ)
1195 free_irq(pci_irq_vector(pdev, irq), nic->napi[irq]);
1197 free_irq(pci_irq_vector(pdev, irq), nic);
1199 nic->irq_allocated[irq] = false;
1203 pci_free_irq_vectors(pdev);
1207 /* Initialize MSIX vectors and register MISC interrupt.
1208 * Send READY message to PF to check if its alive
1210 static int nicvf_register_misc_interrupt(struct nicvf *nic)
1213 int irq = NICVF_INTR_ID_MISC;
1215 /* Return if mailbox interrupt is already registered */
1216 if (nic->pdev->msix_enabled)
1220 nic->num_vec = pci_msix_vec_count(nic->pdev);
1221 ret = pci_alloc_irq_vectors(nic->pdev, nic->num_vec, nic->num_vec,
1224 netdev_err(nic->netdev,
1225 "Req for #%d msix vectors failed\n", nic->num_vec);
1229 sprintf(nic->irq_name[irq], "%s Mbox", "NICVF");
1230 /* Register Misc interrupt */
1231 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1232 nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic);
1236 nic->irq_allocated[irq] = true;
1238 /* Enable mailbox interrupt */
1239 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0);
1241 /* Check if VF is able to communicate with PF */
1242 if (!nicvf_check_pf_ready(nic)) {
1243 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1244 nicvf_unregister_interrupts(nic);
1251 static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev)
1253 struct nicvf *nic = netdev_priv(netdev);
1254 int qid = skb_get_queue_mapping(skb);
1255 struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid);
1257 struct snd_queue *sq;
1260 /* Check for minimum packet length */
1261 if (skb->len <= ETH_HLEN) {
1263 return NETDEV_TX_OK;
1266 /* In XDP case, initial HW tx queues are used for XDP,
1267 * but stack's queue mapping starts at '0', so skip the
1268 * Tx queues attached to Rx queues for XDP.
1271 qid += nic->xdp_tx_queues;
1274 /* Get secondary Qset's SQ structure */
1275 if (qid >= MAX_SND_QUEUES_PER_QS) {
1276 tmp = qid / MAX_SND_QUEUES_PER_QS;
1277 snic = (struct nicvf *)nic->snicvf[tmp - 1];
1279 netdev_warn(nic->netdev,
1280 "Secondary Qset#%d's ptr not initialized\n",
1283 return NETDEV_TX_OK;
1285 qid = qid % MAX_SND_QUEUES_PER_QS;
1288 sq = &snic->qs->sq[qid];
1289 if (!netif_tx_queue_stopped(txq) &&
1290 !nicvf_sq_append_skb(snic, sq, skb, qid)) {
1291 netif_tx_stop_queue(txq);
1293 /* Barrier, so that stop_queue visible to other cpus */
1296 /* Check again, incase another cpu freed descriptors */
1297 if (atomic_read(&sq->free_cnt) > MIN_SQ_DESC_PER_PKT_XMIT) {
1298 netif_tx_wake_queue(txq);
1300 this_cpu_inc(nic->drv_stats->txq_stop);
1301 netif_warn(nic, tx_err, netdev,
1302 "Transmit ring full, stopping SQ%d\n", qid);
1304 return NETDEV_TX_BUSY;
1307 return NETDEV_TX_OK;
1310 static inline void nicvf_free_cq_poll(struct nicvf *nic)
1312 struct nicvf_cq_poll *cq_poll;
1315 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1316 cq_poll = nic->napi[qidx];
1319 nic->napi[qidx] = NULL;
1324 int nicvf_stop(struct net_device *netdev)
1327 struct nicvf *nic = netdev_priv(netdev);
1328 struct queue_set *qs = nic->qs;
1329 struct nicvf_cq_poll *cq_poll = NULL;
1330 union nic_mbx mbx = {};
1332 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN;
1333 nicvf_send_msg_to_pf(nic, &mbx);
1335 netif_carrier_off(netdev);
1336 netif_tx_stop_all_queues(nic->netdev);
1337 nic->link_up = false;
1339 /* Teardown secondary qsets first */
1340 if (!nic->sqs_mode) {
1341 for (qidx = 0; qidx < nic->sqs_count; qidx++) {
1342 if (!nic->snicvf[qidx])
1344 nicvf_stop(nic->snicvf[qidx]->netdev);
1345 nic->snicvf[qidx] = NULL;
1349 /* Disable RBDR & QS error interrupts */
1350 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) {
1351 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1352 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1354 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1355 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1357 /* Wait for pending IRQ handlers to finish */
1358 for (irq = 0; irq < nic->num_vec; irq++)
1359 synchronize_irq(pci_irq_vector(nic->pdev, irq));
1361 tasklet_kill(&nic->rbdr_task);
1362 tasklet_kill(&nic->qs_err_task);
1363 if (nic->rb_work_scheduled)
1364 cancel_delayed_work_sync(&nic->rbdr_work);
1366 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1367 cq_poll = nic->napi[qidx];
1370 napi_synchronize(&cq_poll->napi);
1371 /* CQ intr is enabled while napi_complete,
1374 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1375 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1376 napi_disable(&cq_poll->napi);
1377 netif_napi_del(&cq_poll->napi);
1380 netif_tx_disable(netdev);
1382 for (qidx = 0; qidx < netdev->num_tx_queues; qidx++)
1383 netdev_tx_reset_queue(netdev_get_tx_queue(netdev, qidx));
1385 /* Free resources */
1386 nicvf_config_data_transfer(nic, false);
1388 /* Disable HW Qset */
1389 nicvf_qset_config(nic, false);
1391 /* disable mailbox interrupt */
1392 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1394 nicvf_unregister_interrupts(nic);
1396 nicvf_free_cq_poll(nic);
1398 /* Free any pending SKB saved to receive timestamp */
1400 dev_kfree_skb_any(nic->ptp_skb);
1401 nic->ptp_skb = NULL;
1404 /* Clear multiqset info */
1410 static int nicvf_config_hw_rx_tstamp(struct nicvf *nic, bool enable)
1412 union nic_mbx mbx = {};
1414 mbx.ptp.msg = NIC_MBOX_MSG_PTP_CFG;
1415 mbx.ptp.enable = enable;
1417 return nicvf_send_msg_to_pf(nic, &mbx);
1420 static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
1422 union nic_mbx mbx = {};
1424 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
1425 mbx.frs.max_frs = mtu;
1426 mbx.frs.vf_id = nic->vf_id;
1428 return nicvf_send_msg_to_pf(nic, &mbx);
1431 int nicvf_open(struct net_device *netdev)
1434 struct nicvf *nic = netdev_priv(netdev);
1435 struct queue_set *qs = nic->qs;
1436 struct nicvf_cq_poll *cq_poll = NULL;
1438 netif_carrier_off(netdev);
1440 err = nicvf_register_misc_interrupt(nic);
1444 /* Register NAPI handler for processing CQEs */
1445 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1446 cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL);
1451 cq_poll->cq_idx = qidx;
1452 cq_poll->nicvf = nic;
1453 netif_napi_add(netdev, &cq_poll->napi, nicvf_poll,
1455 napi_enable(&cq_poll->napi);
1456 nic->napi[qidx] = cq_poll;
1459 /* Check if we got MAC address from PF or else generate a radom MAC */
1460 if (!nic->sqs_mode && is_zero_ether_addr(netdev->dev_addr)) {
1461 eth_hw_addr_random(netdev);
1462 nicvf_hw_set_mac_addr(nic, netdev);
1465 if (nic->set_mac_pending) {
1466 nic->set_mac_pending = false;
1467 nicvf_hw_set_mac_addr(nic, netdev);
1470 /* Init tasklet for handling Qset err interrupt */
1471 tasklet_init(&nic->qs_err_task, nicvf_handle_qs_err,
1472 (unsigned long)nic);
1474 /* Init RBDR tasklet which will refill RBDR */
1475 tasklet_init(&nic->rbdr_task, nicvf_rbdr_task,
1476 (unsigned long)nic);
1477 INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work);
1479 /* Configure CPI alorithm */
1480 nic->cpi_alg = cpi_alg;
1482 nicvf_config_cpi(nic);
1484 nicvf_request_sqs(nic);
1486 nicvf_get_primary_vf_struct(nic);
1488 /* Configure PTP timestamp */
1490 nicvf_config_hw_rx_tstamp(nic, nic->hw_rx_tstamp);
1491 atomic_set(&nic->tx_ptp_skbs, 0);
1492 nic->ptp_skb = NULL;
1494 /* Configure receive side scaling and MTU */
1495 if (!nic->sqs_mode) {
1496 nicvf_rss_init(nic);
1497 err = nicvf_update_hw_max_frs(nic, netdev->mtu);
1501 /* Clear percpu stats */
1502 for_each_possible_cpu(cpu)
1503 memset(per_cpu_ptr(nic->drv_stats, cpu), 0,
1504 sizeof(struct nicvf_drv_stats));
1507 err = nicvf_register_interrupts(nic);
1511 /* Initialize the queues */
1512 err = nicvf_init_resources(nic);
1516 /* Make sure queue initialization is written */
1519 nicvf_reg_write(nic, NIC_VF_INT, -1);
1520 /* Enable Qset err interrupt */
1521 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
1523 /* Enable completion queue interrupt */
1524 for (qidx = 0; qidx < qs->cq_cnt; qidx++)
1525 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
1527 /* Enable RBDR threshold interrupt */
1528 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
1529 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
1531 /* Send VF config done msg to PF */
1532 nicvf_send_cfg_done(nic);
1536 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1537 nicvf_unregister_interrupts(nic);
1538 tasklet_kill(&nic->qs_err_task);
1539 tasklet_kill(&nic->rbdr_task);
1541 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1542 cq_poll = nic->napi[qidx];
1545 napi_disable(&cq_poll->napi);
1546 netif_napi_del(&cq_poll->napi);
1548 nicvf_free_cq_poll(nic);
1552 static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)
1554 struct nicvf *nic = netdev_priv(netdev);
1555 int orig_mtu = netdev->mtu;
1557 /* For now just support only the usual MTU sized frames,
1558 * plus some headroom for VLAN, QinQ.
1560 if (nic->xdp_prog && new_mtu > MAX_XDP_MTU) {
1561 netdev_warn(netdev, "Jumbo frames not yet supported with XDP, current MTU %d.\n",
1566 netdev->mtu = new_mtu;
1568 if (!netif_running(netdev))
1571 if (nicvf_update_hw_max_frs(nic, new_mtu)) {
1572 netdev->mtu = orig_mtu;
1579 static int nicvf_set_mac_address(struct net_device *netdev, void *p)
1581 struct sockaddr *addr = p;
1582 struct nicvf *nic = netdev_priv(netdev);
1584 if (!is_valid_ether_addr(addr->sa_data))
1585 return -EADDRNOTAVAIL;
1587 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1589 if (nic->pdev->msix_enabled) {
1590 if (nicvf_hw_set_mac_addr(nic, netdev))
1593 nic->set_mac_pending = true;
1599 void nicvf_update_lmac_stats(struct nicvf *nic)
1602 union nic_mbx mbx = {};
1604 if (!netif_running(nic->netdev))
1607 mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS;
1608 mbx.bgx_stats.vf_id = nic->vf_id;
1610 mbx.bgx_stats.rx = 1;
1611 while (stat < BGX_RX_STATS_COUNT) {
1612 mbx.bgx_stats.idx = stat;
1613 if (nicvf_send_msg_to_pf(nic, &mbx))
1621 mbx.bgx_stats.rx = 0;
1622 while (stat < BGX_TX_STATS_COUNT) {
1623 mbx.bgx_stats.idx = stat;
1624 if (nicvf_send_msg_to_pf(nic, &mbx))
1630 void nicvf_update_stats(struct nicvf *nic)
1634 struct nicvf_hw_stats *stats = &nic->hw_stats;
1635 struct nicvf_drv_stats *drv_stats;
1636 struct queue_set *qs = nic->qs;
1638 #define GET_RX_STATS(reg) \
1639 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3))
1640 #define GET_TX_STATS(reg) \
1641 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
1643 stats->rx_bytes = GET_RX_STATS(RX_OCTS);
1644 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST);
1645 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST);
1646 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST);
1647 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS);
1648 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR);
1649 stats->rx_drop_red = GET_RX_STATS(RX_RED);
1650 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS);
1651 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN);
1652 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS);
1653 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST);
1654 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST);
1655 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST);
1656 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST);
1658 stats->tx_bytes = GET_TX_STATS(TX_OCTS);
1659 stats->tx_ucast_frames = GET_TX_STATS(TX_UCAST);
1660 stats->tx_bcast_frames = GET_TX_STATS(TX_BCAST);
1661 stats->tx_mcast_frames = GET_TX_STATS(TX_MCAST);
1662 stats->tx_drops = GET_TX_STATS(TX_DROP);
1664 /* On T88 pass 2.0, the dummy SQE added for TSO notification
1665 * via CQE has 'dont_send' set. Hence HW drops the pkt pointed
1666 * pointed by dummy SQE and results in tx_drops counter being
1667 * incremented. Subtracting it from tx_tso counter will give
1668 * exact tx_drops counter.
1670 if (nic->t88 && nic->hw_tso) {
1671 for_each_possible_cpu(cpu) {
1672 drv_stats = per_cpu_ptr(nic->drv_stats, cpu);
1673 tmp_stats += drv_stats->tx_tso;
1675 stats->tx_drops = tmp_stats - stats->tx_drops;
1677 stats->tx_frames = stats->tx_ucast_frames +
1678 stats->tx_bcast_frames +
1679 stats->tx_mcast_frames;
1680 stats->rx_frames = stats->rx_ucast_frames +
1681 stats->rx_bcast_frames +
1682 stats->rx_mcast_frames;
1683 stats->rx_drops = stats->rx_drop_red +
1684 stats->rx_drop_overrun;
1686 /* Update RQ and SQ stats */
1687 for (qidx = 0; qidx < qs->rq_cnt; qidx++)
1688 nicvf_update_rq_stats(nic, qidx);
1689 for (qidx = 0; qidx < qs->sq_cnt; qidx++)
1690 nicvf_update_sq_stats(nic, qidx);
1693 static void nicvf_get_stats64(struct net_device *netdev,
1694 struct rtnl_link_stats64 *stats)
1696 struct nicvf *nic = netdev_priv(netdev);
1697 struct nicvf_hw_stats *hw_stats = &nic->hw_stats;
1699 nicvf_update_stats(nic);
1701 stats->rx_bytes = hw_stats->rx_bytes;
1702 stats->rx_packets = hw_stats->rx_frames;
1703 stats->rx_dropped = hw_stats->rx_drops;
1704 stats->multicast = hw_stats->rx_mcast_frames;
1706 stats->tx_bytes = hw_stats->tx_bytes;
1707 stats->tx_packets = hw_stats->tx_frames;
1708 stats->tx_dropped = hw_stats->tx_drops;
1712 static void nicvf_tx_timeout(struct net_device *dev)
1714 struct nicvf *nic = netdev_priv(dev);
1716 netif_warn(nic, tx_err, dev, "Transmit timed out, resetting\n");
1718 this_cpu_inc(nic->drv_stats->tx_timeout);
1719 schedule_work(&nic->reset_task);
1722 static void nicvf_reset_task(struct work_struct *work)
1726 nic = container_of(work, struct nicvf, reset_task);
1728 if (!netif_running(nic->netdev))
1731 nicvf_stop(nic->netdev);
1732 nicvf_open(nic->netdev);
1733 netif_trans_update(nic->netdev);
1736 static int nicvf_config_loopback(struct nicvf *nic,
1737 netdev_features_t features)
1739 union nic_mbx mbx = {};
1741 mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK;
1742 mbx.lbk.vf_id = nic->vf_id;
1743 mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0;
1745 return nicvf_send_msg_to_pf(nic, &mbx);
1748 static netdev_features_t nicvf_fix_features(struct net_device *netdev,
1749 netdev_features_t features)
1751 struct nicvf *nic = netdev_priv(netdev);
1753 if ((features & NETIF_F_LOOPBACK) &&
1754 netif_running(netdev) && !nic->loopback_supported)
1755 features &= ~NETIF_F_LOOPBACK;
1760 static int nicvf_set_features(struct net_device *netdev,
1761 netdev_features_t features)
1763 struct nicvf *nic = netdev_priv(netdev);
1764 netdev_features_t changed = features ^ netdev->features;
1766 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1767 nicvf_config_vlan_stripping(nic, features);
1769 if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev))
1770 return nicvf_config_loopback(nic, features);
1775 static void nicvf_set_xdp_queues(struct nicvf *nic, bool bpf_attached)
1777 u8 cq_count, txq_count;
1779 /* Set XDP Tx queue count same as Rx queue count */
1781 nic->xdp_tx_queues = 0;
1783 nic->xdp_tx_queues = nic->rx_queues;
1785 /* If queue count > MAX_CMP_QUEUES_PER_QS, then additional qsets
1786 * needs to be allocated, check how many.
1788 txq_count = nic->xdp_tx_queues + nic->tx_queues;
1789 cq_count = max(nic->rx_queues, txq_count);
1790 if (cq_count > MAX_CMP_QUEUES_PER_QS) {
1791 nic->sqs_count = roundup(cq_count, MAX_CMP_QUEUES_PER_QS);
1792 nic->sqs_count = (nic->sqs_count / MAX_CMP_QUEUES_PER_QS) - 1;
1797 /* Set primary Qset's resources */
1798 nic->qs->rq_cnt = min_t(u8, nic->rx_queues, MAX_RCV_QUEUES_PER_QS);
1799 nic->qs->sq_cnt = min_t(u8, txq_count, MAX_SND_QUEUES_PER_QS);
1800 nic->qs->cq_cnt = max_t(u8, nic->qs->rq_cnt, nic->qs->sq_cnt);
1803 nicvf_set_real_num_queues(nic->netdev, nic->tx_queues, nic->rx_queues);
1806 static int nicvf_xdp_setup(struct nicvf *nic, struct bpf_prog *prog)
1808 struct net_device *dev = nic->netdev;
1809 bool if_up = netif_running(nic->netdev);
1810 struct bpf_prog *old_prog;
1811 bool bpf_attached = false;
1814 /* For now just support only the usual MTU sized frames,
1815 * plus some headroom for VLAN, QinQ.
1817 if (prog && dev->mtu > MAX_XDP_MTU) {
1818 netdev_warn(dev, "Jumbo frames not yet supported with XDP, current MTU %d.\n",
1823 /* ALL SQs attached to CQs i.e same as RQs, are treated as
1824 * XDP Tx queues and more Tx queues are allocated for
1825 * network stack to send pkts out.
1827 * No of Tx queues are either same as Rx queues or whatever
1828 * is left in max no of queues possible.
1830 if ((nic->rx_queues + nic->tx_queues) > nic->max_queues) {
1832 "Failed to attach BPF prog, RXQs + TXQs > Max %d\n",
1838 nicvf_stop(nic->netdev);
1840 old_prog = xchg(&nic->xdp_prog, prog);
1841 /* Detach old prog, if any */
1843 bpf_prog_put(old_prog);
1845 if (nic->xdp_prog) {
1846 /* Attach BPF program */
1847 nic->xdp_prog = bpf_prog_add(nic->xdp_prog, nic->rx_queues - 1);
1848 if (!IS_ERR(nic->xdp_prog)) {
1849 bpf_attached = true;
1851 ret = PTR_ERR(nic->xdp_prog);
1852 nic->xdp_prog = NULL;
1856 /* Calculate Tx queues needed for XDP and network stack */
1857 nicvf_set_xdp_queues(nic, bpf_attached);
1860 /* Reinitialize interface, clean slate */
1861 nicvf_open(nic->netdev);
1862 netif_trans_update(nic->netdev);
1868 static int nicvf_xdp(struct net_device *netdev, struct netdev_bpf *xdp)
1870 struct nicvf *nic = netdev_priv(netdev);
1872 /* To avoid checks while retrieving buffer address from CQE_RX,
1873 * do not support XDP for T88 pass1.x silicons which are anyway
1874 * not in use widely.
1876 if (pass1_silicon(nic->pdev))
1879 switch (xdp->command) {
1880 case XDP_SETUP_PROG:
1881 return nicvf_xdp_setup(nic, xdp->prog);
1882 case XDP_QUERY_PROG:
1883 xdp->prog_id = nic->xdp_prog ? nic->xdp_prog->aux->id : 0;
1890 static int nicvf_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr)
1892 struct hwtstamp_config config;
1893 struct nicvf *nic = netdev_priv(netdev);
1895 if (!nic->ptp_clock)
1898 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
1901 /* reserved for future extensions */
1905 switch (config.tx_type) {
1906 case HWTSTAMP_TX_OFF:
1907 case HWTSTAMP_TX_ON:
1913 switch (config.rx_filter) {
1914 case HWTSTAMP_FILTER_NONE:
1915 nic->hw_rx_tstamp = false;
1917 case HWTSTAMP_FILTER_ALL:
1918 case HWTSTAMP_FILTER_SOME:
1919 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1920 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1921 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1922 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1923 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1924 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1925 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1926 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1927 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1928 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1929 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1930 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1931 nic->hw_rx_tstamp = true;
1932 config.rx_filter = HWTSTAMP_FILTER_ALL;
1938 if (netif_running(netdev))
1939 nicvf_config_hw_rx_tstamp(nic, nic->hw_rx_tstamp);
1941 if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
1947 static int nicvf_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
1951 return nicvf_config_hwtstamp(netdev, req);
1957 static void __nicvf_set_rx_mode_task(u8 mode, struct xcast_addr_list *mc_addrs,
1960 union nic_mbx mbx = {};
1963 /* From the inside of VM code flow we have only 128 bits memory
1964 * available to send message to host's PF, so send all mc addrs
1965 * one by one, starting from flush command in case if kernel
1966 * requests to configure specific MAC filtering
1969 /* flush DMAC filters and reset RX mode */
1970 mbx.xcast.msg = NIC_MBOX_MSG_RESET_XCAST;
1971 if (nicvf_send_msg_to_pf(nic, &mbx) < 0)
1974 if (mode & BGX_XCAST_MCAST_FILTER) {
1975 /* once enabling filtering, we need to signal to PF to add
1976 * its' own LMAC to the filter to accept packets for it.
1978 mbx.xcast.msg = NIC_MBOX_MSG_ADD_MCAST;
1979 mbx.xcast.data.mac = 0;
1980 if (nicvf_send_msg_to_pf(nic, &mbx) < 0)
1984 /* check if we have any specific MACs to be added to PF DMAC filter */
1986 /* now go through kernel list of MACs and add them one by one */
1987 for (idx = 0; idx < mc_addrs->count; idx++) {
1988 mbx.xcast.msg = NIC_MBOX_MSG_ADD_MCAST;
1989 mbx.xcast.data.mac = mc_addrs->mc[idx];
1990 if (nicvf_send_msg_to_pf(nic, &mbx) < 0)
1995 /* and finally set rx mode for PF accordingly */
1996 mbx.xcast.msg = NIC_MBOX_MSG_SET_XCAST;
1997 mbx.xcast.data.mode = mode;
1999 nicvf_send_msg_to_pf(nic, &mbx);
2004 static void nicvf_set_rx_mode_task(struct work_struct *work_arg)
2006 struct nicvf_work *vf_work = container_of(work_arg, struct nicvf_work,
2008 struct nicvf *nic = container_of(vf_work, struct nicvf, rx_mode_work);
2010 struct xcast_addr_list *mc;
2015 /* Save message data locally to prevent them from
2016 * being overwritten by next ndo_set_rx_mode call().
2018 spin_lock_bh(&nic->rx_mode_wq_lock);
2019 mode = vf_work->mode;
2022 spin_unlock_bh(&nic->rx_mode_wq_lock);
2024 __nicvf_set_rx_mode_task(mode, mc, nic);
2027 static void nicvf_set_rx_mode(struct net_device *netdev)
2029 struct nicvf *nic = netdev_priv(netdev);
2030 struct netdev_hw_addr *ha;
2031 struct xcast_addr_list *mc_list = NULL;
2034 if (netdev->flags & IFF_PROMISC) {
2035 mode = BGX_XCAST_BCAST_ACCEPT | BGX_XCAST_MCAST_ACCEPT;
2037 if (netdev->flags & IFF_BROADCAST)
2038 mode |= BGX_XCAST_BCAST_ACCEPT;
2040 if (netdev->flags & IFF_ALLMULTI) {
2041 mode |= BGX_XCAST_MCAST_ACCEPT;
2042 } else if (netdev->flags & IFF_MULTICAST) {
2043 mode |= BGX_XCAST_MCAST_FILTER;
2044 /* here we need to copy mc addrs */
2045 if (netdev_mc_count(netdev)) {
2046 mc_list = kmalloc(offsetof(typeof(*mc_list),
2047 mc[netdev_mc_count(netdev)]),
2049 if (unlikely(!mc_list))
2052 netdev_hw_addr_list_for_each(ha, &netdev->mc) {
2053 mc_list->mc[mc_list->count] =
2054 ether_addr_to_u64(ha->addr);
2060 spin_lock(&nic->rx_mode_wq_lock);
2061 kfree(nic->rx_mode_work.mc);
2062 nic->rx_mode_work.mc = mc_list;
2063 nic->rx_mode_work.mode = mode;
2064 queue_delayed_work(nicvf_rx_mode_wq, &nic->rx_mode_work.work, 0);
2065 spin_unlock(&nic->rx_mode_wq_lock);
2068 static const struct net_device_ops nicvf_netdev_ops = {
2069 .ndo_open = nicvf_open,
2070 .ndo_stop = nicvf_stop,
2071 .ndo_start_xmit = nicvf_xmit,
2072 .ndo_change_mtu = nicvf_change_mtu,
2073 .ndo_set_mac_address = nicvf_set_mac_address,
2074 .ndo_get_stats64 = nicvf_get_stats64,
2075 .ndo_tx_timeout = nicvf_tx_timeout,
2076 .ndo_fix_features = nicvf_fix_features,
2077 .ndo_set_features = nicvf_set_features,
2078 .ndo_bpf = nicvf_xdp,
2079 .ndo_do_ioctl = nicvf_ioctl,
2080 .ndo_set_rx_mode = nicvf_set_rx_mode,
2083 static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2085 struct device *dev = &pdev->dev;
2086 struct net_device *netdev;
2090 struct cavium_ptp *ptp_clock;
2092 ptp_clock = cavium_ptp_get();
2093 if (IS_ERR(ptp_clock)) {
2094 if (PTR_ERR(ptp_clock) == -ENODEV)
2095 /* In virtualized environment we proceed without ptp */
2098 return PTR_ERR(ptp_clock);
2101 err = pci_enable_device(pdev);
2103 dev_err(dev, "Failed to enable PCI device\n");
2107 err = pci_request_regions(pdev, DRV_NAME);
2109 dev_err(dev, "PCI request regions failed 0x%x\n", err);
2110 goto err_disable_device;
2113 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(48));
2115 dev_err(dev, "Unable to get usable DMA configuration\n");
2116 goto err_release_regions;
2119 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48));
2121 dev_err(dev, "unable to get 48-bit DMA for consistent allocations\n");
2122 goto err_release_regions;
2125 qcount = netif_get_num_default_rss_queues();
2127 /* Restrict multiqset support only for host bound VFs */
2128 if (pdev->is_virtfn) {
2129 /* Set max number of queues per VF */
2130 qcount = min_t(int, num_online_cpus(),
2131 (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS);
2134 netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount);
2137 goto err_release_regions;
2140 pci_set_drvdata(pdev, netdev);
2142 SET_NETDEV_DEV(netdev, &pdev->dev);
2144 nic = netdev_priv(netdev);
2145 nic->netdev = netdev;
2148 nic->max_queues = qcount;
2149 /* If no of CPUs are too low, there won't be any queues left
2150 * for XDP_TX, hence double it.
2153 nic->max_queues *= 2;
2154 nic->ptp_clock = ptp_clock;
2156 /* MAP VF's configuration registers */
2157 nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
2158 if (!nic->reg_base) {
2159 dev_err(dev, "Cannot map config register space, aborting\n");
2161 goto err_free_netdev;
2164 nic->drv_stats = netdev_alloc_pcpu_stats(struct nicvf_drv_stats);
2165 if (!nic->drv_stats) {
2167 goto err_free_netdev;
2170 err = nicvf_set_qset_resources(nic);
2172 goto err_free_netdev;
2174 /* Check if PF is alive and get MAC address for this VF */
2175 err = nicvf_register_misc_interrupt(nic);
2177 goto err_free_netdev;
2179 nicvf_send_vf_struct(nic);
2181 if (!pass1_silicon(nic->pdev))
2184 /* Get iommu domain for iova to physical addr conversion */
2185 nic->iommu_domain = iommu_get_domain_for_dev(dev);
2187 pci_read_config_word(nic->pdev, PCI_SUBSYSTEM_ID, &sdevid);
2188 if (sdevid == 0xA134)
2191 /* Check if this VF is in QS only mode */
2195 err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues);
2197 goto err_unregister_interrupts;
2199 netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_SG |
2200 NETIF_F_TSO | NETIF_F_GRO | NETIF_F_TSO6 |
2201 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2202 NETIF_F_HW_VLAN_CTAG_RX);
2204 netdev->hw_features |= NETIF_F_RXHASH;
2206 netdev->features |= netdev->hw_features;
2207 netdev->hw_features |= NETIF_F_LOOPBACK;
2209 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM |
2210 NETIF_F_IPV6_CSUM | NETIF_F_TSO | NETIF_F_TSO6;
2212 netdev->netdev_ops = &nicvf_netdev_ops;
2213 netdev->watchdog_timeo = NICVF_TX_TIMEOUT;
2215 /* MTU range: 64 - 9200 */
2216 netdev->min_mtu = NIC_HW_MIN_FRS;
2217 netdev->max_mtu = NIC_HW_MAX_FRS;
2219 INIT_WORK(&nic->reset_task, nicvf_reset_task);
2221 INIT_DELAYED_WORK(&nic->rx_mode_work.work, nicvf_set_rx_mode_task);
2222 spin_lock_init(&nic->rx_mode_wq_lock);
2224 err = register_netdev(netdev);
2226 dev_err(dev, "Failed to register netdevice\n");
2227 goto err_unregister_interrupts;
2230 nic->msg_enable = debug;
2232 nicvf_set_ethtool_ops(netdev);
2236 err_unregister_interrupts:
2237 nicvf_unregister_interrupts(nic);
2239 pci_set_drvdata(pdev, NULL);
2241 free_percpu(nic->drv_stats);
2242 free_netdev(netdev);
2243 err_release_regions:
2244 pci_release_regions(pdev);
2246 pci_disable_device(pdev);
2250 static void nicvf_remove(struct pci_dev *pdev)
2252 struct net_device *netdev = pci_get_drvdata(pdev);
2254 struct net_device *pnetdev;
2259 nic = netdev_priv(netdev);
2260 pnetdev = nic->pnicvf->netdev;
2262 cancel_delayed_work_sync(&nic->rx_mode_work.work);
2264 /* Check if this Qset is assigned to different VF.
2265 * If yes, clean primary and all secondary Qsets.
2267 if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED))
2268 unregister_netdev(pnetdev);
2269 nicvf_unregister_interrupts(nic);
2270 pci_set_drvdata(pdev, NULL);
2272 free_percpu(nic->drv_stats);
2273 cavium_ptp_put(nic->ptp_clock);
2274 free_netdev(netdev);
2275 pci_release_regions(pdev);
2276 pci_disable_device(pdev);
2279 static void nicvf_shutdown(struct pci_dev *pdev)
2284 static struct pci_driver nicvf_driver = {
2286 .id_table = nicvf_id_table,
2287 .probe = nicvf_probe,
2288 .remove = nicvf_remove,
2289 .shutdown = nicvf_shutdown,
2292 static int __init nicvf_init_module(void)
2294 pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
2295 nicvf_rx_mode_wq = alloc_ordered_workqueue("nicvf_generic",
2297 return pci_register_driver(&nicvf_driver);
2300 static void __exit nicvf_cleanup_module(void)
2302 if (nicvf_rx_mode_wq) {
2303 destroy_workqueue(nicvf_rx_mode_wq);
2304 nicvf_rx_mode_wq = NULL;
2306 pci_unregister_driver(&nicvf_driver);
2309 module_init(nicvf_init_module);
2310 module_exit(nicvf_cleanup_module);