2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/seq_file.h>
36 #include <linux/debugfs.h>
37 #include <linux/string_helpers.h>
38 #include <linux/sort.h>
39 #include <linux/ctype.h>
43 #include "t4_values.h"
45 #include "cxgb4_debugfs.h"
49 #include "cudbg_lib_common.h"
50 #include "cudbg_entity.h"
51 #include "cudbg_lib.h"
53 /* generic seq_file support for showing a table of size rows x width. */
54 static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
56 pos -= tb->skip_first;
57 return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
60 static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
62 struct seq_tab *tb = seq->private;
64 if (tb->skip_first && *pos == 0)
65 return SEQ_START_TOKEN;
67 return seq_tab_get_idx(tb, *pos);
70 static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
72 v = seq_tab_get_idx(seq->private, *pos + 1);
77 static void seq_tab_stop(struct seq_file *seq, void *v)
81 static int seq_tab_show(struct seq_file *seq, void *v)
83 const struct seq_tab *tb = seq->private;
85 return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
88 static const struct seq_operations seq_tab_ops = {
89 .start = seq_tab_start,
95 struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
96 unsigned int width, unsigned int have_header,
97 int (*show)(struct seq_file *seq, void *v, int i))
101 p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
106 p->skip_first = have_header != 0;
111 /* Trim the size of a seq_tab to the supplied number of rows. The operation is
114 static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
116 if (new_rows > p->rows)
122 static int cim_la_show(struct seq_file *seq, void *v, int idx)
124 if (v == SEQ_START_TOKEN)
125 seq_puts(seq, "Status Data PC LS0Stat LS0Addr "
131 " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
132 (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
133 p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
139 static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
141 if (v == SEQ_START_TOKEN) {
142 seq_puts(seq, "Status Data PC\n");
146 seq_printf(seq, " %02x %08x %08x\n", p[5] & 0xff, p[6],
148 seq_printf(seq, " %02x %02x%06x %02x%06x\n",
149 (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
150 p[4] & 0xff, p[5] >> 8);
151 seq_printf(seq, " %02x %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
152 p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
157 static int cim_la_show_t6(struct seq_file *seq, void *v, int idx)
159 if (v == SEQ_START_TOKEN) {
160 seq_puts(seq, "Status Inst Data PC LS0Stat "
161 "LS0Addr LS0Data LS1Stat LS1Addr LS1Data\n");
165 seq_printf(seq, " %02x %04x%04x %04x%04x %04x%04x %08x %08x %08x %08x %08x %08x\n",
166 (p[9] >> 16) & 0xff, /* Status */
167 p[9] & 0xffff, p[8] >> 16, /* Inst */
168 p[8] & 0xffff, p[7] >> 16, /* Data */
169 p[7] & 0xffff, p[6] >> 16, /* PC */
170 p[2], p[1], p[0], /* LS0 Stat, Addr and Data */
171 p[5], p[4], p[3]); /* LS1 Stat, Addr and Data */
176 static int cim_la_show_pc_t6(struct seq_file *seq, void *v, int idx)
178 if (v == SEQ_START_TOKEN) {
179 seq_puts(seq, "Status Inst Data PC\n");
183 seq_printf(seq, " %02x %08x %08x %08x\n",
184 p[3] & 0xff, p[2], p[1], p[0]);
185 seq_printf(seq, " %02x %02x%06x %02x%06x %02x%06x\n",
186 (p[6] >> 8) & 0xff, p[6] & 0xff, p[5] >> 8,
187 p[5] & 0xff, p[4] >> 8, p[4] & 0xff, p[3] >> 8);
188 seq_printf(seq, " %02x %04x%04x %04x%04x %04x%04x\n",
189 (p[9] >> 16) & 0xff, p[9] & 0xffff, p[8] >> 16,
190 p[8] & 0xffff, p[7] >> 16, p[7] & 0xffff,
196 static int cim_la_open(struct inode *inode, struct file *file)
201 struct adapter *adap = inode->i_private;
203 ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
207 if (is_t6(adap->params.chip)) {
208 /* +1 to account for integer division of CIMLA_SIZE/10 */
209 p = seq_open_tab(file, (adap->params.cim_la_size / 10) + 1,
211 cfg & UPDBGLACAPTPCONLY_F ?
212 cim_la_show_pc_t6 : cim_la_show_t6);
214 p = seq_open_tab(file, adap->params.cim_la_size / 8,
216 cfg & UPDBGLACAPTPCONLY_F ? cim_la_show_3in1 :
222 ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
224 seq_release_private(inode, file);
228 static const struct file_operations cim_la_fops = {
229 .owner = THIS_MODULE,
233 .release = seq_release_private
236 static int cim_pif_la_show(struct seq_file *seq, void *v, int idx)
240 if (v == SEQ_START_TOKEN) {
241 seq_puts(seq, "Cntl ID DataBE Addr Data\n");
242 } else if (idx < CIM_PIFLA_SIZE) {
243 seq_printf(seq, " %02x %02x %04x %08x %08x%08x%08x%08x\n",
244 (p[5] >> 22) & 0xff, (p[5] >> 16) & 0x3f,
245 p[5] & 0xffff, p[4], p[3], p[2], p[1], p[0]);
247 if (idx == CIM_PIFLA_SIZE)
248 seq_puts(seq, "\nCntl ID Data\n");
249 seq_printf(seq, " %02x %02x %08x%08x%08x%08x\n",
250 (p[4] >> 6) & 0xff, p[4] & 0x3f,
251 p[3], p[2], p[1], p[0]);
256 static int cim_pif_la_open(struct inode *inode, struct file *file)
259 struct adapter *adap = inode->i_private;
261 p = seq_open_tab(file, 2 * CIM_PIFLA_SIZE, 6 * sizeof(u32), 1,
266 t4_cim_read_pif_la(adap, (u32 *)p->data,
267 (u32 *)p->data + 6 * CIM_PIFLA_SIZE, NULL, NULL);
271 static const struct file_operations cim_pif_la_fops = {
272 .owner = THIS_MODULE,
273 .open = cim_pif_la_open,
276 .release = seq_release_private
279 static int cim_ma_la_show(struct seq_file *seq, void *v, int idx)
283 if (v == SEQ_START_TOKEN) {
285 } else if (idx < CIM_MALA_SIZE) {
286 seq_printf(seq, "%02x%08x%08x%08x%08x\n",
287 p[4], p[3], p[2], p[1], p[0]);
289 if (idx == CIM_MALA_SIZE)
291 "\nCnt ID Tag UE Data RDY VLD\n");
292 seq_printf(seq, "%3u %2u %x %u %08x%08x %u %u\n",
293 (p[2] >> 10) & 0xff, (p[2] >> 7) & 7,
294 (p[2] >> 3) & 0xf, (p[2] >> 2) & 1,
295 (p[1] >> 2) | ((p[2] & 3) << 30),
296 (p[0] >> 2) | ((p[1] & 3) << 30), (p[0] >> 1) & 1,
302 static int cim_ma_la_open(struct inode *inode, struct file *file)
305 struct adapter *adap = inode->i_private;
307 p = seq_open_tab(file, 2 * CIM_MALA_SIZE, 5 * sizeof(u32), 1,
312 t4_cim_read_ma_la(adap, (u32 *)p->data,
313 (u32 *)p->data + 5 * CIM_MALA_SIZE);
317 static const struct file_operations cim_ma_la_fops = {
318 .owner = THIS_MODULE,
319 .open = cim_ma_la_open,
322 .release = seq_release_private
325 static int cim_qcfg_show(struct seq_file *seq, void *v)
327 static const char * const qname[] = {
328 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
329 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
334 struct adapter *adap = seq->private;
335 u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
336 u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
337 u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
338 u16 thres[CIM_NUM_IBQ];
339 u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
340 u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
342 int cim_num_obq = is_t4(adap->params.chip) ?
343 CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
345 i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
346 UP_IBQ_0_SHADOW_RDADDR_A,
347 ARRAY_SIZE(stat), stat);
349 if (is_t4(adap->params.chip)) {
350 i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
351 ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
354 i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
355 ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
362 t4_read_cimq_cfg(adap, base, size, thres);
365 " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n");
366 for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
367 seq_printf(seq, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n",
368 qname[i], base[i], size[i], thres[i],
369 IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
370 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
371 QUEREMFLITS_G(p[2]) * 16);
372 for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
373 seq_printf(seq, "%7s %5x %5u %12x %4x %4u %4u %5u\n",
374 qname[i], base[i], size[i],
375 QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
376 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
377 QUEREMFLITS_G(p[2]) * 16);
381 static int cim_qcfg_open(struct inode *inode, struct file *file)
383 return single_open(file, cim_qcfg_show, inode->i_private);
386 static const struct file_operations cim_qcfg_fops = {
387 .owner = THIS_MODULE,
388 .open = cim_qcfg_open,
391 .release = single_release,
394 static int cimq_show(struct seq_file *seq, void *v, int idx)
398 seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
403 static int cim_ibq_open(struct inode *inode, struct file *file)
407 unsigned int qid = (uintptr_t)inode->i_private & 7;
408 struct adapter *adap = inode->i_private - qid;
410 p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
414 ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
416 seq_release_private(inode, file);
422 static const struct file_operations cim_ibq_fops = {
423 .owner = THIS_MODULE,
424 .open = cim_ibq_open,
427 .release = seq_release_private
430 static int cim_obq_open(struct inode *inode, struct file *file)
434 unsigned int qid = (uintptr_t)inode->i_private & 7;
435 struct adapter *adap = inode->i_private - qid;
437 p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
441 ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
443 seq_release_private(inode, file);
445 seq_tab_trim(p, ret / 4);
451 static const struct file_operations cim_obq_fops = {
452 .owner = THIS_MODULE,
453 .open = cim_obq_open,
456 .release = seq_release_private
465 static void field_desc_show(struct seq_file *seq, u64 v,
466 const struct field_desc *p)
472 u64 mask = (1ULL << p->width) - 1;
473 int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
474 ((unsigned long long)v >> p->start) & mask);
476 if (line_size + len >= 79) {
478 seq_puts(seq, "\n ");
480 seq_printf(seq, "%s ", buf);
481 line_size += len + 1;
487 static struct field_desc tp_la0[] = {
488 { "RcfOpCodeOut", 60, 4 },
490 { "WcfState", 52, 4 },
491 { "RcfOpcSrcOut", 50, 2 },
492 { "CRxError", 49, 1 },
493 { "ERxError", 48, 1 },
494 { "SanityFailed", 47, 1 },
495 { "SpuriousMsg", 46, 1 },
496 { "FlushInputMsg", 45, 1 },
497 { "FlushInputCpl", 44, 1 },
498 { "RssUpBit", 43, 1 },
499 { "RssFilterHit", 42, 1 },
501 { "InitTcb", 31, 1 },
502 { "LineNumber", 24, 7 },
504 { "EdataOut", 22, 1 },
506 { "CdataOut", 20, 1 },
507 { "EreadPdu", 19, 1 },
508 { "CreadPdu", 18, 1 },
509 { "TunnelPkt", 17, 1 },
510 { "RcfPeerFin", 16, 1 },
511 { "RcfReasonOut", 12, 4 },
512 { "TxCchannel", 10, 2 },
513 { "RcfTxChannel", 8, 2 },
514 { "RxEchannel", 6, 2 },
515 { "RcfRxChannel", 5, 1 },
516 { "RcfDataOutSrdy", 4, 1 },
518 { "RxOoDvld", 2, 1 },
519 { "RxCongestion", 1, 1 },
520 { "TxCongestion", 0, 1 },
524 static int tp_la_show(struct seq_file *seq, void *v, int idx)
528 field_desc_show(seq, *p, tp_la0);
532 static int tp_la_show2(struct seq_file *seq, void *v, int idx)
538 field_desc_show(seq, p[0], tp_la0);
539 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
540 field_desc_show(seq, p[1], tp_la0);
544 static int tp_la_show3(struct seq_file *seq, void *v, int idx)
546 static struct field_desc tp_la1[] = {
547 { "CplCmdIn", 56, 8 },
548 { "CplCmdOut", 48, 8 },
549 { "ESynOut", 47, 1 },
550 { "EAckOut", 46, 1 },
551 { "EFinOut", 45, 1 },
552 { "ERstOut", 44, 1 },
558 { "DataInVld", 38, 1 },
560 { "RxBufEmpty", 36, 1 },
562 { "RxFbCongestion", 34, 1 },
563 { "TxFbCongestion", 33, 1 },
564 { "TxPktSumSrdy", 32, 1 },
565 { "RcfUlpType", 28, 4 },
567 { "Ebypass", 26, 1 },
569 { "Static0", 24, 1 },
571 { "Cbypass", 22, 1 },
573 { "CPktOut", 20, 1 },
574 { "RxPagePoolFull", 18, 2 },
575 { "RxLpbkPkt", 17, 1 },
576 { "TxLpbkPkt", 16, 1 },
577 { "RxVfValid", 15, 1 },
578 { "SynLearned", 14, 1 },
579 { "SetDelEntry", 13, 1 },
580 { "SetInvEntry", 12, 1 },
581 { "CpcmdDvld", 11, 1 },
582 { "CpcmdSave", 10, 1 },
583 { "RxPstructsFull", 8, 2 },
584 { "EpcmdDvld", 7, 1 },
585 { "EpcmdFlush", 6, 1 },
586 { "EpcmdTrimPrefix", 5, 1 },
587 { "EpcmdTrimPostfix", 4, 1 },
588 { "ERssIp4Pkt", 3, 1 },
589 { "ERssIp6Pkt", 2, 1 },
590 { "ERssTcpUdpPkt", 1, 1 },
591 { "ERssFceFipPkt", 0, 1 },
594 static struct field_desc tp_la2[] = {
595 { "CplCmdIn", 56, 8 },
596 { "MpsVfVld", 55, 1 },
604 { "DataInVld", 38, 1 },
606 { "RxBufEmpty", 36, 1 },
608 { "RxFbCongestion", 34, 1 },
609 { "TxFbCongestion", 33, 1 },
610 { "TxPktSumSrdy", 32, 1 },
611 { "RcfUlpType", 28, 4 },
613 { "Ebypass", 26, 1 },
615 { "Static0", 24, 1 },
617 { "Cbypass", 22, 1 },
619 { "CPktOut", 20, 1 },
620 { "RxPagePoolFull", 18, 2 },
621 { "RxLpbkPkt", 17, 1 },
622 { "TxLpbkPkt", 16, 1 },
623 { "RxVfValid", 15, 1 },
624 { "SynLearned", 14, 1 },
625 { "SetDelEntry", 13, 1 },
626 { "SetInvEntry", 12, 1 },
627 { "CpcmdDvld", 11, 1 },
628 { "CpcmdSave", 10, 1 },
629 { "RxPstructsFull", 8, 2 },
630 { "EpcmdDvld", 7, 1 },
631 { "EpcmdFlush", 6, 1 },
632 { "EpcmdTrimPrefix", 5, 1 },
633 { "EpcmdTrimPostfix", 4, 1 },
634 { "ERssIp4Pkt", 3, 1 },
635 { "ERssIp6Pkt", 2, 1 },
636 { "ERssTcpUdpPkt", 1, 1 },
637 { "ERssFceFipPkt", 0, 1 },
644 field_desc_show(seq, p[0], tp_la0);
645 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
646 field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
650 static int tp_la_open(struct inode *inode, struct file *file)
653 struct adapter *adap = inode->i_private;
655 switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
657 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
661 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
665 p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
670 t4_tp_read_la(adap, (u64 *)p->data, NULL);
674 static ssize_t tp_la_write(struct file *file, const char __user *buf,
675 size_t count, loff_t *pos)
680 size_t size = min(sizeof(s) - 1, count);
681 struct adapter *adap = file_inode(file)->i_private;
683 if (copy_from_user(s, buf, size))
686 err = kstrtoul(s, 0, &val);
691 adap->params.tp.la_mask = val << 16;
692 t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
693 adap->params.tp.la_mask);
697 static const struct file_operations tp_la_fops = {
698 .owner = THIS_MODULE,
702 .release = seq_release_private,
706 static int ulprx_la_show(struct seq_file *seq, void *v, int idx)
710 if (v == SEQ_START_TOKEN)
711 seq_puts(seq, " Pcmd Type Message"
714 seq_printf(seq, "%08x%08x %4x %08x %08x%08x%08x%08x\n",
715 p[1], p[0], p[2], p[3], p[7], p[6], p[5], p[4]);
719 static int ulprx_la_open(struct inode *inode, struct file *file)
722 struct adapter *adap = inode->i_private;
724 p = seq_open_tab(file, ULPRX_LA_SIZE, 8 * sizeof(u32), 1,
729 t4_ulprx_read_la(adap, (u32 *)p->data);
733 static const struct file_operations ulprx_la_fops = {
734 .owner = THIS_MODULE,
735 .open = ulprx_la_open,
738 .release = seq_release_private
741 /* Show the PM memory stats. These stats include:
744 * Read: memory read operation
745 * Write Bypass: cut-through
746 * Bypass + mem: cut-through and save copy
750 * Write Bypass: cut-through
751 * Flush: payload trim or drop
753 static int pm_stats_show(struct seq_file *seq, void *v)
755 static const char * const tx_pm_stats[] = {
756 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
758 static const char * const rx_pm_stats[] = {
759 "Read:", "Write bypass:", "Write mem:", "Flush:"
763 u32 tx_cnt[T6_PM_NSTATS], rx_cnt[T6_PM_NSTATS];
764 u64 tx_cyc[T6_PM_NSTATS], rx_cyc[T6_PM_NSTATS];
765 struct adapter *adap = seq->private;
767 t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
768 t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
770 seq_printf(seq, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes");
771 for (i = 0; i < PM_NSTATS - 1; i++)
772 seq_printf(seq, "%-13s %10u %20llu\n",
773 tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
775 seq_printf(seq, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes");
776 for (i = 0; i < PM_NSTATS - 1; i++)
777 seq_printf(seq, "%-13s %10u %20llu\n",
778 rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
780 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) {
781 /* In T5 the granularity of the total wait is too fine.
782 * It is not useful as it reaches the max value too fast.
783 * Hence display this Input FIFO wait for T6 onwards.
785 seq_printf(seq, "%13s %10s %20s\n",
786 " ", "Total wait", "Total Occupancy");
787 seq_printf(seq, "Tx FIFO wait %10u %20llu\n",
788 tx_cnt[i], tx_cyc[i]);
789 seq_printf(seq, "Rx FIFO wait %10u %20llu\n",
790 rx_cnt[i], rx_cyc[i]);
792 /* Skip index 6 as there is nothing useful ihere */
795 /* At index 7, a new stat for read latency (count, total wait)
798 seq_printf(seq, "%13s %10s %20s\n",
799 " ", "Reads", "Total wait");
800 seq_printf(seq, "Tx latency %10u %20llu\n",
801 tx_cnt[i], tx_cyc[i]);
802 seq_printf(seq, "Rx latency %10u %20llu\n",
803 rx_cnt[i], rx_cyc[i]);
808 static int pm_stats_open(struct inode *inode, struct file *file)
810 return single_open(file, pm_stats_show, inode->i_private);
813 static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
814 size_t count, loff_t *pos)
816 struct adapter *adap = file_inode(file)->i_private;
818 t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
819 t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
823 static const struct file_operations pm_stats_debugfs_fops = {
824 .owner = THIS_MODULE,
825 .open = pm_stats_open,
828 .release = single_release,
829 .write = pm_stats_clear
832 static int tx_rate_show(struct seq_file *seq, void *v)
834 u64 nrate[NCHAN], orate[NCHAN];
835 struct adapter *adap = seq->private;
837 t4_get_chan_txrate(adap, nrate, orate);
838 if (adap->params.arch.nchan == NCHAN) {
839 seq_puts(seq, " channel 0 channel 1 "
840 "channel 2 channel 3\n");
841 seq_printf(seq, "NIC B/s: %10llu %10llu %10llu %10llu\n",
842 (unsigned long long)nrate[0],
843 (unsigned long long)nrate[1],
844 (unsigned long long)nrate[2],
845 (unsigned long long)nrate[3]);
846 seq_printf(seq, "Offload B/s: %10llu %10llu %10llu %10llu\n",
847 (unsigned long long)orate[0],
848 (unsigned long long)orate[1],
849 (unsigned long long)orate[2],
850 (unsigned long long)orate[3]);
852 seq_puts(seq, " channel 0 channel 1\n");
853 seq_printf(seq, "NIC B/s: %10llu %10llu\n",
854 (unsigned long long)nrate[0],
855 (unsigned long long)nrate[1]);
856 seq_printf(seq, "Offload B/s: %10llu %10llu\n",
857 (unsigned long long)orate[0],
858 (unsigned long long)orate[1]);
863 DEFINE_SIMPLE_DEBUGFS_FILE(tx_rate);
865 static int cctrl_tbl_show(struct seq_file *seq, void *v)
867 static const char * const dec_fac[] = {
868 "0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875",
872 u16 (*incr)[NCCTRL_WIN];
873 struct adapter *adap = seq->private;
875 incr = kmalloc_array(NMTUS, sizeof(*incr), GFP_KERNEL);
879 t4_read_cong_tbl(adap, incr);
881 for (i = 0; i < NCCTRL_WIN; ++i) {
882 seq_printf(seq, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i,
883 incr[0][i], incr[1][i], incr[2][i], incr[3][i],
884 incr[4][i], incr[5][i], incr[6][i], incr[7][i]);
885 seq_printf(seq, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n",
886 incr[8][i], incr[9][i], incr[10][i], incr[11][i],
887 incr[12][i], incr[13][i], incr[14][i], incr[15][i],
888 adap->params.a_wnd[i],
889 dec_fac[adap->params.b_wnd[i]]);
896 DEFINE_SIMPLE_DEBUGFS_FILE(cctrl_tbl);
898 /* Format a value in a unit that differs from the value's native unit by the
901 static char *unit_conv(char *buf, size_t len, unsigned int val,
904 unsigned int rem = val % factor;
907 snprintf(buf, len, "%u", val / factor);
909 while (rem % 10 == 0)
911 snprintf(buf, len, "%u.%u", val / factor, rem);
916 static int clk_show(struct seq_file *seq, void *v)
919 struct adapter *adap = seq->private;
920 unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk; /* in ps */
921 u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
922 unsigned int tre = TIMERRESOLUTION_G(res);
923 unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
924 unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
926 seq_printf(seq, "Core clock period: %s ns\n",
927 unit_conv(buf, sizeof(buf), cclk_ps, 1000));
928 seq_printf(seq, "TP timer tick: %s us\n",
929 unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
930 seq_printf(seq, "TCP timestamp tick: %s us\n",
931 unit_conv(buf, sizeof(buf),
932 (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
933 seq_printf(seq, "DACK tick: %s us\n",
934 unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
935 seq_printf(seq, "DACK timer: %u us\n",
936 ((cclk_ps << dack_re) / 1000000) *
937 t4_read_reg(adap, TP_DACK_TIMER_A));
938 seq_printf(seq, "Retransmit min: %llu us\n",
939 tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
940 seq_printf(seq, "Retransmit max: %llu us\n",
941 tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
942 seq_printf(seq, "Persist timer min: %llu us\n",
943 tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
944 seq_printf(seq, "Persist timer max: %llu us\n",
945 tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
946 seq_printf(seq, "Keepalive idle timer: %llu us\n",
947 tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
948 seq_printf(seq, "Keepalive interval: %llu us\n",
949 tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
950 seq_printf(seq, "Initial SRTT: %llu us\n",
951 tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
952 seq_printf(seq, "FINWAIT2 timer: %llu us\n",
953 tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
958 DEFINE_SIMPLE_DEBUGFS_FILE(clk);
960 /* Firmware Device Log dump. */
961 static const char * const devlog_level_strings[] = {
962 [FW_DEVLOG_LEVEL_EMERG] = "EMERG",
963 [FW_DEVLOG_LEVEL_CRIT] = "CRIT",
964 [FW_DEVLOG_LEVEL_ERR] = "ERR",
965 [FW_DEVLOG_LEVEL_NOTICE] = "NOTICE",
966 [FW_DEVLOG_LEVEL_INFO] = "INFO",
967 [FW_DEVLOG_LEVEL_DEBUG] = "DEBUG"
970 static const char * const devlog_facility_strings[] = {
971 [FW_DEVLOG_FACILITY_CORE] = "CORE",
972 [FW_DEVLOG_FACILITY_CF] = "CF",
973 [FW_DEVLOG_FACILITY_SCHED] = "SCHED",
974 [FW_DEVLOG_FACILITY_TIMER] = "TIMER",
975 [FW_DEVLOG_FACILITY_RES] = "RES",
976 [FW_DEVLOG_FACILITY_HW] = "HW",
977 [FW_DEVLOG_FACILITY_FLR] = "FLR",
978 [FW_DEVLOG_FACILITY_DMAQ] = "DMAQ",
979 [FW_DEVLOG_FACILITY_PHY] = "PHY",
980 [FW_DEVLOG_FACILITY_MAC] = "MAC",
981 [FW_DEVLOG_FACILITY_PORT] = "PORT",
982 [FW_DEVLOG_FACILITY_VI] = "VI",
983 [FW_DEVLOG_FACILITY_FILTER] = "FILTER",
984 [FW_DEVLOG_FACILITY_ACL] = "ACL",
985 [FW_DEVLOG_FACILITY_TM] = "TM",
986 [FW_DEVLOG_FACILITY_QFC] = "QFC",
987 [FW_DEVLOG_FACILITY_DCB] = "DCB",
988 [FW_DEVLOG_FACILITY_ETH] = "ETH",
989 [FW_DEVLOG_FACILITY_OFLD] = "OFLD",
990 [FW_DEVLOG_FACILITY_RI] = "RI",
991 [FW_DEVLOG_FACILITY_ISCSI] = "ISCSI",
992 [FW_DEVLOG_FACILITY_FCOE] = "FCOE",
993 [FW_DEVLOG_FACILITY_FOISCSI] = "FOISCSI",
994 [FW_DEVLOG_FACILITY_FOFCOE] = "FOFCOE"
997 /* Information gathered by Device Log Open routine for the display routine.
1000 unsigned int nentries; /* number of entries in log[] */
1001 unsigned int first; /* first [temporal] entry in log[] */
1002 struct fw_devlog_e log[0]; /* Firmware Device Log */
1005 /* Dump a Firmaware Device Log entry.
1007 static int devlog_show(struct seq_file *seq, void *v)
1009 if (v == SEQ_START_TOKEN)
1010 seq_printf(seq, "%10s %15s %8s %8s %s\n",
1011 "Seq#", "Tstamp", "Level", "Facility", "Message");
1013 struct devlog_info *dinfo = seq->private;
1014 int fidx = (uintptr_t)v - 2;
1015 unsigned long index;
1016 struct fw_devlog_e *e;
1018 /* Get a pointer to the log entry to display. Skip unused log
1021 index = dinfo->first + fidx;
1022 if (index >= dinfo->nentries)
1023 index -= dinfo->nentries;
1024 e = &dinfo->log[index];
1025 if (e->timestamp == 0)
1028 /* Print the message. This depends on the firmware using
1029 * exactly the same formating strings as the kernel so we may
1030 * eventually have to put a format interpreter in here ...
1032 seq_printf(seq, "%10d %15llu %8s %8s ",
1033 be32_to_cpu(e->seqno),
1034 be64_to_cpu(e->timestamp),
1035 (e->level < ARRAY_SIZE(devlog_level_strings)
1036 ? devlog_level_strings[e->level]
1038 (e->facility < ARRAY_SIZE(devlog_facility_strings)
1039 ? devlog_facility_strings[e->facility]
1041 seq_printf(seq, e->fmt,
1042 be32_to_cpu(e->params[0]),
1043 be32_to_cpu(e->params[1]),
1044 be32_to_cpu(e->params[2]),
1045 be32_to_cpu(e->params[3]),
1046 be32_to_cpu(e->params[4]),
1047 be32_to_cpu(e->params[5]),
1048 be32_to_cpu(e->params[6]),
1049 be32_to_cpu(e->params[7]));
1054 /* Sequential File Operations for Device Log.
1056 static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
1058 if (pos > dinfo->nentries)
1061 return (void *)(uintptr_t)(pos + 1);
1064 static void *devlog_start(struct seq_file *seq, loff_t *pos)
1066 struct devlog_info *dinfo = seq->private;
1069 ? devlog_get_idx(dinfo, *pos)
1073 static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
1075 struct devlog_info *dinfo = seq->private;
1078 return devlog_get_idx(dinfo, *pos);
1081 static void devlog_stop(struct seq_file *seq, void *v)
1085 static const struct seq_operations devlog_seq_ops = {
1086 .start = devlog_start,
1087 .next = devlog_next,
1088 .stop = devlog_stop,
1092 /* Set up for reading the firmware's device log. We read the entire log here
1093 * and then display it incrementally in devlog_show().
1095 static int devlog_open(struct inode *inode, struct file *file)
1097 struct adapter *adap = inode->i_private;
1098 struct devlog_params *dparams = &adap->params.devlog;
1099 struct devlog_info *dinfo;
1104 /* If we don't know where the log is we can't do anything.
1106 if (dparams->start == 0)
1109 /* Allocate the space to read in the firmware's device log and set up
1110 * for the iterated call to our display function.
1112 dinfo = __seq_open_private(file, &devlog_seq_ops,
1113 sizeof(*dinfo) + dparams->size);
1117 /* Record the basic log buffer information and read in the raw log.
1119 dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
1121 spin_lock(&adap->win0_lock);
1122 ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
1123 dparams->start, dparams->size, (__be32 *)dinfo->log,
1125 spin_unlock(&adap->win0_lock);
1127 seq_release_private(inode, file);
1131 /* Find the earliest (lowest Sequence Number) log entry in the
1132 * circular Device Log.
1134 for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
1135 struct fw_devlog_e *e = &dinfo->log[index];
1138 if (e->timestamp == 0)
1141 seqno = be32_to_cpu(e->seqno);
1142 if (seqno < fseqno) {
1144 dinfo->first = index;
1150 static const struct file_operations devlog_fops = {
1151 .owner = THIS_MODULE,
1152 .open = devlog_open,
1154 .llseek = seq_lseek,
1155 .release = seq_release_private
1158 /* Show Firmware Mailbox Command/Reply Log
1160 * Note that we don't do any locking when dumping the Firmware Mailbox Log so
1161 * it's possible that we can catch things during a log update and therefore
1162 * see partially corrupted log entries. But it's probably Good Enough(tm).
1163 * If we ever decide that we want to make sure that we're dumping a coherent
1164 * log, we'd need to perform locking in the mailbox logging and in
1165 * mboxlog_open() where we'd need to grab the entire mailbox log in one go
1166 * like we do for the Firmware Device Log.
1168 static int mboxlog_show(struct seq_file *seq, void *v)
1170 struct adapter *adapter = seq->private;
1171 struct mbox_cmd_log *log = adapter->mbox_log;
1172 struct mbox_cmd *entry;
1175 if (v == SEQ_START_TOKEN) {
1177 "%10s %15s %5s %5s %s\n",
1178 "Seq#", "Tstamp", "Atime", "Etime",
1183 entry_idx = log->cursor + ((uintptr_t)v - 2);
1184 if (entry_idx >= log->size)
1185 entry_idx -= log->size;
1186 entry = mbox_cmd_log_entry(log, entry_idx);
1188 /* skip over unused entries */
1189 if (entry->timestamp == 0)
1192 seq_printf(seq, "%10u %15llu %5d %5d",
1193 entry->seqno, entry->timestamp,
1194 entry->access, entry->execute);
1195 for (i = 0; i < MBOX_LEN / 8; i++) {
1196 u64 flit = entry->cmd[i];
1197 u32 hi = (u32)(flit >> 32);
1200 seq_printf(seq, " %08x %08x", hi, lo);
1202 seq_puts(seq, "\n");
1206 static inline void *mboxlog_get_idx(struct seq_file *seq, loff_t pos)
1208 struct adapter *adapter = seq->private;
1209 struct mbox_cmd_log *log = adapter->mbox_log;
1211 return ((pos <= log->size) ? (void *)(uintptr_t)(pos + 1) : NULL);
1214 static void *mboxlog_start(struct seq_file *seq, loff_t *pos)
1216 return *pos ? mboxlog_get_idx(seq, *pos) : SEQ_START_TOKEN;
1219 static void *mboxlog_next(struct seq_file *seq, void *v, loff_t *pos)
1222 return mboxlog_get_idx(seq, *pos);
1225 static void mboxlog_stop(struct seq_file *seq, void *v)
1229 static const struct seq_operations mboxlog_seq_ops = {
1230 .start = mboxlog_start,
1231 .next = mboxlog_next,
1232 .stop = mboxlog_stop,
1233 .show = mboxlog_show
1236 static int mboxlog_open(struct inode *inode, struct file *file)
1238 int res = seq_open(file, &mboxlog_seq_ops);
1241 struct seq_file *seq = file->private_data;
1243 seq->private = inode->i_private;
1248 static const struct file_operations mboxlog_fops = {
1249 .owner = THIS_MODULE,
1250 .open = mboxlog_open,
1252 .llseek = seq_lseek,
1253 .release = seq_release,
1256 static int mbox_show(struct seq_file *seq, void *v)
1258 static const char * const owner[] = { "none", "FW", "driver",
1259 "unknown", "<unread>" };
1262 unsigned int mbox = (uintptr_t)seq->private & 7;
1263 struct adapter *adap = seq->private - mbox;
1264 void __iomem *addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1266 /* For T4 we don't have a shadow copy of the Mailbox Control register.
1267 * And since reading that real register causes a side effect of
1268 * granting ownership, we're best of simply not reading it at all.
1270 if (is_t4(adap->params.chip)) {
1271 i = 4; /* index of "<unread>" */
1273 unsigned int ctrl_reg = CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A;
1274 void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg);
1276 i = MBOWNER_G(readl(ctrl));
1279 seq_printf(seq, "mailbox owned by %s\n\n", owner[i]);
1281 for (i = 0; i < MBOX_LEN; i += 8)
1282 seq_printf(seq, "%016llx\n",
1283 (unsigned long long)readq(addr + i));
1287 static int mbox_open(struct inode *inode, struct file *file)
1289 return single_open(file, mbox_show, inode->i_private);
1292 static ssize_t mbox_write(struct file *file, const char __user *buf,
1293 size_t count, loff_t *pos)
1296 char c = '\n', s[256];
1297 unsigned long long data[8];
1298 const struct inode *ino;
1300 struct adapter *adap;
1304 if (count > sizeof(s) - 1 || !count)
1306 if (copy_from_user(s, buf, count))
1310 if (sscanf(s, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data[0],
1311 &data[1], &data[2], &data[3], &data[4], &data[5], &data[6],
1312 &data[7], &c) < 8 || c != '\n')
1315 ino = file_inode(file);
1316 mbox = (uintptr_t)ino->i_private & 7;
1317 adap = ino->i_private - mbox;
1318 addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1319 ctrl = addr + MBOX_LEN;
1321 if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL)
1324 for (i = 0; i < 8; i++)
1325 writeq(data[i], addr + 8 * i);
1327 writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl);
1331 static const struct file_operations mbox_debugfs_fops = {
1332 .owner = THIS_MODULE,
1335 .llseek = seq_lseek,
1336 .release = single_release,
1340 static int mps_trc_show(struct seq_file *seq, void *v)
1343 struct trace_params tp;
1344 unsigned int trcidx = (uintptr_t)seq->private & 3;
1345 struct adapter *adap = seq->private - trcidx;
1347 t4_get_trace_filter(adap, &tp, trcidx, &enabled);
1349 seq_puts(seq, "tracer is disabled\n");
1353 if (tp.skip_ofst * 8 >= TRACE_LEN) {
1354 dev_err(adap->pdev_dev, "illegal trace pattern skip offset\n");
1358 i = adap->chan_map[tp.port & 3];
1359 if (i >= MAX_NPORTS) {
1360 dev_err(adap->pdev_dev, "tracer %u is assigned "
1361 "to non-existing port\n", trcidx);
1364 seq_printf(seq, "tracer is capturing %s %s, ",
1365 adap->port[i]->name, tp.port < 4 ? "Rx" : "Tx");
1367 seq_printf(seq, "tracer is capturing loopback %d, ",
1369 seq_printf(seq, "snap length: %u, min length: %u\n", tp.snap_len,
1371 seq_printf(seq, "packets captured %smatch filter\n",
1372 tp.invert ? "do not " : "");
1375 seq_puts(seq, "filter pattern: ");
1376 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1377 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1379 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1380 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1381 seq_puts(seq, "@0\n");
1384 seq_puts(seq, "filter pattern: ");
1385 for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1386 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1388 for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1389 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1390 seq_printf(seq, "@%u\n", (tp.skip_ofst + tp.skip_len) * 8);
1394 static int mps_trc_open(struct inode *inode, struct file *file)
1396 return single_open(file, mps_trc_show, inode->i_private);
1399 static unsigned int xdigit2int(unsigned char c)
1401 return isdigit(c) ? c - '0' : tolower(c) - 'a' + 10;
1404 #define TRC_PORT_NONE 0xff
1405 #define TRC_RSS_ENABLE 0x33
1406 #define TRC_RSS_DISABLE 0x13
1408 /* Set an MPS trace filter. Syntax is:
1412 * to disable tracing, or
1414 * interface qid=<qid no> [snaplen=<val>] [minlen=<val>] [not] [<pattern>]...
1416 * where interface is one of rxN, txN, or loopbackN, N = 0..3, qid can be one
1417 * of the NIC's response qid obtained from sge_qinfo and pattern has the form
1419 * <pattern data>[/<pattern mask>][@<anchor>]
1421 * Up to 2 filter patterns can be specified. If 2 are supplied the first one
1422 * must be anchored at 0. An omitted mask is taken as a mask of 1s, an omitted
1423 * anchor is taken as 0.
1425 static ssize_t mps_trc_write(struct file *file, const char __user *buf,
1426 size_t count, loff_t *pos)
1430 struct trace_params tp;
1431 const struct inode *ino;
1432 unsigned int trcidx;
1433 char *s, *p, *word, *end;
1434 struct adapter *adap;
1437 ino = file_inode(file);
1438 trcidx = (uintptr_t)ino->i_private & 3;
1439 adap = ino->i_private - trcidx;
1441 /* Don't accept input more than 1K, can't be anything valid except lots
1442 * of whitespace. Well, use less.
1446 p = s = kzalloc(count + 1, GFP_USER);
1449 if (copy_from_user(s, buf, count)) {
1454 if (s[count - 1] == '\n')
1455 s[count - 1] = '\0';
1457 enable = strcmp("disable", s) != 0;
1461 /* enable or disable trace multi rss filter */
1462 if (adap->trace_rss)
1463 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_ENABLE);
1465 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_DISABLE);
1467 memset(&tp, 0, sizeof(tp));
1468 tp.port = TRC_PORT_NONE;
1469 i = 0; /* counts pattern nibbles */
1474 word = strsep(&p, " ");
1478 if (!strncmp(word, "qid=", 4)) {
1479 end = (char *)word + 4;
1480 ret = kstrtouint(end, 10, &j);
1483 if (!adap->trace_rss) {
1484 t4_write_reg(adap, MPS_T5_TRC_RSS_CONTROL_A, j);
1490 t4_write_reg(adap, MPS_TRC_RSS_CONTROL_A, j);
1494 MPS_TRC_FILTER1_RSS_CONTROL_A, j);
1498 MPS_TRC_FILTER2_RSS_CONTROL_A, j);
1502 MPS_TRC_FILTER3_RSS_CONTROL_A, j);
1507 if (!strncmp(word, "snaplen=", 8)) {
1508 end = (char *)word + 8;
1509 ret = kstrtouint(end, 10, &j);
1510 if (ret || j > 9600) {
1511 inval: count = -EINVAL;
1517 if (!strncmp(word, "minlen=", 7)) {
1518 end = (char *)word + 7;
1519 ret = kstrtouint(end, 10, &j);
1520 if (ret || j > TFMINPKTSIZE_M)
1525 if (!strcmp(word, "not")) {
1526 tp.invert = !tp.invert;
1529 if (!strncmp(word, "loopback", 8) && tp.port == TRC_PORT_NONE) {
1530 if (word[8] < '0' || word[8] > '3' || word[9])
1532 tp.port = word[8] - '0' + 8;
1535 if (!strncmp(word, "tx", 2) && tp.port == TRC_PORT_NONE) {
1536 if (word[2] < '0' || word[2] > '3' || word[3])
1538 tp.port = word[2] - '0' + 4;
1539 if (adap->chan_map[tp.port & 3] >= MAX_NPORTS)
1543 if (!strncmp(word, "rx", 2) && tp.port == TRC_PORT_NONE) {
1544 if (word[2] < '0' || word[2] > '3' || word[3])
1546 tp.port = word[2] - '0';
1547 if (adap->chan_map[tp.port] >= MAX_NPORTS)
1551 if (!isxdigit(*word))
1554 /* we have found a trace pattern */
1555 if (i) { /* split pattern */
1556 if (tp.skip_len) /* too many splits */
1558 tp.skip_ofst = i / 16;
1561 data = &tp.data[i / 8];
1562 mask = &tp.mask[i / 8];
1565 while (isxdigit(*word)) {
1566 if (i >= TRACE_LEN * 2) {
1570 *data = (*data << 4) + xdigit2int(*word++);
1576 while (isxdigit(*word)) {
1577 if (j >= i) /* mask longer than data */
1579 *mask = (*mask << 4) + xdigit2int(*word++);
1583 if (i != j) /* mask shorter than data */
1585 } else { /* no mask, use all 1s */
1586 for ( ; i - j >= 8; j += 8)
1587 *mask++ = 0xffffffff;
1589 *mask = (1 << (i % 8) * 4) - 1;
1592 end = (char *)word + 1;
1593 ret = kstrtouint(end, 10, &j);
1594 if (*end && *end != '\n')
1596 if (j & 7) /* doesn't start at multiple of 8 */
1599 if (j < tp.skip_ofst) /* overlaps earlier pattern */
1601 if (j - tp.skip_ofst > 31) /* skip too big */
1603 tp.skip_len = j - tp.skip_ofst;
1606 *data <<= (8 - i % 8) * 4;
1607 *mask <<= (8 - i % 8) * 4;
1608 i = (i + 15) & ~15; /* 8-byte align */
1612 if (tp.port == TRC_PORT_NONE)
1616 i = t4_set_trace_filter(adap, &tp, trcidx, enable);
1624 static const struct file_operations mps_trc_debugfs_fops = {
1625 .owner = THIS_MODULE,
1626 .open = mps_trc_open,
1628 .llseek = seq_lseek,
1629 .release = single_release,
1630 .write = mps_trc_write
1633 static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
1637 loff_t avail = file_inode(file)->i_size;
1638 struct adapter *adap = file->private_data;
1644 if (count > avail - pos)
1645 count = avail - pos;
1653 len = min(count + ofst, sizeof(data));
1654 ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
1660 if (copy_to_user(buf, data + ofst, len))
1667 count = pos - *ppos;
1672 static const struct file_operations flash_debugfs_fops = {
1673 .owner = THIS_MODULE,
1676 .llseek = default_llseek,
1679 static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
1682 y = (__force u64)cpu_to_be64(y);
1683 memcpy(addr, (char *)&y + 2, ETH_ALEN);
1686 static int mps_tcam_show(struct seq_file *seq, void *v)
1688 struct adapter *adap = seq->private;
1689 unsigned int chip_ver = CHELSIO_CHIP_VERSION(adap->params.chip);
1690 if (v == SEQ_START_TOKEN) {
1691 if (chip_ver > CHELSIO_T5) {
1692 seq_puts(seq, "Idx Ethernet address Mask "
1693 " VNI Mask IVLAN Vld "
1694 "DIP_Hit Lookup Port "
1697 " P0 P1 P2 P3 ML\n");
1699 if (adap->params.arch.mps_rplc_size > 128)
1700 seq_puts(seq, "Idx Ethernet address Mask "
1703 " P0 P1 P2 P3 ML\n");
1705 seq_puts(seq, "Idx Ethernet address Mask "
1706 "Vld Ports PF VF Replication"
1707 " P0 P1 P2 P3 ML\n");
1712 bool replicate, dip_hit = false, vlan_vld = false;
1713 unsigned int idx = (uintptr_t)v - 2;
1714 u64 tcamy, tcamx, val;
1715 u32 cls_lo, cls_hi, ctl, data2, vnix = 0, vniy = 0;
1717 u8 lookup_type = 0, port_num = 0;
1720 if (chip_ver > CHELSIO_T5) {
1721 /* CtlCmdType - 0: Read, 1: Write
1722 * CtlTcamSel - 0: TCAM0, 1: TCAM1
1723 * CtlXYBitSel- 0: Y bit, 1: X bit
1727 ctl = CTLCMDTYPE_V(0) | CTLXYBITSEL_V(0);
1729 ctl |= CTLTCAMINDEX_V(idx) | CTLTCAMSEL_V(0);
1731 ctl |= CTLTCAMINDEX_V(idx - 256) |
1733 t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1734 val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1735 tcamy = DMACH_G(val) << 32;
1736 tcamy |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1737 data2 = t4_read_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A);
1738 lookup_type = DATALKPTYPE_G(data2);
1739 /* 0 - Outer header, 1 - Inner header
1740 * [71:48] bit locations are overloaded for
1741 * outer vs. inner lookup types.
1743 if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1744 /* Inner header VNI */
1745 vniy = (data2 & DATAVIDH2_F) |
1746 (DATAVIDH1_G(data2) << 16) | VIDL_G(val);
1747 dip_hit = data2 & DATADIPHIT_F;
1749 vlan_vld = data2 & DATAVIDH2_F;
1750 ivlan = VIDL_G(val);
1752 port_num = DATAPORTNUM_G(data2);
1754 /* Read tcamx. Change the control param */
1756 ctl |= CTLXYBITSEL_V(1);
1757 t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1758 val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1759 tcamx = DMACH_G(val) << 32;
1760 tcamx |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1761 data2 = t4_read_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A);
1762 if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1763 /* Inner header VNI mask */
1764 vnix = (data2 & DATAVIDH2_F) |
1765 (DATAVIDH1_G(data2) << 16) | VIDL_G(val);
1768 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
1769 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
1772 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
1773 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
1775 if (tcamx & tcamy) {
1776 seq_printf(seq, "%3u -\n", idx);
1780 rplc[0] = rplc[1] = rplc[2] = rplc[3] = 0;
1781 if (chip_ver > CHELSIO_T5)
1782 replicate = (cls_lo & T6_REPLICATE_F);
1784 replicate = (cls_lo & REPLICATE_F);
1787 struct fw_ldst_cmd ldst_cmd;
1789 struct fw_ldst_mps_rplc mps_rplc;
1792 memset(&ldst_cmd, 0, sizeof(ldst_cmd));
1794 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_MPS);
1795 ldst_cmd.op_to_addrspace =
1796 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
1800 ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
1801 ldst_cmd.u.mps.rplc.fid_idx =
1802 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
1803 FW_LDST_CMD_IDX_V(idx));
1804 ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
1805 sizeof(ldst_cmd), &ldst_cmd);
1807 dev_warn(adap->pdev_dev, "Can't read MPS "
1808 "replication map for idx %d: %d\n",
1811 mps_rplc = ldst_cmd.u.mps.rplc;
1812 rplc[0] = ntohl(mps_rplc.rplc31_0);
1813 rplc[1] = ntohl(mps_rplc.rplc63_32);
1814 rplc[2] = ntohl(mps_rplc.rplc95_64);
1815 rplc[3] = ntohl(mps_rplc.rplc127_96);
1816 if (adap->params.arch.mps_rplc_size > 128) {
1817 rplc[4] = ntohl(mps_rplc.rplc159_128);
1818 rplc[5] = ntohl(mps_rplc.rplc191_160);
1819 rplc[6] = ntohl(mps_rplc.rplc223_192);
1820 rplc[7] = ntohl(mps_rplc.rplc255_224);
1825 tcamxy2valmask(tcamx, tcamy, addr, &mask);
1826 if (chip_ver > CHELSIO_T5) {
1827 /* Inner header lookup */
1828 if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1830 "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1831 "%012llx %06x %06x - - %3c"
1833 "%3c %#x%4u%4d", idx, addr[0],
1834 addr[1], addr[2], addr[3],
1836 (unsigned long long)mask,
1837 vniy, (vnix | vniy),
1838 dip_hit ? 'Y' : 'N',
1840 (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N',
1843 (cls_lo & T6_VF_VALID_F) ?
1844 T6_VF_G(cls_lo) : -1);
1847 "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1849 idx, addr[0], addr[1], addr[2],
1850 addr[3], addr[4], addr[5],
1851 (unsigned long long)mask);
1854 seq_printf(seq, "%4u Y ", ivlan);
1856 seq_puts(seq, " - N ");
1859 "- %3c %4x %3c %#x%4u%4d",
1860 lookup_type ? 'I' : 'O', port_num,
1861 (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N',
1864 (cls_lo & T6_VF_VALID_F) ?
1865 T6_VF_G(cls_lo) : -1);
1868 seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1869 "%012llx%3c %#x%4u%4d",
1870 idx, addr[0], addr[1], addr[2], addr[3],
1871 addr[4], addr[5], (unsigned long long)mask,
1872 (cls_lo & SRAM_VLD_F) ? 'Y' : 'N',
1875 (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
1878 if (adap->params.arch.mps_rplc_size > 128)
1879 seq_printf(seq, " %08x %08x %08x %08x "
1880 "%08x %08x %08x %08x",
1881 rplc[7], rplc[6], rplc[5], rplc[4],
1882 rplc[3], rplc[2], rplc[1], rplc[0]);
1884 seq_printf(seq, " %08x %08x %08x %08x",
1885 rplc[3], rplc[2], rplc[1], rplc[0]);
1887 if (adap->params.arch.mps_rplc_size > 128)
1888 seq_printf(seq, "%72c", ' ');
1890 seq_printf(seq, "%36c", ' ');
1893 if (chip_ver > CHELSIO_T5)
1894 seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1895 T6_SRAM_PRIO0_G(cls_lo),
1896 T6_SRAM_PRIO1_G(cls_lo),
1897 T6_SRAM_PRIO2_G(cls_lo),
1898 T6_SRAM_PRIO3_G(cls_lo),
1899 (cls_lo >> T6_MULTILISTEN0_S) & 0xf);
1901 seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1902 SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
1903 SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
1904 (cls_lo >> MULTILISTEN0_S) & 0xf);
1909 static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
1911 struct adapter *adap = seq->private;
1912 int max_mac_addr = is_t4(adap->params.chip) ?
1913 NUM_MPS_CLS_SRAM_L_INSTANCES :
1914 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
1915 return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
1918 static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
1920 return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
1923 static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
1926 return mps_tcam_get_idx(seq, *pos);
1929 static void mps_tcam_stop(struct seq_file *seq, void *v)
1933 static const struct seq_operations mps_tcam_seq_ops = {
1934 .start = mps_tcam_start,
1935 .next = mps_tcam_next,
1936 .stop = mps_tcam_stop,
1937 .show = mps_tcam_show
1940 static int mps_tcam_open(struct inode *inode, struct file *file)
1942 int res = seq_open(file, &mps_tcam_seq_ops);
1945 struct seq_file *seq = file->private_data;
1947 seq->private = inode->i_private;
1952 static const struct file_operations mps_tcam_debugfs_fops = {
1953 .owner = THIS_MODULE,
1954 .open = mps_tcam_open,
1956 .llseek = seq_lseek,
1957 .release = seq_release,
1960 /* Display various sensor information.
1962 static int sensors_show(struct seq_file *seq, void *v)
1964 struct adapter *adap = seq->private;
1965 u32 param[7], val[7];
1968 /* Note that if the sensors haven't been initialized and turned on
1969 * we'll get values of 0, so treat those as "<unknown>" ...
1971 param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1972 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1973 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
1974 param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1975 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1976 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
1977 ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 2,
1980 if (ret < 0 || val[0] == 0)
1981 seq_puts(seq, "Temperature: <unknown>\n");
1983 seq_printf(seq, "Temperature: %dC\n", val[0]);
1985 if (ret < 0 || val[1] == 0)
1986 seq_puts(seq, "Core VDD: <unknown>\n");
1988 seq_printf(seq, "Core VDD: %dmV\n", val[1]);
1993 DEFINE_SIMPLE_DEBUGFS_FILE(sensors);
1995 #if IS_ENABLED(CONFIG_IPV6)
1996 static int clip_tbl_open(struct inode *inode, struct file *file)
1998 return single_open(file, clip_tbl_show, inode->i_private);
2001 static const struct file_operations clip_tbl_debugfs_fops = {
2002 .owner = THIS_MODULE,
2003 .open = clip_tbl_open,
2005 .llseek = seq_lseek,
2006 .release = single_release
2013 static int rss_show(struct seq_file *seq, void *v, int idx)
2017 seq_printf(seq, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n",
2018 idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
2019 entry[5], entry[6], entry[7]);
2023 static int rss_open(struct inode *inode, struct file *file)
2025 struct adapter *adap = inode->i_private;
2029 nentries = t4_chip_rss_size(adap);
2030 p = seq_open_tab(file, nentries / 8, 8 * sizeof(u16), 0, rss_show);
2034 ret = t4_read_rss(adap, (u16 *)p->data);
2036 seq_release_private(inode, file);
2041 static const struct file_operations rss_debugfs_fops = {
2042 .owner = THIS_MODULE,
2045 .llseek = seq_lseek,
2046 .release = seq_release_private
2049 /* RSS Configuration.
2052 /* Small utility function to return the strings "yes" or "no" if the supplied
2053 * argument is non-zero.
2055 static const char *yesno(int x)
2057 static const char *yes = "yes";
2058 static const char *no = "no";
2060 return x ? yes : no;
2063 static int rss_config_show(struct seq_file *seq, void *v)
2065 struct adapter *adapter = seq->private;
2066 static const char * const keymode[] = {
2068 "global and per-VF scramble",
2069 "per-PF and per-VF scramble",
2070 "per-VF and per-VF scramble",
2074 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
2075 seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
2076 seq_printf(seq, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
2078 seq_printf(seq, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
2080 seq_printf(seq, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
2082 seq_printf(seq, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
2084 seq_printf(seq, " TnlTcpSel: %3s\n", yesno(rssconf & TNLTCPSEL_F));
2085 seq_printf(seq, " TnlIp6Sel: %3s\n", yesno(rssconf & TNLIP6SEL_F));
2086 seq_printf(seq, " TnlVrtSel: %3s\n", yesno(rssconf & TNLVRTSEL_F));
2087 seq_printf(seq, " TnlMapEn: %3s\n", yesno(rssconf & TNLMAPEN_F));
2088 seq_printf(seq, " OfdHashSave: %3s\n", yesno(rssconf &
2090 seq_printf(seq, " OfdVrtSel: %3s\n", yesno(rssconf & OFDVRTSEL_F));
2091 seq_printf(seq, " OfdMapEn: %3s\n", yesno(rssconf & OFDMAPEN_F));
2092 seq_printf(seq, " OfdLkpEn: %3s\n", yesno(rssconf & OFDLKPEN_F));
2093 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
2095 seq_printf(seq, " Syn2TupEnIpv6: %3s\n", yesno(rssconf &
2097 seq_printf(seq, " Syn4TupEnIpv4: %3s\n", yesno(rssconf &
2099 seq_printf(seq, " Syn2TupEnIpv4: %3s\n", yesno(rssconf &
2101 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
2103 seq_printf(seq, " SynIp6Sel: %3s\n", yesno(rssconf & SYNIP6SEL_F));
2104 seq_printf(seq, " SynVrt6Sel: %3s\n", yesno(rssconf & SYNVRTSEL_F));
2105 seq_printf(seq, " SynMapEn: %3s\n", yesno(rssconf & SYNMAPEN_F));
2106 seq_printf(seq, " SynLkpEn: %3s\n", yesno(rssconf & SYNLKPEN_F));
2107 seq_printf(seq, " ChnEn: %3s\n", yesno(rssconf &
2109 seq_printf(seq, " PrtEn: %3s\n", yesno(rssconf &
2111 seq_printf(seq, " TnlAllLkp: %3s\n", yesno(rssconf &
2113 seq_printf(seq, " VrtEn: %3s\n", yesno(rssconf &
2115 seq_printf(seq, " CngEn: %3s\n", yesno(rssconf &
2116 CONGESTIONENABLE_F));
2117 seq_printf(seq, " HashToeplitz: %3s\n", yesno(rssconf &
2119 seq_printf(seq, " Udp4En: %3s\n", yesno(rssconf & UDPENABLE_F));
2120 seq_printf(seq, " Disable: %3s\n", yesno(rssconf & DISABLE_F));
2122 seq_puts(seq, "\n");
2124 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
2125 seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
2126 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
2127 seq_printf(seq, " MaskFilter: %3d\n", MASKFILTER_G(rssconf));
2128 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
2129 seq_printf(seq, " HashAll: %3s\n",
2130 yesno(rssconf & HASHALL_F));
2131 seq_printf(seq, " HashEth: %3s\n",
2132 yesno(rssconf & HASHETH_F));
2134 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
2136 seq_puts(seq, "\n");
2138 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
2139 seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
2140 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
2141 seq_printf(seq, " RRCplMapEn: %3s\n", yesno(rssconf &
2143 seq_printf(seq, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
2145 seq_puts(seq, "\n");
2147 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
2148 seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
2149 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
2150 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
2152 seq_puts(seq, "\n");
2154 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
2155 seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
2156 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
2157 seq_printf(seq, " KeyWrAddrX: %3d\n",
2158 KEYWRADDRX_G(rssconf));
2159 seq_printf(seq, " KeyExtend: %3s\n",
2160 yesno(rssconf & KEYEXTEND_F));
2162 seq_printf(seq, " VfRdRg: %3s\n", yesno(rssconf & VFRDRG_F));
2163 seq_printf(seq, " VfRdEn: %3s\n", yesno(rssconf & VFRDEN_F));
2164 seq_printf(seq, " VfPerrEn: %3s\n", yesno(rssconf & VFPERREN_F));
2165 seq_printf(seq, " KeyPerrEn: %3s\n", yesno(rssconf & KEYPERREN_F));
2166 seq_printf(seq, " DisVfVlan: %3s\n", yesno(rssconf &
2168 seq_printf(seq, " EnUpSwt: %3s\n", yesno(rssconf & ENABLEUP0_F));
2169 seq_printf(seq, " HashDelay: %3d\n", HASHDELAY_G(rssconf));
2170 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
2171 seq_printf(seq, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf));
2173 seq_printf(seq, " VfWrAddr: %3d\n",
2174 T6_VFWRADDR_G(rssconf));
2175 seq_printf(seq, " KeyMode: %s\n", keymode[KEYMODE_G(rssconf)]);
2176 seq_printf(seq, " VfWrEn: %3s\n", yesno(rssconf & VFWREN_F));
2177 seq_printf(seq, " KeyWrEn: %3s\n", yesno(rssconf & KEYWREN_F));
2178 seq_printf(seq, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf));
2180 seq_puts(seq, "\n");
2182 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
2183 seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
2184 seq_printf(seq, " ChnCount3: %3s\n", yesno(rssconf & CHNCOUNT3_F));
2185 seq_printf(seq, " ChnCount2: %3s\n", yesno(rssconf & CHNCOUNT2_F));
2186 seq_printf(seq, " ChnCount1: %3s\n", yesno(rssconf & CHNCOUNT1_F));
2187 seq_printf(seq, " ChnCount0: %3s\n", yesno(rssconf & CHNCOUNT0_F));
2188 seq_printf(seq, " ChnUndFlow3: %3s\n", yesno(rssconf &
2190 seq_printf(seq, " ChnUndFlow2: %3s\n", yesno(rssconf &
2192 seq_printf(seq, " ChnUndFlow1: %3s\n", yesno(rssconf &
2194 seq_printf(seq, " ChnUndFlow0: %3s\n", yesno(rssconf &
2196 seq_printf(seq, " RstChn3: %3s\n", yesno(rssconf & RSTCHN3_F));
2197 seq_printf(seq, " RstChn2: %3s\n", yesno(rssconf & RSTCHN2_F));
2198 seq_printf(seq, " RstChn1: %3s\n", yesno(rssconf & RSTCHN1_F));
2199 seq_printf(seq, " RstChn0: %3s\n", yesno(rssconf & RSTCHN0_F));
2200 seq_printf(seq, " UpdVld: %3s\n", yesno(rssconf & UPDVLD_F));
2201 seq_printf(seq, " Xoff: %3s\n", yesno(rssconf & XOFF_F));
2202 seq_printf(seq, " UpdChn3: %3s\n", yesno(rssconf & UPDCHN3_F));
2203 seq_printf(seq, " UpdChn2: %3s\n", yesno(rssconf & UPDCHN2_F));
2204 seq_printf(seq, " UpdChn1: %3s\n", yesno(rssconf & UPDCHN1_F));
2205 seq_printf(seq, " UpdChn0: %3s\n", yesno(rssconf & UPDCHN0_F));
2206 seq_printf(seq, " Queue: %3d\n", QUEUE_G(rssconf));
2211 DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
2216 static int rss_key_show(struct seq_file *seq, void *v)
2220 t4_read_rss_key(seq->private, key, true);
2221 seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
2222 key[9], key[8], key[7], key[6], key[5], key[4], key[3],
2223 key[2], key[1], key[0]);
2227 static int rss_key_open(struct inode *inode, struct file *file)
2229 return single_open(file, rss_key_show, inode->i_private);
2232 static ssize_t rss_key_write(struct file *file, const char __user *buf,
2233 size_t count, loff_t *pos)
2238 struct adapter *adap = file_inode(file)->i_private;
2240 if (count > sizeof(s) - 1)
2242 if (copy_from_user(s, buf, count))
2244 for (i = count; i > 0 && isspace(s[i - 1]); i--)
2248 for (p = s, i = 9; i >= 0; i--) {
2250 for (j = 0; j < 8; j++, p++) {
2253 key[i] = (key[i] << 4) | hex2val(*p);
2257 t4_write_rss_key(adap, key, -1, true);
2261 static const struct file_operations rss_key_debugfs_fops = {
2262 .owner = THIS_MODULE,
2263 .open = rss_key_open,
2265 .llseek = seq_lseek,
2266 .release = single_release,
2267 .write = rss_key_write
2270 /* PF RSS Configuration.
2273 struct rss_pf_conf {
2279 static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
2281 struct rss_pf_conf *pfconf;
2283 if (v == SEQ_START_TOKEN) {
2284 /* use the 0th entry to dump the PF Map Index Size */
2285 pfconf = seq->private + offsetof(struct seq_tab, data);
2286 seq_printf(seq, "PF Map Index Size = %d\n\n",
2287 LKPIDXSIZE_G(pfconf->rss_pf_map));
2289 seq_puts(seq, " RSS PF VF Hash Tuple Enable Default\n");
2290 seq_puts(seq, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n");
2291 seq_puts(seq, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n");
2293 #define G_PFnLKPIDX(map, n) \
2294 (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
2295 #define G_PFnMSKSIZE(mask, n) \
2296 (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
2299 seq_printf(seq, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n",
2301 yesno(pfconf->rss_pf_config & MAPENABLE_F),
2302 yesno(pfconf->rss_pf_config & CHNENABLE_F),
2303 yesno(pfconf->rss_pf_config & PRTENABLE_F),
2304 G_PFnLKPIDX(pfconf->rss_pf_map, idx),
2305 G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
2306 IVFWIDTH_G(pfconf->rss_pf_config),
2307 yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
2308 yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
2309 yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
2310 yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
2311 yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
2312 CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
2313 CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
2321 static int rss_pf_config_open(struct inode *inode, struct file *file)
2323 struct adapter *adapter = inode->i_private;
2325 u32 rss_pf_map, rss_pf_mask;
2326 struct rss_pf_conf *pfconf;
2329 p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
2333 pfconf = (struct rss_pf_conf *)p->data;
2334 rss_pf_map = t4_read_rss_pf_map(adapter, true);
2335 rss_pf_mask = t4_read_rss_pf_mask(adapter, true);
2336 for (pf = 0; pf < 8; pf++) {
2337 pfconf[pf].rss_pf_map = rss_pf_map;
2338 pfconf[pf].rss_pf_mask = rss_pf_mask;
2339 t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config,
2345 static const struct file_operations rss_pf_config_debugfs_fops = {
2346 .owner = THIS_MODULE,
2347 .open = rss_pf_config_open,
2349 .llseek = seq_lseek,
2350 .release = seq_release_private
2353 /* VF RSS Configuration.
2356 struct rss_vf_conf {
2361 static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
2363 if (v == SEQ_START_TOKEN) {
2364 seq_puts(seq, " RSS Hash Tuple Enable\n");
2365 seq_puts(seq, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n");
2366 seq_puts(seq, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n");
2368 struct rss_vf_conf *vfconf = v;
2370 seq_printf(seq, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n",
2372 yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
2373 yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
2374 VFLKPIDX_G(vfconf->rss_vf_vfh),
2375 yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
2376 yesno(vfconf->rss_vf_vfh & VFUPEN_F),
2377 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2378 yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
2379 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2380 yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
2381 yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
2382 DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
2383 KEYINDEX_G(vfconf->rss_vf_vfh),
2384 vfconf->rss_vf_vfl);
2389 static int rss_vf_config_open(struct inode *inode, struct file *file)
2391 struct adapter *adapter = inode->i_private;
2393 struct rss_vf_conf *vfconf;
2394 int vf, vfcount = adapter->params.arch.vfcount;
2396 p = seq_open_tab(file, vfcount, sizeof(*vfconf), 1, rss_vf_config_show);
2400 vfconf = (struct rss_vf_conf *)p->data;
2401 for (vf = 0; vf < vfcount; vf++) {
2402 t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
2403 &vfconf[vf].rss_vf_vfh, true);
2408 static const struct file_operations rss_vf_config_debugfs_fops = {
2409 .owner = THIS_MODULE,
2410 .open = rss_vf_config_open,
2412 .llseek = seq_lseek,
2413 .release = seq_release_private
2416 #ifdef CONFIG_CHELSIO_T4_DCB
2417 extern char *dcb_ver_array[];
2419 /* Data Center Briging information for each port.
2421 static int dcb_info_show(struct seq_file *seq, void *v)
2423 struct adapter *adap = seq->private;
2425 if (v == SEQ_START_TOKEN) {
2426 seq_puts(seq, "Data Center Bridging Information\n");
2428 int port = (uintptr_t)v - 2;
2429 struct net_device *dev = adap->port[port];
2430 struct port_info *pi = netdev2pinfo(dev);
2431 struct port_dcb_info *dcb = &pi->dcb;
2433 seq_puts(seq, "\n");
2434 seq_printf(seq, "Port: %d (DCB negotiated: %s)\n",
2436 cxgb4_dcb_enabled(dev) ? "yes" : "no");
2438 if (cxgb4_dcb_enabled(dev))
2439 seq_printf(seq, "[ DCBx Version %s ]\n",
2440 dcb_ver_array[dcb->dcb_version]);
2445 seq_puts(seq, "\n Index\t\t\t :\t");
2446 for (i = 0; i < 8; i++)
2447 seq_printf(seq, " %3d", i);
2448 seq_puts(seq, "\n\n");
2451 if (dcb->msgs & CXGB4_DCB_FW_PGID) {
2454 seq_puts(seq, " Priority Group IDs\t :\t");
2455 for (prio = 0; prio < 8; prio++) {
2456 pgid = (dcb->pgid >> 4 * (7 - prio)) & 0xf;
2457 seq_printf(seq, " %3d", pgid);
2459 seq_puts(seq, "\n");
2462 if (dcb->msgs & CXGB4_DCB_FW_PGRATE) {
2465 seq_puts(seq, " Priority Group BW(%)\t :\t");
2466 for (pg = 0; pg < 8; pg++)
2467 seq_printf(seq, " %3d", dcb->pgrate[pg]);
2468 seq_puts(seq, "\n");
2470 if (dcb->dcb_version == FW_PORT_DCB_VER_IEEE) {
2471 seq_puts(seq, " TSA Algorithm\t\t :\t");
2472 for (pg = 0; pg < 8; pg++)
2473 seq_printf(seq, " %3d", dcb->tsa[pg]);
2474 seq_puts(seq, "\n");
2477 seq_printf(seq, " Max PG Traffic Classes [%3d ]\n",
2478 dcb->pg_num_tcs_supported);
2480 seq_puts(seq, "\n");
2483 if (dcb->msgs & CXGB4_DCB_FW_PRIORATE) {
2486 seq_puts(seq, " Priority Rate\t:\t");
2487 for (prio = 0; prio < 8; prio++)
2488 seq_printf(seq, " %3d", dcb->priorate[prio]);
2489 seq_puts(seq, "\n");
2492 if (dcb->msgs & CXGB4_DCB_FW_PFC) {
2495 seq_puts(seq, " Priority Flow Control :\t");
2496 for (prio = 0; prio < 8; prio++) {
2497 int pfcen = (dcb->pfcen >> 1 * (7 - prio))
2499 seq_printf(seq, " %3d", pfcen);
2501 seq_puts(seq, "\n");
2503 seq_printf(seq, " Max PFC Traffic Classes [%3d ]\n",
2504 dcb->pfc_num_tcs_supported);
2506 seq_puts(seq, "\n");
2509 if (dcb->msgs & CXGB4_DCB_FW_APP_ID) {
2512 seq_puts(seq, " Application Information:\n");
2513 seq_puts(seq, " App Priority Selection Protocol\n");
2514 seq_puts(seq, " Index Map Field ID\n");
2515 for (app = 0, napps = 0;
2516 app < CXGB4_MAX_DCBX_APP_SUPPORTED; app++) {
2517 struct app_priority *ap;
2518 static const char * const sel_names[] = {
2524 const char *sel_name;
2526 ap = &dcb->app_priority[app];
2527 /* skip empty slots */
2528 if (ap->protocolid == 0)
2532 if (ap->sel_field < ARRAY_SIZE(sel_names))
2533 sel_name = sel_names[ap->sel_field];
2535 sel_name = "UNKNOWN";
2537 seq_printf(seq, " %3d %#04x %-10s (%d) %#06x (%d)\n",
2540 sel_name, ap->sel_field,
2541 ap->protocolid, ap->protocolid);
2544 seq_puts(seq, " --- None ---\n");
2550 static inline void *dcb_info_get_idx(struct adapter *adap, loff_t pos)
2552 return (pos <= adap->params.nports
2553 ? (void *)((uintptr_t)pos + 1)
2557 static void *dcb_info_start(struct seq_file *seq, loff_t *pos)
2559 struct adapter *adap = seq->private;
2562 ? dcb_info_get_idx(adap, *pos)
2566 static void dcb_info_stop(struct seq_file *seq, void *v)
2570 static void *dcb_info_next(struct seq_file *seq, void *v, loff_t *pos)
2572 struct adapter *adap = seq->private;
2575 return dcb_info_get_idx(adap, *pos);
2578 static const struct seq_operations dcb_info_seq_ops = {
2579 .start = dcb_info_start,
2580 .next = dcb_info_next,
2581 .stop = dcb_info_stop,
2582 .show = dcb_info_show
2585 static int dcb_info_open(struct inode *inode, struct file *file)
2587 int res = seq_open(file, &dcb_info_seq_ops);
2590 struct seq_file *seq = file->private_data;
2592 seq->private = inode->i_private;
2597 static const struct file_operations dcb_info_debugfs_fops = {
2598 .owner = THIS_MODULE,
2599 .open = dcb_info_open,
2601 .llseek = seq_lseek,
2602 .release = seq_release,
2604 #endif /* CONFIG_CHELSIO_T4_DCB */
2606 static int resources_show(struct seq_file *seq, void *v)
2608 struct adapter *adapter = seq->private;
2609 struct pf_resources *pfres = &adapter->params.pfres;
2611 #define S(desc, fmt, var) \
2612 seq_printf(seq, "%-60s " fmt "\n", \
2613 desc " (" #var "):", pfres->var)
2615 S("Virtual Interfaces", "%d", nvi);
2616 S("Egress Queues", "%d", neq);
2617 S("Ethernet Control", "%d", nethctrl);
2618 S("Ingress Queues/w Free Lists/Interrupts", "%d", niqflint);
2619 S("Ingress Queues", "%d", niq);
2620 S("Traffic Class", "%d", tc);
2621 S("Port Access Rights Mask", "%#x", pmask);
2622 S("MAC Address Filters", "%d", nexactf);
2623 S("Firmware Command Read Capabilities", "%#x", r_caps);
2624 S("Firmware Command Write/Execute Capabilities", "%#x", wx_caps);
2631 static int resources_open(struct inode *inode, struct file *file)
2633 return single_open(file, resources_show, inode->i_private);
2636 static const struct file_operations resources_debugfs_fops = {
2637 .owner = THIS_MODULE,
2638 .open = resources_open,
2640 .llseek = seq_lseek,
2641 .release = seq_release,
2645 * ethqset2pinfo - return port_info of an Ethernet Queue Set
2646 * @adap: the adapter
2647 * @qset: Ethernet Queue Set
2649 static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
2653 for_each_port(adap, pidx) {
2654 struct port_info *pi = adap2pinfo(adap, pidx);
2656 if (qset >= pi->first_qset &&
2657 qset < pi->first_qset + pi->nqsets)
2661 /* should never happen! */
2666 static int sge_qinfo_uld_txq_entries(const struct adapter *adap, int uld)
2668 const struct sge_uld_txq_info *utxq_info = adap->sge.uld_txq_info[uld];
2673 return DIV_ROUND_UP(utxq_info->ntxq, 4);
2676 static int sge_qinfo_uld_rspq_entries(const struct adapter *adap, int uld,
2679 const struct sge_uld_rxq_info *urxq_info = adap->sge.uld_rxq_info[uld];
2684 return ciq ? DIV_ROUND_UP(urxq_info->nciq, 4) :
2685 DIV_ROUND_UP(urxq_info->nrxq, 4);
2688 static int sge_qinfo_uld_rxq_entries(const struct adapter *adap, int uld)
2690 return sge_qinfo_uld_rspq_entries(adap, uld, false);
2693 static int sge_qinfo_uld_ciq_entries(const struct adapter *adap, int uld)
2695 return sge_qinfo_uld_rspq_entries(adap, uld, true);
2698 static int sge_qinfo_show(struct seq_file *seq, void *v)
2700 int uld_rxq_entries[CXGB4_ULD_MAX] = { 0 };
2701 int uld_ciq_entries[CXGB4_ULD_MAX] = { 0 };
2702 int uld_txq_entries[CXGB4_TX_MAX] = { 0 };
2703 const struct sge_uld_txq_info *utxq_info;
2704 const struct sge_uld_rxq_info *urxq_info;
2705 struct adapter *adap = seq->private;
2706 int i, n, r = (uintptr_t)v - 1;
2707 int eth_entries, ctrl_entries;
2708 struct sge *s = &adap->sge;
2710 eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
2711 ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
2713 mutex_lock(&uld_mutex);
2714 if (s->uld_txq_info)
2715 for (i = 0; i < ARRAY_SIZE(uld_txq_entries); i++)
2716 uld_txq_entries[i] = sge_qinfo_uld_txq_entries(adap, i);
2718 if (s->uld_rxq_info) {
2719 for (i = 0; i < ARRAY_SIZE(uld_rxq_entries); i++) {
2720 uld_rxq_entries[i] = sge_qinfo_uld_rxq_entries(adap, i);
2721 uld_ciq_entries[i] = sge_qinfo_uld_ciq_entries(adap, i);
2726 seq_putc(seq, '\n');
2728 #define S3(fmt_spec, s, v) \
2730 seq_printf(seq, "%-12s", s); \
2731 for (i = 0; i < n; ++i) \
2732 seq_printf(seq, " %16" fmt_spec, v); \
2733 seq_putc(seq, '\n'); \
2735 #define S(s, v) S3("s", s, v)
2736 #define T3(fmt_spec, s, v) S3(fmt_spec, s, tx[i].v)
2737 #define T(s, v) S3("u", s, tx[i].v)
2738 #define TL(s, v) T3("lu", s, v)
2739 #define R3(fmt_spec, s, v) S3(fmt_spec, s, rx[i].v)
2740 #define R(s, v) S3("u", s, rx[i].v)
2741 #define RL(s, v) R3("lu", s, v)
2743 if (r < eth_entries) {
2744 int base_qset = r * 4;
2745 const struct sge_eth_rxq *rx = &s->ethrxq[base_qset];
2746 const struct sge_eth_txq *tx = &s->ethtxq[base_qset];
2748 n = min(4, s->ethqsets - 4 * r);
2750 S("QType:", "Ethernet");
2752 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2753 T("TxQ ID:", q.cntxt_id);
2754 T("TxQ size:", q.size);
2755 T("TxQ inuse:", q.in_use);
2756 T("TxQ CIDX:", q.cidx);
2757 T("TxQ PIDX:", q.pidx);
2758 #ifdef CONFIG_CHELSIO_T4_DCB
2759 T("DCB Prio:", dcb_prio);
2760 S3("u", "DCB PGID:",
2761 (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
2762 4*(7-tx[i].dcb_prio)) & 0xf);
2764 (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
2765 1*(7-tx[i].dcb_prio)) & 0x1);
2767 R("RspQ ID:", rspq.abs_id);
2768 R("RspQ size:", rspq.size);
2769 R("RspQE size:", rspq.iqe_len);
2770 R("RspQ CIDX:", rspq.cidx);
2771 R("RspQ Gen:", rspq.gen);
2772 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2773 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2774 R("FL ID:", fl.cntxt_id);
2775 R("FL size:", fl.size - 8);
2776 R("FL pend:", fl.pend_cred);
2777 R("FL avail:", fl.avail);
2778 R("FL PIDX:", fl.pidx);
2779 R("FL CIDX:", fl.cidx);
2780 RL("RxPackets:", stats.pkts);
2781 RL("RxCSO:", stats.rx_cso);
2782 RL("VLANxtract:", stats.vlan_ex);
2783 RL("LROmerged:", stats.lro_merged);
2784 RL("LROpackets:", stats.lro_pkts);
2785 RL("RxDrops:", stats.rx_drops);
2787 TL("TxCSO:", tx_cso);
2788 TL("VLANins:", vlan_ins);
2789 TL("TxQFull:", q.stops);
2790 TL("TxQRestarts:", q.restarts);
2791 TL("TxMapErr:", mapping_err);
2792 RL("FLAllocErr:", fl.alloc_failed);
2793 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2794 RL("FLMapErr:", fl.mapping_err);
2795 RL("FLLow:", fl.low);
2796 RL("FLStarving:", fl.starving);
2802 if (r < uld_txq_entries[CXGB4_TX_OFLD]) {
2803 const struct sge_uld_txq *tx;
2805 utxq_info = s->uld_txq_info[CXGB4_TX_OFLD];
2806 tx = &utxq_info->uldtxq[r * 4];
2807 n = min(4, utxq_info->ntxq - 4 * r);
2809 S("QType:", "OFLD-TXQ");
2810 T("TxQ ID:", q.cntxt_id);
2811 T("TxQ size:", q.size);
2812 T("TxQ inuse:", q.in_use);
2813 T("TxQ CIDX:", q.cidx);
2814 T("TxQ PIDX:", q.pidx);
2819 r -= uld_txq_entries[CXGB4_TX_OFLD];
2820 if (r < uld_rxq_entries[CXGB4_ULD_RDMA]) {
2821 const struct sge_ofld_rxq *rx;
2823 urxq_info = s->uld_rxq_info[CXGB4_ULD_RDMA];
2824 rx = &urxq_info->uldrxq[r * 4];
2825 n = min(4, urxq_info->nrxq - 4 * r);
2827 S("QType:", "RDMA-CPL");
2829 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2830 R("RspQ ID:", rspq.abs_id);
2831 R("RspQ size:", rspq.size);
2832 R("RspQE size:", rspq.iqe_len);
2833 R("RspQ CIDX:", rspq.cidx);
2834 R("RspQ Gen:", rspq.gen);
2835 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2836 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2837 R("FL ID:", fl.cntxt_id);
2838 R("FL size:", fl.size - 8);
2839 R("FL pend:", fl.pend_cred);
2840 R("FL avail:", fl.avail);
2841 R("FL PIDX:", fl.pidx);
2842 R("FL CIDX:", fl.cidx);
2847 r -= uld_rxq_entries[CXGB4_ULD_RDMA];
2848 if (r < uld_ciq_entries[CXGB4_ULD_RDMA]) {
2849 const struct sge_ofld_rxq *rx;
2852 urxq_info = s->uld_rxq_info[CXGB4_ULD_RDMA];
2853 ciq_idx = urxq_info->nrxq + (r * 4);
2854 rx = &urxq_info->uldrxq[ciq_idx];
2855 n = min(4, urxq_info->nciq - 4 * r);
2857 S("QType:", "RDMA-CIQ");
2859 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2860 R("RspQ ID:", rspq.abs_id);
2861 R("RspQ size:", rspq.size);
2862 R("RspQE size:", rspq.iqe_len);
2863 R("RspQ CIDX:", rspq.cidx);
2864 R("RspQ Gen:", rspq.gen);
2865 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2866 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2871 r -= uld_ciq_entries[CXGB4_ULD_RDMA];
2872 if (r < uld_rxq_entries[CXGB4_ULD_ISCSI]) {
2873 const struct sge_ofld_rxq *rx;
2875 urxq_info = s->uld_rxq_info[CXGB4_ULD_ISCSI];
2876 rx = &urxq_info->uldrxq[r * 4];
2877 n = min(4, urxq_info->nrxq - 4 * r);
2879 S("QType:", "iSCSI");
2880 R("RspQ ID:", rspq.abs_id);
2881 R("RspQ size:", rspq.size);
2882 R("RspQE size:", rspq.iqe_len);
2883 R("RspQ CIDX:", rspq.cidx);
2884 R("RspQ Gen:", rspq.gen);
2885 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2886 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2887 R("FL ID:", fl.cntxt_id);
2888 R("FL size:", fl.size - 8);
2889 R("FL pend:", fl.pend_cred);
2890 R("FL avail:", fl.avail);
2891 R("FL PIDX:", fl.pidx);
2892 R("FL CIDX:", fl.cidx);
2897 r -= uld_rxq_entries[CXGB4_ULD_ISCSI];
2898 if (r < uld_rxq_entries[CXGB4_ULD_ISCSIT]) {
2899 const struct sge_ofld_rxq *rx;
2901 urxq_info = s->uld_rxq_info[CXGB4_ULD_ISCSIT];
2902 rx = &urxq_info->uldrxq[r * 4];
2903 n = min(4, urxq_info->nrxq - 4 * r);
2905 S("QType:", "iSCSIT");
2906 R("RspQ ID:", rspq.abs_id);
2907 R("RspQ size:", rspq.size);
2908 R("RspQE size:", rspq.iqe_len);
2909 R("RspQ CIDX:", rspq.cidx);
2910 R("RspQ Gen:", rspq.gen);
2911 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2912 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2913 R("FL ID:", fl.cntxt_id);
2914 R("FL size:", fl.size - 8);
2915 R("FL pend:", fl.pend_cred);
2916 R("FL avail:", fl.avail);
2917 R("FL PIDX:", fl.pidx);
2918 R("FL CIDX:", fl.cidx);
2923 r -= uld_rxq_entries[CXGB4_ULD_ISCSIT];
2924 if (r < uld_rxq_entries[CXGB4_ULD_TLS]) {
2925 const struct sge_ofld_rxq *rx;
2927 urxq_info = s->uld_rxq_info[CXGB4_ULD_TLS];
2928 rx = &urxq_info->uldrxq[r * 4];
2929 n = min(4, urxq_info->nrxq - 4 * r);
2932 R("RspQ ID:", rspq.abs_id);
2933 R("RspQ size:", rspq.size);
2934 R("RspQE size:", rspq.iqe_len);
2935 R("RspQ CIDX:", rspq.cidx);
2936 R("RspQ Gen:", rspq.gen);
2937 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2938 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2939 R("FL ID:", fl.cntxt_id);
2940 R("FL size:", fl.size - 8);
2941 R("FL pend:", fl.pend_cred);
2942 R("FL avail:", fl.avail);
2943 R("FL PIDX:", fl.pidx);
2944 R("FL CIDX:", fl.cidx);
2949 r -= uld_rxq_entries[CXGB4_ULD_TLS];
2950 if (r < uld_txq_entries[CXGB4_TX_CRYPTO]) {
2951 const struct sge_ofld_rxq *rx;
2952 const struct sge_uld_txq *tx;
2954 utxq_info = s->uld_txq_info[CXGB4_TX_CRYPTO];
2955 urxq_info = s->uld_rxq_info[CXGB4_ULD_CRYPTO];
2956 tx = &utxq_info->uldtxq[r * 4];
2957 rx = &urxq_info->uldrxq[r * 4];
2958 n = min(4, utxq_info->ntxq - 4 * r);
2960 S("QType:", "Crypto");
2961 T("TxQ ID:", q.cntxt_id);
2962 T("TxQ size:", q.size);
2963 T("TxQ inuse:", q.in_use);
2964 T("TxQ CIDX:", q.cidx);
2965 T("TxQ PIDX:", q.pidx);
2966 R("RspQ ID:", rspq.abs_id);
2967 R("RspQ size:", rspq.size);
2968 R("RspQE size:", rspq.iqe_len);
2969 R("RspQ CIDX:", rspq.cidx);
2970 R("RspQ Gen:", rspq.gen);
2971 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2972 S3("u", "Intr pktcnt:", s->counter_val[rx[i].rspq.pktcnt_idx]);
2973 R("FL ID:", fl.cntxt_id);
2974 R("FL size:", fl.size - 8);
2975 R("FL pend:", fl.pend_cred);
2976 R("FL avail:", fl.avail);
2977 R("FL PIDX:", fl.pidx);
2978 R("FL CIDX:", fl.cidx);
2983 r -= uld_txq_entries[CXGB4_TX_CRYPTO];
2984 if (r < ctrl_entries) {
2985 const struct sge_ctrl_txq *tx = &s->ctrlq[r * 4];
2987 n = min(4, adap->params.nports - 4 * r);
2989 S("QType:", "Control");
2990 T("TxQ ID:", q.cntxt_id);
2991 T("TxQ size:", q.size);
2992 T("TxQ inuse:", q.in_use);
2993 T("TxQ CIDX:", q.cidx);
2994 T("TxQ PIDX:", q.pidx);
2995 TL("TxQFull:", q.stops);
2996 TL("TxQRestarts:", q.restarts);
3003 const struct sge_rspq *evtq = &s->fw_evtq;
3005 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
3006 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
3007 seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
3008 seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
3009 seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
3010 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
3011 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
3012 qtimer_val(adap, evtq));
3013 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
3014 s->counter_val[evtq->pktcnt_idx]);
3020 mutex_unlock(&uld_mutex);
3032 static int sge_queue_entries(const struct adapter *adap)
3034 int tot_uld_entries = 0;
3040 mutex_lock(&uld_mutex);
3041 for (i = 0; i < CXGB4_TX_MAX; i++)
3042 tot_uld_entries += sge_qinfo_uld_txq_entries(adap, i);
3044 for (i = 0; i < CXGB4_ULD_MAX; i++) {
3045 tot_uld_entries += sge_qinfo_uld_rxq_entries(adap, i);
3046 tot_uld_entries += sge_qinfo_uld_ciq_entries(adap, i);
3048 mutex_unlock(&uld_mutex);
3051 return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
3053 DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
3056 static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
3058 int entries = sge_queue_entries(seq->private);
3060 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
3063 static void sge_queue_stop(struct seq_file *seq, void *v)
3067 static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
3069 int entries = sge_queue_entries(seq->private);
3072 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
3075 static const struct seq_operations sge_qinfo_seq_ops = {
3076 .start = sge_queue_start,
3077 .next = sge_queue_next,
3078 .stop = sge_queue_stop,
3079 .show = sge_qinfo_show
3082 static int sge_qinfo_open(struct inode *inode, struct file *file)
3084 int res = seq_open(file, &sge_qinfo_seq_ops);
3087 struct seq_file *seq = file->private_data;
3089 seq->private = inode->i_private;
3094 static const struct file_operations sge_qinfo_debugfs_fops = {
3095 .owner = THIS_MODULE,
3096 .open = sge_qinfo_open,
3098 .llseek = seq_lseek,
3099 .release = seq_release,
3102 int mem_open(struct inode *inode, struct file *file)
3105 struct adapter *adap;
3107 file->private_data = inode->i_private;
3109 mem = (uintptr_t)file->private_data & 0x7;
3110 adap = file->private_data - mem;
3112 (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
3117 static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
3121 loff_t avail = file_inode(file)->i_size;
3122 unsigned int mem = (uintptr_t)file->private_data & 0x7;
3123 struct adapter *adap = file->private_data - mem;
3131 if (count > avail - pos)
3132 count = avail - pos;
3134 data = kvzalloc(count, GFP_KERNEL);
3138 spin_lock(&adap->win0_lock);
3139 ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
3140 spin_unlock(&adap->win0_lock);
3145 ret = copy_to_user(buf, data, count);
3151 *ppos = pos + count;
3154 static const struct file_operations mem_debugfs_fops = {
3155 .owner = THIS_MODULE,
3156 .open = simple_open,
3158 .llseek = default_llseek,
3161 static int tid_info_show(struct seq_file *seq, void *v)
3163 unsigned int tid_start = 0;
3164 struct adapter *adap = seq->private;
3165 const struct tid_info *t = &adap->tids;
3166 enum chip_type chip = CHELSIO_CHIP_VERSION(adap->params.chip);
3168 if (chip > CHELSIO_T5)
3169 tid_start = t4_read_reg(adap, LE_DB_ACTIVE_TABLE_START_INDEX_A);
3171 if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) {
3173 seq_printf(seq, "Connections in use: %u\n",
3174 atomic_read(&t->conns_in_use));
3176 if (chip <= CHELSIO_T5)
3177 sb = t4_read_reg(adap, LE_DB_SERVER_INDEX_A) / 4;
3179 sb = t4_read_reg(adap, LE_DB_SRVR_START_INDEX_A);
3182 seq_printf(seq, "TID range: %u..%u/%u..%u", tid_start,
3183 sb - 1, adap->tids.hash_base,
3185 seq_printf(seq, ", in use: %u/%u\n",
3186 atomic_read(&t->tids_in_use),
3187 atomic_read(&t->hash_tids_in_use));
3188 } else if (adap->flags & FW_OFLD_CONN) {
3189 seq_printf(seq, "TID range: %u..%u/%u..%u",
3192 adap->tids.hash_base,
3194 seq_printf(seq, ", in use: %u/%u\n",
3195 atomic_read(&t->tids_in_use),
3196 atomic_read(&t->hash_tids_in_use));
3198 seq_printf(seq, "TID range: %u..%u",
3199 adap->tids.hash_base,
3201 seq_printf(seq, ", in use: %u\n",
3202 atomic_read(&t->hash_tids_in_use));
3204 } else if (t->ntids) {
3205 seq_printf(seq, "Connections in use: %u\n",
3206 atomic_read(&t->conns_in_use));
3208 seq_printf(seq, "TID range: %u..%u", tid_start,
3209 tid_start + t->ntids - 1);
3210 seq_printf(seq, ", in use: %u\n",
3211 atomic_read(&t->tids_in_use));
3215 seq_printf(seq, "STID range: %u..%u, in use-IPv4/IPv6: %u/%u\n",
3217 (chip <= CHELSIO_T5)) ?
3218 t->stid_base + 1 : t->stid_base,
3219 t->stid_base + t->nstids - 1,
3220 t->stids_in_use - t->v6_stids_in_use,
3221 t->v6_stids_in_use);
3224 seq_printf(seq, "ATID range: 0..%u, in use: %u\n",
3225 t->natids - 1, t->atids_in_use);
3226 seq_printf(seq, "FTID range: %u..%u\n", t->ftid_base,
3227 t->ftid_base + t->nftids - 1);
3229 seq_printf(seq, "SFTID range: %u..%u in use: %u\n",
3230 t->sftid_base, t->sftid_base + t->nsftids - 2,
3233 seq_printf(seq, "HW TID usage: %u IP users, %u IPv6 users\n",
3234 t4_read_reg(adap, LE_DB_ACT_CNT_IPV4_A),
3235 t4_read_reg(adap, LE_DB_ACT_CNT_IPV6_A));
3239 DEFINE_SIMPLE_DEBUGFS_FILE(tid_info);
3241 static void add_debugfs_mem(struct adapter *adap, const char *name,
3242 unsigned int idx, unsigned int size_mb)
3244 debugfs_create_file_size(name, 0400, adap->debugfs_root,
3245 (void *)adap + idx, &mem_debugfs_fops,
3249 static ssize_t blocked_fl_read(struct file *filp, char __user *ubuf,
3250 size_t count, loff_t *ppos)
3253 const struct adapter *adap = filp->private_data;
3255 ssize_t size = (adap->sge.egr_sz + 3) / 4 +
3256 adap->sge.egr_sz / 32 + 2; /* includes ,/\n/\0 */
3258 buf = kzalloc(size, GFP_KERNEL);
3262 len = snprintf(buf, size - 1, "%*pb\n",
3263 adap->sge.egr_sz, adap->sge.blocked_fl);
3264 len += sprintf(buf + len, "\n");
3265 size = simple_read_from_buffer(ubuf, count, ppos, buf, len);
3270 static ssize_t blocked_fl_write(struct file *filp, const char __user *ubuf,
3271 size_t count, loff_t *ppos)
3275 struct adapter *adap = filp->private_data;
3277 t = kcalloc(BITS_TO_LONGS(adap->sge.egr_sz), sizeof(long), GFP_KERNEL);
3281 err = bitmap_parse_user(ubuf, count, t, adap->sge.egr_sz);
3287 bitmap_copy(adap->sge.blocked_fl, t, adap->sge.egr_sz);
3292 static const struct file_operations blocked_fl_fops = {
3293 .owner = THIS_MODULE,
3294 .open = simple_open,
3295 .read = blocked_fl_read,
3296 .write = blocked_fl_write,
3297 .llseek = generic_file_llseek,
3300 static void mem_region_show(struct seq_file *seq, const char *name,
3301 unsigned int from, unsigned int to)
3305 string_get_size((u64)to - from + 1, 1, STRING_UNITS_2, buf,
3307 seq_printf(seq, "%-15s %#x-%#x [%s]\n", name, from, to, buf);
3310 static int meminfo_show(struct seq_file *seq, void *v)
3312 static const char * const memory[] = { "EDC0:", "EDC1:", "MC:",
3313 "MC0:", "MC1:", "HMA:"};
3314 struct adapter *adap = seq->private;
3315 struct cudbg_meminfo meminfo;
3318 memset(&meminfo, 0, sizeof(struct cudbg_meminfo));
3319 rc = cudbg_fill_meminfo(adap, &meminfo);
3323 for (i = 0; i < meminfo.avail_c; i++)
3324 mem_region_show(seq, memory[meminfo.avail[i].idx],
3325 meminfo.avail[i].base,
3326 meminfo.avail[i].limit - 1);
3328 seq_putc(seq, '\n');
3329 for (i = 0; i < meminfo.mem_c; i++) {
3330 if (meminfo.mem[i].idx >= ARRAY_SIZE(cudbg_region))
3331 continue; /* skip holes */
3332 if (!meminfo.mem[i].limit)
3333 meminfo.mem[i].limit =
3334 i < meminfo.mem_c - 1 ?
3335 meminfo.mem[i + 1].base - 1 : ~0;
3336 mem_region_show(seq, cudbg_region[meminfo.mem[i].idx],
3337 meminfo.mem[i].base, meminfo.mem[i].limit);
3340 seq_putc(seq, '\n');
3341 mem_region_show(seq, "uP RAM:", meminfo.up_ram_lo, meminfo.up_ram_hi);
3342 mem_region_show(seq, "uP Extmem2:", meminfo.up_extmem2_lo,
3343 meminfo.up_extmem2_hi);
3345 seq_printf(seq, "\n%u Rx pages (%u free) of size %uKiB for %u channels\n",
3346 meminfo.rx_pages_data[0], meminfo.free_rx_cnt,
3347 meminfo.rx_pages_data[1], meminfo.rx_pages_data[2]);
3349 seq_printf(seq, "%u Tx pages (%u free) of size %u%ciB for %u channels\n",
3350 meminfo.tx_pages_data[0], meminfo.free_tx_cnt,
3351 meminfo.tx_pages_data[1], meminfo.tx_pages_data[2],
3352 meminfo.tx_pages_data[3]);
3354 seq_printf(seq, "%u p-structs (%u free)\n\n",
3355 meminfo.p_structs, meminfo.p_structs_free_cnt);
3357 for (i = 0; i < 4; i++)
3358 /* For T6 these are MAC buffer groups */
3359 seq_printf(seq, "Port %d using %u pages out of %u allocated\n",
3360 i, meminfo.port_used[i], meminfo.port_alloc[i]);
3362 for (i = 0; i < adap->params.arch.nchan; i++)
3363 /* For T6 these are MAC buffer groups */
3365 "Loopback %d using %u pages out of %u allocated\n",
3366 i, meminfo.loopback_used[i],
3367 meminfo.loopback_alloc[i]);
3372 static int meminfo_open(struct inode *inode, struct file *file)
3374 return single_open(file, meminfo_show, inode->i_private);
3377 static const struct file_operations meminfo_fops = {
3378 .owner = THIS_MODULE,
3379 .open = meminfo_open,
3381 .llseek = seq_lseek,
3382 .release = single_release,
3385 static int chcr_show(struct seq_file *seq, void *v)
3387 struct adapter *adap = seq->private;
3389 seq_puts(seq, "Chelsio Crypto Accelerator Stats \n");
3390 seq_printf(seq, "Cipher Ops: %10u \n",
3391 atomic_read(&adap->chcr_stats.cipher_rqst));
3392 seq_printf(seq, "Digest Ops: %10u \n",
3393 atomic_read(&adap->chcr_stats.digest_rqst));
3394 seq_printf(seq, "Aead Ops: %10u \n",
3395 atomic_read(&adap->chcr_stats.aead_rqst));
3396 seq_printf(seq, "Completion: %10u \n",
3397 atomic_read(&adap->chcr_stats.complete));
3398 seq_printf(seq, "Error: %10u \n",
3399 atomic_read(&adap->chcr_stats.error));
3400 seq_printf(seq, "Fallback: %10u \n",
3401 atomic_read(&adap->chcr_stats.fallback));
3402 seq_printf(seq, "IPSec PDU: %10u\n",
3403 atomic_read(&adap->chcr_stats.ipsec_cnt));
3408 static int chcr_stats_open(struct inode *inode, struct file *file)
3410 return single_open(file, chcr_show, inode->i_private);
3413 static const struct file_operations chcr_stats_debugfs_fops = {
3414 .owner = THIS_MODULE,
3415 .open = chcr_stats_open,
3417 .llseek = seq_lseek,
3418 .release = single_release,
3421 #define PRINT_ADAP_STATS(string, value) \
3422 seq_printf(seq, "%-25s %-20llu\n", (string), \
3423 (unsigned long long)(value))
3425 #define PRINT_CH_STATS(string, value) \
3427 seq_printf(seq, "%-25s ", (string)); \
3428 for (i = 0; i < adap->params.arch.nchan; i++) \
3429 seq_printf(seq, "%-20llu ", \
3430 (unsigned long long)stats.value[i]); \
3431 seq_printf(seq, "\n"); \
3434 #define PRINT_CH_STATS2(string, value) \
3436 seq_printf(seq, "%-25s ", (string)); \
3437 for (i = 0; i < adap->params.arch.nchan; i++) \
3438 seq_printf(seq, "%-20llu ", \
3439 (unsigned long long)stats[i].value); \
3440 seq_printf(seq, "\n"); \
3443 static void show_tcp_stats(struct seq_file *seq)
3445 struct adapter *adap = seq->private;
3446 struct tp_tcp_stats v4, v6;
3448 spin_lock(&adap->stats_lock);
3449 t4_tp_get_tcp_stats(adap, &v4, &v6, false);
3450 spin_unlock(&adap->stats_lock);
3452 PRINT_ADAP_STATS("tcp_ipv4_out_rsts:", v4.tcp_out_rsts);
3453 PRINT_ADAP_STATS("tcp_ipv4_in_segs:", v4.tcp_in_segs);
3454 PRINT_ADAP_STATS("tcp_ipv4_out_segs:", v4.tcp_out_segs);
3455 PRINT_ADAP_STATS("tcp_ipv4_retrans_segs:", v4.tcp_retrans_segs);
3456 PRINT_ADAP_STATS("tcp_ipv6_out_rsts:", v6.tcp_out_rsts);
3457 PRINT_ADAP_STATS("tcp_ipv6_in_segs:", v6.tcp_in_segs);
3458 PRINT_ADAP_STATS("tcp_ipv6_out_segs:", v6.tcp_out_segs);
3459 PRINT_ADAP_STATS("tcp_ipv6_retrans_segs:", v6.tcp_retrans_segs);
3462 static void show_ddp_stats(struct seq_file *seq)
3464 struct adapter *adap = seq->private;
3465 struct tp_usm_stats stats;
3467 spin_lock(&adap->stats_lock);
3468 t4_get_usm_stats(adap, &stats, false);
3469 spin_unlock(&adap->stats_lock);
3471 PRINT_ADAP_STATS("usm_ddp_frames:", stats.frames);
3472 PRINT_ADAP_STATS("usm_ddp_octets:", stats.octets);
3473 PRINT_ADAP_STATS("usm_ddp_drops:", stats.drops);
3476 static void show_rdma_stats(struct seq_file *seq)
3478 struct adapter *adap = seq->private;
3479 struct tp_rdma_stats stats;
3481 spin_lock(&adap->stats_lock);
3482 t4_tp_get_rdma_stats(adap, &stats, false);
3483 spin_unlock(&adap->stats_lock);
3485 PRINT_ADAP_STATS("rdma_no_rqe_mod_defer:", stats.rqe_dfr_mod);
3486 PRINT_ADAP_STATS("rdma_no_rqe_pkt_defer:", stats.rqe_dfr_pkt);
3489 static void show_tp_err_adapter_stats(struct seq_file *seq)
3491 struct adapter *adap = seq->private;
3492 struct tp_err_stats stats;
3494 spin_lock(&adap->stats_lock);
3495 t4_tp_get_err_stats(adap, &stats, false);
3496 spin_unlock(&adap->stats_lock);
3498 PRINT_ADAP_STATS("tp_err_ofld_no_neigh:", stats.ofld_no_neigh);
3499 PRINT_ADAP_STATS("tp_err_ofld_cong_defer:", stats.ofld_cong_defer);
3502 static void show_cpl_stats(struct seq_file *seq)
3504 struct adapter *adap = seq->private;
3505 struct tp_cpl_stats stats;
3508 spin_lock(&adap->stats_lock);
3509 t4_tp_get_cpl_stats(adap, &stats, false);
3510 spin_unlock(&adap->stats_lock);
3512 PRINT_CH_STATS("tp_cpl_requests:", req);
3513 PRINT_CH_STATS("tp_cpl_responses:", rsp);
3516 static void show_tp_err_channel_stats(struct seq_file *seq)
3518 struct adapter *adap = seq->private;
3519 struct tp_err_stats stats;
3522 spin_lock(&adap->stats_lock);
3523 t4_tp_get_err_stats(adap, &stats, false);
3524 spin_unlock(&adap->stats_lock);
3526 PRINT_CH_STATS("tp_mac_in_errs:", mac_in_errs);
3527 PRINT_CH_STATS("tp_hdr_in_errs:", hdr_in_errs);
3528 PRINT_CH_STATS("tp_tcp_in_errs:", tcp_in_errs);
3529 PRINT_CH_STATS("tp_tcp6_in_errs:", tcp6_in_errs);
3530 PRINT_CH_STATS("tp_tnl_cong_drops:", tnl_cong_drops);
3531 PRINT_CH_STATS("tp_tnl_tx_drops:", tnl_tx_drops);
3532 PRINT_CH_STATS("tp_ofld_vlan_drops:", ofld_vlan_drops);
3533 PRINT_CH_STATS("tp_ofld_chan_drops:", ofld_chan_drops);
3536 static void show_fcoe_stats(struct seq_file *seq)
3538 struct adapter *adap = seq->private;
3539 struct tp_fcoe_stats stats[NCHAN];
3542 spin_lock(&adap->stats_lock);
3543 for (i = 0; i < adap->params.arch.nchan; i++)
3544 t4_get_fcoe_stats(adap, i, &stats[i], false);
3545 spin_unlock(&adap->stats_lock);
3547 PRINT_CH_STATS2("fcoe_octets_ddp", octets_ddp);
3548 PRINT_CH_STATS2("fcoe_frames_ddp", frames_ddp);
3549 PRINT_CH_STATS2("fcoe_frames_drop", frames_drop);
3552 #undef PRINT_CH_STATS2
3553 #undef PRINT_CH_STATS
3554 #undef PRINT_ADAP_STATS
3556 static int tp_stats_show(struct seq_file *seq, void *v)
3558 struct adapter *adap = seq->private;
3560 seq_puts(seq, "\n--------Adapter Stats--------\n");
3561 show_tcp_stats(seq);
3562 show_ddp_stats(seq);
3563 show_rdma_stats(seq);
3564 show_tp_err_adapter_stats(seq);
3566 seq_puts(seq, "\n-------- Channel Stats --------\n");
3567 if (adap->params.arch.nchan == NCHAN)
3568 seq_printf(seq, "%-25s %-20s %-20s %-20s %-20s\n",
3569 " ", "channel 0", "channel 1",
3570 "channel 2", "channel 3");
3572 seq_printf(seq, "%-25s %-20s %-20s\n",
3573 " ", "channel 0", "channel 1");
3574 show_cpl_stats(seq);
3575 show_tp_err_channel_stats(seq);
3576 show_fcoe_stats(seq);
3581 DEFINE_SIMPLE_DEBUGFS_FILE(tp_stats);
3583 /* Add an array of Debug FS files.
3585 void add_debugfs_files(struct adapter *adap,
3586 struct t4_debugfs_entry *files,
3587 unsigned int nfiles)
3591 /* debugfs support is best effort */
3592 for (i = 0; i < nfiles; i++)
3593 debugfs_create_file(files[i].name, files[i].mode,
3595 (void *)adap + files[i].data,
3599 int t4_setup_debugfs(struct adapter *adap)
3605 static struct t4_debugfs_entry t4_debugfs_files[] = {
3606 { "cim_la", &cim_la_fops, 0400, 0 },
3607 { "cim_pif_la", &cim_pif_la_fops, 0400, 0 },
3608 { "cim_ma_la", &cim_ma_la_fops, 0400, 0 },
3609 { "cim_qcfg", &cim_qcfg_fops, 0400, 0 },
3610 { "clk", &clk_debugfs_fops, 0400, 0 },
3611 { "devlog", &devlog_fops, 0400, 0 },
3612 { "mboxlog", &mboxlog_fops, 0400, 0 },
3613 { "mbox0", &mbox_debugfs_fops, 0600, 0 },
3614 { "mbox1", &mbox_debugfs_fops, 0600, 1 },
3615 { "mbox2", &mbox_debugfs_fops, 0600, 2 },
3616 { "mbox3", &mbox_debugfs_fops, 0600, 3 },
3617 { "mbox4", &mbox_debugfs_fops, 0600, 4 },
3618 { "mbox5", &mbox_debugfs_fops, 0600, 5 },
3619 { "mbox6", &mbox_debugfs_fops, 0600, 6 },
3620 { "mbox7", &mbox_debugfs_fops, 0600, 7 },
3621 { "trace0", &mps_trc_debugfs_fops, 0600, 0 },
3622 { "trace1", &mps_trc_debugfs_fops, 0600, 1 },
3623 { "trace2", &mps_trc_debugfs_fops, 0600, 2 },
3624 { "trace3", &mps_trc_debugfs_fops, 0600, 3 },
3625 { "l2t", &t4_l2t_fops, 0400, 0},
3626 { "mps_tcam", &mps_tcam_debugfs_fops, 0400, 0 },
3627 { "rss", &rss_debugfs_fops, 0400, 0 },
3628 { "rss_config", &rss_config_debugfs_fops, 0400, 0 },
3629 { "rss_key", &rss_key_debugfs_fops, 0400, 0 },
3630 { "rss_pf_config", &rss_pf_config_debugfs_fops, 0400, 0 },
3631 { "rss_vf_config", &rss_vf_config_debugfs_fops, 0400, 0 },
3632 { "resources", &resources_debugfs_fops, 0400, 0 },
3633 #ifdef CONFIG_CHELSIO_T4_DCB
3634 { "dcb_info", &dcb_info_debugfs_fops, 0400, 0 },
3636 { "sge_qinfo", &sge_qinfo_debugfs_fops, 0400, 0 },
3637 { "ibq_tp0", &cim_ibq_fops, 0400, 0 },
3638 { "ibq_tp1", &cim_ibq_fops, 0400, 1 },
3639 { "ibq_ulp", &cim_ibq_fops, 0400, 2 },
3640 { "ibq_sge0", &cim_ibq_fops, 0400, 3 },
3641 { "ibq_sge1", &cim_ibq_fops, 0400, 4 },
3642 { "ibq_ncsi", &cim_ibq_fops, 0400, 5 },
3643 { "obq_ulp0", &cim_obq_fops, 0400, 0 },
3644 { "obq_ulp1", &cim_obq_fops, 0400, 1 },
3645 { "obq_ulp2", &cim_obq_fops, 0400, 2 },
3646 { "obq_ulp3", &cim_obq_fops, 0400, 3 },
3647 { "obq_sge", &cim_obq_fops, 0400, 4 },
3648 { "obq_ncsi", &cim_obq_fops, 0400, 5 },
3649 { "tp_la", &tp_la_fops, 0400, 0 },
3650 { "ulprx_la", &ulprx_la_fops, 0400, 0 },
3651 { "sensors", &sensors_debugfs_fops, 0400, 0 },
3652 { "pm_stats", &pm_stats_debugfs_fops, 0400, 0 },
3653 { "tx_rate", &tx_rate_debugfs_fops, 0400, 0 },
3654 { "cctrl", &cctrl_tbl_debugfs_fops, 0400, 0 },
3655 #if IS_ENABLED(CONFIG_IPV6)
3656 { "clip_tbl", &clip_tbl_debugfs_fops, 0400, 0 },
3658 { "tids", &tid_info_debugfs_fops, 0400, 0},
3659 { "blocked_fl", &blocked_fl_fops, 0600, 0 },
3660 { "meminfo", &meminfo_fops, 0400, 0 },
3661 { "crypto", &chcr_stats_debugfs_fops, 0400, 0 },
3662 { "tp_stats", &tp_stats_debugfs_fops, 0400, 0 },
3665 /* Debug FS nodes common to all T5 and later adapters.
3667 static struct t4_debugfs_entry t5_debugfs_files[] = {
3668 { "obq_sge_rx_q0", &cim_obq_fops, 0400, 6 },
3669 { "obq_sge_rx_q1", &cim_obq_fops, 0400, 7 },
3672 add_debugfs_files(adap,
3674 ARRAY_SIZE(t4_debugfs_files));
3675 if (!is_t4(adap->params.chip))
3676 add_debugfs_files(adap,
3678 ARRAY_SIZE(t5_debugfs_files));
3680 i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
3681 if (i & EDRAM0_ENABLE_F) {
3682 size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
3683 add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
3685 if (i & EDRAM1_ENABLE_F) {
3686 size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
3687 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
3689 if (is_t5(adap->params.chip)) {
3690 if (i & EXT_MEM0_ENABLE_F) {
3691 size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
3692 add_debugfs_mem(adap, "mc0", MEM_MC0,
3693 EXT_MEM0_SIZE_G(size));
3695 if (i & EXT_MEM1_ENABLE_F) {
3696 size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
3697 add_debugfs_mem(adap, "mc1", MEM_MC1,
3698 EXT_MEM1_SIZE_G(size));
3701 if (i & EXT_MEM_ENABLE_F) {
3702 size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
3703 add_debugfs_mem(adap, "mc", MEM_MC,
3704 EXT_MEM_SIZE_G(size));
3707 if (i & HMA_MUX_F) {
3708 size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
3709 add_debugfs_mem(adap, "hma", MEM_HMA,
3710 EXT_MEM1_SIZE_G(size));
3714 de = debugfs_create_file_size("flash", 0400, adap->debugfs_root, adap,
3715 &flash_debugfs_fops, adap->params.sf_size);
3716 debugfs_create_bool("use_backdoor", 0600,
3717 adap->debugfs_root, &adap->use_bd);
3718 debugfs_create_bool("trace_rss", 0600,
3719 adap->debugfs_root, &adap->trace_rss);