1 // SPDX-License-Identifier: GPL-2.0
2 /* Ethernet device driver for Cortina Systems Gemini SoC
3 * Also known as the StorLink SL3512 and SL3516 (SL351x) or Lepus
4 * Net Engine and Gigabit Ethernet MAC (GMAC)
5 * This hardware contains a TCP Offload Engine (TOE) but currently the
6 * driver does not make use of it.
9 * Linus Walleij <linus.walleij@linaro.org>
10 * Tobias Waldvogel <tobias.waldvogel@gmail.com> (OpenWRT)
11 * Michał Mirosław <mirq-linux@rere.qmqm.pl>
12 * Paulius Zaleckas <paulius.zaleckas@gmail.com>
13 * Giuseppe De Robertis <Giuseppe.DeRobertis@ba.infn.it>
14 * Gary Chen & Ch Hsu Storlink Semiconductor
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/spinlock.h>
21 #include <linux/slab.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/cache.h>
24 #include <linux/interrupt.h>
25 #include <linux/reset.h>
26 #include <linux/clk.h>
28 #include <linux/of_mdio.h>
29 #include <linux/of_net.h>
30 #include <linux/of_platform.h>
31 #include <linux/etherdevice.h>
32 #include <linux/if_vlan.h>
33 #include <linux/skbuff.h>
34 #include <linux/phy.h>
35 #include <linux/crc32.h>
36 #include <linux/ethtool.h>
37 #include <linux/tcp.h>
38 #include <linux/u64_stats_sync.h>
42 #include <linux/ipv6.h>
46 #define DRV_NAME "gmac-gemini"
47 #define DRV_VERSION "1.0"
49 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
50 static int debug = -1;
51 module_param(debug, int, 0);
52 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
58 #define HBURST_SINGLE 0x00
59 #define HBURST_INCR 0x01
60 #define HBURST_INCR4 0x02
61 #define HBURST_INCR8 0x03
63 #define HPROT_DATA_CACHE BIT(0)
64 #define HPROT_PRIVILIGED BIT(1)
65 #define HPROT_BUFFERABLE BIT(2)
66 #define HPROT_CACHABLE BIT(3)
68 #define DEFAULT_RX_COALESCE_NSECS 0
69 #define DEFAULT_GMAC_RXQ_ORDER 9
70 #define DEFAULT_GMAC_TXQ_ORDER 8
71 #define DEFAULT_RX_BUF_ORDER 11
72 #define DEFAULT_NAPI_WEIGHT 64
73 #define TX_MAX_FRAGS 16
74 #define TX_QUEUE_NUM 1 /* max: 6 */
75 #define RX_MAX_ALLOC_ORDER 2
77 #define GMAC0_IRQ0_2 (GMAC0_TXDERR_INT_BIT | GMAC0_TXPERR_INT_BIT | \
78 GMAC0_RXDERR_INT_BIT | GMAC0_RXPERR_INT_BIT)
79 #define GMAC0_IRQ0_TXQ0_INTS (GMAC0_SWTQ00_EOF_INT_BIT | \
80 GMAC0_SWTQ00_FIN_INT_BIT)
81 #define GMAC0_IRQ4_8 (GMAC0_MIB_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT)
83 #define GMAC_OFFLOAD_FEATURES (NETIF_F_SG | NETIF_F_IP_CSUM | \
84 NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | \
85 NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6)
88 * struct gmac_queue_page - page buffer per-page info
90 struct gmac_queue_page {
96 struct gmac_txdesc *ring;
99 unsigned int noirq_packets;
102 struct gemini_ethernet;
104 struct gemini_ethernet_port {
107 struct gemini_ethernet *geth;
108 struct net_device *netdev;
110 void __iomem *dma_base;
111 void __iomem *gmac_base;
113 struct reset_control *reset;
117 void __iomem *rxq_rwptr;
118 struct gmac_rxdesc *rxq_ring;
119 unsigned int rxq_order;
121 struct napi_struct napi;
122 struct hrtimer rx_coalesce_timer;
123 unsigned int rx_coalesce_nsecs;
124 unsigned int freeq_refill;
125 struct gmac_txq txq[TX_QUEUE_NUM];
126 unsigned int txq_order;
127 unsigned int irq_every_tx_packets;
129 dma_addr_t rxq_dma_base;
130 dma_addr_t txq_dma_base;
132 unsigned int msg_enable;
133 spinlock_t config_lock; /* Locks config register */
135 struct u64_stats_sync tx_stats_syncp;
136 struct u64_stats_sync rx_stats_syncp;
137 struct u64_stats_sync ir_stats_syncp;
139 struct rtnl_link_stats64 stats;
140 u64 hw_stats[RX_STATS_NUM];
141 u64 rx_stats[RX_STATUS_NUM];
142 u64 rx_csum_stats[RX_CHKSUM_NUM];
144 u64 tx_frag_stats[TX_MAX_FRAGS];
145 u64 tx_frags_linearized;
149 struct gemini_ethernet {
152 struct gemini_ethernet_port *port0;
153 struct gemini_ethernet_port *port1;
156 spinlock_t irq_lock; /* Locks IRQ-related registers */
157 unsigned int freeq_order;
158 unsigned int freeq_frag_order;
159 struct gmac_rxdesc *freeq_ring;
160 dma_addr_t freeq_dma_base;
161 struct gmac_queue_page *freeq_pages;
162 unsigned int num_freeq_pages;
163 spinlock_t freeq_lock; /* Locks queue from reentrance */
166 #define GMAC_STATS_NUM ( \
167 RX_STATS_NUM + RX_STATUS_NUM + RX_CHKSUM_NUM + 1 + \
170 static const char gmac_stats_strings[GMAC_STATS_NUM][ETH_GSTRING_LEN] = {
177 "RX_STATUS_GOOD_FRAME",
178 "RX_STATUS_TOO_LONG_GOOD_CRC",
179 "RX_STATUS_RUNT_FRAME",
180 "RX_STATUS_SFD_NOT_FOUND",
181 "RX_STATUS_CRC_ERROR",
182 "RX_STATUS_TOO_LONG_BAD_CRC",
183 "RX_STATUS_ALIGNMENT_ERROR",
184 "RX_STATUS_TOO_LONG_BAD_ALIGN",
186 "RX_STATUS_DA_FILTERED",
187 "RX_STATUS_BUFFER_FULL",
193 "RX_CHKSUM_IP_UDP_TCP_OK",
194 "RX_CHKSUM_IP_OK_ONLY",
197 "RX_CHKSUM_IP_ERR_UNKNOWN",
199 "RX_CHKSUM_TCP_UDP_ERR",
218 "TX_FRAGS_LINEARIZED",
222 static void gmac_dump_dma_state(struct net_device *netdev);
224 static void gmac_update_config0_reg(struct net_device *netdev,
227 struct gemini_ethernet_port *port = netdev_priv(netdev);
231 spin_lock_irqsave(&port->config_lock, flags);
233 reg = readl(port->gmac_base + GMAC_CONFIG0);
234 reg = (reg & ~vmask) | val;
235 writel(reg, port->gmac_base + GMAC_CONFIG0);
237 spin_unlock_irqrestore(&port->config_lock, flags);
240 static void gmac_enable_tx_rx(struct net_device *netdev)
242 struct gemini_ethernet_port *port = netdev_priv(netdev);
246 spin_lock_irqsave(&port->config_lock, flags);
248 reg = readl(port->gmac_base + GMAC_CONFIG0);
249 reg &= ~CONFIG0_TX_RX_DISABLE;
250 writel(reg, port->gmac_base + GMAC_CONFIG0);
252 spin_unlock_irqrestore(&port->config_lock, flags);
255 static void gmac_disable_tx_rx(struct net_device *netdev)
257 struct gemini_ethernet_port *port = netdev_priv(netdev);
261 spin_lock_irqsave(&port->config_lock, flags);
263 val = readl(port->gmac_base + GMAC_CONFIG0);
264 val |= CONFIG0_TX_RX_DISABLE;
265 writel(val, port->gmac_base + GMAC_CONFIG0);
267 spin_unlock_irqrestore(&port->config_lock, flags);
269 mdelay(10); /* let GMAC consume packet */
272 static void gmac_set_flow_control(struct net_device *netdev, bool tx, bool rx)
274 struct gemini_ethernet_port *port = netdev_priv(netdev);
278 spin_lock_irqsave(&port->config_lock, flags);
280 val = readl(port->gmac_base + GMAC_CONFIG0);
281 val &= ~CONFIG0_FLOW_CTL;
283 val |= CONFIG0_FLOW_TX;
285 val |= CONFIG0_FLOW_RX;
286 writel(val, port->gmac_base + GMAC_CONFIG0);
288 spin_unlock_irqrestore(&port->config_lock, flags);
291 static void gmac_speed_set(struct net_device *netdev)
293 struct gemini_ethernet_port *port = netdev_priv(netdev);
294 struct phy_device *phydev = netdev->phydev;
295 union gmac_status status, old_status;
299 status.bits32 = readl(port->gmac_base + GMAC_STATUS);
300 old_status.bits32 = status.bits32;
301 status.bits.link = phydev->link;
302 status.bits.duplex = phydev->duplex;
304 switch (phydev->speed) {
306 status.bits.speed = GMAC_SPEED_1000;
307 if (phy_interface_mode_is_rgmii(phydev->interface))
308 status.bits.mii_rmii = GMAC_PHY_RGMII_1000;
309 netdev_dbg(netdev, "connect %s to RGMII @ 1Gbit\n",
310 phydev_name(phydev));
313 status.bits.speed = GMAC_SPEED_100;
314 if (phy_interface_mode_is_rgmii(phydev->interface))
315 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
316 netdev_dbg(netdev, "connect %s to RGMII @ 100 Mbit\n",
317 phydev_name(phydev));
320 status.bits.speed = GMAC_SPEED_10;
321 if (phy_interface_mode_is_rgmii(phydev->interface))
322 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
323 netdev_dbg(netdev, "connect %s to RGMII @ 10 Mbit\n",
324 phydev_name(phydev));
327 netdev_warn(netdev, "Unsupported PHY speed (%d) on %s\n",
328 phydev->speed, phydev_name(phydev));
331 if (phydev->duplex == DUPLEX_FULL) {
332 u16 lcladv = phy_read(phydev, MII_ADVERTISE);
333 u16 rmtadv = phy_read(phydev, MII_LPA);
334 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
336 if (cap & FLOW_CTRL_RX)
338 if (cap & FLOW_CTRL_TX)
342 gmac_set_flow_control(netdev, pause_tx, pause_rx);
344 if (old_status.bits32 == status.bits32)
347 if (netif_msg_link(port)) {
348 phy_print_status(phydev);
349 netdev_info(netdev, "link flow control: %s\n",
351 ? (phydev->asym_pause ? "tx" : "both")
352 : (phydev->asym_pause ? "rx" : "none")
356 gmac_disable_tx_rx(netdev);
357 writel(status.bits32, port->gmac_base + GMAC_STATUS);
358 gmac_enable_tx_rx(netdev);
361 static int gmac_setup_phy(struct net_device *netdev)
363 struct gemini_ethernet_port *port = netdev_priv(netdev);
364 union gmac_status status = { .bits32 = 0 };
365 struct device *dev = port->dev;
366 struct phy_device *phy;
368 phy = of_phy_get_and_connect(netdev,
373 netdev->phydev = phy;
375 phy->supported &= PHY_GBIT_FEATURES;
376 phy->supported |= SUPPORTED_Asym_Pause | SUPPORTED_Pause;
377 phy->advertising = phy->supported;
379 /* set PHY interface type */
380 switch (phy->interface) {
381 case PHY_INTERFACE_MODE_MII:
383 "MII: set GMAC0 to GMII mode, GMAC1 disabled\n");
384 status.bits.mii_rmii = GMAC_PHY_MII;
386 case PHY_INTERFACE_MODE_GMII:
388 "GMII: set GMAC0 to GMII mode, GMAC1 disabled\n");
389 status.bits.mii_rmii = GMAC_PHY_GMII;
391 case PHY_INTERFACE_MODE_RGMII:
392 case PHY_INTERFACE_MODE_RGMII_ID:
393 case PHY_INTERFACE_MODE_RGMII_TXID:
394 case PHY_INTERFACE_MODE_RGMII_RXID:
396 "RGMII: set GMAC0 and GMAC1 to MII/RGMII mode\n");
397 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
400 netdev_err(netdev, "Unsupported MII interface\n");
402 netdev->phydev = NULL;
405 writel(status.bits32, port->gmac_base + GMAC_STATUS);
407 if (netif_msg_link(port))
408 phy_attached_info(phy);
413 /* The maximum frame length is not logically enumerated in the
414 * hardware, so we do a table lookup to find the applicable max
417 struct gmac_max_framelen {
418 unsigned int max_l3_len;
422 static const struct gmac_max_framelen gmac_maxlens[] = {
425 .val = CONFIG0_MAXLEN_1518,
429 .val = CONFIG0_MAXLEN_1522,
433 .val = CONFIG0_MAXLEN_1536,
437 .val = CONFIG0_MAXLEN_1542,
441 .val = CONFIG0_MAXLEN_9k,
445 .val = CONFIG0_MAXLEN_10k,
449 static int gmac_pick_rx_max_len(unsigned int max_l3_len)
451 const struct gmac_max_framelen *maxlen;
455 maxtot = max_l3_len + ETH_HLEN + VLAN_HLEN;
457 for (i = 0; i < ARRAY_SIZE(gmac_maxlens); i++) {
458 maxlen = &gmac_maxlens[i];
459 if (maxtot <= maxlen->max_l3_len)
466 static int gmac_init(struct net_device *netdev)
468 struct gemini_ethernet_port *port = netdev_priv(netdev);
469 union gmac_config0 config0 = { .bits = {
480 .port0_chk_classq = 1,
481 .port1_chk_classq = 1,
483 union gmac_ahb_weight ahb_weight = { .bits = {
488 .tq_dv_threshold = 0,
490 union gmac_tx_wcr0 hw_weigh = { .bits = {
496 union gmac_tx_wcr1 sw_weigh = { .bits = {
504 union gmac_config1 config1 = { .bits = {
508 union gmac_config2 config2 = { .bits = {
512 union gmac_config3 config3 = { .bits = {
516 union gmac_config0 tmp;
519 config0.bits.max_len = gmac_pick_rx_max_len(netdev->mtu);
520 tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
521 config0.bits.reserved = tmp.bits.reserved;
522 writel(config0.bits32, port->gmac_base + GMAC_CONFIG0);
523 writel(config1.bits32, port->gmac_base + GMAC_CONFIG1);
524 writel(config2.bits32, port->gmac_base + GMAC_CONFIG2);
525 writel(config3.bits32, port->gmac_base + GMAC_CONFIG3);
527 val = readl(port->dma_base + GMAC_AHB_WEIGHT_REG);
528 writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG);
530 writel(hw_weigh.bits32,
531 port->dma_base + GMAC_TX_WEIGHTING_CTRL_0_REG);
532 writel(sw_weigh.bits32,
533 port->dma_base + GMAC_TX_WEIGHTING_CTRL_1_REG);
535 port->rxq_order = DEFAULT_GMAC_RXQ_ORDER;
536 port->txq_order = DEFAULT_GMAC_TXQ_ORDER;
537 port->rx_coalesce_nsecs = DEFAULT_RX_COALESCE_NSECS;
539 /* Mark every quarter of the queue a packet for interrupt
540 * in order to be able to wake up the queue if it was stopped
542 port->irq_every_tx_packets = 1 << (port->txq_order - 2);
547 static void gmac_uninit(struct net_device *netdev)
550 phy_disconnect(netdev->phydev);
553 static int gmac_setup_txqs(struct net_device *netdev)
555 struct gemini_ethernet_port *port = netdev_priv(netdev);
556 unsigned int n_txq = netdev->num_tx_queues;
557 struct gemini_ethernet *geth = port->geth;
558 size_t entries = 1 << port->txq_order;
559 struct gmac_txq *txq = port->txq;
560 struct gmac_txdesc *desc_ring;
561 size_t len = n_txq * entries;
562 struct sk_buff **skb_tab;
563 void __iomem *rwptr_reg;
567 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
569 skb_tab = kcalloc(len, sizeof(*skb_tab), GFP_KERNEL);
573 desc_ring = dma_alloc_coherent(geth->dev, len * sizeof(*desc_ring),
574 &port->txq_dma_base, GFP_KERNEL);
581 if (port->txq_dma_base & ~DMA_Q_BASE_MASK) {
582 dev_warn(geth->dev, "TX queue base is not aligned\n");
583 dma_free_coherent(geth->dev, len * sizeof(*desc_ring),
584 desc_ring, port->txq_dma_base);
589 writel(port->txq_dma_base | port->txq_order,
590 port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
592 for (i = 0; i < n_txq; i++) {
593 txq->ring = desc_ring;
595 txq->noirq_packets = 0;
597 r = readw(rwptr_reg);
599 writew(r, rwptr_reg);
604 desc_ring += entries;
611 static void gmac_clean_txq(struct net_device *netdev, struct gmac_txq *txq,
614 struct gemini_ethernet_port *port = netdev_priv(netdev);
615 unsigned int m = (1 << port->txq_order) - 1;
616 struct gemini_ethernet *geth = port->geth;
617 unsigned int c = txq->cptr;
618 union gmac_txdesc_0 word0;
619 union gmac_txdesc_1 word1;
620 unsigned int hwchksum = 0;
621 unsigned long bytes = 0;
622 struct gmac_txdesc *txd;
623 unsigned short nfrags;
624 unsigned int errs = 0;
625 unsigned int pkts = 0;
636 mapping = txd->word2.buf_adr;
637 word3 = txd->word3.bits32;
639 dma_unmap_single(geth->dev, mapping,
640 word0.bits.buffer_size, DMA_TO_DEVICE);
643 dev_kfree_skb(txq->skb[c]);
648 if (!(word3 & SOF_BIT))
651 if (!word0.bits.status_tx_ok) {
657 bytes += txd->word1.bits.byte_count;
659 if (word1.bits32 & TSS_CHECKUM_ENABLE)
662 nfrags = word0.bits.desc_count - 1;
664 if (nfrags >= TX_MAX_FRAGS)
665 nfrags = TX_MAX_FRAGS - 1;
667 u64_stats_update_begin(&port->tx_stats_syncp);
668 port->tx_frag_stats[nfrags]++;
669 u64_stats_update_end(&port->tx_stats_syncp);
673 u64_stats_update_begin(&port->ir_stats_syncp);
674 port->stats.tx_errors += errs;
675 port->stats.tx_packets += pkts;
676 port->stats.tx_bytes += bytes;
677 port->tx_hw_csummed += hwchksum;
678 u64_stats_update_end(&port->ir_stats_syncp);
683 static void gmac_cleanup_txqs(struct net_device *netdev)
685 struct gemini_ethernet_port *port = netdev_priv(netdev);
686 unsigned int n_txq = netdev->num_tx_queues;
687 struct gemini_ethernet *geth = port->geth;
688 void __iomem *rwptr_reg;
691 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
693 for (i = 0; i < n_txq; i++) {
694 r = readw(rwptr_reg);
696 writew(r, rwptr_reg);
699 gmac_clean_txq(netdev, port->txq + i, r);
701 writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
703 kfree(port->txq->skb);
704 dma_free_coherent(geth->dev,
705 n_txq * sizeof(*port->txq->ring) << port->txq_order,
706 port->txq->ring, port->txq_dma_base);
709 static int gmac_setup_rxq(struct net_device *netdev)
711 struct gemini_ethernet_port *port = netdev_priv(netdev);
712 struct gemini_ethernet *geth = port->geth;
713 struct nontoe_qhdr __iomem *qhdr;
715 qhdr = geth->base + TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id);
716 port->rxq_rwptr = &qhdr->word1;
718 /* Remap a slew of memory to use for the RX queue */
719 port->rxq_ring = dma_alloc_coherent(geth->dev,
720 sizeof(*port->rxq_ring) << port->rxq_order,
721 &port->rxq_dma_base, GFP_KERNEL);
724 if (port->rxq_dma_base & ~NONTOE_QHDR0_BASE_MASK) {
725 dev_warn(geth->dev, "RX queue base is not aligned\n");
729 writel(port->rxq_dma_base | port->rxq_order, &qhdr->word0);
730 writel(0, port->rxq_rwptr);
734 static struct gmac_queue_page *
735 gmac_get_queue_page(struct gemini_ethernet *geth,
736 struct gemini_ethernet_port *port,
739 struct gmac_queue_page *gpage;
743 /* Only look for even pages */
744 mapping = addr & PAGE_MASK;
746 if (!geth->freeq_pages) {
747 dev_err(geth->dev, "try to get page with no page list\n");
751 /* Look up a ring buffer page from virtual mapping */
752 for (i = 0; i < geth->num_freeq_pages; i++) {
753 gpage = &geth->freeq_pages[i];
754 if (gpage->mapping == mapping)
761 static void gmac_cleanup_rxq(struct net_device *netdev)
763 struct gemini_ethernet_port *port = netdev_priv(netdev);
764 struct gemini_ethernet *geth = port->geth;
765 struct gmac_rxdesc *rxd = port->rxq_ring;
766 static struct gmac_queue_page *gpage;
767 struct nontoe_qhdr __iomem *qhdr;
768 void __iomem *dma_reg;
769 void __iomem *ptr_reg;
775 TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id);
776 dma_reg = &qhdr->word0;
777 ptr_reg = &qhdr->word1;
779 rw.bits32 = readl(ptr_reg);
782 writew(r, ptr_reg + 2);
786 /* Loop from read pointer to write pointer of the RX queue
787 * and free up all pages by the queue.
790 mapping = rxd[r].word2.buf_adr;
792 r &= ((1 << port->rxq_order) - 1);
797 /* Freeq pointers are one page off */
798 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE);
800 dev_err(geth->dev, "could not find page\n");
803 /* Release the RX queue reference to the page */
804 put_page(gpage->page);
807 dma_free_coherent(geth->dev, sizeof(*port->rxq_ring) << port->rxq_order,
808 port->rxq_ring, port->rxq_dma_base);
811 static struct page *geth_freeq_alloc_map_page(struct gemini_ethernet *geth,
814 struct gmac_rxdesc *freeq_entry;
815 struct gmac_queue_page *gpage;
816 unsigned int fpp_order;
817 unsigned int frag_len;
822 /* First allocate and DMA map a single page */
823 page = alloc_page(GFP_ATOMIC);
827 mapping = dma_map_single(geth->dev, page_address(page),
828 PAGE_SIZE, DMA_FROM_DEVICE);
829 if (dma_mapping_error(geth->dev, mapping)) {
834 /* The assign the page mapping (physical address) to the buffer address
835 * in the hardware queue. PAGE_SHIFT on ARM is 12 (1 page is 4096 bytes,
836 * 4k), and the default RX frag order is 11 (fragments are up 20 2048
837 * bytes, 2k) so fpp_order (fragments per page order) is default 1. Thus
838 * each page normally needs two entries in the queue.
840 frag_len = 1 << geth->freeq_frag_order; /* Usually 2048 */
841 fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
842 freeq_entry = geth->freeq_ring + (pn << fpp_order);
843 dev_dbg(geth->dev, "allocate page %d fragment length %d fragments per page %d, freeq entry %p\n",
844 pn, frag_len, (1 << fpp_order), freeq_entry);
845 for (i = (1 << fpp_order); i > 0; i--) {
846 freeq_entry->word2.buf_adr = mapping;
851 /* If the freeq entry already has a page mapped, then unmap it. */
852 gpage = &geth->freeq_pages[pn];
854 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
855 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
856 /* This should be the last reference to the page so it gets
859 put_page(gpage->page);
862 /* Then put our new mapping into the page table */
863 dev_dbg(geth->dev, "page %d, DMA addr: %08x, page %p\n",
864 pn, (unsigned int)mapping, page);
865 gpage->mapping = mapping;
872 * geth_fill_freeq() - Fill the freeq with empty fragments to use
873 * @geth: the ethernet adapter
874 * @refill: whether to reset the queue by filling in all freeq entries or
875 * just refill it, usually the interrupt to refill the queue happens when
876 * the queue is half empty.
878 static unsigned int geth_fill_freeq(struct gemini_ethernet *geth, bool refill)
880 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
881 unsigned int count = 0;
882 unsigned int pn, epn;
888 m_pn = (1 << (geth->freeq_order - fpp_order)) - 1;
890 spin_lock_irqsave(&geth->freeq_lock, flags);
892 rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG);
893 pn = (refill ? rw.bits.wptr : rw.bits.rptr) >> fpp_order;
894 epn = (rw.bits.rptr >> fpp_order) - 1;
897 /* Loop over the freeq ring buffer entries */
899 struct gmac_queue_page *gpage;
902 gpage = &geth->freeq_pages[pn];
905 dev_dbg(geth->dev, "fill entry %d page ref count %d add %d refs\n",
906 pn, page_ref_count(page), 1 << fpp_order);
908 if (page_ref_count(page) > 1) {
909 unsigned int fl = (pn - epn) & m_pn;
911 if (fl > 64 >> fpp_order)
914 page = geth_freeq_alloc_map_page(geth, pn);
919 /* Add one reference per fragment in the page */
920 page_ref_add(page, 1 << fpp_order);
921 count += 1 << fpp_order;
926 writew(pn << fpp_order, geth->base + GLOBAL_SWFQ_RWPTR_REG + 2);
928 spin_unlock_irqrestore(&geth->freeq_lock, flags);
933 static int geth_setup_freeq(struct gemini_ethernet *geth)
935 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
936 unsigned int frag_len = 1 << geth->freeq_frag_order;
937 unsigned int len = 1 << geth->freeq_order;
938 unsigned int pages = len >> fpp_order;
939 union queue_threshold qt;
940 union dma_skb_size skbsz;
944 geth->freeq_ring = dma_alloc_coherent(geth->dev,
945 sizeof(*geth->freeq_ring) << geth->freeq_order,
946 &geth->freeq_dma_base, GFP_KERNEL);
947 if (!geth->freeq_ring)
949 if (geth->freeq_dma_base & ~DMA_Q_BASE_MASK) {
950 dev_warn(geth->dev, "queue ring base is not aligned\n");
954 /* Allocate a mapping to page look-up index */
955 geth->freeq_pages = kcalloc(pages, sizeof(*geth->freeq_pages),
957 if (!geth->freeq_pages)
959 geth->num_freeq_pages = pages;
961 dev_info(geth->dev, "allocate %d pages for queue\n", pages);
962 for (pn = 0; pn < pages; pn++)
963 if (!geth_freeq_alloc_map_page(geth, pn))
964 goto err_freeq_alloc;
966 filled = geth_fill_freeq(geth, false);
968 goto err_freeq_alloc;
970 qt.bits32 = readl(geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
971 qt.bits.swfq_empty = 32;
972 writel(qt.bits32, geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
974 skbsz.bits.sw_skb_size = 1 << geth->freeq_frag_order;
975 writel(skbsz.bits32, geth->base + GLOBAL_DMA_SKB_SIZE_REG);
976 writel(geth->freeq_dma_base | geth->freeq_order,
977 geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
983 struct gmac_queue_page *gpage;
987 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
988 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
989 gpage = &geth->freeq_pages[pn];
990 put_page(gpage->page);
993 kfree(geth->freeq_pages);
995 dma_free_coherent(geth->dev,
996 sizeof(*geth->freeq_ring) << geth->freeq_order,
997 geth->freeq_ring, geth->freeq_dma_base);
998 geth->freeq_ring = NULL;
1003 * geth_cleanup_freeq() - cleanup the DMA mappings and free the queue
1004 * @geth: the Gemini global ethernet state
1006 static void geth_cleanup_freeq(struct gemini_ethernet *geth)
1008 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
1009 unsigned int frag_len = 1 << geth->freeq_frag_order;
1010 unsigned int len = 1 << geth->freeq_order;
1011 unsigned int pages = len >> fpp_order;
1014 writew(readw(geth->base + GLOBAL_SWFQ_RWPTR_REG),
1015 geth->base + GLOBAL_SWFQ_RWPTR_REG + 2);
1016 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
1018 for (pn = 0; pn < pages; pn++) {
1019 struct gmac_queue_page *gpage;
1022 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
1023 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
1025 gpage = &geth->freeq_pages[pn];
1026 while (page_ref_count(gpage->page) > 0)
1027 put_page(gpage->page);
1030 kfree(geth->freeq_pages);
1032 dma_free_coherent(geth->dev,
1033 sizeof(*geth->freeq_ring) << geth->freeq_order,
1034 geth->freeq_ring, geth->freeq_dma_base);
1038 * geth_resize_freeq() - resize the software queue depth
1039 * @port: the port requesting the change
1041 * This gets called at least once during probe() so the device queue gets
1042 * "resized" from the hardware defaults. Since both ports/net devices share
1043 * the same hardware queue, some synchronization between the ports is
1046 static int geth_resize_freeq(struct gemini_ethernet_port *port)
1048 struct gemini_ethernet *geth = port->geth;
1049 struct net_device *netdev = port->netdev;
1050 struct gemini_ethernet_port *other_port;
1051 struct net_device *other_netdev;
1052 unsigned int new_size = 0;
1053 unsigned int new_order;
1054 unsigned long flags;
1058 if (netdev->dev_id == 0)
1059 other_netdev = geth->port1->netdev;
1061 other_netdev = geth->port0->netdev;
1063 if (other_netdev && netif_running(other_netdev))
1066 new_size = 1 << (port->rxq_order + 1);
1067 netdev_dbg(netdev, "port %d size: %d order %d\n",
1072 other_port = netdev_priv(other_netdev);
1073 new_size += 1 << (other_port->rxq_order + 1);
1074 netdev_dbg(other_netdev, "port %d size: %d order %d\n",
1075 other_netdev->dev_id,
1076 (1 << (other_port->rxq_order + 1)),
1077 other_port->rxq_order);
1080 new_order = min(15, ilog2(new_size - 1) + 1);
1081 dev_dbg(geth->dev, "set shared queue to size %d order %d\n",
1082 new_size, new_order);
1083 if (geth->freeq_order == new_order)
1086 spin_lock_irqsave(&geth->irq_lock, flags);
1088 /* Disable the software queue IRQs */
1089 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1090 en &= ~SWFQ_EMPTY_INT_BIT;
1091 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1092 spin_unlock_irqrestore(&geth->irq_lock, flags);
1094 /* Drop the old queue */
1095 if (geth->freeq_ring)
1096 geth_cleanup_freeq(geth);
1098 /* Allocate a new queue with the desired order */
1099 geth->freeq_order = new_order;
1100 ret = geth_setup_freeq(geth);
1102 /* Restart the interrupts - NOTE if this is the first resize
1103 * after probe(), this is where the interrupts get turned on
1104 * in the first place.
1106 spin_lock_irqsave(&geth->irq_lock, flags);
1107 en |= SWFQ_EMPTY_INT_BIT;
1108 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1109 spin_unlock_irqrestore(&geth->irq_lock, flags);
1114 static void gmac_tx_irq_enable(struct net_device *netdev,
1115 unsigned int txq, int en)
1117 struct gemini_ethernet_port *port = netdev_priv(netdev);
1118 struct gemini_ethernet *geth = port->geth;
1121 netdev_dbg(netdev, "%s device %d\n", __func__, netdev->dev_id);
1123 mask = GMAC0_IRQ0_TXQ0_INTS << (6 * netdev->dev_id + txq);
1126 writel(mask, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
1128 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1129 val = en ? val | mask : val & ~mask;
1130 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1133 static void gmac_tx_irq(struct net_device *netdev, unsigned int txq_num)
1135 struct netdev_queue *ntxq = netdev_get_tx_queue(netdev, txq_num);
1137 gmac_tx_irq_enable(netdev, txq_num, 0);
1138 netif_tx_wake_queue(ntxq);
1141 static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb,
1142 struct gmac_txq *txq, unsigned short *desc)
1144 struct gemini_ethernet_port *port = netdev_priv(netdev);
1145 struct skb_shared_info *skb_si = skb_shinfo(skb);
1146 unsigned short m = (1 << port->txq_order) - 1;
1147 short frag, last_frag = skb_si->nr_frags - 1;
1148 struct gemini_ethernet *geth = port->geth;
1149 unsigned int word1, word3, buflen;
1150 unsigned short w = *desc;
1151 struct gmac_txdesc *txd;
1152 skb_frag_t *skb_frag;
1159 if (skb->protocol == htons(ETH_P_8021Q))
1166 word1 |= TSS_MTU_ENABLE_BIT;
1170 if (skb->ip_summed != CHECKSUM_NONE) {
1173 if (skb->protocol == htons(ETH_P_IP)) {
1174 word1 |= TSS_IP_CHKSUM_BIT;
1175 tcp = ip_hdr(skb)->protocol == IPPROTO_TCP;
1177 word1 |= TSS_IPV6_ENABLE_BIT;
1178 tcp = ipv6_hdr(skb)->nexthdr == IPPROTO_TCP;
1181 word1 |= tcp ? TSS_TCP_CHKSUM_BIT : TSS_UDP_CHKSUM_BIT;
1185 while (frag <= last_frag) {
1188 buflen = skb_headlen(skb);
1190 skb_frag = skb_si->frags + frag;
1191 buffer = page_address(skb_frag_page(skb_frag)) +
1192 skb_frag->page_offset;
1193 buflen = skb_frag->size;
1196 if (frag == last_frag) {
1201 mapping = dma_map_single(geth->dev, buffer, buflen,
1203 if (dma_mapping_error(geth->dev, mapping))
1206 txd = txq->ring + w;
1207 txd->word0.bits32 = buflen;
1208 txd->word1.bits32 = word1;
1209 txd->word2.buf_adr = mapping;
1210 txd->word3.bits32 = word3;
1212 word3 &= MTU_SIZE_BIT_MASK;
1222 while (w != *desc) {
1226 dma_unmap_page(geth->dev, txq->ring[w].word2.buf_adr,
1227 txq->ring[w].word0.bits.buffer_size,
1233 static int gmac_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1235 struct gemini_ethernet_port *port = netdev_priv(netdev);
1236 unsigned short m = (1 << port->txq_order) - 1;
1237 struct netdev_queue *ntxq;
1238 unsigned short r, w, d;
1239 void __iomem *ptr_reg;
1240 struct gmac_txq *txq;
1241 int txq_num, nfrags;
1244 SKB_FRAG_ASSERT(skb);
1246 if (skb->len >= 0x10000)
1249 txq_num = skb_get_queue_mapping(skb);
1250 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE_PTR_REG(txq_num);
1251 txq = &port->txq[txq_num];
1252 ntxq = netdev_get_tx_queue(netdev, txq_num);
1253 nfrags = skb_shinfo(skb)->nr_frags;
1255 rw.bits32 = readl(ptr_reg);
1259 d = txq->cptr - w - 1;
1262 if (d < nfrags + 2) {
1263 gmac_clean_txq(netdev, txq, r);
1264 d = txq->cptr - w - 1;
1267 if (d < nfrags + 2) {
1268 netif_tx_stop_queue(ntxq);
1270 d = txq->cptr + nfrags + 16;
1272 txq->ring[d].word3.bits.eofie = 1;
1273 gmac_tx_irq_enable(netdev, txq_num, 1);
1275 u64_stats_update_begin(&port->tx_stats_syncp);
1276 netdev->stats.tx_fifo_errors++;
1277 u64_stats_update_end(&port->tx_stats_syncp);
1278 return NETDEV_TX_BUSY;
1282 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) {
1283 if (skb_linearize(skb))
1286 u64_stats_update_begin(&port->tx_stats_syncp);
1287 port->tx_frags_linearized++;
1288 u64_stats_update_end(&port->tx_stats_syncp);
1290 if (gmac_map_tx_bufs(netdev, skb, txq, &w))
1294 writew(w, ptr_reg + 2);
1296 gmac_clean_txq(netdev, txq, r);
1297 return NETDEV_TX_OK;
1302 u64_stats_update_begin(&port->tx_stats_syncp);
1303 port->stats.tx_dropped++;
1304 u64_stats_update_end(&port->tx_stats_syncp);
1305 return NETDEV_TX_OK;
1308 static void gmac_tx_timeout(struct net_device *netdev)
1310 netdev_err(netdev, "Tx timeout\n");
1311 gmac_dump_dma_state(netdev);
1314 static void gmac_enable_irq(struct net_device *netdev, int enable)
1316 struct gemini_ethernet_port *port = netdev_priv(netdev);
1317 struct gemini_ethernet *geth = port->geth;
1318 unsigned long flags;
1321 netdev_dbg(netdev, "%s device %d %s\n", __func__,
1322 netdev->dev_id, enable ? "enable" : "disable");
1323 spin_lock_irqsave(&geth->irq_lock, flags);
1325 mask = GMAC0_IRQ0_2 << (netdev->dev_id * 2);
1326 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1327 val = enable ? (val | mask) : (val & ~mask);
1328 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1330 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id;
1331 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1332 val = enable ? (val | mask) : (val & ~mask);
1333 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1335 mask = GMAC0_IRQ4_8 << (netdev->dev_id * 8);
1336 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1337 val = enable ? (val | mask) : (val & ~mask);
1338 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1340 spin_unlock_irqrestore(&geth->irq_lock, flags);
1343 static void gmac_enable_rx_irq(struct net_device *netdev, int enable)
1345 struct gemini_ethernet_port *port = netdev_priv(netdev);
1346 struct gemini_ethernet *geth = port->geth;
1347 unsigned long flags;
1350 netdev_dbg(netdev, "%s device %d %s\n", __func__, netdev->dev_id,
1351 enable ? "enable" : "disable");
1352 spin_lock_irqsave(&geth->irq_lock, flags);
1353 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id;
1355 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1356 val = enable ? (val | mask) : (val & ~mask);
1357 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1359 spin_unlock_irqrestore(&geth->irq_lock, flags);
1362 static struct sk_buff *gmac_skb_if_good_frame(struct gemini_ethernet_port *port,
1363 union gmac_rxdesc_0 word0,
1364 unsigned int frame_len)
1366 unsigned int rx_csum = word0.bits.chksum_status;
1367 unsigned int rx_status = word0.bits.status;
1368 struct sk_buff *skb = NULL;
1370 port->rx_stats[rx_status]++;
1371 port->rx_csum_stats[rx_csum]++;
1373 if (word0.bits.derr || word0.bits.perr ||
1374 rx_status || frame_len < ETH_ZLEN ||
1375 rx_csum >= RX_CHKSUM_IP_ERR_UNKNOWN) {
1376 port->stats.rx_errors++;
1378 if (frame_len < ETH_ZLEN || RX_ERROR_LENGTH(rx_status))
1379 port->stats.rx_length_errors++;
1380 if (RX_ERROR_OVER(rx_status))
1381 port->stats.rx_over_errors++;
1382 if (RX_ERROR_CRC(rx_status))
1383 port->stats.rx_crc_errors++;
1384 if (RX_ERROR_FRAME(rx_status))
1385 port->stats.rx_frame_errors++;
1389 skb = napi_get_frags(&port->napi);
1393 if (rx_csum == RX_CHKSUM_IP_UDP_TCP_OK)
1394 skb->ip_summed = CHECKSUM_UNNECESSARY;
1397 port->stats.rx_bytes += frame_len;
1398 port->stats.rx_packets++;
1402 static unsigned int gmac_rx(struct net_device *netdev, unsigned int budget)
1404 struct gemini_ethernet_port *port = netdev_priv(netdev);
1405 unsigned short m = (1 << port->rxq_order) - 1;
1406 struct gemini_ethernet *geth = port->geth;
1407 void __iomem *ptr_reg = port->rxq_rwptr;
1408 unsigned int frame_len, frag_len;
1409 struct gmac_rxdesc *rx = NULL;
1410 struct gmac_queue_page *gpage;
1411 static struct sk_buff *skb;
1412 union gmac_rxdesc_0 word0;
1413 union gmac_rxdesc_1 word1;
1414 union gmac_rxdesc_3 word3;
1415 struct page *page = NULL;
1416 unsigned int page_offs;
1417 unsigned short r, w;
1422 rw.bits32 = readl(ptr_reg);
1423 /* Reset interrupt as all packages until here are taken into account */
1424 writel(DEFAULT_Q0_INT_BIT << netdev->dev_id,
1425 geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
1429 while (budget && w != r) {
1430 rx = port->rxq_ring + r;
1433 mapping = rx->word2.buf_adr;
1439 frag_len = word0.bits.buffer_size;
1440 frame_len = word1.bits.byte_count;
1441 page_offs = mapping & ~PAGE_MASK;
1445 "rxq[%u]: HW BUG: zero DMA desc\n", r);
1449 /* Freeq pointers are one page off */
1450 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE);
1452 dev_err(geth->dev, "could not find mapping\n");
1457 if (word3.bits32 & SOF_BIT) {
1459 napi_free_frags(&port->napi);
1460 port->stats.rx_dropped++;
1463 skb = gmac_skb_if_good_frame(port, word0, frame_len);
1467 page_offs += NET_IP_ALIGN;
1468 frag_len -= NET_IP_ALIGN;
1476 if (word3.bits32 & EOF_BIT)
1477 frag_len = frame_len - skb->len;
1479 /* append page frag to skb */
1480 if (frag_nr == MAX_SKB_FRAGS)
1484 netdev_err(netdev, "Received fragment with len = 0\n");
1486 skb_fill_page_desc(skb, frag_nr, page, page_offs, frag_len);
1487 skb->len += frag_len;
1488 skb->data_len += frag_len;
1489 skb->truesize += frag_len;
1492 if (word3.bits32 & EOF_BIT) {
1493 napi_gro_frags(&port->napi);
1501 napi_free_frags(&port->napi);
1508 port->stats.rx_dropped++;
1515 static int gmac_napi_poll(struct napi_struct *napi, int budget)
1517 struct gemini_ethernet_port *port = netdev_priv(napi->dev);
1518 struct gemini_ethernet *geth = port->geth;
1519 unsigned int freeq_threshold;
1520 unsigned int received;
1522 freeq_threshold = 1 << (geth->freeq_order - 1);
1523 u64_stats_update_begin(&port->rx_stats_syncp);
1525 received = gmac_rx(napi->dev, budget);
1526 if (received < budget) {
1527 napi_gro_flush(napi, false);
1528 napi_complete_done(napi, received);
1529 gmac_enable_rx_irq(napi->dev, 1);
1530 ++port->rx_napi_exits;
1533 port->freeq_refill += (budget - received);
1534 if (port->freeq_refill > freeq_threshold) {
1535 port->freeq_refill -= freeq_threshold;
1536 geth_fill_freeq(geth, true);
1539 u64_stats_update_end(&port->rx_stats_syncp);
1543 static void gmac_dump_dma_state(struct net_device *netdev)
1545 struct gemini_ethernet_port *port = netdev_priv(netdev);
1546 struct gemini_ethernet *geth = port->geth;
1547 void __iomem *ptr_reg;
1550 /* Interrupt status */
1551 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
1552 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
1553 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
1554 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
1555 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1556 netdev_err(netdev, "IRQ status: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1557 reg[0], reg[1], reg[2], reg[3], reg[4]);
1559 /* Interrupt enable */
1560 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1561 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1562 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
1563 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
1564 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1565 netdev_err(netdev, "IRQ enable: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1566 reg[0], reg[1], reg[2], reg[3], reg[4]);
1569 reg[0] = readl(port->dma_base + GMAC_DMA_RX_FIRST_DESC_REG);
1570 reg[1] = readl(port->dma_base + GMAC_DMA_RX_CURR_DESC_REG);
1571 reg[2] = GET_RPTR(port->rxq_rwptr);
1572 reg[3] = GET_WPTR(port->rxq_rwptr);
1573 netdev_err(netdev, "RX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n",
1574 reg[0], reg[1], reg[2], reg[3]);
1576 reg[0] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD0_REG);
1577 reg[1] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD1_REG);
1578 reg[2] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD2_REG);
1579 reg[3] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD3_REG);
1580 netdev_err(netdev, "RX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n",
1581 reg[0], reg[1], reg[2], reg[3]);
1584 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
1586 reg[0] = readl(port->dma_base + GMAC_DMA_TX_FIRST_DESC_REG);
1587 reg[1] = readl(port->dma_base + GMAC_DMA_TX_CURR_DESC_REG);
1588 reg[2] = GET_RPTR(ptr_reg);
1589 reg[3] = GET_WPTR(ptr_reg);
1590 netdev_err(netdev, "TX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n",
1591 reg[0], reg[1], reg[2], reg[3]);
1593 reg[0] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD0_REG);
1594 reg[1] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD1_REG);
1595 reg[2] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD2_REG);
1596 reg[3] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD3_REG);
1597 netdev_err(netdev, "TX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n",
1598 reg[0], reg[1], reg[2], reg[3]);
1600 /* FREE queues status */
1601 ptr_reg = geth->base + GLOBAL_SWFQ_RWPTR_REG;
1603 reg[0] = GET_RPTR(ptr_reg);
1604 reg[1] = GET_WPTR(ptr_reg);
1606 ptr_reg = geth->base + GLOBAL_HWFQ_RWPTR_REG;
1608 reg[2] = GET_RPTR(ptr_reg);
1609 reg[3] = GET_WPTR(ptr_reg);
1610 netdev_err(netdev, "FQ SW ptr: %u %u, HW ptr: %u %u\n",
1611 reg[0], reg[1], reg[2], reg[3]);
1614 static void gmac_update_hw_stats(struct net_device *netdev)
1616 struct gemini_ethernet_port *port = netdev_priv(netdev);
1617 unsigned int rx_discards, rx_mcast, rx_bcast;
1618 struct gemini_ethernet *geth = port->geth;
1619 unsigned long flags;
1621 spin_lock_irqsave(&geth->irq_lock, flags);
1622 u64_stats_update_begin(&port->ir_stats_syncp);
1624 rx_discards = readl(port->gmac_base + GMAC_IN_DISCARDS);
1625 port->hw_stats[0] += rx_discards;
1626 port->hw_stats[1] += readl(port->gmac_base + GMAC_IN_ERRORS);
1627 rx_mcast = readl(port->gmac_base + GMAC_IN_MCAST);
1628 port->hw_stats[2] += rx_mcast;
1629 rx_bcast = readl(port->gmac_base + GMAC_IN_BCAST);
1630 port->hw_stats[3] += rx_bcast;
1631 port->hw_stats[4] += readl(port->gmac_base + GMAC_IN_MAC1);
1632 port->hw_stats[5] += readl(port->gmac_base + GMAC_IN_MAC2);
1634 port->stats.rx_missed_errors += rx_discards;
1635 port->stats.multicast += rx_mcast;
1636 port->stats.multicast += rx_bcast;
1638 writel(GMAC0_MIB_INT_BIT << (netdev->dev_id * 8),
1639 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1641 u64_stats_update_end(&port->ir_stats_syncp);
1642 spin_unlock_irqrestore(&geth->irq_lock, flags);
1646 * gmac_get_intr_flags() - get interrupt status flags for a port from
1647 * @netdev: the net device for the port to get flags from
1648 * @i: the interrupt status register 0..4
1650 static u32 gmac_get_intr_flags(struct net_device *netdev, int i)
1652 struct gemini_ethernet_port *port = netdev_priv(netdev);
1653 struct gemini_ethernet *geth = port->geth;
1654 void __iomem *irqif_reg, *irqen_reg;
1655 unsigned int offs, val;
1657 /* Calculate the offset using the stride of the status registers */
1658 offs = i * (GLOBAL_INTERRUPT_STATUS_1_REG -
1659 GLOBAL_INTERRUPT_STATUS_0_REG);
1661 irqif_reg = geth->base + GLOBAL_INTERRUPT_STATUS_0_REG + offs;
1662 irqen_reg = geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG + offs;
1664 val = readl(irqif_reg) & readl(irqen_reg);
1668 static enum hrtimer_restart gmac_coalesce_delay_expired(struct hrtimer *timer)
1670 struct gemini_ethernet_port *port =
1671 container_of(timer, struct gemini_ethernet_port,
1674 napi_schedule(&port->napi);
1675 return HRTIMER_NORESTART;
1678 static irqreturn_t gmac_irq(int irq, void *data)
1680 struct gemini_ethernet_port *port;
1681 struct net_device *netdev = data;
1682 struct gemini_ethernet *geth;
1685 port = netdev_priv(netdev);
1688 val = gmac_get_intr_flags(netdev, 0);
1691 if (val & (GMAC0_IRQ0_2 << (netdev->dev_id * 2))) {
1693 netdev_err(netdev, "hw failure/sw bug\n");
1694 gmac_dump_dma_state(netdev);
1696 /* don't know how to recover, just reduce losses */
1697 gmac_enable_irq(netdev, 0);
1701 if (val & (GMAC0_IRQ0_TXQ0_INTS << (netdev->dev_id * 6)))
1702 gmac_tx_irq(netdev, 0);
1704 val = gmac_get_intr_flags(netdev, 1);
1707 if (val & (DEFAULT_Q0_INT_BIT << netdev->dev_id)) {
1708 gmac_enable_rx_irq(netdev, 0);
1710 if (!port->rx_coalesce_nsecs) {
1711 napi_schedule(&port->napi);
1715 ktime = ktime_set(0, port->rx_coalesce_nsecs);
1716 hrtimer_start(&port->rx_coalesce_timer, ktime,
1721 val = gmac_get_intr_flags(netdev, 4);
1724 if (val & (GMAC0_MIB_INT_BIT << (netdev->dev_id * 8)))
1725 gmac_update_hw_stats(netdev);
1727 if (val & (GMAC0_RX_OVERRUN_INT_BIT << (netdev->dev_id * 8))) {
1728 writel(GMAC0_RXDERR_INT_BIT << (netdev->dev_id * 8),
1729 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1731 spin_lock(&geth->irq_lock);
1732 u64_stats_update_begin(&port->ir_stats_syncp);
1733 ++port->stats.rx_fifo_errors;
1734 u64_stats_update_end(&port->ir_stats_syncp);
1735 spin_unlock(&geth->irq_lock);
1738 return orr ? IRQ_HANDLED : IRQ_NONE;
1741 static void gmac_start_dma(struct gemini_ethernet_port *port)
1743 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG;
1744 union gmac_dma_ctrl dma_ctrl;
1746 dma_ctrl.bits32 = readl(dma_ctrl_reg);
1747 dma_ctrl.bits.rd_enable = 1;
1748 dma_ctrl.bits.td_enable = 1;
1749 dma_ctrl.bits.loopback = 0;
1750 dma_ctrl.bits.drop_small_ack = 0;
1751 dma_ctrl.bits.rd_insert_bytes = NET_IP_ALIGN;
1752 dma_ctrl.bits.rd_prot = HPROT_DATA_CACHE | HPROT_PRIVILIGED;
1753 dma_ctrl.bits.rd_burst_size = HBURST_INCR8;
1754 dma_ctrl.bits.rd_bus = HSIZE_8;
1755 dma_ctrl.bits.td_prot = HPROT_DATA_CACHE;
1756 dma_ctrl.bits.td_burst_size = HBURST_INCR8;
1757 dma_ctrl.bits.td_bus = HSIZE_8;
1759 writel(dma_ctrl.bits32, dma_ctrl_reg);
1762 static void gmac_stop_dma(struct gemini_ethernet_port *port)
1764 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG;
1765 union gmac_dma_ctrl dma_ctrl;
1767 dma_ctrl.bits32 = readl(dma_ctrl_reg);
1768 dma_ctrl.bits.rd_enable = 0;
1769 dma_ctrl.bits.td_enable = 0;
1770 writel(dma_ctrl.bits32, dma_ctrl_reg);
1773 static int gmac_open(struct net_device *netdev)
1775 struct gemini_ethernet_port *port = netdev_priv(netdev);
1778 if (!netdev->phydev) {
1779 err = gmac_setup_phy(netdev);
1781 netif_err(port, ifup, netdev,
1782 "PHY init failed: %d\n", err);
1787 err = request_irq(netdev->irq, gmac_irq,
1788 IRQF_SHARED, netdev->name, netdev);
1790 netdev_err(netdev, "no IRQ\n");
1794 netif_carrier_off(netdev);
1795 phy_start(netdev->phydev);
1797 err = geth_resize_freeq(port);
1798 /* It's fine if it's just busy, the other port has set up
1799 * the freeq in that case.
1801 if (err && (err != -EBUSY)) {
1802 netdev_err(netdev, "could not resize freeq\n");
1806 err = gmac_setup_rxq(netdev);
1808 netdev_err(netdev, "could not setup RXQ\n");
1812 err = gmac_setup_txqs(netdev);
1814 netdev_err(netdev, "could not setup TXQs\n");
1815 gmac_cleanup_rxq(netdev);
1819 napi_enable(&port->napi);
1821 gmac_start_dma(port);
1822 gmac_enable_irq(netdev, 1);
1823 gmac_enable_tx_rx(netdev);
1824 netif_tx_start_all_queues(netdev);
1826 hrtimer_init(&port->rx_coalesce_timer, CLOCK_MONOTONIC,
1828 port->rx_coalesce_timer.function = &gmac_coalesce_delay_expired;
1830 netdev_dbg(netdev, "opened\n");
1835 phy_stop(netdev->phydev);
1836 free_irq(netdev->irq, netdev);
1840 static int gmac_stop(struct net_device *netdev)
1842 struct gemini_ethernet_port *port = netdev_priv(netdev);
1844 hrtimer_cancel(&port->rx_coalesce_timer);
1845 netif_tx_stop_all_queues(netdev);
1846 gmac_disable_tx_rx(netdev);
1847 gmac_stop_dma(port);
1848 napi_disable(&port->napi);
1850 gmac_enable_irq(netdev, 0);
1851 gmac_cleanup_rxq(netdev);
1852 gmac_cleanup_txqs(netdev);
1854 phy_stop(netdev->phydev);
1855 free_irq(netdev->irq, netdev);
1857 gmac_update_hw_stats(netdev);
1861 static void gmac_set_rx_mode(struct net_device *netdev)
1863 struct gemini_ethernet_port *port = netdev_priv(netdev);
1864 union gmac_rx_fltr filter = { .bits = {
1869 struct netdev_hw_addr *ha;
1870 unsigned int bit_nr;
1876 if (netdev->flags & IFF_PROMISC) {
1877 filter.bits.error = 1;
1878 filter.bits.promiscuous = 1;
1881 } else if (netdev->flags & IFF_ALLMULTI) {
1885 netdev_for_each_mc_addr(ha, netdev) {
1886 bit_nr = ~crc32_le(~0, ha->addr, ETH_ALEN) & 0x3f;
1887 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 0x1f);
1891 writel(mc_filter[0], port->gmac_base + GMAC_MCAST_FIL0);
1892 writel(mc_filter[1], port->gmac_base + GMAC_MCAST_FIL1);
1893 writel(filter.bits32, port->gmac_base + GMAC_RX_FLTR);
1896 static void gmac_write_mac_address(struct net_device *netdev)
1898 struct gemini_ethernet_port *port = netdev_priv(netdev);
1901 memset(addr, 0, sizeof(addr));
1902 memcpy(addr, netdev->dev_addr, ETH_ALEN);
1904 writel(le32_to_cpu(addr[0]), port->gmac_base + GMAC_STA_ADD0);
1905 writel(le32_to_cpu(addr[1]), port->gmac_base + GMAC_STA_ADD1);
1906 writel(le32_to_cpu(addr[2]), port->gmac_base + GMAC_STA_ADD2);
1909 static int gmac_set_mac_address(struct net_device *netdev, void *addr)
1911 struct sockaddr *sa = addr;
1913 memcpy(netdev->dev_addr, sa->sa_data, ETH_ALEN);
1914 gmac_write_mac_address(netdev);
1919 static void gmac_clear_hw_stats(struct net_device *netdev)
1921 struct gemini_ethernet_port *port = netdev_priv(netdev);
1923 readl(port->gmac_base + GMAC_IN_DISCARDS);
1924 readl(port->gmac_base + GMAC_IN_ERRORS);
1925 readl(port->gmac_base + GMAC_IN_MCAST);
1926 readl(port->gmac_base + GMAC_IN_BCAST);
1927 readl(port->gmac_base + GMAC_IN_MAC1);
1928 readl(port->gmac_base + GMAC_IN_MAC2);
1931 static void gmac_get_stats64(struct net_device *netdev,
1932 struct rtnl_link_stats64 *stats)
1934 struct gemini_ethernet_port *port = netdev_priv(netdev);
1937 gmac_update_hw_stats(netdev);
1939 /* Racing with RX NAPI */
1941 start = u64_stats_fetch_begin(&port->rx_stats_syncp);
1943 stats->rx_packets = port->stats.rx_packets;
1944 stats->rx_bytes = port->stats.rx_bytes;
1945 stats->rx_errors = port->stats.rx_errors;
1946 stats->rx_dropped = port->stats.rx_dropped;
1948 stats->rx_length_errors = port->stats.rx_length_errors;
1949 stats->rx_over_errors = port->stats.rx_over_errors;
1950 stats->rx_crc_errors = port->stats.rx_crc_errors;
1951 stats->rx_frame_errors = port->stats.rx_frame_errors;
1953 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start));
1955 /* Racing with MIB and TX completion interrupts */
1957 start = u64_stats_fetch_begin(&port->ir_stats_syncp);
1959 stats->tx_errors = port->stats.tx_errors;
1960 stats->tx_packets = port->stats.tx_packets;
1961 stats->tx_bytes = port->stats.tx_bytes;
1963 stats->multicast = port->stats.multicast;
1964 stats->rx_missed_errors = port->stats.rx_missed_errors;
1965 stats->rx_fifo_errors = port->stats.rx_fifo_errors;
1967 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start));
1969 /* Racing with hard_start_xmit */
1971 start = u64_stats_fetch_begin(&port->tx_stats_syncp);
1973 stats->tx_dropped = port->stats.tx_dropped;
1975 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start));
1977 stats->rx_dropped += stats->rx_missed_errors;
1980 static int gmac_change_mtu(struct net_device *netdev, int new_mtu)
1982 int max_len = gmac_pick_rx_max_len(new_mtu);
1987 gmac_disable_tx_rx(netdev);
1989 netdev->mtu = new_mtu;
1990 gmac_update_config0_reg(netdev, max_len << CONFIG0_MAXLEN_SHIFT,
1991 CONFIG0_MAXLEN_MASK);
1993 netdev_update_features(netdev);
1995 gmac_enable_tx_rx(netdev);
2000 static netdev_features_t gmac_fix_features(struct net_device *netdev,
2001 netdev_features_t features)
2003 if (netdev->mtu + ETH_HLEN + VLAN_HLEN > MTU_SIZE_BIT_MASK)
2004 features &= ~GMAC_OFFLOAD_FEATURES;
2009 static int gmac_set_features(struct net_device *netdev,
2010 netdev_features_t features)
2012 struct gemini_ethernet_port *port = netdev_priv(netdev);
2013 int enable = features & NETIF_F_RXCSUM;
2014 unsigned long flags;
2017 spin_lock_irqsave(&port->config_lock, flags);
2019 reg = readl(port->gmac_base + GMAC_CONFIG0);
2020 reg = enable ? reg | CONFIG0_RX_CHKSUM : reg & ~CONFIG0_RX_CHKSUM;
2021 writel(reg, port->gmac_base + GMAC_CONFIG0);
2023 spin_unlock_irqrestore(&port->config_lock, flags);
2027 static int gmac_get_sset_count(struct net_device *netdev, int sset)
2029 return sset == ETH_SS_STATS ? GMAC_STATS_NUM : 0;
2032 static void gmac_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2034 if (stringset != ETH_SS_STATS)
2037 memcpy(data, gmac_stats_strings, sizeof(gmac_stats_strings));
2040 static void gmac_get_ethtool_stats(struct net_device *netdev,
2041 struct ethtool_stats *estats, u64 *values)
2043 struct gemini_ethernet_port *port = netdev_priv(netdev);
2048 gmac_update_hw_stats(netdev);
2050 /* Racing with MIB interrupt */
2053 start = u64_stats_fetch_begin(&port->ir_stats_syncp);
2055 for (i = 0; i < RX_STATS_NUM; i++)
2056 *p++ = port->hw_stats[i];
2058 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start));
2061 /* Racing with RX NAPI */
2064 start = u64_stats_fetch_begin(&port->rx_stats_syncp);
2066 for (i = 0; i < RX_STATUS_NUM; i++)
2067 *p++ = port->rx_stats[i];
2068 for (i = 0; i < RX_CHKSUM_NUM; i++)
2069 *p++ = port->rx_csum_stats[i];
2070 *p++ = port->rx_napi_exits;
2072 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start));
2075 /* Racing with TX start_xmit */
2078 start = u64_stats_fetch_begin(&port->tx_stats_syncp);
2080 for (i = 0; i < TX_MAX_FRAGS; i++) {
2081 *values++ = port->tx_frag_stats[i];
2082 port->tx_frag_stats[i] = 0;
2084 *values++ = port->tx_frags_linearized;
2085 *values++ = port->tx_hw_csummed;
2087 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start));
2090 static int gmac_get_ksettings(struct net_device *netdev,
2091 struct ethtool_link_ksettings *cmd)
2093 if (!netdev->phydev)
2095 phy_ethtool_ksettings_get(netdev->phydev, cmd);
2100 static int gmac_set_ksettings(struct net_device *netdev,
2101 const struct ethtool_link_ksettings *cmd)
2103 if (!netdev->phydev)
2105 return phy_ethtool_ksettings_set(netdev->phydev, cmd);
2108 static int gmac_nway_reset(struct net_device *netdev)
2110 if (!netdev->phydev)
2112 return phy_start_aneg(netdev->phydev);
2115 static void gmac_get_pauseparam(struct net_device *netdev,
2116 struct ethtool_pauseparam *pparam)
2118 struct gemini_ethernet_port *port = netdev_priv(netdev);
2119 union gmac_config0 config0;
2121 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
2123 pparam->rx_pause = config0.bits.rx_fc_en;
2124 pparam->tx_pause = config0.bits.tx_fc_en;
2125 pparam->autoneg = true;
2128 static void gmac_get_ringparam(struct net_device *netdev,
2129 struct ethtool_ringparam *rp)
2131 struct gemini_ethernet_port *port = netdev_priv(netdev);
2132 union gmac_config0 config0;
2134 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
2136 rp->rx_max_pending = 1 << 15;
2137 rp->rx_mini_max_pending = 0;
2138 rp->rx_jumbo_max_pending = 0;
2139 rp->tx_max_pending = 1 << 15;
2141 rp->rx_pending = 1 << port->rxq_order;
2142 rp->rx_mini_pending = 0;
2143 rp->rx_jumbo_pending = 0;
2144 rp->tx_pending = 1 << port->txq_order;
2147 static int gmac_set_ringparam(struct net_device *netdev,
2148 struct ethtool_ringparam *rp)
2150 struct gemini_ethernet_port *port = netdev_priv(netdev);
2153 if (netif_running(netdev))
2156 if (rp->rx_pending) {
2157 port->rxq_order = min(15, ilog2(rp->rx_pending - 1) + 1);
2158 err = geth_resize_freeq(port);
2160 if (rp->tx_pending) {
2161 port->txq_order = min(15, ilog2(rp->tx_pending - 1) + 1);
2162 port->irq_every_tx_packets = 1 << (port->txq_order - 2);
2168 static int gmac_get_coalesce(struct net_device *netdev,
2169 struct ethtool_coalesce *ecmd)
2171 struct gemini_ethernet_port *port = netdev_priv(netdev);
2173 ecmd->rx_max_coalesced_frames = 1;
2174 ecmd->tx_max_coalesced_frames = port->irq_every_tx_packets;
2175 ecmd->rx_coalesce_usecs = port->rx_coalesce_nsecs / 1000;
2180 static int gmac_set_coalesce(struct net_device *netdev,
2181 struct ethtool_coalesce *ecmd)
2183 struct gemini_ethernet_port *port = netdev_priv(netdev);
2185 if (ecmd->tx_max_coalesced_frames < 1)
2187 if (ecmd->tx_max_coalesced_frames >= 1 << port->txq_order)
2190 port->irq_every_tx_packets = ecmd->tx_max_coalesced_frames;
2191 port->rx_coalesce_nsecs = ecmd->rx_coalesce_usecs * 1000;
2196 static u32 gmac_get_msglevel(struct net_device *netdev)
2198 struct gemini_ethernet_port *port = netdev_priv(netdev);
2200 return port->msg_enable;
2203 static void gmac_set_msglevel(struct net_device *netdev, u32 level)
2205 struct gemini_ethernet_port *port = netdev_priv(netdev);
2207 port->msg_enable = level;
2210 static void gmac_get_drvinfo(struct net_device *netdev,
2211 struct ethtool_drvinfo *info)
2213 strcpy(info->driver, DRV_NAME);
2214 strcpy(info->version, DRV_VERSION);
2215 strcpy(info->bus_info, netdev->dev_id ? "1" : "0");
2218 static const struct net_device_ops gmac_351x_ops = {
2219 .ndo_init = gmac_init,
2220 .ndo_uninit = gmac_uninit,
2221 .ndo_open = gmac_open,
2222 .ndo_stop = gmac_stop,
2223 .ndo_start_xmit = gmac_start_xmit,
2224 .ndo_tx_timeout = gmac_tx_timeout,
2225 .ndo_set_rx_mode = gmac_set_rx_mode,
2226 .ndo_set_mac_address = gmac_set_mac_address,
2227 .ndo_get_stats64 = gmac_get_stats64,
2228 .ndo_change_mtu = gmac_change_mtu,
2229 .ndo_fix_features = gmac_fix_features,
2230 .ndo_set_features = gmac_set_features,
2233 static const struct ethtool_ops gmac_351x_ethtool_ops = {
2234 .get_sset_count = gmac_get_sset_count,
2235 .get_strings = gmac_get_strings,
2236 .get_ethtool_stats = gmac_get_ethtool_stats,
2237 .get_link = ethtool_op_get_link,
2238 .get_link_ksettings = gmac_get_ksettings,
2239 .set_link_ksettings = gmac_set_ksettings,
2240 .nway_reset = gmac_nway_reset,
2241 .get_pauseparam = gmac_get_pauseparam,
2242 .get_ringparam = gmac_get_ringparam,
2243 .set_ringparam = gmac_set_ringparam,
2244 .get_coalesce = gmac_get_coalesce,
2245 .set_coalesce = gmac_set_coalesce,
2246 .get_msglevel = gmac_get_msglevel,
2247 .set_msglevel = gmac_set_msglevel,
2248 .get_drvinfo = gmac_get_drvinfo,
2251 static irqreturn_t gemini_port_irq_thread(int irq, void *data)
2253 unsigned long irqmask = SWFQ_EMPTY_INT_BIT;
2254 struct gemini_ethernet_port *port = data;
2255 struct gemini_ethernet *geth;
2256 unsigned long flags;
2259 /* The queue is half empty so refill it */
2260 geth_fill_freeq(geth, true);
2262 spin_lock_irqsave(&geth->irq_lock, flags);
2263 /* ACK queue interrupt */
2264 writel(irqmask, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2265 /* Enable queue interrupt again */
2266 irqmask |= readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2267 writel(irqmask, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2268 spin_unlock_irqrestore(&geth->irq_lock, flags);
2273 static irqreturn_t gemini_port_irq(int irq, void *data)
2275 struct gemini_ethernet_port *port = data;
2276 struct gemini_ethernet *geth;
2277 irqreturn_t ret = IRQ_NONE;
2281 spin_lock(&geth->irq_lock);
2283 val = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2284 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2286 if (val & en & SWFQ_EMPTY_INT_BIT) {
2287 /* Disable the queue empty interrupt while we work on
2288 * processing the queue. Also disable overrun interrupts
2289 * as there is not much we can do about it here.
2291 en &= ~(SWFQ_EMPTY_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT
2292 | GMAC1_RX_OVERRUN_INT_BIT);
2293 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2294 ret = IRQ_WAKE_THREAD;
2297 spin_unlock(&geth->irq_lock);
2302 static void gemini_port_remove(struct gemini_ethernet_port *port)
2305 unregister_netdev(port->netdev);
2306 clk_disable_unprepare(port->pclk);
2307 geth_cleanup_freeq(port->geth);
2310 static void gemini_ethernet_init(struct gemini_ethernet *geth)
2312 /* Only do this once both ports are online */
2313 if (geth->initialized)
2315 if (geth->port0 && geth->port1)
2316 geth->initialized = true;
2320 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
2321 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
2322 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
2323 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
2324 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2326 /* Interrupt config:
2328 * GMAC0 intr bits ------> int0 ----> eth0
2329 * GMAC1 intr bits ------> int1 ----> eth1
2330 * TOE intr -------------> int1 ----> eth1
2331 * Classification Intr --> int0 ----> eth0
2332 * Default Q0 -----------> int0 ----> eth0
2333 * Default Q1 -----------> int1 ----> eth1
2334 * FreeQ intr -----------> int1 ----> eth1
2336 writel(0xCCFC0FC0, geth->base + GLOBAL_INTERRUPT_SELECT_0_REG);
2337 writel(0x00F00002, geth->base + GLOBAL_INTERRUPT_SELECT_1_REG);
2338 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_2_REG);
2339 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_3_REG);
2340 writel(0xFF000003, geth->base + GLOBAL_INTERRUPT_SELECT_4_REG);
2342 /* edge-triggered interrupts packed to level-triggered one... */
2343 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
2344 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
2345 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
2346 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
2347 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2350 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
2351 writel(0, geth->base + GLOBAL_HW_FREEQ_BASE_SIZE_REG);
2352 writel(0, geth->base + GLOBAL_SWFQ_RWPTR_REG);
2353 writel(0, geth->base + GLOBAL_HWFQ_RWPTR_REG);
2355 geth->freeq_frag_order = DEFAULT_RX_BUF_ORDER;
2356 /* This makes the queue resize on probe() so that we
2357 * set up and enable the queue IRQ. FIXME: fragile.
2359 geth->freeq_order = 1;
2362 static void gemini_port_save_mac_addr(struct gemini_ethernet_port *port)
2365 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD0));
2367 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD1));
2369 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD2));
2372 static int gemini_ethernet_port_probe(struct platform_device *pdev)
2374 char *port_names[2] = { "ethernet0", "ethernet1" };
2375 struct gemini_ethernet_port *port;
2376 struct device *dev = &pdev->dev;
2377 struct gemini_ethernet *geth;
2378 struct net_device *netdev;
2379 struct resource *gmacres;
2380 struct resource *dmares;
2381 struct device *parent;
2386 parent = dev->parent;
2387 geth = dev_get_drvdata(parent);
2389 if (!strcmp(dev_name(dev), "60008000.ethernet-port"))
2391 else if (!strcmp(dev_name(dev), "6000c000.ethernet-port"))
2396 dev_info(dev, "probe %s ID %d\n", dev_name(dev), id);
2398 netdev = devm_alloc_etherdev_mqs(dev, sizeof(*port), TX_QUEUE_NUM, TX_QUEUE_NUM);
2400 dev_err(dev, "Can't allocate ethernet device #%d\n", id);
2404 port = netdev_priv(netdev);
2405 SET_NETDEV_DEV(netdev, dev);
2406 port->netdev = netdev;
2410 port->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2413 dmares = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2415 dev_err(dev, "no DMA resource\n");
2418 port->dma_base = devm_ioremap_resource(dev, dmares);
2419 if (IS_ERR(port->dma_base))
2420 return PTR_ERR(port->dma_base);
2422 /* GMAC config memory */
2423 gmacres = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2425 dev_err(dev, "no GMAC resource\n");
2428 port->gmac_base = devm_ioremap_resource(dev, gmacres);
2429 if (IS_ERR(port->gmac_base))
2430 return PTR_ERR(port->gmac_base);
2433 irq = platform_get_irq(pdev, 0);
2435 dev_err(dev, "no IRQ\n");
2436 return irq ? irq : -ENODEV;
2440 /* Clock the port */
2441 port->pclk = devm_clk_get(dev, "PCLK");
2442 if (IS_ERR(port->pclk)) {
2443 dev_err(dev, "no PCLK\n");
2444 return PTR_ERR(port->pclk);
2446 ret = clk_prepare_enable(port->pclk);
2450 /* Maybe there is a nice ethernet address we should use */
2451 gemini_port_save_mac_addr(port);
2453 /* Reset the port */
2454 port->reset = devm_reset_control_get_exclusive(dev, NULL);
2455 if (IS_ERR(port->reset)) {
2456 dev_err(dev, "no reset\n");
2457 ret = PTR_ERR(port->reset);
2460 reset_control_reset(port->reset);
2461 usleep_range(100, 500);
2463 /* Assign pointer in the main state container */
2469 /* This will just be done once both ports are up and reset */
2470 gemini_ethernet_init(geth);
2472 platform_set_drvdata(pdev, port);
2474 /* Set up and register the netdev */
2475 netdev->dev_id = port->id;
2477 netdev->netdev_ops = &gmac_351x_ops;
2478 netdev->ethtool_ops = &gmac_351x_ethtool_ops;
2480 spin_lock_init(&port->config_lock);
2481 gmac_clear_hw_stats(netdev);
2483 netdev->hw_features = GMAC_OFFLOAD_FEATURES;
2484 netdev->features |= GMAC_OFFLOAD_FEATURES | NETIF_F_GRO;
2485 /* We can handle jumbo frames up to 10236 bytes so, let's accept
2486 * payloads of 10236 bytes minus VLAN and ethernet header
2488 netdev->min_mtu = ETH_MIN_MTU;
2489 netdev->max_mtu = 10236 - VLAN_ETH_HLEN;
2491 port->freeq_refill = 0;
2492 netif_napi_add(netdev, &port->napi, gmac_napi_poll,
2493 DEFAULT_NAPI_WEIGHT);
2495 if (is_valid_ether_addr((void *)port->mac_addr)) {
2496 memcpy(netdev->dev_addr, port->mac_addr, ETH_ALEN);
2498 dev_dbg(dev, "ethernet address 0x%08x%08x%08x invalid\n",
2499 port->mac_addr[0], port->mac_addr[1],
2501 dev_info(dev, "using a random ethernet address\n");
2502 eth_random_addr(netdev->dev_addr);
2504 gmac_write_mac_address(netdev);
2506 ret = devm_request_threaded_irq(port->dev,
2509 gemini_port_irq_thread,
2511 port_names[port->id],
2516 ret = register_netdev(netdev);
2521 "irq %d, DMA @ 0x%pap, GMAC @ 0x%pap\n",
2522 port->irq, &dmares->start,
2524 ret = gmac_setup_phy(netdev);
2527 "PHY init failed, deferring to ifup time\n");
2531 clk_disable_unprepare(port->pclk);
2535 static int gemini_ethernet_port_remove(struct platform_device *pdev)
2537 struct gemini_ethernet_port *port = platform_get_drvdata(pdev);
2539 gemini_port_remove(port);
2543 static const struct of_device_id gemini_ethernet_port_of_match[] = {
2545 .compatible = "cortina,gemini-ethernet-port",
2549 MODULE_DEVICE_TABLE(of, gemini_ethernet_port_of_match);
2551 static struct platform_driver gemini_ethernet_port_driver = {
2553 .name = "gemini-ethernet-port",
2554 .of_match_table = of_match_ptr(gemini_ethernet_port_of_match),
2556 .probe = gemini_ethernet_port_probe,
2557 .remove = gemini_ethernet_port_remove,
2560 static int gemini_ethernet_probe(struct platform_device *pdev)
2562 struct device *dev = &pdev->dev;
2563 struct gemini_ethernet *geth;
2564 unsigned int retry = 5;
2565 struct resource *res;
2568 /* Global registers */
2569 geth = devm_kzalloc(dev, sizeof(*geth), GFP_KERNEL);
2572 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2575 geth->base = devm_ioremap_resource(dev, res);
2576 if (IS_ERR(geth->base))
2577 return PTR_ERR(geth->base);
2580 /* Wait for ports to stabilize */
2583 val = readl(geth->base + GLOBAL_TOE_VERSION_REG);
2585 } while (!val && --retry);
2587 dev_err(dev, "failed to reset ethernet\n");
2590 dev_info(dev, "Ethernet device ID: 0x%03x, revision 0x%01x\n",
2591 (val >> 4) & 0xFFFU, val & 0xFU);
2593 spin_lock_init(&geth->irq_lock);
2594 spin_lock_init(&geth->freeq_lock);
2596 /* The children will use this */
2597 platform_set_drvdata(pdev, geth);
2599 /* Spawn child devices for the two ports */
2600 return devm_of_platform_populate(dev);
2603 static int gemini_ethernet_remove(struct platform_device *pdev)
2605 struct gemini_ethernet *geth = platform_get_drvdata(pdev);
2607 geth_cleanup_freeq(geth);
2608 geth->initialized = false;
2613 static const struct of_device_id gemini_ethernet_of_match[] = {
2615 .compatible = "cortina,gemini-ethernet",
2619 MODULE_DEVICE_TABLE(of, gemini_ethernet_of_match);
2621 static struct platform_driver gemini_ethernet_driver = {
2624 .of_match_table = of_match_ptr(gemini_ethernet_of_match),
2626 .probe = gemini_ethernet_probe,
2627 .remove = gemini_ethernet_remove,
2630 static int __init gemini_ethernet_module_init(void)
2634 ret = platform_driver_register(&gemini_ethernet_port_driver);
2638 ret = platform_driver_register(&gemini_ethernet_driver);
2640 platform_driver_unregister(&gemini_ethernet_port_driver);
2646 module_init(gemini_ethernet_module_init);
2648 static void __exit gemini_ethernet_module_exit(void)
2650 platform_driver_unregister(&gemini_ethernet_driver);
2651 platform_driver_unregister(&gemini_ethernet_port_driver);
2653 module_exit(gemini_ethernet_module_exit);
2655 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
2656 MODULE_DESCRIPTION("StorLink SL351x (Gemini) ethernet driver");
2657 MODULE_LICENSE("GPL");
2658 MODULE_ALIAS("platform:" DRV_NAME);