2 * Copyright (c) 2014-2015 Hisilicon Limited.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
10 #include "hns_dsaf_mac.h"
11 #include "hns_dsaf_misc.h"
12 #include "hns_dsaf_ppe.h"
13 #include "hns_dsaf_reg.h"
16 HNS_OP_RESET_FUNC = 0x1,
17 HNS_OP_SERDES_LP_FUNC = 0x2,
18 HNS_OP_LED_SET_FUNC = 0x3,
19 HNS_OP_GET_PORT_TYPE_FUNC = 0x4,
20 HNS_OP_GET_SFP_STAT_FUNC = 0x5,
21 HNS_OP_LOCATE_LED_SET_FUNC = 0x6,
25 HNS_DSAF_RESET_FUNC = 0x1,
26 HNS_PPE_RESET_FUNC = 0x2,
27 HNS_XGE_RESET_FUNC = 0x4,
28 HNS_GE_RESET_FUNC = 0x5,
29 HNS_DSAF_CHN_RESET_FUNC = 0x6,
30 HNS_ROCE_RESET_FUNC = 0x7,
33 static const guid_t hns_dsaf_acpi_dsm_guid =
34 GUID_INIT(0x1A85AA1A, 0xE293, 0x415E,
35 0x8E, 0x28, 0x8D, 0x69, 0x0A, 0x0F, 0x82, 0x0A);
37 static void dsaf_write_sub(struct dsaf_device *dsaf_dev, u32 reg, u32 val)
39 if (dsaf_dev->sub_ctrl)
40 dsaf_write_syscon(dsaf_dev->sub_ctrl, reg, val);
42 dsaf_write_reg(dsaf_dev->sc_base, reg, val);
45 static u32 dsaf_read_sub(struct dsaf_device *dsaf_dev, u32 reg)
50 if (dsaf_dev->sub_ctrl) {
51 err = dsaf_read_syscon(dsaf_dev->sub_ctrl, reg, &ret);
53 dev_err(dsaf_dev->dev, "dsaf_read_syscon error %d!\n",
56 ret = dsaf_read_reg(dsaf_dev->sc_base, reg);
62 static void hns_dsaf_acpi_ledctrl_by_port(struct hns_mac_cb *mac_cb, u8 op_type,
63 u32 link, u32 port, u32 act)
65 union acpi_object *obj;
66 union acpi_object obj_args[3], argv4;
68 obj_args[0].integer.type = ACPI_TYPE_INTEGER;
69 obj_args[0].integer.value = link;
70 obj_args[1].integer.type = ACPI_TYPE_INTEGER;
71 obj_args[1].integer.value = port;
72 obj_args[2].integer.type = ACPI_TYPE_INTEGER;
73 obj_args[2].integer.value = act;
75 argv4.type = ACPI_TYPE_PACKAGE;
76 argv4.package.count = 3;
77 argv4.package.elements = obj_args;
79 obj = acpi_evaluate_dsm(ACPI_HANDLE(mac_cb->dev),
80 &hns_dsaf_acpi_dsm_guid, 0, op_type, &argv4);
82 dev_warn(mac_cb->dev, "ledctrl fail, link:%d port:%d act:%d!\n",
90 static void hns_dsaf_acpi_locate_ledctrl_by_port(struct hns_mac_cb *mac_cb,
91 u8 op_type, u32 locate,
94 union acpi_object obj_args[2], argv4;
95 union acpi_object *obj;
97 obj_args[0].integer.type = ACPI_TYPE_INTEGER;
98 obj_args[0].integer.value = locate;
99 obj_args[1].integer.type = ACPI_TYPE_INTEGER;
100 obj_args[1].integer.value = port;
102 argv4.type = ACPI_TYPE_PACKAGE;
103 argv4.package.count = 2;
104 argv4.package.elements = obj_args;
106 obj = acpi_evaluate_dsm(ACPI_HANDLE(mac_cb->dev),
107 &hns_dsaf_acpi_dsm_guid, 0, op_type, &argv4);
109 dev_err(mac_cb->dev, "ledctrl fail, locate:%d port:%d!\n",
117 static void hns_cpld_set_led(struct hns_mac_cb *mac_cb, int link_status,
124 pr_err("sfp_led_opt mac_dev is null!\n");
127 if (!mac_cb->cpld_ctrl) {
128 dev_err(mac_cb->dev, "mac_id=%d, cpld syscon is null !\n",
133 if (speed == MAC_SPEED_10000)
136 value = mac_cb->cpld_led_value;
139 dsaf_set_bit(value, DSAF_LED_LINK_B, link_status);
140 dsaf_set_field(value, DSAF_LED_SPEED_M,
141 DSAF_LED_SPEED_S, speed_reg);
142 dsaf_set_bit(value, DSAF_LED_DATA_B, data);
144 if (value != mac_cb->cpld_led_value) {
145 dsaf_write_syscon(mac_cb->cpld_ctrl,
146 mac_cb->cpld_ctrl_reg, value);
147 mac_cb->cpld_led_value = value;
150 value = (mac_cb->cpld_led_value) & (0x1 << DSAF_LED_ANCHOR_B);
151 dsaf_write_syscon(mac_cb->cpld_ctrl,
152 mac_cb->cpld_ctrl_reg, value);
153 mac_cb->cpld_led_value = value;
157 static void hns_cpld_set_led_acpi(struct hns_mac_cb *mac_cb, int link_status,
161 pr_err("cpld_led_set mac_cb is null!\n");
165 hns_dsaf_acpi_ledctrl_by_port(mac_cb, HNS_OP_LED_SET_FUNC,
166 link_status, mac_cb->mac_id, data);
169 static void cpld_led_reset(struct hns_mac_cb *mac_cb)
171 if (!mac_cb || !mac_cb->cpld_ctrl)
174 dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
175 CPLD_LED_DEFAULT_VALUE);
176 mac_cb->cpld_led_value = CPLD_LED_DEFAULT_VALUE;
179 static void cpld_led_reset_acpi(struct hns_mac_cb *mac_cb)
182 pr_err("cpld_led_reset mac_cb is null!\n");
186 if (mac_cb->media_type != HNAE_MEDIA_TYPE_FIBER)
189 hns_dsaf_acpi_ledctrl_by_port(mac_cb, HNS_OP_LED_SET_FUNC,
190 0, mac_cb->mac_id, 0);
193 static int cpld_set_led_id(struct hns_mac_cb *mac_cb,
194 enum hnae_led_state status)
199 if (!mac_cb->cpld_ctrl)
203 case HNAE_LED_ACTIVE:
204 ret = dsaf_read_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
209 dsaf_set_bit(val, DSAF_LED_ANCHOR_B, CPLD_LED_ON_VALUE);
210 dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
212 mac_cb->cpld_led_value = val;
214 case HNAE_LED_INACTIVE:
215 dsaf_set_bit(mac_cb->cpld_led_value, DSAF_LED_ANCHOR_B,
216 CPLD_LED_DEFAULT_VALUE);
217 dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
218 mac_cb->cpld_led_value);
221 dev_err(mac_cb->dev, "invalid led state: %d!", status);
228 static int cpld_set_led_id_acpi(struct hns_mac_cb *mac_cb,
229 enum hnae_led_state status)
232 case HNAE_LED_ACTIVE:
233 hns_dsaf_acpi_locate_ledctrl_by_port(mac_cb,
234 HNS_OP_LOCATE_LED_SET_FUNC,
238 case HNAE_LED_INACTIVE:
239 hns_dsaf_acpi_locate_ledctrl_by_port(mac_cb,
240 HNS_OP_LOCATE_LED_SET_FUNC,
241 CPLD_LED_DEFAULT_VALUE,
245 dev_err(mac_cb->dev, "invalid led state: %d!", status);
252 #define RESET_REQ_OR_DREQ 1
254 static void hns_dsaf_acpi_srst_by_port(struct dsaf_device *dsaf_dev, u8 op_type,
255 u32 port_type, u32 port, u32 val)
257 union acpi_object *obj;
258 union acpi_object obj_args[3], argv4;
260 obj_args[0].integer.type = ACPI_TYPE_INTEGER;
261 obj_args[0].integer.value = port_type;
262 obj_args[1].integer.type = ACPI_TYPE_INTEGER;
263 obj_args[1].integer.value = port;
264 obj_args[2].integer.type = ACPI_TYPE_INTEGER;
265 obj_args[2].integer.value = val;
267 argv4.type = ACPI_TYPE_PACKAGE;
268 argv4.package.count = 3;
269 argv4.package.elements = obj_args;
271 obj = acpi_evaluate_dsm(ACPI_HANDLE(dsaf_dev->dev),
272 &hns_dsaf_acpi_dsm_guid, 0, op_type, &argv4);
274 dev_warn(dsaf_dev->dev, "reset port_type%d port%d fail!",
282 static void hns_dsaf_rst(struct dsaf_device *dsaf_dev, bool dereset)
288 xbar_reg_addr = DSAF_SUB_SC_XBAR_RESET_REQ_REG;
289 nt_reg_addr = DSAF_SUB_SC_NT_RESET_REQ_REG;
291 xbar_reg_addr = DSAF_SUB_SC_XBAR_RESET_DREQ_REG;
292 nt_reg_addr = DSAF_SUB_SC_NT_RESET_DREQ_REG;
295 dsaf_write_sub(dsaf_dev, xbar_reg_addr, RESET_REQ_OR_DREQ);
296 dsaf_write_sub(dsaf_dev, nt_reg_addr, RESET_REQ_OR_DREQ);
299 static void hns_dsaf_rst_acpi(struct dsaf_device *dsaf_dev, bool dereset)
301 hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
306 static void hns_dsaf_xge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
312 if (port >= DSAF_XGE_NUM)
315 reg_val |= RESET_REQ_OR_DREQ;
316 reg_val |= 0x2082082 << dsaf_dev->mac_cb[port]->port_rst_off;
319 reg_addr = DSAF_SUB_SC_XGE_RESET_REQ_REG;
321 reg_addr = DSAF_SUB_SC_XGE_RESET_DREQ_REG;
323 dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
326 static void hns_dsaf_xge_srst_by_port_acpi(struct dsaf_device *dsaf_dev,
327 u32 port, bool dereset)
329 hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
330 HNS_XGE_RESET_FUNC, port, dereset);
334 * hns_dsaf_srst_chns - reset dsaf channels
335 * @dsaf_dev: dsaf device struct pointer
336 * @msk: xbar channels mask value:
339 * bit12-17 for roce0-5
340 * bit18-19 for com/dfx
341 * @enable: false - request reset , true - drop reset
344 hns_dsaf_srst_chns(struct dsaf_device *dsaf_dev, u32 msk, bool dereset)
349 reg_addr = DSAF_SUB_SC_DSAF_RESET_REQ_REG;
351 reg_addr = DSAF_SUB_SC_DSAF_RESET_DREQ_REG;
353 dsaf_write_sub(dsaf_dev, reg_addr, msk);
357 * hns_dsaf_srst_chns - reset dsaf channels
358 * @dsaf_dev: dsaf device struct pointer
359 * @msk: xbar channels mask value:
362 * bit12-17 for roce0-5
363 * bit18-19 for com/dfx
364 * @enable: false - request reset , true - drop reset
367 hns_dsaf_srst_chns_acpi(struct dsaf_device *dsaf_dev, u32 msk, bool dereset)
369 hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
370 HNS_DSAF_CHN_RESET_FUNC,
374 static void hns_dsaf_roce_srst(struct dsaf_device *dsaf_dev, bool dereset)
377 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_ROCEE_RESET_REQ_REG, 1);
379 dsaf_write_sub(dsaf_dev,
380 DSAF_SUB_SC_ROCEE_CLK_DIS_REG, 1);
381 dsaf_write_sub(dsaf_dev,
382 DSAF_SUB_SC_ROCEE_RESET_DREQ_REG, 1);
384 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_ROCEE_CLK_EN_REG, 1);
388 static void hns_dsaf_roce_srst_acpi(struct dsaf_device *dsaf_dev, bool dereset)
390 hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
391 HNS_ROCE_RESET_FUNC, 0, dereset);
394 static void hns_dsaf_ge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
401 if (port >= DSAF_GE_NUM)
404 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
405 /* DSAF_MAX_PORT_NUM is 6, but DSAF_GE_NUM is 8.
406 We need check to prevent array overflow */
407 if (port >= DSAF_MAX_PORT_NUM)
409 reg_val_1 = 0x1 << port;
410 port_rst_off = dsaf_dev->mac_cb[port]->port_rst_off;
411 /* there is difference between V1 and V2 in register.*/
412 reg_val_2 = AE_IS_VER1(dsaf_dev->dsaf_ver) ?
413 0x1041041 : 0x2082082;
414 reg_val_2 <<= port_rst_off;
417 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,
420 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ0_REG,
423 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ0_REG,
426 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ1_REG,
431 reg_val_2 = AE_IS_VER1(dsaf_dev->dsaf_ver) ? 0x100 : 0x40;
433 reg_val_1 <<= dsaf_dev->reset_offset;
434 reg_val_2 <<= dsaf_dev->reset_offset;
437 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,
440 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_PPE_RESET_REQ_REG,
443 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ1_REG,
446 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_PPE_RESET_DREQ_REG,
452 static void hns_dsaf_ge_srst_by_port_acpi(struct dsaf_device *dsaf_dev,
453 u32 port, bool dereset)
455 hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
456 HNS_GE_RESET_FUNC, port, dereset);
459 static void hns_ppe_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
465 reg_val |= RESET_REQ_OR_DREQ << dsaf_dev->mac_cb[port]->port_rst_off;
468 reg_addr = DSAF_SUB_SC_PPE_RESET_REQ_REG;
470 reg_addr = DSAF_SUB_SC_PPE_RESET_DREQ_REG;
472 dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
476 hns_ppe_srst_by_port_acpi(struct dsaf_device *dsaf_dev, u32 port, bool dereset)
478 hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
479 HNS_PPE_RESET_FUNC, port, dereset);
482 static void hns_ppe_com_srst(struct dsaf_device *dsaf_dev, bool dereset)
487 if (!(dev_of_node(dsaf_dev->dev)))
490 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
491 reg_val = RESET_REQ_OR_DREQ;
493 reg_addr = DSAF_SUB_SC_RCB_PPE_COM_RESET_REQ_REG;
495 reg_addr = DSAF_SUB_SC_RCB_PPE_COM_RESET_DREQ_REG;
498 reg_val = 0x100 << dsaf_dev->reset_offset;
501 reg_addr = DSAF_SUB_SC_PPE_RESET_REQ_REG;
503 reg_addr = DSAF_SUB_SC_PPE_RESET_DREQ_REG;
506 dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
510 * hns_mac_get_sds_mode - get phy ifterface form serdes mode
511 * @mac_cb: mac control block
512 * retuen phy interface
514 static phy_interface_t hns_mac_get_phy_if(struct hns_mac_cb *mac_cb)
518 bool is_ver1 = AE_IS_VER1(mac_cb->dsaf_dev->dsaf_ver);
519 int mac_id = mac_cb->mac_id;
520 phy_interface_t phy_if;
523 if (HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev))
524 return PHY_INTERFACE_MODE_SGMII;
526 if (mac_id >= 0 && mac_id <= 3)
527 reg = HNS_MAC_HILINK4_REG;
529 reg = HNS_MAC_HILINK3_REG;
531 if (!HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev) && mac_id <= 3)
532 reg = HNS_MAC_HILINK4V2_REG;
534 reg = HNS_MAC_HILINK3V2_REG;
537 mode = dsaf_read_sub(mac_cb->dsaf_dev, reg);
538 if (dsaf_get_bit(mode, mac_cb->port_mode_off))
539 phy_if = PHY_INTERFACE_MODE_XGMII;
541 phy_if = PHY_INTERFACE_MODE_SGMII;
546 static phy_interface_t hns_mac_get_phy_if_acpi(struct hns_mac_cb *mac_cb)
548 phy_interface_t phy_if = PHY_INTERFACE_MODE_NA;
549 union acpi_object *obj;
550 union acpi_object obj_args, argv4;
552 obj_args.integer.type = ACPI_TYPE_INTEGER;
553 obj_args.integer.value = mac_cb->mac_id;
555 argv4.type = ACPI_TYPE_PACKAGE,
556 argv4.package.count = 1,
557 argv4.package.elements = &obj_args,
559 obj = acpi_evaluate_dsm(ACPI_HANDLE(mac_cb->dev),
560 &hns_dsaf_acpi_dsm_guid, 0,
561 HNS_OP_GET_PORT_TYPE_FUNC, &argv4);
563 if (!obj || obj->type != ACPI_TYPE_INTEGER)
566 phy_if = obj->integer.value ?
567 PHY_INTERFACE_MODE_XGMII : PHY_INTERFACE_MODE_SGMII;
569 dev_dbg(mac_cb->dev, "mac_id=%d, phy_if=%d\n", mac_cb->mac_id, phy_if);
576 static int hns_mac_get_sfp_prsnt(struct hns_mac_cb *mac_cb, int *sfp_prsnt)
581 if (!mac_cb->cpld_ctrl)
584 ret = dsaf_read_syscon(mac_cb->cpld_ctrl,
585 mac_cb->cpld_ctrl_reg + MAC_SFP_PORT_OFFSET,
594 static int hns_mac_get_sfp_prsnt_acpi(struct hns_mac_cb *mac_cb, int *sfp_prsnt)
596 union acpi_object *obj;
597 union acpi_object obj_args, argv4;
599 obj_args.integer.type = ACPI_TYPE_INTEGER;
600 obj_args.integer.value = mac_cb->mac_id;
602 argv4.type = ACPI_TYPE_PACKAGE,
603 argv4.package.count = 1,
604 argv4.package.elements = &obj_args,
606 obj = acpi_evaluate_dsm(ACPI_HANDLE(mac_cb->dev),
607 &hns_dsaf_acpi_dsm_guid, 0,
608 HNS_OP_GET_SFP_STAT_FUNC, &argv4);
610 if (!obj || obj->type != ACPI_TYPE_INTEGER)
613 *sfp_prsnt = obj->integer.value;
621 * hns_mac_config_sds_loopback - set loop back for serdes
622 * @mac_cb: mac control block
623 * retuen 0 == success
625 static int hns_mac_config_sds_loopback(struct hns_mac_cb *mac_cb, bool en)
627 const u8 lane_id[] = {
628 0, /* mac 0 -> lane 0 */
629 1, /* mac 1 -> lane 1 */
630 2, /* mac 2 -> lane 2 */
631 3, /* mac 3 -> lane 3 */
632 2, /* mac 4 -> lane 2 */
633 3, /* mac 5 -> lane 3 */
634 0, /* mac 6 -> lane 0 */
635 1 /* mac 7 -> lane 1 */
637 #define RX_CSR(lane, reg) ((0x4080 + (reg) * 0x0002 + (lane) * 0x0200) * 2)
638 u64 reg_offset = RX_CSR(lane_id[mac_cb->mac_id], 0);
641 int ret = hns_mac_get_sfp_prsnt(mac_cb, &sfp_prsnt);
643 if (!mac_cb->phy_dev) {
645 pr_info("please confirm sfp is present or not\n");
648 pr_info("no sfp in this eth\n");
651 if (mac_cb->serdes_ctrl) {
654 if (!AE_IS_VER1(mac_cb->dsaf_dev->dsaf_ver)) {
655 #define HILINK_ACCESS_SEL_CFG 0x40008
656 /* hilink4 & hilink3 use the same xge training and
657 * xge u adaptor. There is a hilink access sel cfg
658 * register to select which one to be configed
660 if ((!HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev)) &&
661 (mac_cb->mac_id <= 3))
662 dsaf_write_syscon(mac_cb->serdes_ctrl,
663 HILINK_ACCESS_SEL_CFG, 0);
665 dsaf_write_syscon(mac_cb->serdes_ctrl,
666 HILINK_ACCESS_SEL_CFG, 3);
669 ret = dsaf_read_syscon(mac_cb->serdes_ctrl, reg_offset,
674 dsaf_set_field(origin, 1ull << 10, 10, en);
675 dsaf_write_syscon(mac_cb->serdes_ctrl, reg_offset, origin);
677 u8 *base_addr = (u8 *)mac_cb->serdes_vaddr +
678 (mac_cb->mac_id <= 3 ? 0x00280000 : 0x00200000);
679 dsaf_set_reg_field(base_addr, reg_offset, 1ull << 10, 10, en);
686 hns_mac_config_sds_loopback_acpi(struct hns_mac_cb *mac_cb, bool en)
688 union acpi_object *obj;
689 union acpi_object obj_args[3], argv4;
691 obj_args[0].integer.type = ACPI_TYPE_INTEGER;
692 obj_args[0].integer.value = mac_cb->mac_id;
693 obj_args[1].integer.type = ACPI_TYPE_INTEGER;
694 obj_args[1].integer.value = !!en;
696 argv4.type = ACPI_TYPE_PACKAGE;
697 argv4.package.count = 2;
698 argv4.package.elements = obj_args;
700 obj = acpi_evaluate_dsm(ACPI_HANDLE(mac_cb->dsaf_dev->dev),
701 &hns_dsaf_acpi_dsm_guid, 0,
702 HNS_OP_SERDES_LP_FUNC, &argv4);
704 dev_warn(mac_cb->dsaf_dev->dev, "set port%d serdes lp fail!",
715 struct dsaf_misc_op *hns_misc_op_get(struct dsaf_device *dsaf_dev)
717 struct dsaf_misc_op *misc_op;
719 misc_op = devm_kzalloc(dsaf_dev->dev, sizeof(*misc_op), GFP_KERNEL);
723 if (dev_of_node(dsaf_dev->dev)) {
724 misc_op->cpld_set_led = hns_cpld_set_led;
725 misc_op->cpld_reset_led = cpld_led_reset;
726 misc_op->cpld_set_led_id = cpld_set_led_id;
728 misc_op->dsaf_reset = hns_dsaf_rst;
729 misc_op->xge_srst = hns_dsaf_xge_srst_by_port;
730 misc_op->ge_srst = hns_dsaf_ge_srst_by_port;
731 misc_op->ppe_srst = hns_ppe_srst_by_port;
732 misc_op->ppe_comm_srst = hns_ppe_com_srst;
733 misc_op->hns_dsaf_srst_chns = hns_dsaf_srst_chns;
734 misc_op->hns_dsaf_roce_srst = hns_dsaf_roce_srst;
736 misc_op->get_phy_if = hns_mac_get_phy_if;
737 misc_op->get_sfp_prsnt = hns_mac_get_sfp_prsnt;
739 misc_op->cfg_serdes_loopback = hns_mac_config_sds_loopback;
740 } else if (is_acpi_node(dsaf_dev->dev->fwnode)) {
741 misc_op->cpld_set_led = hns_cpld_set_led_acpi;
742 misc_op->cpld_reset_led = cpld_led_reset_acpi;
743 misc_op->cpld_set_led_id = cpld_set_led_id_acpi;
745 misc_op->dsaf_reset = hns_dsaf_rst_acpi;
746 misc_op->xge_srst = hns_dsaf_xge_srst_by_port_acpi;
747 misc_op->ge_srst = hns_dsaf_ge_srst_by_port_acpi;
748 misc_op->ppe_srst = hns_ppe_srst_by_port_acpi;
749 misc_op->ppe_comm_srst = hns_ppe_com_srst;
750 misc_op->hns_dsaf_srst_chns = hns_dsaf_srst_chns_acpi;
751 misc_op->hns_dsaf_roce_srst = hns_dsaf_roce_srst_acpi;
753 misc_op->get_phy_if = hns_mac_get_phy_if_acpi;
754 misc_op->get_sfp_prsnt = hns_mac_get_sfp_prsnt_acpi;
756 misc_op->cfg_serdes_loopback = hns_mac_config_sds_loopback_acpi;
758 devm_kfree(dsaf_dev->dev, (void *)misc_op);
762 return (void *)misc_op;
765 static int hns_dsaf_dev_match(struct device *dev, void *fwnode)
767 return dev->fwnode == fwnode;
771 platform_device *hns_dsaf_find_platform_device(struct fwnode_handle *fwnode)
775 dev = bus_find_device(&platform_bus_type, NULL,
776 fwnode, hns_dsaf_dev_match);
777 return dev ? to_platform_device(dev) : NULL;