GNU Linux-libre 4.19.264-gnu1
[releases.git] / drivers / net / ethernet / huawei / hinic / hinic_hw_qp.h
1 /*
2  * Huawei HiNIC PCI Express Linux driver
3  * Copyright(c) 2017 Huawei Technologies Co., Ltd
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12  * for more details.
13  *
14  */
15
16 #ifndef HINIC_HW_QP_H
17 #define HINIC_HW_QP_H
18
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/sizes.h>
22 #include <linux/pci.h>
23 #include <linux/skbuff.h>
24
25 #include "hinic_common.h"
26 #include "hinic_hw_if.h"
27 #include "hinic_hw_wqe.h"
28 #include "hinic_hw_wq.h"
29 #include "hinic_hw_qp_ctxt.h"
30
31 #define HINIC_SQ_DB_INFO_PI_HI_SHIFT            0
32 #define HINIC_SQ_DB_INFO_QID_SHIFT              8
33 #define HINIC_SQ_DB_INFO_PATH_SHIFT             23
34 #define HINIC_SQ_DB_INFO_COS_SHIFT              24
35 #define HINIC_SQ_DB_INFO_TYPE_SHIFT             27
36
37 #define HINIC_SQ_DB_INFO_PI_HI_MASK             0xFF
38 #define HINIC_SQ_DB_INFO_QID_MASK               0x3FF
39 #define HINIC_SQ_DB_INFO_PATH_MASK              0x1
40 #define HINIC_SQ_DB_INFO_COS_MASK               0x7
41 #define HINIC_SQ_DB_INFO_TYPE_MASK              0x1F
42
43 #define HINIC_SQ_DB_INFO_SET(val, member)       \
44                 (((u32)(val) & HINIC_SQ_DB_INFO_##member##_MASK) \
45                  << HINIC_SQ_DB_INFO_##member##_SHIFT)
46
47 #define HINIC_SQ_WQEBB_SIZE                     64
48 #define HINIC_RQ_WQEBB_SIZE                     32
49
50 #define HINIC_SQ_PAGE_SIZE                      SZ_4K
51 #define HINIC_RQ_PAGE_SIZE                      SZ_4K
52
53 #define HINIC_SQ_DEPTH                          SZ_4K
54 #define HINIC_RQ_DEPTH                          SZ_4K
55
56 /* In any change to HINIC_RX_BUF_SZ, HINIC_RX_BUF_SZ_IDX must be changed */
57 #define HINIC_RX_BUF_SZ                         2048
58 #define HINIC_RX_BUF_SZ_IDX                     HINIC_RX_BUF_SZ_2048_IDX
59
60 #define HINIC_MIN_TX_WQE_SIZE(wq)               \
61                 ALIGN(HINIC_SQ_WQE_SIZE(1), (wq)->wqebb_size)
62
63 #define HINIC_MIN_TX_NUM_WQEBBS(sq)             \
64                 (HINIC_MIN_TX_WQE_SIZE((sq)->wq) / (sq)->wq->wqebb_size)
65
66 enum hinic_rx_buf_sz_idx {
67         HINIC_RX_BUF_SZ_32_IDX,
68         HINIC_RX_BUF_SZ_64_IDX,
69         HINIC_RX_BUF_SZ_96_IDX,
70         HINIC_RX_BUF_SZ_128_IDX,
71         HINIC_RX_BUF_SZ_192_IDX,
72         HINIC_RX_BUF_SZ_256_IDX,
73         HINIC_RX_BUF_SZ_384_IDX,
74         HINIC_RX_BUF_SZ_512_IDX,
75         HINIC_RX_BUF_SZ_768_IDX,
76         HINIC_RX_BUF_SZ_1024_IDX,
77         HINIC_RX_BUF_SZ_1536_IDX,
78         HINIC_RX_BUF_SZ_2048_IDX,
79         HINIC_RX_BUF_SZ_3072_IDX,
80         HINIC_RX_BUF_SZ_4096_IDX,
81         HINIC_RX_BUF_SZ_8192_IDX,
82         HINIC_RX_BUF_SZ_16384_IDX,
83 };
84
85 struct hinic_sq {
86         struct hinic_hwif       *hwif;
87
88         struct hinic_wq         *wq;
89
90         u32                     irq;
91         u16                     msix_entry;
92
93         void                    *hw_ci_addr;
94         dma_addr_t              hw_ci_dma_addr;
95
96         void __iomem            *db_base;
97
98         struct sk_buff          **saved_skb;
99 };
100
101 struct hinic_rq {
102         struct hinic_hwif       *hwif;
103
104         struct hinic_wq         *wq;
105
106         struct cpumask          affinity_mask;
107         u32                     irq;
108         u16                     msix_entry;
109
110         size_t                  buf_sz;
111
112         struct sk_buff          **saved_skb;
113
114         struct hinic_rq_cqe     **cqe;
115         dma_addr_t              *cqe_dma;
116
117         u16                     *pi_virt_addr;
118         dma_addr_t              pi_dma_addr;
119 };
120
121 struct hinic_qp {
122         struct hinic_sq         sq;
123         struct hinic_rq         rq;
124
125         u16     q_id;
126 };
127
128 void hinic_qp_prepare_header(struct hinic_qp_ctxt_header *qp_ctxt_hdr,
129                              enum hinic_qp_ctxt_type ctxt_type,
130                              u16 num_queues, u16 max_queues);
131
132 void hinic_sq_prepare_ctxt(struct hinic_sq_ctxt *sq_ctxt,
133                            struct hinic_sq *sq, u16 global_qid);
134
135 void hinic_rq_prepare_ctxt(struct hinic_rq_ctxt *rq_ctxt,
136                            struct hinic_rq *rq, u16 global_qid);
137
138 int hinic_init_sq(struct hinic_sq *sq, struct hinic_hwif *hwif,
139                   struct hinic_wq *wq, struct msix_entry *entry, void *ci_addr,
140                   dma_addr_t ci_dma_addr, void __iomem *db_base);
141
142 void hinic_clean_sq(struct hinic_sq *sq);
143
144 int hinic_init_rq(struct hinic_rq *rq, struct hinic_hwif *hwif,
145                   struct hinic_wq *wq, struct msix_entry *entry);
146
147 void hinic_clean_rq(struct hinic_rq *rq);
148
149 int hinic_get_sq_free_wqebbs(struct hinic_sq *sq);
150
151 int hinic_get_rq_free_wqebbs(struct hinic_rq *rq);
152
153 void hinic_sq_prepare_wqe(struct hinic_sq *sq, u16 prod_idx,
154                           struct hinic_sq_wqe *wqe, struct hinic_sge *sges,
155                           int nr_sges);
156
157 void hinic_sq_write_db(struct hinic_sq *sq, u16 prod_idx, unsigned int wqe_size,
158                        unsigned int cos);
159
160 struct hinic_sq_wqe *hinic_sq_get_wqe(struct hinic_sq *sq,
161                                       unsigned int wqe_size, u16 *prod_idx);
162
163 void hinic_sq_write_wqe(struct hinic_sq *sq, u16 prod_idx,
164                         struct hinic_sq_wqe *wqe, struct sk_buff *skb,
165                         unsigned int wqe_size);
166
167 struct hinic_sq_wqe *hinic_sq_read_wqe(struct hinic_sq *sq,
168                                        struct sk_buff **skb,
169                                        unsigned int wqe_size, u16 *cons_idx);
170
171 struct hinic_sq_wqe *hinic_sq_read_wqebb(struct hinic_sq *sq,
172                                          struct sk_buff **skb,
173                                          unsigned int *wqe_size, u16 *cons_idx);
174
175 void hinic_sq_put_wqe(struct hinic_sq *sq, unsigned int wqe_size);
176
177 void hinic_sq_get_sges(struct hinic_sq_wqe *wqe, struct hinic_sge *sges,
178                        int nr_sges);
179
180 struct hinic_rq_wqe *hinic_rq_get_wqe(struct hinic_rq *rq,
181                                       unsigned int wqe_size, u16 *prod_idx);
182
183 void hinic_rq_write_wqe(struct hinic_rq *rq, u16 prod_idx,
184                         struct hinic_rq_wqe *wqe, struct sk_buff *skb);
185
186 struct hinic_rq_wqe *hinic_rq_read_wqe(struct hinic_rq *rq,
187                                        unsigned int wqe_size,
188                                        struct sk_buff **skb, u16 *cons_idx);
189
190 struct hinic_rq_wqe *hinic_rq_read_next_wqe(struct hinic_rq *rq,
191                                             unsigned int wqe_size,
192                                             struct sk_buff **skb,
193                                             u16 *cons_idx);
194
195 void hinic_rq_put_wqe(struct hinic_rq *rq, u16 cons_idx,
196                       unsigned int wqe_size);
197
198 void hinic_rq_get_sge(struct hinic_rq *rq, struct hinic_rq_wqe *wqe,
199                       u16 cons_idx, struct hinic_sge *sge);
200
201 void hinic_rq_prepare_wqe(struct hinic_rq *rq, u16 prod_idx,
202                           struct hinic_rq_wqe *wqe, struct hinic_sge *sge);
203
204 void hinic_rq_update(struct hinic_rq *rq, u16 prod_idx);
205
206 #endif